TWI683362B - Method for trimming si fin structure - Google Patents
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- TWI683362B TWI683362B TW107145469A TW107145469A TWI683362B TW I683362 B TWI683362 B TW I683362B TW 107145469 A TW107145469 A TW 107145469A TW 107145469 A TW107145469 A TW 107145469A TW I683362 B TWI683362 B TW I683362B
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- 238000009966 trimming Methods 0.000 title claims abstract description 43
- 238000000034 method Methods 0.000 title claims abstract description 32
- 239000013078 crystal Substances 0.000 claims abstract description 49
- 238000005530 etching Methods 0.000 claims abstract description 41
- 239000003495 polar organic solvent Substances 0.000 claims abstract description 16
- 239000000908 ammonium hydroxide Substances 0.000 claims abstract description 15
- 125000001453 quaternary ammonium group Chemical group 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 11
- WYURNTSHIVDZCO-UHFFFAOYSA-N Tetrahydrofuran Chemical compound C1CCOC1 WYURNTSHIVDZCO-UHFFFAOYSA-N 0.000 claims abstract description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims abstract description 9
- IAZDPXIOMUYVGZ-UHFFFAOYSA-N Dimethylsulphoxide Chemical group CS(C)=O IAZDPXIOMUYVGZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims abstract description 5
- SECXISVLQFMRJM-UHFFFAOYSA-N N-Methylpyrrolidone Chemical compound CN1CCCC1=O SECXISVLQFMRJM-UHFFFAOYSA-N 0.000 claims abstract description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 93
- 229910052710 silicon Inorganic materials 0.000 claims description 93
- 239000010703 silicon Substances 0.000 claims description 93
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical group [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 24
- 239000003093 cationic surfactant Substances 0.000 claims description 12
- 229920001223 polyethylene glycol Polymers 0.000 claims description 5
- VDZOOKBUILJEDG-UHFFFAOYSA-M tetrabutylammonium hydroxide Substances [OH-].CCCC[N+](CCCC)(CCCC)CCCC VDZOOKBUILJEDG-UHFFFAOYSA-M 0.000 claims description 5
- -1 tetrabutylammonium hydroxide Compound Chemical class 0.000 claims description 5
- 239000002202 Polyethylene glycol Substances 0.000 claims description 4
- 150000003863 ammonium salts Chemical group 0.000 claims description 4
- YLQBMQCUIZJEEH-UHFFFAOYSA-N tetrahydrofuran Natural products C=1C=COC=1 YLQBMQCUIZJEEH-UHFFFAOYSA-N 0.000 claims description 4
- 229940073455 tetraethylammonium hydroxide Drugs 0.000 claims description 3
- LRGJRHZIDJQFCL-UHFFFAOYSA-M tetraethylazanium;hydroxide Chemical compound [OH-].CC[N+](CC)(CC)CC LRGJRHZIDJQFCL-UHFFFAOYSA-M 0.000 claims description 3
- PMPVIKIVABFJJI-UHFFFAOYSA-N Cyclobutane Chemical compound C1CCC1 PMPVIKIVABFJJI-UHFFFAOYSA-N 0.000 claims description 2
- IAZDPXIOMUYVGZ-WFGJKAKNSA-N Dimethyl sulfoxide Chemical group [2H]C([2H])([2H])S(=O)C([2H])([2H])[2H] IAZDPXIOMUYVGZ-WFGJKAKNSA-N 0.000 claims description 2
- NDKBVBUGCNGSJJ-UHFFFAOYSA-M benzyltrimethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)CC1=CC=CC=C1 NDKBVBUGCNGSJJ-UHFFFAOYSA-M 0.000 claims description 2
- USJRLGNYCQWLPF-UHFFFAOYSA-N chlorophosphane Chemical group ClP USJRLGNYCQWLPF-UHFFFAOYSA-N 0.000 claims description 2
- HXJUTPCZVOIRIF-UHFFFAOYSA-N sulfolane Chemical compound O=S1(=O)CCCC1 HXJUTPCZVOIRIF-UHFFFAOYSA-N 0.000 abstract description 7
- 238000012360 testing method Methods 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 8
- 230000005669 field effect Effects 0.000 description 6
- 238000002955 isolation Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000000691 measurement method Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910020448 SiO2(OH)2-2+2H2 Inorganic materials 0.000 description 1
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- HWEQKSVYKBUIIK-UHFFFAOYSA-N cyclobuta-1,3-diene Chemical compound C1=CC=C1 HWEQKSVYKBUIIK-UHFFFAOYSA-N 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- BDUPRNVPXOHWIL-UHFFFAOYSA-N dimethyl sulfite Chemical group COS(=O)OC BDUPRNVPXOHWIL-UHFFFAOYSA-N 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000006260 foam Substances 0.000 description 1
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
- H01L21/30608—Anisotropic liquid etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
- H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
Abstract
Description
本發明是關於一種鰭式場效電晶體的矽鰭片結構的修整方法，特別是關於一種利用濕蝕刻工藝修整鰭式場效電晶體的矽鰭片結構的修整方法。The invention relates to a method for trimming a silicon fin structure of a fin field effect transistor, in particular to a method for trimming a silicon fin structure of a fin field effect transistor using a wet etching process.
為了持續達到金屬氧化物半導體場效電晶體(MOSFET)的微縮，鰭式場效電晶體(FinFET)因應而生。In order to continue to achieve the miniaturization of metal oxide semiconductor field effect transistors (MOSFETs), fin field effect transistors (FinFETs) were born.
具有薄型鰭片結構的三閘極電晶體(Tri-gate)具有與現有工藝流程更兼容的優點，因此，三閘極電晶體可用作短通道高性能元件或低壓電路。三閘極電晶體的臨界電壓(threshold voltage，Vth)及漏電流(Off-current，Ioff)受到三閘極的拐角(corner)的頂面及側面的閘極電場(Gate electric fields)重疊的影響，因此需要透過修整鰭片及其拐角來抑制此種拐角效應(corner effect)。The tri-gate transistor with a thin fin structure has the advantage of being more compatible with the existing process flow. Therefore, the tri-gate transistor can be used as a short-channel high-performance component or a low-voltage circuit. The threshold voltage (Vth) and leakage current (Off-current, Ioff) of the triple gate transistor are affected by the overlap of the gate electric fields on the top and side of the corner of the triple gate Therefore, the corner effect needs to be suppressed by trimming the fins and their corners.
例如，現有的其中一種矽鰭片修整方法是使用多循環氧化加上稀釋的氫氟酸來修整矽鰭片11，然而，矽基材12的淺溝槽隔離結構13或其他結構上的二氧化矽可能也會連帶被蝕刻(參閱圖1)，並且會導致其他可靠性問題。For example, one of the existing methods for trimming silicon fins is to use multi-cycle oxidation plus diluted hydrofluoric acid to trim
現有的另一種矽鰭片修整方法是利用鹼性物質，例如NH
4OH、TMAH等濕蝕刻矽鰭片21，形成修整後的矽鰭片21a。但是，上述鹼性物質對矽鰭片21的 (100)、(110)及(111) 晶面有很高的各向異性(anisotropic)，而導致修整後的矽鰭片21a有頂點問題(tip-top issue)(參閱圖2)。
Another existing method for trimming silicon fins is to use an alkaline substance, such as NH 4 OH, TMAH, etc., to wet-etch the silicon fins 21 to form the trimmed silicon fins 21a. However, the above-mentioned alkaline substances have a high anisotropic effect on the (100), (110) and (111) crystal planes of the
例如中國專利CN106206314A的矽鰭片修整方法，是在矽鰭片31上形成外延結構32，以補償矽鰭片31的(100)及(111)晶面上的較快蝕刻速率來解決上述的頂點問題，並形成具有特定形狀的修整後的矽鰭片31a(參閱圖3)。然而，該方法的控制非常複雜，而導致製造過程中的再現性差。For example, the silicon fin trimming method of Chinese Patent CN106206314A is to form an
因此，本發明的目的，即在提供一種可以改善先前技術的至少一個缺點的矽鰭片結構的修整方法。Therefore, an object of the present invention is to provide a method for trimming a silicon fin structure that can improve at least one disadvantage of the prior art.
於是，本發明矽鰭片結構的修整方法，包含以下步驟： (a) 在一基材上形成一矽鰭片結構；及 (b) 使該矽鰭片結構與一極性溶液接觸，以使該矽鰭片結構的(100)晶面的蝕刻速率與(111)晶面的蝕刻速率的比值範圍不大於2.5、(110)晶面的蝕刻速率與(111)晶面的蝕刻速率的比值範圍不大於2.5，以及(100)晶面的蝕刻速率與(110)晶面的蝕刻速率的比值範圍介於0.9~1.1，該極性溶液包括四級銨氫氧化物、水及極性有機溶劑，該極性有機溶劑是選自於二甲基亞碸、環丁碸、四氫呋喃、N-甲基□咯烷酮或其組合。Therefore, the method for trimming the silicon fin structure of the present invention includes the following steps: (a) forming a silicon fin structure on a substrate; and (b) contacting the silicon fin structure with a polar solution to make the The ratio of the etching rate of the (100) crystal plane to the (111) crystal plane of the silicon fin structure is not more than 2.5, and the ratio range of the etching rate of the (110) crystal plane and the etching rate of the (111) crystal plane is not Greater than 2.5, and the ratio of (100) crystal plane etching rate to (110) crystal plane etching rate ranges from 0.9 to 1.1, the polar solution includes quaternary ammonium hydroxide, water and polar organic solvent, the polar organic The solvent is selected from dimethyl sulfoxide, cyclobutane, tetrahydrofuran, N-methyl-pyrrolidone or a combination thereof.
本發明的功效在於：本發明透過使用對該矽鰭片結構的(100)、(110)及(111) 晶面具有特定的蝕刻選擇比的該極性溶液，使修整後的該矽鰭片結構具有所希望的形狀，不會導致修整後的該矽鰭片結構有頂點問題。且本發明方法不需於該矽鰭片結構上形成外延結構，整體工藝流程較為簡易。The effect of the present invention is that the present invention uses the polar solution with a specific etching selectivity ratio to the (100), (110) and (111) crystal planes of the silicon fin structure to make the silicon fin structure after finishing Having the desired shape will not cause the vertex problem of the trimmed silicon fin structure. Moreover, the method of the present invention does not need to form an epitaxial structure on the silicon fin structure, and the overall process flow is relatively simple.
本發明的另一功效在於：本發明透過使用該極性溶液修整該矽鰭片結構，使修整後的該矽鰭片結構具有較平滑的表面。Another effect of the present invention is that the present invention uses the polar solution to trim the silicon fin structure, so that the trimmed silicon fin structure has a smoother surface.
以下就本發明矽鰭片結構的修整方法進行詳細說明。The method for trimming the silicon fin structure of the present invention will be described in detail below.
在該步驟(a)， 在一基材上形成一矽鰭片結構(silicon fin structure)。在本發明的一些實施態樣中，該基材為塊體矽晶圓(bulk silicon wafer)或絕緣層覆矽晶圓(SOI wafer)。該矽鰭片結構具有密勒指數(100)、(110)及(111)的晶面。在本發明的一些實施態樣中，該基材包括淺溝槽隔離結構(shallow trench isolation structure，STI structure)。在該基材上形成該矽鰭片結構及淺溝槽隔離結構的具體方式，可使用任何現有的鰭狀場效電晶體(FinFET)的製備工藝，於此不再贅述。In this step (a), a silicon fin structure is formed on a substrate. In some embodiments of the present invention, the substrate is a bulk silicon wafer or a SOI wafer. The silicon fin structure has crystal planes with Miller indices (100), (110) and (111). In some embodiments of the present invention, the substrate includes a shallow trench isolation structure (STI structure). For the specific method of forming the silicon fin structure and the shallow trench isolation structure on the substrate, any existing fin-shaped field effect transistor (FinFET) manufacturing process can be used, which will not be repeated here.
在該步驟(b)， 使該矽鰭片結構與一包括四級銨氫氧化物、水及極性有機溶劑的極性溶液接觸以修整該矽鰭片結構，形成修整後的矽鰭片結構。且該極性溶液在該矽鰭片結構的(100)晶面的蝕刻速率與在(111)晶面的蝕刻速率的比值範圍不大於2.5、在(110)晶面的蝕刻速率與在(111)晶面的蝕刻速率的比值範圍不大於2.5，以及在(100)晶面的蝕刻速率與在(110)晶面的蝕刻速率的比值範圍介於0.9~1.1，從而使該修整後的矽鰭片結構具有所希望的形狀，且該修整後的矽鰭片結構不會如同現有技術一樣存在著頂點問題(tip-top issue)。In this step (b), the silicon fin structure is brought into contact with a polar solution including quaternary ammonium hydroxide, water and a polar organic solvent to trim the silicon fin structure to form a trimmed silicon fin structure. And the ratio of the etching rate of the polar solution on the (100) crystal plane of the silicon fin structure to the (111) crystal plane is not more than 2.5, the etching rate on the (110) crystal plane and the (111) The ratio of the etching rate of the crystal plane is not more than 2.5, and the ratio of the etching rate of the (100) crystal plane to the etching rate of the (110) crystal plane is between 0.9~1.1, so that the trimmed silicon fin The structure has the desired shape, and the trimmed silicon fin structure does not have a tip-top issue like the prior art.
參閱圖4，為本發明的一種實施態樣，該基材41具有淺溝槽隔離結構411，該矽鰭片結構42形成在該基材41上，該矽鰭片結構42與該極性溶液接觸後，形成該修整後的矽鰭片結構42a。Referring to FIG. 4, according to an embodiment of the present invention, the
其中，該四級銨氫氧化物的作用是提供氫氧基，以蝕刻該矽鰭片結構，蝕刻的化學反應如下所示： Si + 2OH -+ 2H 2O→SiO 2(OH) 2 2-+ 2H 2較佳地，該四級銨氫氧化物是選自於四甲基銨氫氧化物(TMAH)、四乙基銨氫氧化物(TEAH)、四丁基銨氫氧化物(TBAH)、苄基三甲基銨氫氧化物或其組合。在本發明的一些實施態樣中，以該極性溶液的總量為100 wt%，該四級銨氫氧化物的含量比例範圍為0.1~5 wt%，更有助於該極性溶液對該矽鰭片結構的(100)、(110)及(111)晶面的蝕刻速率在更佳的範圍。更佳地，以該極性溶液的總量為100 wt%，該四級銨氫氧化物的含量比例範圍為0.5~2 wt%。 Wherein the action of quaternary ammonium hydroxide to provide a hydroxyl group, to etch the silicon fin structure, a chemical etching reaction is shown below: Si + 2OH - + 2H 2 O → SiO 2 (OH) 2 2- + 2H 2 Preferably, the quaternary ammonium hydroxide is selected from tetramethylammonium hydroxide (TMAH), tetraethylammonium hydroxide (TEAH), tetrabutylammonium hydroxide (TBAH) , Benzyltrimethylammonium hydroxide or a combination thereof. In some embodiments of the present invention, the total amount of the polar solution is 100 wt%, and the content ratio of the quaternary ammonium hydroxide ranges from 0.1 to 5 wt%, which is more helpful for the polar solution to the silicon The etching rate of the (100), (110) and (111) crystal planes of the fin structure is in a better range. More preferably, with the total amount of the polar solution being 100 wt%, the content ratio of the quaternary ammonium hydroxide ranges from 0.5 to 2 wt%.
該極性有機溶劑使得該極性溶液對該矽鰭片結構具有良好的濕潤能力，從而有利於蝕刻反應的擴散及輸送。該極性有機溶劑的另一個作用是保護鰭式場效電晶體中其他結構的介電質不被該極性溶液蝕刻，上述介電質例如但不限於二氧化矽(SiO 2)、氮化矽(SiN)、碳氮化矽(SiCN)、氮氧化矽(SiON)等。該極性有機溶劑是選自於二甲基亞碸(DMSO)、環丁碸(sulfolane)、四氫呋喃(THF)、N-甲基□咯烷酮(NMP)或其組合。在本發明的一些實施態樣中，以該極性溶液的總量為100 wt%，該極性有機溶劑的含量比例範圍為5~90 wt%，更有助於該極性溶液對矽鰭片結構的(100)、(110)及(111)晶面的蝕刻選擇比在更佳的範圍。更佳地，以該極性溶液的總量為100 wt%，該極性有機溶劑的含量比例範圍為10~85 wt%。 The polar organic solvent makes the polar solution have a good wetting ability to the silicon fin structure, thereby facilitating the diffusion and transportation of the etching reaction. Another function of the polar organic solvent is to protect the dielectrics of other structures in the fin field effect transistor from being etched by the polar solution, such as but not limited to silicon dioxide (SiO 2 ), silicon nitride (SiN) ), silicon carbon nitride (SiCN), silicon oxynitride (SiON), etc. The polar organic solvent is selected from dimethyl sulfite (DMSO), sulfolane, tetrahydrofuran (THF), N-methyl-pyrrolidone (NMP) or a combination thereof. In some embodiments of the present invention, the total amount of the polar solution is 100 wt%, and the content ratio of the polar organic solvent ranges from 5 to 90 wt%, which is more conducive to the polar solution’s effect on the silicon fin structure. The (100), (110), and (111) crystal planes have a better etching selection ratio. More preferably, the total amount of the polar solution is 100 wt%, and the content ratio of the polar organic solvent ranges from 10 to 85% by weight.
較佳地，該極性溶液還包括陽離子界面活性劑。該陽離子界面活性劑會附著在該矽鰭片結構，形成能減緩該四級銨氫氧化物擴散的擴散阻擋層，進而減緩蝕刻反應的擴散。且該陽離子界面活性劑對該矽鰭片結構的(100)、(110)及(111)晶面有不同的親和力，從而更顯著地改變蝕刻選擇比(etching selectivity)。更佳地，該陽離子界面活性劑是選自於四級鏻氯化物、聚乙二醇的銨鹽[cationic ammonium salt of poly(ethylene glycol)， 簡稱ASPEG]或其組合。在本發明的一些實施態樣中，以該極性溶液的總量為100 wt%，該陽離子界面活性劑的含量比例範圍為0.01~2wt%，能夠避免該極性溶液具有過多泡沫，以及更有助於該極性溶液對矽鰭片結構的(100)、(110)及(111)晶面的蝕刻選擇比在更佳的範圍。更佳地，以該極性溶液的總量為100 wt%，該陽離子界面活性劑的含量比例範圍為0.05~1 wt%。Preferably, the polar solution further includes a cationic surfactant. The cationic surfactant will adhere to the silicon fin structure, forming a diffusion barrier layer that can slow the diffusion of the quaternary ammonium hydroxide, thereby slowing the diffusion of the etching reaction. Moreover, the cationic surfactant has different affinity to the (100), (110) and (111) crystal planes of the silicon fin structure, thereby significantly changing the etching selectivity. More preferably, the cationic surfactant is selected from quaternary phosphonium chloride, ammonium salt of polyethylene glycol [cationic ammonium salt of poly(ethylene glycol), ASPEG for short] or a combination thereof. In some embodiments of the present invention, the total amount of the polar solution is 100 wt%, and the content ratio of the cationic surfactant is in the range of 0.01 to 2 wt%, which can prevent the polar solution from having too much foam and is more helpful In this polar solution, the (100), (110), and (111) crystal planes of the silicon fin structure are etched in a better selection range. More preferably, the total amount of the polar solution is 100 wt%, and the content ratio of the cationic surfactant ranges from 0.05 to 1 wt%.
本發明將就以下實施例來作進一步說明，但應瞭解的是，該實施例僅為例示說明之用，而不應被解釋為本發明實施之限制。The present invention will be further described in the following embodiments, but it should be understood that this embodiment is for illustrative purposes only, and should not be construed as a limitation of the implementation of the present invention.
[實施例1]矽鰭片結構的修整方法 (a)利用黃光顯影搭配乾蝕刻， 在一個矽晶圓基材上形成一個矽鰭片結構。該矽鰭片結構具有(100) 、(110)及(111)的晶面。 (b) 在30℃的環境，使該矽鰭片結構與一極性溶液接觸3分鐘以修整該矽鰭片結構。該極性溶液包括0.8wt%的四甲基銨氫氧化物、35wt%的環丁碸、0.1wt%的聚乙二醇的銨鹽，以及64.1wt%的水。[Example 1] Method for trimming silicon fin structure (a) Using yellow light development and dry etching, a silicon fin structure is formed on a silicon wafer substrate. The silicon fin structure has (100), (110) and (111) crystal planes. (b) The silicon fin structure was brought into contact with a polar solution for 3 minutes at 30°C to trim the silicon fin structure. The polar solution includes 0.8 wt% of tetramethylammonium hydroxide, 35 wt% of ciprool, 0.1 wt% of ammonium salt of polyethylene glycol, and 64.1 wt% of water.
[實施例2及比較例1]矽鰭片結構的修整方法 實施例2及比較例1的矽鰭片結構的修整方法是與實施例1的矽鰭片結構的修整方法相似，不同在於：在該實施例2及比較例1中，依據表1改變極性溶液的組成。[Example 2 and Comparative Example 1] The method for trimming the silicon fin structure of Example 2 and Comparative Example 1 is the same as the method for trimming the silicon fin structure of Example 1, except that: In Example 2 and Comparative Example 1, the composition of the polar solution was changed according to Table 1.
[測試例1] 在30℃的環境，使用實施例1中的該極性溶液，將表2所列的介電質薄膜與實施例1的極性溶液分別接觸20分鐘。[Test Example 1] Using the polar solution in Example 1 in a 30°C environment, the dielectric thin films listed in Table 2 and the polar solution in Example 1 were respectively contacted for 20 minutes.
[測試例2] 測試例2是與測試例1相似，不同在於：在該測試例2，使用實施例2中的該極性溶液。[Test Example 2] Test Example 2 is similar to Test Example 1, except that in Test Example 2, the polar solution in Example 2 is used.
[性質評價][Nature evaluation]
1. 蝕刻速率： 以下用實施例1的該矽鰭片結構的(100)晶面以及比較例1的介電質薄膜，示例說明蝕刻速率的測量方式。實施例1的該矽鰭片結構的其他晶面、實施例2、比較例1及測試例2是根據同樣的測量方式得到蝕刻速率。 利用橢圓儀(廠商型號：J.A.woollam M-2000)量測實施例1的該矽鰭片結構的(100)晶面於修整前的厚度以及修整後的厚度[單位：埃(angstrom)]。並將修整前的厚度與修整後的厚度的差值除以該矽鰭片結構接觸該極性溶液的接觸時間，得到該矽鰭片結構的(100)晶面的蝕刻速率。 使用相似的測量方式，利用橢圓儀量測測試例1的介電質薄膜於修整前的厚度以及修整後的厚度[單位：埃(angstrom)]。並將修整前的厚度與修整後的厚度的差值除以該介電質薄膜接觸該極性溶液的接觸時間，得到該介電質薄膜的蝕刻速率。1. Etching rate: The (100) crystal plane of the silicon fin structure of Example 1 and the dielectric thin film of Comparative Example 1 are used below to illustrate the measurement method of the etching rate. The other crystal planes of the silicon fin structure of Example 1, Example 2, Comparative Example 1, and Test Example 2 obtained the etching rate according to the same measurement method. The thickness of the (100) crystal plane of the silicon fin structure of Example 1 before trimming and the thickness after trimming [unit: angstrom] were measured using an ellipsometer (manufacturer model: J.A. woollam M-2000). The difference between the thickness before trimming and the thickness after trimming is divided by the contact time of the silicon fin structure in contact with the polar solution to obtain the etching rate of the (100) crystal plane of the silicon fin structure. Using a similar measurement method, the thickness of the dielectric film of Test Example 1 before trimming and the thickness after trimming [unit: angstrom] were measured using an ellipsometer. The difference between the thickness before trimming and the thickness after trimming is divided by the contact time of the dielectric thin film in contact with the polar solution to obtain the etching rate of the dielectric thin film.
2. 均方根表面粗糙度(RMS roughness)： 利用原子力電子顯微鏡(atomic force microscope，簡稱 AFM；廠商為Bruker)，量測實施例1至2及比較例1的矽鰭片結構的(100)晶面及(110)晶面於修整前及修整後的均方根粗糙度。2. The root mean square surface roughness (RMS roughness): using an atomic force microscope (atomic force microscope, AFM for short; the manufacturer is Bruker), measure the silicon fin structures of Examples 1 to 2 and Comparative Example 1 (100) The root-mean-square roughness of the crystal plane and (110) crystal plane before and after trimming.
表1
表2
由表1的結果可知，實施例1及2矽鰭片結構的修整方法，透過使用包括四級銨氫氧化物、極性有機溶劑、陽離子界面活性劑及水的極性溶液，使該矽鰭片結構的(100)晶面的蝕刻速率與(111)晶面的蝕刻速率的比值不大於2.5，(110)晶面的蝕刻速率與(111)晶面的蝕刻速率的比值範圍不大於2.5，(100)晶面的蝕刻速率與(110)晶面的蝕刻速率的比值在0.9~1.1，進而使修整後的矽鰭片結構具有所希望的形狀。且相較於比較例1，實施例1及2矽鰭片結構的修整方法，透過使用該極性溶液，使修整後的矽鰭片具有較平滑的表面。It can be seen from the results in Table 1 that the silicon fin structure of Examples 1 and 2 was modified by using a polar solution including quaternary ammonium hydroxide, polar organic solvent, cationic surfactant and water. The ratio of the etching rate of the (100) crystal plane to the etching rate of the (111) crystal plane is not more than 2.5, and the ratio of the etching rate of the (110) crystal plane to the etching rate of the (111) crystal plane is not more than 2.5, (100 ) The ratio of the etching rate of the crystal plane to the etching rate of the (110) crystal plane is between 0.9 and 1.1, so that the trimmed silicon fin structure has the desired shape. Compared with Comparative Example 1, the method for trimming the silicon fin structure of Examples 1 and 2 uses the polar solution to make the trimmed silicon fin have a smoother surface.
並由表2可知，實施例1及2矽鰭片結構的修整方法所使用的極性溶液幾乎不會蝕刻上述介電質薄膜。It can be seen from Table 2 that the polar solutions used in the trimming methods of the silicon fin structures in Examples 1 and 2 hardly etch the above dielectric thin film.
綜上所述，本發明透過使用包括四級銨氫氧化物、水及極性有機溶劑的該極性溶液修整該矽鰭片結構，該極性溶液對該矽鰭片結構的(100)、(110)及(111) 晶面具有特定的蝕刻選擇比，因此本發明不需於該矽鰭片結構上形成外延結構，也能夠使修整後的該矽鰭片結構具有所希望的形狀，不會導致修整後的該矽鰭片結構有頂點問題，且本發明還能使修整後的該矽鰭片結構具有較平滑的表面。此外，本發明所使用的極性溶液幾乎不會蝕刻例如二氧化矽、氮化矽、碳氮化矽、氮氧化矽等介電質材料。故確實能達成本發明的目的。In summary, the present invention trims the silicon fin structure by using the polar solution including quaternary ammonium hydroxide, water and polar organic solvent, the polar solution (100), (110) of the silicon fin structure The (111) crystal plane has a specific etching selectivity, so the present invention does not need to form an epitaxial structure on the silicon fin structure, and can also make the silicon fin structure after trimming to have a desired shape without causing trimming The silicon fin structure afterwards has a vertex problem, and the invention can also make the silicon fin structure after finishing have a smoother surface. In addition, the polar solution used in the present invention hardly etch dielectric materials such as silicon dioxide, silicon nitride, silicon carbonitride, silicon oxynitride and the like. Therefore, the purpose of cost invention can indeed be achieved.
惟以上所述者，僅為本發明的實施例而已，當不能以此限定本發明實施的範圍，凡是依本發明申請專利範圍及專利說明書內容所作的簡單的等效變化與修飾，皆仍屬本發明專利涵蓋的範圍內。However, the above are only examples of the present invention, and the scope of implementation of the present invention cannot be limited by this, any simple equivalent changes and modifications made according to the scope of the patent application of the present invention and the content of the patent specification are still classified as Within the scope of the invention patent.
41‧‧‧基材
411‧‧‧淺溝槽隔離結構
42‧‧‧矽鰭片結構
42a‧‧‧修整後的矽鰭片結構41‧‧‧
本發明的其他的特徵及功效，將於參照圖式的實施方式中清楚地呈現，其中： 圖1是一種現有技術的矽鰭片修整方法的一示意圖； 圖2是一種現有技術的矽鰭片修整方法的一示意圖； 圖3是一種現有技術的矽鰭片修整方法的一示意圖；及 圖4是本發明矽鰭片結構的修整方法的一示意圖。Other features and functions of the present invention will be clearly presented in the embodiments with reference to the drawings, in which: FIG. 1 is a schematic diagram of a prior art silicon fin trimming method; FIG. 2 is a prior art silicon fin A schematic diagram of the trimming method; FIG. 3 is a schematic diagram of a conventional silicon fin trimming method; and FIG. 4 is a schematic diagram of the trimming method of the silicon fin structure of the present invention.
41‧‧‧基材 41‧‧‧ Base material
411‧‧‧淺溝槽隔離結構 411‧‧‧Shallow trench isolation structure
42‧‧‧矽鰭片結構 42‧‧‧Silicon fin structure
42a‧‧‧修整後的矽鰭片結構 42a‧‧‧Finished silicon fin structure
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| TW201517128A (en) * | 2013-06-28 | 2015-05-01 | Intel Corp | Nanostructures and nanofeatures with Si (111) planes on Si (100) wafers for III-N epitaxy |
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| TW201616580A (en) * | 2014-10-24 | 2016-05-01 | 格羅方德半導體公司 | New Fin structures and multi-VT scheme based on tapered Fin and method to form |
| TW201631217A (en) * | 2014-12-26 | 2016-09-01 | Fujifilm Corp | Etchant, etching method using the same, and method of manufacturing semiconductor substrate product |
| US20160211352A1 (en) * | 2015-01-15 | 2016-07-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of trimming fin structure |
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