TWI680637B - Analog demagnetization sampling method and system for switching power supply output sampling - Google Patents

Abstract

The invention relates to an analog demagnetization sampling method and system for switching power supply output sampling. An analog demagnetization sampling method for switching power supply output sampling is provided, including: simulating demagnetization by discharging the primary sampling peak voltage of the switching power supply; determining the relationship between the primary sampling peak voltage and the demagnetization time; and based at least in part on the current period The sampling peak voltage, the on-time of the power switch, and the discharge speed information of the previous cycle are used to determine the location of the sampling point.

Description

Analog demagnetization sampling method and system for switching power supply output sampling

The invention relates to an integrated circuit. More specifically, some embodiments of the invention relate to analog demagnetization sampling methods and systems for switching power supply output sampling.

Taking the traditional primary-side control flyback converter (PSR AC / DC Flyback Converter) as an example, the constant voltage (CV) control of the chip and the principle of output sampling are introduced. Figure 1A shows a simplified block diagram of a conventional switching power supply. As shown in Figure 1A, Vline is the line voltage obtained from the rectified AC input source, Cbulk is the filter capacitor, Rst is the high-voltage starting resistance, and the first, second, and auxiliary winding turns ratio of the three-winding transformer is Np: Ns : Na, Rcs is the first current sensing resistor, D2 is the second rectifying diode, Cout is the output capacitor, S1 is the power switch tube, U1 is the controller, Cp is the chip power supply capacitor, D1 is the power supply diode, Rup and Rdn are output voltage-dividing sensing resistors. The voltage and current waveforms of the main nodes of the system are shown in Figure 1B. Pulse -width modulation (PWM) is the driving waveform of the power switch S1 gate, dem is the detected demagnetization signal, and Ip and Is are primary, Secondary inductor current, Vcs is the sensing voltage obtained on the first sensing resistor, VD is the drain voltage of the power switch tube, and FB is the feedback divided voltage of the output voltage on the auxiliary winding.

其中Vref_FB為輸出回饋取樣參考電壓，VD2為整流二極體D2的正嚮導通壓降。 Under CV, the output voltage of the power supply is determined as follows:

Vref_FB is the output feedback sampling reference voltage, and VD2 is the forward voltage drop of the rectified diode D2.

Figure 2 shows a simplified block diagram of FB sampling and switching control inside a conventional switching power supply controller. During the demagnetization period, the sampling module generates a sampling pulse signal to control the sampling switch to conduct sampling on FB to obtain the sampling value VFB and save it on the capacitor Cs. The difference between the sampling value VFB and the reference voltage Vref_FB is obtained by the error amplifier EA. Voltage Compv, the voltage compv is input to the PWM / Pulse Frequency Modulation, PFM (Pulse Width Modulation / Pulse Frequency Modulation) control module to get a pulse with a certain switching frequency and duty cycle, and is input to the drive module to control the power The switch of the tube adjusts the output voltage and finally obtains a stable output. Among them, the sampling module generates sampling pulses to sample FB during the demagnetization period, and determines the sampling point position. This paper proposes a method for generating instant sampling signals.

3A and 3B show a conventional FB sampling point generating circuit and a signal timing diagram, respectively. The circuit uses a fixed charge and discharge current and the demagnetization time of the previous cycle to determine the location of the sampling point. Ichar and Idis are fixed charging and discharging currents respectively, dem is the demagnetization signal, Tdem is the demagnetization time and also the charging time, Tsamp is the discharge time, which represents the sampling point position, reset is the 0 pulse signal, C is the integral capacitor, and vramp is Capacitance voltage, FB is the feedback divided voltage of the output voltage on the auxiliary winding. During the first Tdem period, the fixed charging current Ichar charges the integration capacitor C and keeps the voltage. On the rising edge of the second demagnetization signal, the reset signal sets the samp signal high, and the integration capacitor C discharges with a fixed discharge current Idis. Discharge until the samp signal changes from high to low. The falling edge of the samp signal corresponds to the FB sampling point. The position of the sampling point is determined by the charge and discharge currents Ichar and Idis, and it satisfies Equation 2:

By setting the proportional relationship of the charge and discharge current, the position of the sampling point can be adjusted. Then duplicate this sampling point generation circuit and use two in parallel to generate FB sampling signal during each demagnetization time Tdem.

It can be seen that this FB sampling signal generation circuit has significant shortcomings. It needs to use the demagnetization time Tdem of the previous cycle to generate the sampling point of the current cycle, that is, the position of the sampling point is proportional to the previous Tdem time, and is The relationship of Tdem time is uncertain, which may cause some sampling problems. For example, when the system Vcs jumps from a larger value to a smaller value, the Tdem time will also change from a larger value to a smaller value, as shown in Figure 4, and the second Tdem is shorter. However, the location of the sampling point is proportional to the previous long Tdem, which will cause subsequent sampling errors.

Therefore, it is desirable to provide an improved method of instantaneous signal sampling.

Certain embodiments of the invention relate to integrated circuits. More specifically, the present invention Some embodiments provide analog demagnetization sampling methods and systems for switching power supply output sampling. By way of example only, some embodiments of the invention have been applied to power conversion systems. However, it should be recognized that the present invention has a wider range of applications. For example, the method according to the present disclosure can be applied to power factor correction (PFC) controllers of Buck, Boost, Buck-Boost, and flyback architectures.

This paper proposes a real-time sampling method for primary side control flyback converter power output sampling. This method is based on the principle of voltage and current of the inductor, and uses the feedback control method to determine the discharge speed by analogous demagnetization of the primary sampling peak voltage discharge. That is to determine the relationship between the primary sampling peak voltage and the demagnetization time, and use the sampling peak voltage of the current cycle, the on time of the power switch, and the discharge speed information of the previous cycle to determine the sampling point, thereby real-time sampling of the output voltage and solving The traditional method of using the demagnetization time of the previous period to determine the output instability caused by the system Vcs mutation in the current period sampling point method.

According to an embodiment, an analog demagnetization sampling method for switching power supply output sampling is provided, including: simulating demagnetization by discharging a peak voltage of a primary sampling peak voltage of the switching power supply; determining a relationship between a peak voltage of primary sampling and a demagnetization time; and at least The location of the sampling point is determined based in part on the sampling peak voltage of the current cycle, the on-time of the power switch, and the discharge rate information of the previous cycle.

According to another embodiment, an analog demagnetization sampling system for switching power supply output sampling is provided, which includes: a device for analogizing demagnetization by discharging a peak sampling peak voltage of the switching power supply; and determining a peak sampling primary voltage and Means for determining the relationship of the demagnetization time; and means for determining the location of the sampling point based at least in part on the sampling peak voltage of the current cycle, the on-time of the power switch, and the discharge speed information of the previous cycle.

According to an embodiment, one or more beneficial effects can be achieved. These beneficial effects, as well as various additional objects, features, and advantages of the present invention will be fully understood with reference to the following detailed description and accompanying drawings.

Vline‧‧‧line voltage

Ls‧‧‧ secondary inductor

Cbulk‧‧‧filter capacitor

Vout‧‧‧Output voltage

Rst‧‧‧High-voltage starting resistance

Ipk‧‧‧First inductor current

Rcs‧‧‧first current sensing resistor

Ipks‧‧‧Second inductor current

D2‧‧‧Second Rectified Diode

Vcspk‧‧‧Peak voltage

Cout‧‧‧ output capacitor

k‧‧‧discharge slope

S1‧‧‧Power Switch

comp‧‧‧ comparator

U1‧‧‧controller

AND‧‧‧ and gate

Cp‧‧‧Chip Power Capacitor

pwm‧‧‧ switch signal

D1‧‧‧ Power Diode

Vc1‧‧‧Sampling voltage after discharge

Rup, Rdn‧‧‧‧ Output Voltage Divided Sense Resistor

Vref + Vt‧‧‧ Reference input for comparator

dem‧‧‧ demagnetization signal

samp‧‧‧sampling pulse signal

Ip‧‧‧Primary inductor current

AVDD‧‧‧chip internal low voltage power supply

Is‧‧‧ secondary inductor current

Ist‧‧‧Fixed discharge current

Vcs‧‧‧First current sensing voltage

Ict‧‧‧Controllable discharge current

Drain voltage of VD‧‧‧power switch

Ivr‧‧‧ Variable discharge current

Vref_FB‧‧‧Output feedback sampling reference voltage

Rvr‧‧‧ Voltage-Controlled Resistor

Cs, C0‧‧‧ capacitor

Vgs‧‧‧M5 gate source voltage

Ichar‧‧‧Charging current

M5‧‧‧ Transistor working in the linear region

Idis‧‧‧discharge current

EA‧‧‧ Error Amplifier

Tdem‧‧‧ Demagnetization time

compv‧‧‧EA output voltage

Vcs‧‧‧System

Tsamp‧‧‧ is the discharge time

reset‧‧‧0 pulse signal

C‧‧‧Integral capacitor

vramp‧‧‧capacitor voltage

OR‧‧‧ or gate

Ton‧‧‧Power tube on time

1-shot‧‧‧pulse generator triggered by rising edge

C4‧‧‧filter capacitor

Vref‧‧‧ Level shift size

Rt‧‧‧ voltage-current conversion resistor

Pre-sampling signals generated by Samp1, Samp2‧‧‧

C1, C2, C3‧‧‧ sampling capacitors

M0, M1, M2, M3, M4‧‧‧ Switch

Opa1, Opa2, Opa3, Opa4‧‧‧ Error Amplifier

FB‧‧‧Feedback divided voltage of output voltage on auxiliary winding

Forward voltage drop of VD2‧‧‧rectified diode D2‧‧‧

VFB‧‧‧ Output voltage Vout‧‧‧ feedback to the primary side

Figure 1A shows a simplified block diagram of a conventional switching power supply.

FIG. 1B shows a signal timing diagram of a conventional switching power supply.

Figure 2 shows a simplified block diagram of FB sampling and switching control inside a conventional switching power supply controller.

Figure 3A shows a conventional FB sampling point generation circuit diagram.

FIG. 3B shows a conventional FB sampling point generation timing diagram.

FIG. 4 is a diagram showing the relationship between the sampling point and FB when the Vcs of a conventional switching power supply system is abruptly changed.

FIG. 5 shows a schematic diagram of a simulated demagnetization discharge slope according to an embodiment of the present disclosure.

FIG. 6A illustrates a circuit structure diagram according to an embodiment of the present disclosure.

FIG. 6B illustrates a signal timing diagram according to an embodiment of the present disclosure.

FIG. 7 shows a diagram of a feedback instant sampling point generating circuit according to an embodiment of the present disclosure.

FIG. 8 illustrates a waveform diagram during a Vramp discharge slope stabilization process according to an embodiment of the present disclosure.

FIG. 9 is a schematic diagram of a sampling signal when Vcs is abruptly changed according to an embodiment of the present disclosure.

FIG. 10 shows a schematic diagram of a Vout controlled discharge branch according to an embodiment of the present disclosure, which is optionally added.

FIG. 11 shows a circuit diagram of a discharge branch added with Vout control according to an embodiment of the present disclosure.

Features and exemplary embodiments of various aspects of the invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to a person skilled in the art that the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely for providing a better understanding of the present invention by showing examples of the present invention. The invention is by no means limited to any specific configuration and algorithm proposed below, but covers any modification, replacement and improvement of elements, components and algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present invention.

The object of the present invention is to solve the above problems in the prior art, and to provide a A sampling method with a fixed time interval between the sampling point position and the current demagnetization end point position under a stable output voltage. This time interval is determined only by the sampling peak voltage in a steady state, the on time of the power switch, and the demagnetization time. The instant sampling of the output voltage at least solves the problem of output instability caused by the system Vcs mutation in the traditional method of determining the sampling point of the current cycle by using the demagnetization time of the previous cycle.

According to the relationship between the inductor voltage and current, the demagnetization time in the DCM (Discontinuous Conduction Mode) working mode can be determined as follows:

Among them, Ls is the secondary inductance and Vout is the output voltage. Ipk and Ipks are the peak values of the first and second inductor currents respectively. As shown in Figure 1B, Ip and Is are the primary and secondary inductor currents, respectively, Vcs = Rcs * Ip, and Rcs is the first current sensing resistor. , The first current is converted into a voltage Vcs. When the first current is Ipk, the sampling voltage Vcspk on the first current sensing resistor Rcs is the sampling peak voltage, and Vcspk = Rcs * Ipk at this time.

According to an embodiment of the present disclosure, a method for implementing peak voltage Vcspk control is provided.

，為固定值。若在Tdem時間內將峰值電壓值為Vcspk的電容放電到0V，電壓變化如第5圖所示，則該電壓變化的斜率就是k，定義k為放電斜率(該係數反映了放電速度)。若取樣值為M*Vcspk，然後在退磁時間內將M*Vcspk放電到0V，則該放電斜率為固定值M*k。只要確定了這個放電斜率M*k，就可以通過對取樣到的M*Vcspk放電，類比退磁過程，根據Vcspk確定當前週期實際的退磁時間Tdem。本發明利用回饋的方法確定放電斜率M*k。 FIG. 5 shows a schematic diagram of a simulated demagnetization discharge slope according to an embodiment of the present disclosure. When the circuit reaches stability, Vout is a fixed value, the demagnetization time is proportional to the sampling peak voltage, Tdem = Vcspk / k, where

Is a fixed value. If the capacitor whose peak voltage value is Vcspk is discharged to 0V within Tdem time, and the voltage change is shown in Fig. 5, the slope of the voltage change is k, and k is defined as the discharge slope (the coefficient reflects the discharge speed). If the sampling value is M * Vcspk, and then M * Vcspk is discharged to 0V within the demagnetization time, the discharge slope is a fixed value M * k. As long as the discharge slope M * k is determined, the actual demagnetization time Tdem of the current cycle can be determined according to Vcspk by discharging the sampled M * Vcspk, and analogizing the demagnetization process. The present invention uses a feedback method to determine the discharge slope M * k.

6A and 6B illustrate a circuit structure and a signal timing diagram according to an embodiment of the present disclosure, respectively. Vcs is the first current sensing voltage, which increases during the on-time Ton of the power tube and is related to the input voltage Vline. Capacitor C0 samples the Vcs peak voltage Vcspk, and after sampling and level shifting, it is sampled to C1. The demagnetization time is Tdem. When demagnetization starts, C2 samples the voltage on C1 first, and Idis discharges the voltage sampled on C2 during the demagnetization time. At the end of the discharge, the voltage Vramp on C2 is sampled to C3. If the voltage Vc1> Vref on C3, the discharge current Idis increases, and the discharge rate of Vramp becomes faster in the next cycle, so that the voltage at the end of the discharge decreases; if Vc1 <Vref, the discharge current Idis decreases, and the Vramp is reduced in the next cycle The discharge speed becomes slower, causing the voltage at the end of the discharge to increase; after several cycles, Vc1 = Vref, the discharge current Idis is stable.

comp is the sampling point judgment comparator, 1-shot is the pulse generator triggered by the rising edge, AND is the AND gate, pwm is the switching signal, dem is the demagnetization signal, and Vref + Vt is the reference input of the comparator, slightly larger than Vref, Vt The size determines the location of the sampling point, and samp is a sampling pulse signal of a certain width generated at the sampling point. Within Tdem time, Vramp starts to decrease linearly from the maximum value. When it decreases to Vref + Vt, the comp output out changes from low level to high level. 1-shot produces a 1 pulse, which is obtained by summing with the demag signal dem. Signal samp.

The peak value of Vramp is expressed as follows: V _ramppk = V _cspk × M + V _ref (Equation 4)

The relationship between the position of the sampling point and the current demagnetization time Tdem and the current sampling peak voltages Vcspk and Vt is shown in Equation 5:

Among them, the size of Idis in the steady state is shown in Equation 6:

FIG. 7 shows a diagram of a feedback instant sampling point generating circuit according to an embodiment of the present disclosure. AVDD is the low-voltage power supply inside the chip. During Ton, Vcs is sampled to C0, and then sampled to C1 after buffering, amplification, and level shifting. During Tdem, M0 and M1 are turned off, C0 and C1 respectively sample the peak voltage of Vcs and the corresponding amplified translation voltage, M2 is turned on, Vramp samples the voltage on C1, the discharge branch is opened, and C2 is discharged; after Tdem ends When the discharge is completed, M3 is turned on, and the Vramp voltage at the end of the discharge is sampled to C3 to obtain the discharge end sampling voltage Vc1.

The discharge branch is composed of two parts, one is a fixed discharge current Ist, and the other is a controllable discharge current Ict determined by the discharge end sampling voltage Vc1. When the circuit starts, Vc1 << Vref, the controllable discharge current Ict is 0 or very small, and the fixed discharge current guarantees a certain discharge current at startup. When Vc1> Vref, in the next cycle, the controllable discharge current increases, so that the voltage at the end of the next period of discharge decreases; when Vc1 <Vref, in the next period, the controllable discharge current decreases, so that the next period of discharge ends The voltage at time increases; finally Vc1 = Vref, the discharge current Idis reaches stability, as shown in Figure 8.

FIG. 8 illustrates a waveform diagram during a Vramp discharge slope stabilization process according to an embodiment of the present disclosure. During the Tdem period, C2 samples the voltage on C1 first, the Vramp voltage rises to Vramppk, and comp outputs low level. As part2 discharges to C2, Vramp decreases linearly. When Vramp drops to Vref + Vt, comp outputs high level, 1-shot A 1-pulse is generated, and the sampled signal samp is obtained after summing with the demagnetization signal dem.

FIG. 9 is a schematic diagram of a sampling signal when Vcs is abruptly changed according to an embodiment of the present disclosure. When the circuit reaches stability, the discharge current Idis is a fixed value, and the slope of Vramp drop is M * k. If Vcs changes abruptly, because the discharge current is stable and Vramp's falling slope does not change, the time when Vramp drops to Vref is the actual demagnetization time. The discharge time Tdem is the demagnetization time of the previous cycle. If Vcs changes abruptly to a smaller value, the actual demagnetization time decreases (Tdem '<Tdem). Using this circuit, sampling is completed before Vramp is completely demagnetized.

If Vcs abruptly changes to a larger value, the actual demagnetization time increases (Tdem "> Tdem). If Vramp <Vref + Vt before the end of the discharge (Tdem), samp1 generates a sampling signal; if at the end of the discharge (Tdem) , Vramp> Vref + Vt, comp output is still low level, samp1 does not generate a sampling signal, samp2 generates a 1 pulse at the dem falling edge, and samples at the dem falling edge. As shown in Figure 9.

，最後達到新的穩定狀態。放電電流可表示為如 下：I _dis =I _vr +I ₀ (公式7) If the output voltage Vout changes, according to (Equation 3), the demagnetization time Tdem also changes. If Vout increases, Tdem decreases, and the voltage Vc1 at the end of Vramp discharge is increased using the above-mentioned closed-loop sampling, so the discharge current increases and the discharge slope increases.

And finally reach a new steady state. The discharge current can be expressed as follows: I _dis = I _vr + I ₀ (Equation 7)

Ivr is a variable current controlled by Vc1. Ivr is a fixed value under steady state, and the steady state value is different under different Vout. The adjustment of Vout to the discharge slope is realized indirectly through the change of the demagnetization time Tdem. The above method needs to wait at least 2 cycles before starting to adjust the discharge power. flow. When Vout begins to change, Vramp is still discharged using the demagnetization time before the change in the first cycle, and the sampling voltage Vc1 at the end of the discharge is unchanged, so the discharge current is not changed in the next cycle; the demagnetization obtained in the first cycle is used in the second cycle Vramp is discharged over time, the sampling voltage Vc1 at the end of the discharge changes, and the discharge current changes in the next cycle.

According to an embodiment of the present disclosure, a method for implementing peak voltage Vcspk and output voltage Vout control is also provided. For example, Vout can be directly added as a control factor in the control of the discharge current. From (Formula 3), Vcspk = a × Vout × Tdem, where k = a × Vout is a value related to Vout. The discharge current is expressed as follows:

Among them, Rvr is a variable resistor controlled by Vc1. In steady state, Rvr is a fixed value, and the steady-state value of discharge current is different under different Vout.

FIG. 10 shows a schematic diagram of a Vout controlled discharge branch according to an embodiment of the present disclosure, which is optionally added. The discharge circuit part of the FB sampling circuit is shown in FIG. 11, and other parts are the same as those in FIG. 7. VFB is the value that the output voltage Vout feeds back to the primary side. M5 works in the linear region. The equivalent resistance seen from A is the controlled variable resistance Ron as follows:

Vgs is the gate-source voltage of M5, which is controlled by Vc1. Therefore, the magnitude of the discharge current is jointly controlled by Vout and Vc1, and the magnitude of the current flowing through M5 can be expressed as follows:

After adding Vout control, it is best to wait for the next cycle of adjustment to start. When Vout starts to change, the first cycle still uses the VFB sampled in the previous cycle (the voltage is unchanged), the discharge current does not change, the demagnetization time of the previous cycle is used to discharge Vramp, and the sampling voltage Vc1 at the end of discharge does not change. Ron remains unchanged in one cycle; if the changed voltage can be taken in the first cycle, VFB is obtained in the second cycle using the first cycle, and the discharge current changes. If the correct sampling cannot be performed in the first cycle, the second cycle The VFB obtained before the first cycle is used, and the discharge current does not change. So in the best case, wait for one cycle after Vout changes to start adjusting the discharge current. At the same time, the control of Vc1 is combined to improve the response speed to changes in output voltage. degree.

The above method is only applicable to the DCM working mode. For the Continuous Conduction Mode (CCM) working mode, the Vcs voltage increases from an initial voltage Vcs0 greater than zero during the Ton period. At this time, (Formula 3) should be deformed as follows:

△ Ip and △ Is are the current changes of the primary inductor during the Ton period and the current changes of the secondary inductor during the Tdem period, △ Vcs = Vcspk-Vcs0. Correspondingly, the positive input terminal voltage Vref of opa3 in the circuit diagram of FIG. 7 should be modified to Vref ', where Vref' = Vref + M * Vcs0. To obtain Vref ', Ton / 2 sampling can be used to obtain the average value Von / 2 of Vcs during Ton, so the following formula V _{cs 0} = 2 V _{on / 2} - V _cspk (Equation 12)

△ V _cs = V _cspk -V _{cs 0} = 2 ( V _cspk -V _{on / 2} ) (Equation 13)

V _ref '= V _ref + MV _{cs 0} = V _ref + M (2 V _{on / 2} - V _cspk ) (Equation 14)

The above modified structure is applicable to both CCM and DCM working modes.

According to an embodiment of the present disclosure, a sampling method having a fixed time interval between a sampling point position and a current demagnetization end point position, the time interval is determined by a sampling peak voltage in a steady state, an on time of a power switch, and a demagnetization time.

According to the embodiment of the present disclosure, the demagnetization time satisfies the following relationship: Tdem = Vcspk / k, where Tdem is the demagnetization time, Vcspk is the sampling peak voltage, k is a value related to the output voltage Vout, and when the circuit is stable, k is Fixed value.

According to the embodiment of the present disclosure, the relationship between the position Tsamp and Tdem of the sampling point can be expressed as follows:

Among them, M is the magnification of the sampling peak voltage Vcspk, and Vt is the sampling point judgment voltage, which determines the position of the sampling point during the process of simulated demagnetization by discharging. Vref + Vt is used as the input reference voltage of the comparator to determine the sampling point. When the sampling peak voltage is amplified and the voltage obtained after level shift is discharged to Vref + Vt, sampling is performed, where Vref is The magnitude of the level shift.

According to an embodiment of the present disclosure, when the switching power supply operates in a discontinuous conduction mode DCM, the demagnetization time is adjusted by adjusting a ratio of a sampling peak voltage to a sampling resistance.

According to an embodiment of the present disclosure, when the switching power supply operates in a continuous conduction mode CCM, the demagnetization time is adjusted by adjusting a difference between a sampling peak voltage and an initial voltage, and a ratio to a sampling resistance.

According to an embodiment of the present disclosure, where k is determined according to the following formula:

Where Vout is the output voltage of the switching power supply, Rcs is the resistance value of the sampling resistor, Ls is the inductance value of the secondary inductor, and Np / Ns is the ratio of the number of turns of the primary and secondary windings.

According to an embodiment of the present disclosure, wherein Vout is adjustable.

For example, some or all of the elements of the various embodiments of the present invention use one or more software elements, one or more hardware elements, and / or one or more combinations of software and hardware elements, alone and / or At least in combination with another component. In another example, some or all of the elements of various embodiments of the present invention are implemented in one or more circuits alone and / or in combination with at least another element, such as one or more analog circuits and / Or one or more digital circuits. In yet another example, various embodiments and / or examples of the invention may be combined.

Although specific embodiments of the invention have been described, those skilled in the art will understand that other embodiments are equivalent to the described embodiments. Therefore, it will be understood that the invention is not limited to the specifically illustrated embodiments, but only by the scope of the appended claims.

Claims (10)

An analog demagnetization sampling method for switching power supply output sampling includes: simulating demagnetization by discharging the primary sampling peak voltage of the switching power supply; determining the relationship between the primary sampling peak voltage and the demagnetization time; and based on the current sampling peak voltage, The on-time of the power switch and the discharge speed information from the previous cycle determine the location of the sampling point. The method according to item 1 of the scope of patent application, wherein the sampling point position and the current demagnetization end point position have a fixed time interval between the sampling time, the time interval is the steady state sampling peak voltage, the power switch on-time And demagnetization time to determine. The method according to item 1 of the scope of the patent application, wherein the demagnetization time satisfies the following relationship: T _dem = V _cspk / k where T _dem is a demagnetization time, V _cspk is a sampling peak voltage, and k is a voltage output voltage Related values, when the circuit is stable, k is a fixed value. The method according to item 3 of the scope of patent application, wherein the position Tsamp of the sampling point is expressed as follows: Among them, Vt is the sampling point judgment voltage, which determines the position of the sampling point during the simulated demagnetization process by discharging. When the sampling peak voltage Vcspk is amplified and the voltage obtained after the level shift is discharged to Vref + Vt, sampling is performed. Where Vref is the magnitude of the level shift. The method according to item 1 of the patent application range, wherein when the switching power supply is operating in a discontinuous conduction mode DCM, the demagnetization time is analogized by sampling a peak voltage. The method according to item 1 of the scope of patent application, wherein when the switching power supply is operating in the continuous conduction mode CCM, the demagnetization time is analogized by sampling the difference between the peak voltage and the initial voltage. The method as described in item 3 of the patent application scope, wherein k is determined according to the following formula: Where Vout is the output voltage of the switching power supply, Rcs is the resistance value of the sampling resistor, Ls is the inductance value of the secondary inductance, and Np / Ns is the ratio of the primary to secondary winding turns. The method as described in claim 7 of the patent application scope, wherein Vout is adjustable. An analog demagnetization sampling system for switching power supply output sampling, comprising: a device for analogizing demagnetization by discharging a primary sampling peak voltage of the switching power supply; a device for determining a relationship between a primary sampling peak voltage and a demagnetization time; and Device for determining the position of a sampling point based on the sampling peak voltage of the current cycle, the on-time of the power switch, and the discharge speed information of the previous cycle. A switching power supply including an analog demagnetization sampling system for switching power supply output sampling as described in item 9 of the scope of the patent application.