CN108448895B - Analog demagnetization sampling method and system for output sampling of switching power supply - Google Patents
Analog demagnetization sampling method and system for output sampling of switching power supply Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1582—Buck-boost converters
Abstract
The disclosure relates to a method and a system for sampling output samples of a switching power supply by analog demagnetization. The utility model provides an analog demagnetization sampling method for output sampling of a switching power supply, which comprises the following steps: simulating demagnetization by discharging the primary sampling peak voltage of the switching power supply; determining the relation between the primary sampling peak voltage and the demagnetization time; and determining a position of the sampling point based at least in part on the sampled peak voltage of the current cycle, the on-time of the power switch, and the discharge speed information of the previous cycle.
Description
Technical Field
The present disclosure relates to integrated circuits. More particularly, some embodiments of the invention relate to analog demagnetization sampling methods and systems for switching power supply output sampling.
Background
Taking a conventional primary side control Flyback switching power supply (PSR AC/DC Flyback Converter) as an example, a Constant Voltage (CV) control and output sampling principle of a chip are introduced. Fig. 1A shows a simplified block diagram of a conventional switching power supply. As shown in fig. 1, Vline is a line voltage obtained by rectifying an AC input source, Cbulk is a filter capacitor, Rst is a high-voltage starting resistor, the turn ratio of a primary winding, a secondary winding and an auxiliary winding of a three-winding transformer is Np: Ns: Na, Rcs is a primary current detection resistor, D2 is a secondary rectifier diode, Cout is an output capacitor, S1 is a power switch tube, U1 is a controller, Cp is a chip power supply capacitor, D1 is a power supply diode, and Rup and Rdn are output voltage division detection resistors. The voltage and current waveforms of the main nodes of the system are shown in fig. 1B, PWM Is a gate driving waveform of the power switch S1, dem Is a detected demagnetization signal, Ip and Is are primary and secondary inductor currents, respectively, Vcs Is a detection voltage obtained on a primary detection resistor, VD Is a drain waveform of a power switch tube, and FB Is a resistance voltage-dividing waveform of an auxiliary winding.
At CV, the output voltage of the power supply is determined as follows:
wherein Vref _ FB is the output feedback sampling reference voltage, and VD2 is the forward conduction voltage drop of the rectifier diode D2.
Fig. 2 shows a simplified block diagram of FB sampling and switching control within a conventional switching power supply controller. In a demagnetization period, a sampling pulse signal generated by a sampling module controls a sampling switch to be conducted to sample FB, a sampling value VFB is obtained and stored on a capacitor Cs, the difference value of the sampling value VFB and a reference voltage Vref _ FB is amplified by an error amplifier EA to obtain a voltage compv, the voltage compv is input to a PWM/PFM (pulse width modulation/pulse frequency modulation) control module to obtain a pulse with a certain switching frequency and duty ratio, and the pulse is input to a driving module to control the switching of a power tube, so that the output voltage is adjusted, and stable output is finally obtained. The sampling module generates sampling pulses to sample FB during demagnetization and determines positions of sampling points.
Fig. 3A and 3B show a conventional FB sample point generating circuit and a signal timing chart, respectively. The circuit determines the position of a sampling point by using fixed charging and discharging current and demagnetization time of the previous period. Ichar and Idis are respectively fixed charging current and discharging current, dem is a demagnetization signal, Tdem is demagnetization time and also charging time, Tsamp is discharging time representing the position of a sampling point, reset is a 0 pulse signal, C is an integrating capacitor, vramp is capacitor voltage, and FB is the voltage of a chip feedback pin. During the first Tdem, the fixed current Ichar charges the capacitor C and keeps the voltage, the reset signal sets the sampp signal high on the rising edge of the second demagnetization signal, the capacitor C discharges with the fixed current Idis until the sampp signal changes from high to low, the falling edge of the sampp signal corresponds to the FB sampling point, the position of the sampling point is determined by the charging and discharging currents Ichar and Idis, and equation 2 is satisfied:
the position of the sampling point can be adjusted by setting the proportional relation of the charging and discharging currents. And a sampling point generating circuit is duplicated, and two sampling points are used in parallel, so that the FB sampling signal can be generated in each Tdem period.
It can be seen that this FB sampling point generating circuit has a significant disadvantage that it needs to use the demagnetization time Tdem of the previous period to generate the sampling point of the current period, i.e. the position of the sampling point is proportional to the previous Tdem time, and the relation with the current Tdem time is uncertain, which may cause some sampling problems. For example, when the system Vcs jumps from a large value to a small value, Tdem time also changes from a large value to a small value, as shown in fig. 4, while the second Tdem is shorter, but the position of the sampling point is proportional to the previous longer Tdem, which may cause errors in subsequent sampling.
It is therefore desirable to provide an improved method of sampling a real-time signal.
Disclosure of Invention
Certain embodiments of the invention relate to integrated circuits. More specifically, some embodiments of the invention provide analog demagnetization sampling methods and systems for output sampling of switching power supplies. By way of example only, some embodiments of the invention have been applied to power conversion systems. However, it should be recognized that the invention has a broader range of applicability. For example, the method according to the present disclosure may be applicable to PFC controllers of Buck, Boost, Buck-Boost, and flyback (flyback) architectures.
The method is based on the voltage and current principle of an inductor, a demagnetization process is simulated by discharging primary sampling peak voltage, a feedback control method is utilized to determine a discharge speed, namely, the relation between the primary sampling peak voltage and demagnetization time is determined, and sampling points are determined by utilizing the sampling peak voltage of the current period, the conduction time of a power switch and the discharge speed information of the last period, so that the real-time sampling of output voltage is realized, and the problem of unstable output caused by sudden change of a system Vcs in the traditional method for determining the sampling points of the current period by utilizing the demagnetization time of the last period is solved.
According to one embodiment, there is provided an analog demagnetization sampling method for output sampling of a switching power supply, including: simulating demagnetization by discharging the primary sampling peak voltage of the switching power supply; determining the relation between the primary sampling peak voltage and the demagnetization time; and determining a position of the sampling point based at least in part on the sampled peak voltage of the current cycle, the on-time of the power switch, and the discharge speed information of the previous cycle.
According to another embodiment, there is provided an analog demagnetization sampling system for sampling output of a switching power supply, including: means for simulating demagnetization by discharging the switching power supply primary sampled peak voltage; means for determining a primary sampling peak voltage versus demagnetization time; and means for determining a position of the sampling point based at least in part on the sampled peak voltage of the current cycle, the on-time of the power switch, and the discharge speed information of the previous cycle.
According to embodiments, one or more beneficial effects may be achieved. These advantages, as well as various additional objects, features, and advantages of the present invention will become more fully apparent with reference to the following detailed description and accompanying drawings.
Drawings
Fig. 1A shows a simplified block diagram of a conventional switching power supply.
Fig. 1B shows a signal timing diagram of a conventional switching power supply.
Fig. 2 shows a simplified block diagram of FB sampling and switching control within a conventional switching power supply controller.
Fig. 3A shows a conventional FB sampling point generation circuit diagram.
Fig. 3B shows a conventional FB sampling point generation timing diagram.
Fig. 4 is a diagram showing the relationship of sampling points and FBs when Vcs abruptly changes in a conventional switching power supply system.
Fig. 5 shows a simulated demagnetization discharge slope diagram according to an embodiment of the disclosure.
Fig. 6A shows a circuit configuration diagram in accordance with an embodiment of the present disclosure.
Fig. 6B shows a signal timing diagram according to an embodiment of the disclosure.
FIG. 7 shows a diagram of a feedback real-time sampling point generation circuit, according to an embodiment of the present disclosure.
Fig. 8 shows a waveform schematic during Vramp discharge slope stabilization according to an embodiment of the disclosure.
Fig. 9 shows a schematic diagram of a sampling signal when Vcs abruptly changes according to an embodiment of the present disclosure.
Fig. 10 shows an optionally added Vout controlled discharge branch schematic according to an embodiment of the present disclosure.
Fig. 11 shows a circuit diagram of a discharge branch incorporating Vout control, in accordance with an embodiment of the present disclosure.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention. The present invention is in no way limited to any specific configuration and algorithm set forth below, but rather covers any modification, replacement or improvement of elements, components or algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present invention.
The invention aims to solve the problems in the prior art, and provides a sampling method for fixing the time interval between the sampling point position and the current demagnetization ending point position under the stable output voltage, wherein the time interval is only determined by the sampling peak voltage under the stable state, the conduction time of a power switch and the demagnetization time, so that the real-time sampling of the output voltage is realized, and the problem of unstable output caused by the sudden change of a system Vcs in the traditional method for determining the sampling point at the current period by utilizing the demagnetization time at the last period is at least solved.
According to the inductor voltage-current relationship, the demagnetization time in the DCM (Discontinuous Conduction Mode) operation Mode can be determined as follows:
wherein Ls is the secondary inductance and Vout is the output voltage. Ipk and Ipks are peak values of the primary side and the secondary side inductance current, respectively, as shown in fig. 1B, Ip and Is are the primary side and the secondary side current, respectively, Vcs Is Rcs Ip, Rcs Is a primary side sampling resistor, the primary side current Is converted into a voltage Vcs, when the primary side current Is Ipk, a sampling voltage Vcspk on the resistor Rcs Is a sampling peak voltage, and at this time, Vcspk Is Rcs Ipk.
According to an embodiment of the present disclosure, a method for implementing peak voltage Vcspk control is provided.
Fig. 5 shows a simulated demagnetization discharge slope diagram according to an embodiment of the disclosure. When the circuit is stabilized, Vout is a fixed value, demagnetization time is proportional to sampling peak voltage, Tdem is Vcspk/k, wherein
Is a fixed value. When the capacitor with the voltage value of Vcspk is discharged to 0V within the time Tdem and the voltage change is as shown in fig. 5, the slope of the voltage change is k, and k is defined as the discharge slope (the coefficient reflects the discharge speed). If the sampling value is M × Vcspk, and then M × Vcspk is discharged to 0V in the demagnetization time, the discharge slope is a fixed value M × k. As long as the discharge slope M × k is determined, the sampled M × Vcspk can be discharged to simulate a demagnetization process, and the actual demagnetization time Tdem in the current period is determined according to Vcspk. The invention utilizes a feedback method to determine the discharge slope M x k.
Fig. 6A and 6B illustrate a circuit structure and a signal timing diagram, respectively, according to an embodiment of the present disclosure. Vcs is a primary current detection voltage, increases within the on-time Ton of the power tube, and is related to the input voltage Vline. The capacitor C0 samples the Vcs peak voltage Vcspk, and after amplification and level shift, the Vcs peak voltage Vcspk is sampled to C1 and C2. The demagnetization time is Tdem, Idis discharges the voltage sampled on C2 in the demagnetization time, and the voltage Vramp on C2 is sampled to C3 when the discharge is finished. If Vc1 is greater than Vref, the discharge current Idis is increased, the discharge speed of Vramp in the next period is increased, and the voltage at the end of discharge is reduced; if Vc1< Vref, the discharge current Idis is reduced, the discharge speed of Vramp in the next period is reduced, and the voltage at the end of discharge is increased; after several cycles, Vc1 becomes Vref, and the discharge current Idis stabilizes.
comp is a sampling point judgment comparator, 1-shot is a rising edge 1 pulse generation circuit, AND is an AND gate, pwm is a switching signal, dem is a demagnetization signal, Vref + Vt is a reference input of the comparator, the value of Vref + Vt is slightly larger than Vref, the position of the sampling point is determined by the magnitude of Vt, AND samp is a sampling pulse signal with a certain width generated at the sampling point. Within the time Tdem, Vramp starts to drop linearly from the maximum value, when the Vramp is reduced to Vref + Vt, the output out of the comp changes from low level to high level, and 1-shot generates a 1 pulse which is subjected to phase addition with the demagnetization signal dem to obtain a sampling signal samp.
Wherein the peak value of Vramp is represented as follows:
Vramppk＝Vcspk×M+Vref(equation 4)
The relationship between the position of the sampling point and the current demagnetization time Tdem and the current sampling peak voltage Vcspk and Vt is shown in equation 5:
wherein the magnitude of Idis in steady state is shown in equation 6:
FIG. 7 shows a diagram of a feedback real-time sampling point generation circuit, according to an embodiment of the present disclosure. AVDD is the chip internal low voltage supply, and Vcs is sampled to C0 during Ton, then buffered, amplified, and level shifted to C1. During the Tdem period, M0 and M1 are disconnected, C0 and C1 respectively sample the peak voltage of Vcs and the corresponding amplified translation voltage, M2 is connected, Vramp samples the voltage on C1, a discharge branch is opened, and C2 is discharged; after Tdem is completed, discharge is completed, M3 is turned on, and Vramp voltage at the end of discharge is sampled to C3.
The discharge branch is composed of two parts, one is a fixed discharge current Ist and the other is a controllable discharge current Ict determined by a discharge end sampling voltage Vc 1. When the circuit is started, Vc1< < vref, the controllable discharge current Ict is 0 or very small, and the fixed discharge current ensures a certain discharge current during starting. When Vc1 is larger than Vref, the controllable discharge current is increased in the next period, so that the voltage at the end of the discharge in the next period is reduced; when Vc1< Vref, the controllable discharge current is reduced in the next period, so that the voltage at the end of the discharge in the next period is increased; finally, when Vc1 becomes Vref, the discharge current Idis is stabilized, as shown in fig. 8.
Fig. 8 shows a waveform schematic during Vramp discharge slope stabilization according to an embodiment of the disclosure. During the Tdem period, C2 samples the voltage on C1, the Vramp voltage rises to Vramp, comp outputs low level, the Vramp linearly drops along with the discharge of part2 to C2, when the Vramp drops to Vref + Vt, the comp outputs high level, 1-shot generates a 1 pulse, and the sampling signal samp is obtained after the phase summation with the demagnetization signal dem.
Fig. 9 shows a schematic diagram of a sampling signal when Vcs abruptly changes according to an embodiment of the present disclosure. When the circuit reaches a stable state, the discharge current Idis is a fixed value, and the descending slope of Vramp is M × k. If Vcs suddenly changes, because the discharge current is stable, the drop slope of Vramp is not changed, and the time for Vramp to drop to Vref is the actual demagnetization time. The discharge time Tdem is the demagnetization time of the previous period, if Vcs is suddenly changed to a smaller value, the actual demagnetization time is reduced (Tdem' < Tdem), and by adopting the circuit, sampling is completed before Vramp is completely demagnetized.
If Vcs is abruptly changed to a larger value, the actual demagnetization time increases (Tdem "> Tdem). If Vramp < vref + Vt, samp1 generates a sample signal before the end of discharge (Tdem); if at the end of discharge (Tdem), Vramp > vref + Vt, comp output is still low, sampp 1 does not generate a sample signal, sampp 2 generates a 1 pulse at the dem falling edge, and sampling occurs at the dem falling edge. As shown in fig. 9.
If the output voltage Vout changes, the demagnetization time Tdem also changes according to equation (3). If Vout increases, Tdem decreases, and the Vc1 sampled by the closed loop to the end of Vramp discharge increases, resulting in an increase in discharge current and a discharge slope
Increasing and finally reaching a new stable state. The discharge current can be expressed as follows:
Idis＝Ivr+I0(equation 7)
Ivr is a variable current controlled by Vc1, Ivr is a fixed value at steady state, and the steady state values at different Vout are different. The adjustment of the discharging slope by the Vout is indirectly realized through the change of the demagnetization time Tdem. The method at least needs to wait for 2 periods before regulating the discharge current. When Vout begins to change, the first period still uses the demagnetization time before changing to discharge Vramp, and the sampling voltage Vc1 is unchanged after the discharge is finished, so the discharge current in the next period is unchanged; in the second period, the Vramp is discharged by using the demagnetization time obtained in the first period, the discharge end sampling voltage Vc1 changes, and the discharge current in the next period changes.
According to the embodiment of the disclosure, a method for realizing control of the peak voltage Vcspk and the output voltage Vout is also provided. For example, Vout may be directly added as a control factor in the control of the discharge current, and it is known from equation (3) that Vcspk is a value related to Vout × Tdem, where k is a value related to Vout × Vout. The discharge current is represented as follows:
where Rvr is a variable resistor controlled by Vc1, and in steady state, Rvr is a fixed value, and the steady state values of the discharging currents are different for different Vout.
Fig. 10 shows an optionally added Vout controlled discharge branch schematic according to an embodiment of the present disclosure. The discharge circuit portion of the FB sampling circuit is shown in fig. 11, and the other portions are the same as in fig. 7. VFB is the value of the output voltage Vout fed back to the primary, M5 operates in the linear region, and the equivalent resistance seen from a is the controlled variable resistance Ron expressed as follows:
where Vgs is the M5 gate-source voltage, controlled by Vc 1. The magnitude of the discharge current is then controlled by Vout and Vc1 together, and the magnitude of the current flowing through M5 can be expressed as follows:
after the Vout control is added, it is preferable to wait for the next period adjustment to begin. When Vout begins to change, the first period still uses VFB (voltage is unchanged) sampled in the previous period, the discharge current is unchanged, the Vramp is discharged by using the demagnetization time of the previous period, and the discharge end sampling voltage Vc1 is unchanged, so the next period Ron is unchanged; if the first period can adopt the changed voltage, the second period uses the first period to obtain VFB, the discharge current changes, and if the first period can not be correctly sampled, the second period uses the VFB obtained before the first period, and the discharge current does not change. So it is best to wait 1 cycle after Vout has changed to start regulating the discharge current. And meanwhile, the control of Vc1 is combined to improve the response speed of the output voltage change.
The above method is only applicable to the DCM operation Mode, and for the CCM (Continuous Conduction Mode) operation Mode, the Vcs voltage is increased from an initial Vcs0 greater than zero during Ton, and at this time, equation (3) is strained as follows:
where Δ Ip and Δ Is are the current change of the primary inductor during Ton and the current change of the secondary inductor during Tdem, respectively, and Δ Vcs Is Vcspk-Vcs 0. Accordingly, the positive input voltage Vref of opa3 in fig. 7 should be modified to Vref ', where Vref' is Vref + M Vcs 0. To obtain Vref', the mean Von/2 of the Ton period Vcs can be obtained by sampling Ton/2, and then the following equation can be obtained
Vcs0＝2Von/2-Vcspk(equation 12)
ΔVcs＝Vcspk-Vcs0＝2(Vcspk-Von/2) (equation 13)
Vref'＝Vref+MVcs0＝Vref+M(2Von/2-Vcspk) (equation 14)
The structure modified correspondingly is suitable for CCM and DCM working modes.
According to the embodiment of the disclosure, the sampling method is characterized in that the time interval between the sampling point position and the current demagnetization end point position is fixed, and the time interval is determined by the sampling peak voltage in a stable state, the conduction time of a power switch and the demagnetization time.
According to an embodiment of the present disclosure, the demagnetization time satisfies the following relationship: tdem is the demagnetization time, Vcspk is the sampling peak voltage, and k is a fixed value.
According to an embodiment of the present disclosure, the position Tsamp of the sampling point is expressed as follows:
wherein, M is the amplification factor of sampling peak voltage Vcspk, Vt is sampling point judgment voltage, and it determines the position of sampling point generated in the process of analog demagnetization by discharging. And taking Vref + Vt as a sampling point to judge the input reference voltage of the comparator, and sampling when the voltage obtained after amplifying and level shifting the sampling peak voltage is discharged to Vref + Vt, wherein Vref is the level shifting.
According to the embodiment of the disclosure, when the switching power supply operates in the discontinuous conduction mode DCM, the demagnetization time is adjusted by adjusting a ratio of a sampling peak voltage to a sampling resistance.
According to the embodiment of the disclosure, when the switching power supply operates in the continuous conduction mode CCM, the demagnetization time is adjusted by adjusting the difference between the sampling peak voltage and the initial voltage and the ratio of the sampling resistance.
According to an embodiment of the present disclosure, wherein the fixed value k is determined according to:
vout is the output voltage of the switching power supply, Rcs is the resistance value of the sampling resistor, Ls is the inductance value of the secondary inductor, and Np/Ns is the ratio of the number of turns of the primary winding to the number of turns of the secondary winding.
According to an embodiment of the present disclosure, wherein Vout is adjustable.
For example, some or all of the components of various embodiments of the present invention may be implemented using one or more software components, one or more hardware components, and/or one or more combinations of software and hardware components, alone and/or in at least combination with another component. In another example, some or all of the components of various embodiments of the present invention are implemented in one or more circuits, such as one or more analog circuits and/or one or more digital circuits, alone and/or in combination with at least one other component. In yet another example, various embodiments and/or examples of the invention may be combined.
While specific embodiments of the invention have been described, those skilled in the art will appreciate that other embodiments are equivalent to the described embodiments. It is to be understood, therefore, that this invention is not limited to the specifically illustrated embodiments, but only by the scope of the appended claims.
Claims (8)
1. A simulation demagnetization sampling method for output sampling of a switching power supply comprises the following steps:
simulating demagnetization by discharging the primary sampling peak voltage of the switching power supply;
determining the relation between the primary sampling peak voltage and the demagnetization time, wherein the demagnetization time satisfies the following relation: tdem is the demagnetization time, Vcspk is the sampling peak voltage, k is a value related to the output voltage Vout, and k is a fixed value when the circuit is stable; and is
In the discontinuous conduction mode DCM or the continuous conduction mode CCM, a position of a sampling point is determined based at least in part on a sampling peak voltage of a current period, a conduction time of the power switch, and a discharge speed information of a previous period, wherein the position Tsamp of the sampling point is expressed as follows:
wherein Vt is a sampling point determination voltage, which determines a position where a sampling point is generated in a process of performing analog demagnetization by discharging, and when a voltage obtained by amplifying and level shifting a sampling peak voltage Vcspk is discharged to Vref + Vt, sampling is performed, wherein Vref is the level shift.
2. The method according to claim 1, wherein the sampling method is a sampling method in which the time interval between the sampling point position and the current demagnetization ending point position is fixed, and the time interval is determined by the sampling peak voltage in the steady state, the conduction time of the power switch and the demagnetization time.
3. The method according to claim 1, wherein the demagnetization time is simulated by sampling a peak voltage when the switching power supply operates in discontinuous conduction mode, DCM.
4. The method of claim 1, wherein the demagnetization time is simulated by sampling a difference between a peak voltage and an initial voltage when the switching power supply operates in Continuous Conduction Mode (CCM).
5. The method of claim 1, wherein the fixed value k is determined according to:
vout is the output voltage of the switching power supply, Rcs is the resistance value of the sampling resistor, Ls is the inductance value of the secondary inductor, and Np/Ns is the ratio of the number of turns of the primary winding to the number of turns of the secondary winding.
6. The method of claim 5, wherein Vout is adjustable.
7. An analog demagnetization sampling system for sampling output of a switching power supply comprises:
means for simulating demagnetization by discharging the switching power supply primary sampled peak voltage;
means for determining a primary sampling peak voltage versus a demagnetization time, wherein the demagnetization time satisfies the following relationship: tdem is the demagnetization time, Vcspk is the sampling peak voltage, k is a value related to the output voltage Vout, and k is a fixed value when the circuit is stable; and
means for determining a position of a sampling point based at least in part on a sampled peak voltage of a current cycle, a conduction time of a power switch, and discharge speed information of a previous cycle in a discontinuous conduction mode DCM or a continuous conduction mode CCM, wherein the position Tsamp of the sampling point is represented as follows:
wherein Vt is a sampling point determination voltage, which determines a position where a sampling point is generated in a process of performing analog demagnetization by discharging, and when a voltage obtained by amplifying and level shifting a sampling peak voltage Vcspk is discharged to Vref + Vt, sampling is performed, wherein Vref is the level shift.
8. A switching power supply comprising an analog demagnetization sampling system with sampling of the switching power supply output according to claim 7.
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