TWI670800B - Resistive memory cell structure - Google Patents

Resistive memory cell structure Download PDF

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TWI670800B
TWI670800B TW106137452A TW106137452A TWI670800B TW I670800 B TWI670800 B TW I670800B TW 106137452 A TW106137452 A TW 106137452A TW 106137452 A TW106137452 A TW 106137452A TW I670800 B TWI670800 B TW I670800B
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layer
resistive memory
memory cell
cell structure
ion collecting
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TW106137452A
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TW201917827A (en
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黃志仁
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塔普思科技股份有限公司
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Abstract

本發明提供一種電阻式記憶體細胞元結構,其包括基底、第一電極層、電阻變化層、第一離子收集層、第二離子收集層以及第二電極層。其中,第一電極層設置於基底上,電阻變化層設置於第一電極層上,第一離子收集層設置於電阻變化層上,第二離子收集層設置於第一離子收集層上,第二電極層設置於第二離子收集層上。 The present invention provides a resistive memory cell structure comprising a substrate, a first electrode layer, a resistance change layer, a first ion collection layer, a second ion collection layer, and a second electrode layer. Wherein, the first electrode layer is disposed on the substrate, the resistance change layer is disposed on the first electrode layer, the first ion collection layer is disposed on the resistance change layer, the second ion collection layer is disposed on the first ion collection layer, and the second The electrode layer is disposed on the second ion collecting layer.

Description

電阻式記憶體細胞元結構 Resistive memory cell structure

本發明係關於一種電阻式記憶體細胞元結構,尤指一種可提升可靠度的電阻式記憶體細胞元結構。 The invention relates to a resistive memory cell structure, in particular to a resistive memory cell structure which can improve reliability.

在現今的電子產品中,記憶體已廣泛地應用於各式電子產品中,例如電腦、行動電話及網路上,而在各類記憶體中,藉由改變電阻來記錄資料的電阻式隨機存取記憶體(RRAM)是最受注目的記憶體元件之一。電阻式隨機存取記憶體是藉由施加電流或電壓來改變其電阻變化層的狀態,以根據不同的電阻值於記憶狀態”0”(set state)與記憶狀態”1”(reset state)之間切換,藉此達到儲存資料的效果。 In today's electronic products, memory has been widely used in various electronic products, such as computers, mobile phones, and the Internet, and in various types of memory, resistive random access is recorded by changing the resistance to record data. Memory (RRAM) is one of the most attractive memory components. The resistive random access memory changes the state of the resistance change layer by applying a current or a voltage to set the state of the memory state "set state" and the memory state "1" (reset state) according to different resistance values. Switch between them to achieve the effect of storing data.

本發明之目的之一在於提供一種電阻式記憶體細胞元結構,其透過複數個離子收集層的堆疊結構設計而提升電阻式記憶體細胞元結構的可靠度。 One of the objects of the present invention is to provide a resistive memory cell structure that enhances the reliability of a resistive memory cell structure through a stack structure design of a plurality of ion collecting layers.

本發明之一實施例提供一種電阻式記憶體細胞元結構,其包括基底、第一電極層、電阻變化層、第一離子收集層、第二離子收集層以及第二電極層。其中,第一電極層設置於基底上,電阻變化層設置於第一電極層上,第一離子收集層設置於電阻變化層上,第二離子收集層設置於第一離子收集層 上,而第二電極層設置於第二離子收集層上。 One embodiment of the present invention provides a resistive memory cell structure comprising a substrate, a first electrode layer, a resistance change layer, a first ion collection layer, a second ion collection layer, and a second electrode layer. Wherein, the first electrode layer is disposed on the substrate, the resistance change layer is disposed on the first electrode layer, the first ion collection layer is disposed on the resistance change layer, and the second ion collection layer is disposed on the first ion collection layer Upper, and the second electrode layer is disposed on the second ion collecting layer.

本發明的電阻式記憶體細胞元結構由於同時設置有第一離子收集層與第二離子收集層,其中第一離子收集層可用以吸收由電阻變化層中擴散出的大部分離子,第二離子收集層不僅可用以吸收由電阻變化層中擴散出的離子,還可阻擋外界離子的侵入以及阻擋電阻式記憶體細胞元結構內部離子的逃離,藉此提高電阻式記憶體細胞元結構的可靠度與製造良率。 The resistive memory cell structure of the present invention is provided with a first ion collecting layer and a second ion collecting layer, wherein the first ion collecting layer can be used to absorb most of the ions diffused from the variable resistance layer, the second ion The collection layer can be used not only to absorb ions diffused from the resistance change layer, but also to block the invasion of external ions and to block the escape of ions inside the resistive memory cell structure, thereby improving the reliability of the resistive memory cell structure. With manufacturing yield.

100‧‧‧電阻式記憶體細胞元結構 100‧‧‧Resistive memory cell structure

110‧‧‧基底 110‧‧‧Base

120‧‧‧第一電極層 120‧‧‧First electrode layer

130‧‧‧電阻變化層 130‧‧‧resistive change layer

140‧‧‧第一離子收集層 140‧‧‧First ion collection layer

150‧‧‧第二離子收集層 150‧‧‧Second ion collection layer

160‧‧‧第二電極層 160‧‧‧Second electrode layer

第1圖繪示本發明一實施例之電阻式記憶體細胞元結構之剖面示意圖。 FIG. 1 is a schematic cross-sectional view showing a structure of a resistive memory cell element according to an embodiment of the present invention.

為使本領域的通常知識者能更進一步瞭解本發明,以下特列舉本發明的實施例,並配合圖式詳細說明本發明的構成內容及所欲達成的功效。須注意的是,圖式均為簡化的示意圖,因此,僅顯示與本發明有關之元件與組合關係,以對本發明的基本架構或實施方法提供更清楚的描述,而實際的元件與佈局可能更為複雜。另外,為了方便說明,本發明的各圖式中所示之元件並非以實際實施的數目、形狀、尺寸做等比例繪製,其詳細的比例可依照設計的需求進行調整。 The present invention will be described in detail with reference to the embodiments of the present invention in detail, It should be noted that the drawings are simplified schematic diagrams, and therefore, only elements and combinations related to the present invention are shown to provide a clearer description of the basic architecture or implementation method of the present invention, and actual components and layouts may be more To be complicated. In addition, for convenience of description, the elements shown in the various drawings of the present invention are not drawn to the scale, shape, and size of the actual implementation, and the detailed ratios thereof may be adjusted according to the design requirements.

請參考第1圖,第1圖繪示本發明一實施例之電阻式記憶體細胞元結構之剖面示意圖。須說明的是,本發明的至少一個電阻式記憶體細胞元結構可與其他電子元件組合而形成一電阻式記憶體。如第1圖所示,本實施例的電阻式 記憶體細胞元結構100包括基底110、第一電極層120、電阻變化層130、第一離子收集層140、第二離子收集層150以及第二電極層160,其中第一電極層120設置於基底110上,電阻變化層130設置於第一電極層120上,第一離子收集層140設置於電阻變化層130上,第二離子收集層150設置於第一離子收集層140上,而第二電極層160設置於第二離子收集層150上。 Please refer to FIG. 1. FIG. 1 is a cross-sectional view showing the structure of a resistive memory cell according to an embodiment of the present invention. It should be noted that at least one resistive memory cell structure of the present invention can be combined with other electronic components to form a resistive memory. As shown in Fig. 1, the resistive type of this embodiment The memory cell structure 100 includes a substrate 110, a first electrode layer 120, a resistance change layer 130, a first ion collection layer 140, a second ion collection layer 150, and a second electrode layer 160, wherein the first electrode layer 120 is disposed on the substrate 110, the resistance change layer 130 is disposed on the first electrode layer 120, the first ion collection layer 140 is disposed on the resistance change layer 130, the second ion collection layer 150 is disposed on the first ion collection layer 140, and the second electrode The layer 160 is disposed on the second ion collecting layer 150.

在本發明中,基底110用以承載電阻式記憶體細胞元結構100的其他各膜層,基底110可為硬質基板例如矽基板、玻璃基板、塑膠基板或石英基板,或可為包含聚亞醯胺材料(polyimide,PI)或聚對苯二甲酸乙二酯材料(polyethylene terephthalate,PET)的可撓式基板。在某些實施例中,基底110可包含導電材料或具有導電效果的金屬層,舉例而言,當電阻式記憶體細胞元結構100製作於積體電路的製程時,基底110可包含積體電路中的金屬層,例如M1或M2,但不以此為限,又例如基底110為半導體基底,其表面或內部設有電子元件(例如但不限於CMOS電晶體)、導電材料或線路,可電連接於電阻式記憶體細胞元結構100。根據本發明,凡是可用來承載電阻式記憶體細胞元結構100的材料、膜層或結構都可為本實施例的基底110。第一電極層120以及第二電極層160分別作為電阻式記憶體細胞元結構100的下電極與上電極,用以傳導施加於電阻式記憶體細胞元結構100的電流或電壓。在本實施例中,第一電極層120與第二電極層160的材料可包括鈦(Ti)、氮化鈦(TiN)、鉭(Ta)、氮化鉭(TaN)、氮化鎢(TaW)、鎢(W)、鋁(Al)、鉑(Pt)或其組合,例如氮化鋁鈦(TiAlN),但其材料不以此為限。 In the present invention, the substrate 110 is used to carry the other film layers of the resistive memory cell structure 100. The substrate 110 may be a hard substrate such as a germanium substrate, a glass substrate, a plastic substrate or a quartz substrate, or may comprise polythene. A flexible substrate of polyimide (PI) or polyethylene terephthalate (PET). In some embodiments, the substrate 110 may comprise a conductive material or a metal layer having a conductive effect. For example, when the resistive memory cell structure 100 is fabricated in a process of an integrated circuit, the substrate 110 may include an integrated circuit. The metal layer in the middle, such as M1 or M2, but not limited thereto, for example, the substrate 110 is a semiconductor substrate, and the surface or the inside thereof is provided with electronic components (such as but not limited to CMOS transistors), conductive materials or lines, and can be electrically Connected to a resistive memory cell structure 100. In accordance with the present invention, any material, film or structure that can be used to carry the resistive memory cell structure 100 can be the substrate 110 of the present embodiment. The first electrode layer 120 and the second electrode layer 160 serve as a lower electrode and an upper electrode of the resistive memory cell structure 100, respectively, for conducting current or voltage applied to the resistive memory cell structure 100. In this embodiment, the materials of the first electrode layer 120 and the second electrode layer 160 may include titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride (TaN), tungsten nitride (TaW). ), tungsten (W), aluminum (Al), platinum (Pt) or a combination thereof, such as titanium aluminum nitride (TiAlN), but the material is not limited thereto.

電阻變化層130用以作為電阻式記憶體細胞元結構100中提供明顯電阻變化的膜層,在本實施例中,電阻變化層130可包括氧化鉿(HfOx)、氧化鉭 (TaOx)、氧化鈦(TiOx)、氧化鎳(NiOx)、氧化鈮(NbOx)、氧化鋁(AlOx)、氧化鑭(LaOx)、氧化鎢(WOx)、氧化鋅(ZnOx)、氧化鋯(ZrOx)的其中至少一種或其組合物,其中氧化鉿可為二氧化鉿(HfO2),氧化鉭可為五氧化二鉭(Ta2O5),但電阻變化層130的材料並不以此為限。第一離子收集層140與第二離子收集層150可用以吸收電阻變化層130中的離子(例如氧離子)或可將第一離子收集層140與第二離子收集層150中的離子(例如氧離子)提供給電阻變化層130,在本實施例中,第一離子收集層140可包括金屬氧化材料,金屬氧化材料舉例可包括鉿(Hf)、鎂(Mg)、鋁(Al)、鈮(Nb)、鑭(La)、鋯(Zr)、鉭(Ta)及鈦(Ti)或其組合的金屬氧化物,並且第一離子收集層140的含氧量可少於電阻變化層130的含氧量,以利於吸收電阻變化層130中的氧離子。另一方面,第二離子收集層150可包括金屬材料或氮化金屬材料,其中金屬材料可為易與氧鍵結的金屬材料,舉例可包括鉿(Hf)、鉭(Ta)、鈦(Ti)、鋯(Zr)、鉑(Pt)及鋁(Al)、鎂(Mg)、鑭(La)、銅(Cu)或其組合(例如鈦鋁合金(TiAl))的金屬材料,但材料皆不以此為限。在第二離子收集層150所包含的金屬材料中還可摻雜阻障材料,以形成氮化金屬材料。 The resistance change layer 130 is used as a film layer for providing a significant resistance change in the resistive memory cell structure 100. In this embodiment, the resistance change layer 130 may include hafnium oxide (HfO x ), tantalum oxide (TaO x ), Titanium oxide (TiO x ), nickel oxide (NiO x ), niobium oxide (NbO x ), alumina (AlO x ), lanthanum oxide (LaO x ), tungsten oxide (WO x ), zinc oxide (ZnO x ), oxidation At least one of zirconium (ZrO x ) or a composition thereof, wherein the cerium oxide may be cerium oxide (HfO 2 ), and the cerium oxide may be tantalum pentoxide (Ta 2 O 5 ), but the material of the variable resistance layer 130 is Not limited to this. The first ion collecting layer 140 and the second ion collecting layer 150 may be used to absorb ions (for example, oxygen ions) in the resistance change layer 130 or may ion (eg, oxygen) in the first ion collecting layer 140 and the second ion collecting layer 150. The ions are supplied to the resistance change layer 130. In the embodiment, the first ion collection layer 140 may include a metal oxide material, and the metal oxide material may include, for example, hafnium (Hf), magnesium (Mg), aluminum (Al), and antimony ( a metal oxide of Nb), lanthanum (La), zirconium (Zr), tantalum (Ta), and titanium (Ti) or a combination thereof, and the first ion collecting layer 140 may have an oxygen content less than that of the variable resistance layer 130 The amount of oxygen is favorable to absorb oxygen ions in the resistance change layer 130. On the other hand, the second ion collecting layer 150 may include a metal material or a metal nitride material, wherein the metal material may be a metal material that is easily bonded to oxygen, and may include, for example, hafnium (Hf), tantalum (Ta), and titanium (Ti). ), zirconium (Zr), platinum (Pt) and aluminum (Al), magnesium (Mg), lanthanum (La), copper (Cu) or a combination thereof (such as titanium aluminum alloy (TiAl)) metal materials, but the materials are Not limited to this. A barrier material may also be doped in the metal material contained in the second ion collecting layer 150 to form a metal nitride material.

在本實施例中,當電阻式記憶體細胞元結構100被施加特定電壓時,位於第一電極層120以及第二電極層160之間的電阻變化層130、第一離子收集層140以及第二離子收集層150會彼此作用而改變電阻變化層130的電阻。詳細而言,當本實施例的電阻式記憶體細胞元結構100被施加一第一電壓時,電阻變化層130中的部分離子(例如氧離子)會轉移或擴散至第一離子收集層140或第二離子收集層150,也就是說,第一離子收集層140與第二離子收集層150會吸收或結合電阻變化層130中的部分離子,使得離子離開電阻變化層130中的原始位置而產生空位(vacancy),並產生如細絲(filament)般的導電通道,藉此降低電阻變化層130的阻值而成為低電阻狀態(low resistance state,LRS)。相反地,當本實施例 的電阻式記憶體細胞元結構100被施加一第二電壓時,會驅使第一離子收集層140或第二離子收集層150中的部分離子(例如氧離子)轉移或擴散至電阻變化層130,使得電阻變化層130中的空位被重新結合(亦即空位被填滿)而破壞如細絲般的導電通道,藉此提升電阻變化層130的阻值而成為高電阻狀態(high resistance state,HRS)。據此,當電阻式記憶體細胞元結構100被施加第一電壓時,第一離子收集層140及/或第二離子收集層150會暫存從電阻變化層130離開的離子;當電阻式記憶體細胞元結構100被施加第二電壓時,會驅使暫存在第一離子收集層140及/或第二離子收集層150中的此些離子回到電阻變化層130中。由此可知,當電阻變化層130中的離子從電阻變化層130轉移至第一離子收集層140或第二離子收集層150時,或當第一離子收集層140或第二離子收集層150中的離子從第一離子收集層140或第二離子收集層150轉移至電阻變化層130時,電阻變化層130的電阻值會改變。在本實施例中,可將高電阻狀態及低電阻狀態的一者作為數位資料「0」,且另一者作為數位資料「1」,例如高電阻狀態作為數位資料「0」,低電阻狀態作為數位資料「1」,亦即經由設定(set)操作使電阻變化層130於低電阻狀態作為記憶狀態”1”,且第一電壓可稱為設定電壓(set voltage),經由重設(reset)操作使電阻變化層130於高電阻狀態作為記憶狀態”0”,且第二電壓可稱為重設電壓(reset voltage),因此,當對電阻式記憶體細胞元結構100施加一讀取電壓時,可讀出電阻變化層130的電阻值,進而得知電阻式記憶體細胞元結構100所儲存的資料。 In the present embodiment, when the resistive memory cell structure 100 is applied with a specific voltage, the resistance change layer 130, the first ion collection layer 140, and the second between the first electrode layer 120 and the second electrode layer 160 are disposed. The ion collecting layers 150 act on each other to change the resistance of the resistance change layer 130. In detail, when the resistive memory cell structure 100 of the present embodiment is applied with a first voltage, part of ions (eg, oxygen ions) in the resistance change layer 130 may be transferred or diffused to the first ion collecting layer 140 or The second ion collecting layer 150, that is, the first ion collecting layer 140 and the second ion collecting layer 150 may absorb or combine part of the ions in the variable resistance layer 130, so that the ions are separated from the original position in the variable resistance layer 130. The vacancy generates a conductive path such as a filament, thereby reducing the resistance of the variable resistance layer 130 to a low resistance state (LRS). Conversely, when this embodiment When the resistive memory cell structure 100 is applied with a second voltage, some ions (eg, oxygen ions) in the first ion collecting layer 140 or the second ion collecting layer 150 are driven to be transferred or diffused to the resistance change layer 130. The vacancies in the resistance change layer 130 are recombined (that is, the vacancies are filled) to break the conductive path such as a filament, thereby increasing the resistance of the resistance change layer 130 to become a high resistance state (HRS). ). Accordingly, when the resistive memory cell structure 100 is applied with the first voltage, the first ion collecting layer 140 and/or the second ion collecting layer 150 temporarily stores ions that leave the resistance changing layer 130; when resistive memory When the second voltage is applied to the somatic cell structure 100, such ions temporarily stored in the first ion collecting layer 140 and/or the second ion collecting layer 150 are driven back into the resistance change layer 130. It can be seen that when ions in the resistance change layer 130 are transferred from the resistance change layer 130 to the first ion collection layer 140 or the second ion collection layer 150, or when in the first ion collection layer 140 or the second ion collection layer 150 When the ions are transferred from the first ion collection layer 140 or the second ion collection layer 150 to the resistance change layer 130, the resistance value of the resistance change layer 130 changes. In this embodiment, one of the high resistance state and the low resistance state can be used as the digital data “0”, and the other as the digital data “1”, for example, the high resistance state is used as the digital data “0”, and the low resistance state is low. As the digital data "1", that is, the resistance change layer 130 is in the low resistance state as the memory state "1" via the set operation, and the first voltage can be referred to as a set voltage, via reset (reset) The operation causes the resistance change layer 130 to be in the high resistance state as the memory state "0", and the second voltage may be referred to as a reset voltage, and therefore, when a read voltage is applied to the resistive memory cell structure 100 The resistance value of the resistance change layer 130 can be read, and the data stored in the resistive memory cell structure 100 can be known.

值得一提的是,當本實施例的電阻式記憶體細胞元結構100被施加第一電壓而驅使電阻變化層130中的部分氧離子轉移或擴散時,所轉移的氧離子會先經過第一離子收集層140,使得至少部分的氧離子在第一離子收集層140中被結合而吸收,而剩餘未被第一離子收集層140吸收的氧離子則會被第二離子收集 層150所結合而不會逃離出電阻式記憶體細胞元結構100,也就是說,第二離子收集層150具有阻擋氧離子逃離電阻式記憶體細胞元結構100的功能,相反地,當電阻式記憶體細胞元結構100被施加第二電壓時,第一離子收集層140與第二離子收集層150的氧離子仍可透過第二電壓的驅使而回到電阻變化層130中,因此即使電阻變化層130在經過數次的狀態轉換後,電阻式記憶體細胞元結構100中的氧離子數量仍可維持較恆定的狀況,藉此增加電阻式記憶體細胞元結構100的可靠度。另一方面,當電阻式記憶體細胞元結構100被施加第二電壓時,由於氧離子從第一離子收集層140回到電阻變化層130所需的能量少於從第二離子收集層150回到電阻變化層130所需的能量,因此,在本實施例中,為了使第一離子收集層140能吸收到較多的擴散氧離子,第一離子收集層140所包含材料的氧離子吸收能力可大於第二離子收集層150之材料的氧離子吸收能力,亦即氧離子較容易與第一離子收集層140鍵結,也可設計為第一離子收集層140的厚度可大於第二離子收集層150的厚度,以增加氧離子被第一離子收集層140吸收的機率,換言之,本發明設計第一離子收集層140的氧離子吸收能力大於第二離子收集層150的氧離子吸收能力,但不以此為限。此外,在本實施例中,第二離子收集層150可為純金屬層,不只可以提升防止氧離子逃離電阻式記憶體細胞元結構100的能力,還可在設置此膜層的情況下不大幅增加電阻式記憶體細胞元結構100的電阻,但不以此為限。 It is worth mentioning that when the resistive memory cell structure 100 of the present embodiment is applied with a first voltage to drive partial oxygen ion transfer or diffusion in the resistance change layer 130, the transferred oxygen ions first pass through the first The ion collecting layer 140 is such that at least a portion of the oxygen ions are combined and absorbed in the first ion collecting layer 140, and the remaining oxygen ions not absorbed by the first ion collecting layer 140 are collected by the second ion. The layer 150 is bonded without escaping the resistive memory cell structure 100, that is, the second ion collecting layer 150 has a function of blocking oxygen ions from escaping from the resistive memory cell structure 100, and conversely, when resistive When the memory cell structure 100 is applied with the second voltage, the oxygen ions of the first ion collecting layer 140 and the second ion collecting layer 150 are still driven by the second voltage to return to the resistance change layer 130, so even if the resistance changes After several states of layer 130, the amount of oxygen ions in the resistive memory cell structure 100 can remain relatively constant, thereby increasing the reliability of the resistive memory cell structure 100. On the other hand, when the resistive memory cell structure 100 is applied with a second voltage, the energy required to return oxygen ions from the first ion collecting layer 140 back to the resistance change layer 130 is less than that from the second ion collecting layer 150. The energy required to reach the resistance change layer 130, therefore, in the present embodiment, in order to enable the first ion collection layer 140 to absorb more diffused oxygen ions, the oxygen ion absorption capacity of the material contained in the first ion collection layer 140 The oxygen ion absorbing ability of the material of the second ion collecting layer 150 may be greater than that of the first ion collecting layer 140, and the first ion collecting layer 140 may be thicker than the second ion collecting layer. The thickness of the layer 150 is increased to increase the probability of oxygen ions being absorbed by the first ion collecting layer 140. In other words, the oxygen ion absorbing ability of the first ion collecting layer 140 is designed to be larger than that of the second ion collecting layer 150, but Not limited to this. In addition, in the embodiment, the second ion collecting layer 150 can be a pure metal layer, which can not only improve the ability of preventing oxygen ions from escaping from the resistive memory cell structure 100, but also can not be greatly provided in the case of providing the film layer. The resistance of the resistive memory cell structure 100 is increased, but not limited thereto.

除此之外,傳統電阻式記憶體在高溫的狀態下,例如於高溫環境下或是對電阻式記憶體進行高溫測試時,不可避免的會發生例如離子逃離電阻式記憶體或外界離子擴散至電阻式記憶體的現象,進而影響電阻式記憶體的可靠度,但由於本實施例的電阻式記憶體細胞元結構100設置有具有阻擋離子功能的第二離子收集層150,因此可防止在高溫下其他離子由外界擴散至電阻式記憶體 細胞元結構100中,或是電阻式記憶體細胞元結構100中的離子逃離出電阻式記憶體細胞元結構100,以提高電阻式記憶體細胞元結構100的可靠度與製造良率。舉例而言,當電阻式記憶體細胞元結構100在高溫下操作或測試時,雖電阻變化層130中的氧離子容易在高溫時擴散而離開電阻變化層130,但由於第二離子收集層150的設置,游離的氧離子會被第二離子收集層150吸收,使得電阻式記憶體細胞元結構100中的氧離子數量仍可維持恆定,藉此可改善高溫下的可靠度。 In addition, when a conventional resistive memory is subjected to a high temperature state, for example, in a high temperature environment or when a high temperature test is performed on a resistive memory, inevitably, for example, ions escape from the resistive memory or external ions are diffused to The phenomenon of the resistive memory further affects the reliability of the resistive memory, but since the resistive memory cell structure 100 of the present embodiment is provided with the second ion collecting layer 150 having the function of blocking ions, it can be prevented from being heated at a high temperature. Other ions diffuse from the outside to the resistive memory In the cell structure 100, or the ions in the resistive memory cell structure 100 escape the resistive memory cell structure 100 to improve the reliability and manufacturing yield of the resistive memory cell structure 100. For example, when the resistive memory cell structure 100 is operated or tested at a high temperature, although the oxygen ions in the resistance change layer 130 are easily diffused away from the resistance change layer 130 at a high temperature, the second ion collection layer 150 is present. In the arrangement, the free oxygen ions are absorbed by the second ion collecting layer 150, so that the amount of oxygen ions in the resistive memory cell structure 100 can be maintained constant, thereby improving the reliability at high temperatures.

另外,舉例而言,當在高溫的狀態下(例如高溫操作),外界離子欲從第二離子收集層150的外側(即相反於電阻變化層130的一側或第二離子收集層150上側)擴散至電阻變化層130(第1圖中由上而下的擴散)時,外界離子會被第二離子收集層150所阻擋,使得外界離子無法影響電阻變化層130的組成,藉此保護電阻式記憶體細胞元結構100。此外,為了提高阻擋外界離子的效果,第二離子收集層150可選擇性地包括阻障材料,例如氮(nitrogen)或其他適合的材料,以使其成為例如氮化金屬材料,而阻障材料可利用電漿(plasma)或參雜(doping)製程等方式設置於第二離子收集層150中或第二離子收集層150的表面,但不以此為限。 In addition, for example, when in a high temperature state (for example, high temperature operation), external ions are intended to be from the outside of the second ion collecting layer 150 (ie, opposite to the side of the resistance change layer 130 or the upper side of the second ion collecting layer 150) When diffused to the resistance change layer 130 (diffusion from top to bottom in FIG. 1), external ions are blocked by the second ion collection layer 150, so that external ions cannot affect the composition of the resistance change layer 130, thereby protecting the resistive type. Memory cell structure 100. In addition, in order to enhance the effect of blocking external ions, the second ion collecting layer 150 may optionally include a barrier material such as nitrogen or other suitable material to make it, for example, a metal nitride material, and a barrier material. It may be disposed in the second ion collecting layer 150 or the surface of the second ion collecting layer 150 by means of a plasma or a doping process, but is not limited thereto.

綜上所述,本發明的電阻式記憶體細胞元結構由於設置有第一離子收集層與第二離子收集層,其中第一離子收集層可用以吸收由電阻變化層中擴散出的大部分離子,第二離子收集層不僅可用以吸收由電阻變化層中擴散出的離子,還可阻擋外界離子的侵入以及阻擋電阻式記憶體細胞元結構內的離子的逃離,藉此提高電阻式記憶體細胞元結構的可靠度與製造良率。 In summary, the resistive memory cell structure of the present invention is provided with a first ion collecting layer and a second ion collecting layer, wherein the first ion collecting layer can be used to absorb most of the ions diffused from the variable resistance layer. The second ion collecting layer can be used not only to absorb ions diffused from the variable resistance layer, but also to block the intrusion of external ions and block the escape of ions in the structure of the resistive memory cell structure, thereby improving the resistive memory cell. The reliability of the meta-structure and the manufacturing yield.

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

Claims (9)

一種電阻式記憶體細胞元結構,包括:一基底;一第一電極層,設置於該基底上;一電阻變化層,設置於該第一電極層上;一第一離子收集層,設置於該電阻變化層上;一第二離子收集層,設置於該第一離子收集層上;以及一第二電極層,設置於該第二離子收集層上,其中當該電阻式記憶體細胞元結構被施加一第一電壓時,該第一離子收集層與該第二離子收集層的其中至少一者暫存從該電阻變化層離開的離子;當該電阻式記憶體細胞元結構被施加一第二電壓時,會驅使暫存在該第一離子收集層與該第二離子收集層的其中至少一者中的該些離子回到該電阻變化層中。 A resistive memory cell structure comprising: a substrate; a first electrode layer disposed on the substrate; a resistance change layer disposed on the first electrode layer; a first ion collecting layer disposed on the substrate a second ion collecting layer disposed on the first ion collecting layer; and a second electrode layer disposed on the second ion collecting layer, wherein when the resistive memory cell structure is When a first voltage is applied, at least one of the first ion collecting layer and the second ion collecting layer temporarily stores ions that are separated from the resistance change layer; when the resistive memory cell structure is applied with a second At a voltage, the ions temporarily present in at least one of the first ion collecting layer and the second ion collecting layer are returned to the resistance change layer. 如請求項1所述之電阻式記憶體細胞元結構,其中該第一離子收集層包括金屬氧化材料。 The resistive memory cell structure of claim 1, wherein the first ion collecting layer comprises a metal oxide material. 如請求項2所述之電阻式記憶體細胞元結構,其中該金屬氧化材料包括鉿(Hf)、鎂(Mg)、鋁(Al)、鈮(Nb)、鑭(La)、鋯(Zr)、鉭(Ta)及鈦(Ti)或其組合的金屬氧化物。 The resistive memory cell structure according to claim 2, wherein the metal oxide material comprises hafnium (Hf), magnesium (Mg), aluminum (Al), niobium (Nb), hafnium (La), zirconium (Zr). Metal oxides of tantalum (Ta) and titanium (Ti) or combinations thereof. 如請求項1所述之電阻式記憶體細胞元結構,其中該第二離子收集層包括金屬材料或氮化金屬材料。 The resistive memory cell structure according to claim 1, wherein the second ion collecting layer comprises a metal material or a metal nitride material. 如請求項4所述之電阻式記憶體結構,其中該金屬材料包括鉿(Hf)、鉭(Ta)、鈦(Ti)、鋯(Zr)、鉑(Pt)、鋁(Al)、鎂(Mg)、鑭(La)、銅(Cu)或其組合的金屬材料。 The resistive memory structure of claim 4, wherein the metal material comprises hafnium (Hf), tantalum (Ta), titanium (Ti), zirconium (Zr), platinum (Pt), aluminum (Al), magnesium ( A metal material of Mg), lanthanum (La), copper (Cu), or a combination thereof. 如請求項1所述之電阻式記憶體細胞元結構,其中該第二離子收集層包含阻障材料。 The resistive memory cell structure of claim 1, wherein the second ion collecting layer comprises a barrier material. 如請求項6所述之電阻式記憶體細胞元結構,其中該阻障材料包括氮(nitrogen)。 The resistive memory cell structure of claim 6, wherein the barrier material comprises nitrogen. 如請求項1所述之電阻式記憶體細胞元結構,其中該電阻變化層包括氧化鉿(HfOx)、氧化鉭(TaOx)、氧化鈦(TiOx)、氧化鎳(NiOx)、氧化鈮(NbOx)、氧化鋁(AlOx)、氧化鎢(WOx)、氧化鋅(ZnOx)、氧化鈷(CoOx)、氧化鑭(LaOx)、氧化鋯(ZrOx)的其中至少一種或其組合物。 The resistive memory cell structure according to claim 1, wherein the resistance change layer comprises hafnium oxide (HfO x ), tantalum oxide (TaO x ), titanium oxide (TiO x ), nickel oxide (NiO x ), and oxidation. At least (NbO x ), alumina (AlO x ), tungsten oxide (WO x ), zinc oxide (ZnO x ), cobalt oxide (CoO x ), lanthanum oxide (LaO x ), zirconia (ZrO x ) One or a combination thereof. 如請求項1所述之電阻式記憶體細胞元結構,其中當該電阻變化層中的該些離子從該電阻變化層轉移至該第一離子收集層與該第二離子收集層的其中至少一者時,或當暫存在該第一離子收集層與該第二離子收集層的其中至少一者中的該些離子從該第一離子收集層或該第二離子收集層轉移至該電阻變化層時,該電阻變化層的電阻值會改變。 The resistive memory cell structure according to claim 1, wherein the ions in the resistance change layer are transferred from the resistance change layer to at least one of the first ion collection layer and the second ion collection layer. Or when the ions temporarily present in at least one of the first ion collecting layer and the second ion collecting layer are transferred from the first ion collecting layer or the second ion collecting layer to the resistance change layer The resistance value of the resistance change layer changes.
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