TWI668181B - 半導體器件 - Google Patents

半導體器件 Download PDF

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TWI668181B
TWI668181B TW106121851A TW106121851A TWI668181B TW I668181 B TWI668181 B TW I668181B TW 106121851 A TW106121851 A TW 106121851A TW 106121851 A TW106121851 A TW 106121851A TW I668181 B TWI668181 B TW I668181B
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electrode
semiconductor
semiconductor device
conductive film
carbon nanotube
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TW201900548A (zh
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張金
魏洋
姜開利
范守善
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鴻海精密工業股份有限公司
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Abstract

一種半導體器件，該半導體器件包括一第一電極、一第二電極、一第三電極及一半導體元件。所述半 導體元件包括：一半導體結構，所述半導體結構包括一P型半導體層及一N型半導體層，並定義一第一表面及與第一表面相對的第二表面；一奈米碳管，該奈米碳管設置於半導體結構的第一表面；一導電膜，該導電膜通過沉積方法形成於所述半導體結構的第二表面，使半導體結構設置於奈米碳管和導電膜之間，奈米碳管、半導體結構與導電膜相互層疊形成一多層立體結構。

Description

半導體器件
本發明涉及一種半導體器件。
近年來，范德華異質結是最近兩年的新興研究領域。范德華異質結通過將具有不同性質(電學以及光學等)的二維材料堆到一起，可以實現對組合而成的“新”材料的性質進行人工調控；由於層間弱的范德華作用力，相鄰的層間不再受晶格必須相匹配的限制；並且，由於沒有成分過渡，所形成的異質結具有原子級陡峭的載流子(勢場)梯度；由於以過渡金屬雙硫族化物為代表的非石墨烯二維層狀材料通常可以形成二類能帶關係，因此以它們為基礎搭建的異質結具有非常強的載流子分離能力；此外，由於超薄的厚度以及特殊的二維結構，使其具有強的柵極回應能力，以及與傳統微電子加工工藝和柔性基底相容的特性。
本發明提供了新型的含有范德華異質結的半導體器件。
一半導體器件，該半導體器件包括一第一電極、一第二電極、一第三電極及一半導體元件；該半導體元件與該第一電極和第二電極電連接，該第三電極通過一絕緣層與該半導體元件、第一電極及第二電極絕緣設置；所述半導體元件包括：一半導體結構，所述半導體結構包括一P型半導體層及一N型半導體層，並定義一第一表面及與第一表面相對的第二表面；一奈米碳管，該奈米碳管設置於半導體結構的第一表面；一導電膜，該導電膜通過沉積方法形成於所述半導體層的第二表面，使半導體結構設置於奈米碳管和導電膜之間，奈米碳 管、半導體結構與導電膜相互層疊形成一多層立體結構；其中，所述第一電極與奈米碳管電連接，所述第二電極與導電膜電連接。
相較於先前技術，本發明提供了一種新型的半導體器件，該半導體器件在未來的奈米電子學和奈米光電子學領域具有巨大的應用潛力。
100‧‧‧半導體元件
102‧‧‧奈米碳管
104‧‧‧半導體結構
104a‧‧‧P型半導體層
104b‧‧‧N型半導體層
106‧‧‧導電膜
110‧‧‧多層立體結構
200‧‧‧半導體器件
202‧‧‧第一電極
204‧‧‧第二電極
208‧‧‧第三電極
210‧‧‧絕緣層
圖1為本發明實施例提供的半導體元件的整體結構示意圖。
圖2為本發明實施例提供的半導體元件的側視示意圖。
圖3為本發明另實施例提供的另一種半導體元件側視示意圖。
圖4為本發明實施例提供的半導體器件的結構示意圖。
圖5為本發明實施例提供的半導體器件在應用時的特性曲線圖。
以下將結合附圖及具體實施例對本發明的半導體元件及半導體器件作進一步的詳細說明。
請參閱圖1及圖2，本發明第一實施例提供一種半導體元件100。該半導體元件100包括一奈米碳管102、一半導體結構104及一導電膜106。所述奈米碳管102設置於半導體結構104的表面。所述半導體結構104的厚度為1~100奈米。所述導電膜106設置於所述半導體結構104的表面，使半導體結構104設置於奈米碳管102和導電膜106之間。所述半導體結構104包括一P型半導體層104a及一N型半導體層104b。所述P型半導體層104a及N型半導體層104b層疊設置。所述半導體結構104包括一第一表面1042及一第二表面1044，第一表面1042和第二表面1044相對設置。
所述奈米碳管102為金屬型奈米碳管。奈米碳管102的直徑不限，可以為0.5奈米~150奈米，在某些實施例中，奈米碳管102的直徑可以為1奈米~10奈米。優選地，奈米碳管102為單壁奈米碳管，其直徑為1奈米~5奈米。本實施例中，奈米碳管102為金屬型單壁奈米碳管，其直徑為1奈米。所述奈米碳管102設置在 半導體結構104的第一表面1042，並與第一表面1042直接接觸。所述半導體結構104的第一表面1042可以僅包括一根奈米碳管102。
所述半導體結構104為一二維層狀結構。所述二維層狀結構即半導體結構104的厚度較小，半導體結構104的厚度為1奈米~200奈米，優選地，其厚度為1奈米~100奈米。所述半導體結構104包括一P型半導體層104a及一N型半導體層104b，所述P型半導體層104a及N型半導體層104b層疊設置。所述半導體結構104包括一第一表面1042及一第二表面1044，第一表面1042和第二表面1044相對設置。請參見圖2，所述第一表面1042可以為P型半導體層104a的表面，第二表面1044為N型半導體層104b的表面，此情況下，奈米碳管102設置在P型半導體層104a的表面，導電膜106設置在N型半導體層104b的表面。在另外的實施例中，請參見圖3，所述第一表面1042可以為N型半導體層104b的表面，第二表面1044為P型半導體層104a的表面，此情況下，奈米碳管102設置在N型半導體層104b的表面，導電膜106設置在P型半導體層104a的表面。所述P型半導體層104a或N型半導體層104b的材料不限，可以為無機化合物半導體、元素半導體、有機半導體材料或這些材料摻雜後的材料。本實施例中，P型半導體層104a的材料為硒化鎢(WSe2)，其厚度為6奈米，N型半導體層104b的材料為硫化鉬(MoS2)，其厚度為2.6奈米，奈米碳管102設置在N型半導體層104b的表面，導電膜106設置在P型半導體層104a的表面。
所述導電膜106的材料為導電材料，可以為金屬、導電聚合物或ITO。導電膜106直接沉積在半導體結構104的第二表面1044。導電膜106沉積在半導體結構104的第一表面1044的具體方法不限，可以為離子濺射、磁控濺射或其他鍍膜方法。所述導電膜106的厚度不限，可以為5奈米~100微米。在一些實施例中，導電膜106的厚度為5奈米~100奈米；在另一些實施例中，導電膜106的厚度為5奈米~20奈米。所述導電膜106的形狀不限，可以為長條形、線性、方形等形狀。本實施例中，所述導電膜106的材料為金屬，其形狀為長條形。
所述奈米碳管102、半導體結構104和導電膜106相互層疊形成一多層立體結構110。由於奈米碳管102相對於半導體結構104和導電膜106的尺寸較小，該多層立體結構110的橫截面的面積由奈米碳管102的直徑和長度決定。由於奈米碳管102為奈米材料，該多層立體結構110的橫截面面積也是奈米級。所述多層立體結構110定義一橫向截面及一豎向截面，所述橫向截面即平行於半導體結構104表面的方向的截面，所述縱向截面即垂直於半導體結構104的表面的方向的截面。所述橫向截面的面積由奈米碳管102的直徑和長度決定。所述縱向截面的面積由奈米碳管102的長度和多層立體結構110的厚度決定。優選地，該多層立體結構110的橫截面的面積為0.25nm2~1000nm2。更優選地，該多層立體結構110的橫截面的面積為1nm2~100nm2。奈米碳管102和導電膜106與二維半導體結構104在多層立體結構110處形成范德華異質結構。在應用時，奈米碳管102和導電膜106可以看作設置在半導體結構104的兩個相對表面上的電極，當在奈米碳管102和導電膜106上施加偏壓實現導通時，電流的流動路徑為穿過多層立體結構110的橫截面，所述半導體元件100的有效部分為多層立體結構110。所述半導體元件100的整體尺寸只需確保大於多層立體結構110的體積即可，因此，半導體元件100可以具有較小的尺寸，只需確保其包括多層立體結構110。所述半導體元件100可以為一奈米級的半導體元件。該半導體元件具有較低的能耗、奈米級的尺寸以及更高的集成度。
本發明的半導體元件為一基於奈米碳管不對稱范德華異質結構(CCVH)，其中半導體結構為一二維結構，其被不對稱地夾在奈米碳管102和導電膜106之間，半導體結構包括一P-N結，奈米碳管和導電膜分別作為P-N結的兩個電極。通過在奈米碳管和導電膜上施加電壓，可以實現半導體元件的單嚮導通。本發明中，奈米碳管與半導體結構的第一表面接觸，導電膜與半導體結構的第二表面接觸，奈米碳管和導電膜對2D半導體層的不對稱接觸使范德華異質結構具有更優異的輸運性能。當半導體元件用在電晶體上時，通過控制柵極電極的電壓， 這種范德華異質結構在相對的源極-漏極偏置處顯示出不對稱的輸出特性。這種運輸特性的多樣性主要是因為，半導體元件100採用奈米碳管102作為底電極，由於奈米碳管特殊的幾何形狀和能帶結構，使奈米碳管的費米能級更容易被柵極電壓調製，因此，這種半導體元件呈現出獨特的性能。本發明提供的半導體元件在未來的奈米電子學和奈米光電子學領域具有巨大的潛力。
請參見圖4，本發明第二實施例提供一種半導體器件200。該半導體器件200包括一第一電極202、一第二電極204、一半導體元件100及一第三電極208。該半導體元件100與該第一電極202和第二電極204電連接，該第三電極208通過一絕緣層210與該半導體元件100、第一電極202及第二電極204絕緣設置。所述半導體元件100的具體結構與第一實施例提供的半導體元件100相同，在此不再重複做詳述。
所述半導體器件200中，第三電極208與絕緣層210層疊設置，所述半導體元件100設置在絕緣層210的表面，使絕緣層210位於第三電極208和半導體元件100之間。所述半導體元件100中，奈米碳管102直接設置於絕緣層210的表面，半導體結構104設置於奈米碳管102的上方，使奈米碳管102位於半導體結構104和絕緣層210之間，導電膜106位於半導體結構104的上方。本發明中，奈米碳管102直接設置在絕緣層210表面，奈米碳管102靠近第三電極208，第三電極208可以控制半導體元件100。另外，由於導電膜106遠離第三電極208，導電膜106不會在半導體結構104和第三電極208產生屏蔽效應，以免半導體器件200無法工作。
所述第一電極202和第二電極204均由導電材料組成，該導電材料可選擇為金屬、ITO、ATO、導電銀膠、導電聚合物以及導電奈米碳管等。該金屬材料可以為鋁、銅、鎢、鉬、金、鈦、鈀或任意組合的合金。所述第一電極202和第二電極204也可以均為一層導電薄膜，該導電薄膜的厚度為2奈米-100微米。本實施例中，所述第一電極202、第二電極204為金屬Au和Ti得到的金屬複合結 構，具體地，所述金屬複合結構是由一層金屬Au和一層金屬Ti組成，Au設置在Ti的表面。所述金屬Ti的厚度為5奈米，金屬Au的厚度為50奈米。本實施例中，所述第一電極202與奈米碳管102電連接，設置於奈米碳管102的一端並貼合於奈米碳管102的表面，其中，Ti層設置於奈米碳管102表面，Au層設置於Ti層表面；所述第二電極204與導電膜106電連接，並設置於導電膜106的一端並貼合於導電膜106的表面，其中，Ti層設置於導電膜106表面，Au層設置於Ti層表面。
所述絕緣層210的材料為絕緣材料，其厚度為1奈米~100微米。絕緣層210使奈米碳管102與第三電極208間隔絕緣設置。本實施例中，絕緣層的材料為氧化矽。
所述第三電極208由導電材料組成，該導電材料可選擇為金屬、ITO、ATO、導電銀膠、導電聚合物以及導電奈米碳管等。該金屬材料可以為鋁、銅、鎢、鉬、金、鈦、鈀或任意組合的合金。本實施例中，所述第三電極208為一層狀結構，絕緣層210設置於第三電極208的表面，所述第一電極202、第二電極204、以及半導體元件100設置於絕緣層210上，並由第三電極208和絕緣層210支撐。
本發明所提供的半導體器件200，由於奈米碳管102作為底電極，直接設置在絕緣層210上，與作為柵極的第三電極208僅間隔一層絕緣層210，由於奈米碳管的特殊性能，可以通過柵極調節半導體元件100的導通，使半導體元件100呈現不對稱的輸出特性。本實施例中，奈米碳管102設置在N型半導體層104b的表面，導電膜106設置在P型半導體層10b的表面，P型半導體層104a為厚度為6奈米的WSe2，N型半導體層104b為厚度為2.6奈米的MoS2，第一電極202接地，請參見圖5，第二電極204的電壓從-1伏到1伏變化時，當第三電極208的電壓為-12伏時，半導體元件100呈現P-N結的特性；當柵極電壓為10伏時，半導體元件100呈現N-N結的特性。
另外，本領域技術人員還可以在本發明精神內做其他變化，這些依據本發明精神所做的變化，都應包含在本發明所要求保護的範圍內。綜上所述，本發明確已符合發明專利之要件，遂依法提出專利申請。惟，以上所述者僅為本發明之較佳實施例，自不能以此限制本案之申請專利範圍。舉凡習知本案技藝之人士援依本發明之精神所作之等效修飾或變化，皆應涵蓋於以下申請專利範圍內。

Claims (10)

  1. 一種半導體器件，其包括：一第一電極、一第二電極、一第三電極及一半導體元件；該半導體元件與該第一電極和第二電極電連接，該第三電極通過一絕緣層與該半導體元件、第一電極及第二電極絕緣設置；所述半導體元件包括：一半導體結構，所述半導體結構包括一P型半導體層及一N型半導體層，並定義一第一表面及與第一表面相對的第二表面；一奈米碳管，該奈米碳管設置於半導體結構的第一表面；一導電膜，該導電膜通過沉積方法形成於所述半導體層的第二表面，使半導體結構設置於奈米碳管和導電膜之間，奈米碳管、半導體結構與導電膜相互層疊形成一多層立體結構；其中，所述第一電極與奈米碳管電連接，所述第二電極與導電膜電連接。
  2. 如請求項1所述的半導體器件，其中，所述奈米碳管為金屬型奈米碳管。
  3. 如請求項2所述的半導體器件，其中，所述奈米碳管為單壁奈米碳管。
  4. 如請求項1所述的半導體器件，其中，所述多層立體結構的橫截面面積在1nm2~100nm2之間。
  5. 如請求項1所述的半導體器件，其中，所述半導體層的厚度為1奈米~100奈米。
  6. 如請求項1所述的半導體器件，其中，所述導電膜的沉積方法包括離子濺射、磁控濺射或其它鍍膜方法。
  7. 如請求項1所述的半導體器件，其中，所述導電膜的厚度為5奈米~100奈米。
  8. 如請求項1所述的半導體器件，其中，所述半導體結構的第一表面為P型半導體層的表面，第二表面為N型半導體層的表面。
  9. 如請求項1所述的半導體器件，其中，所述半導體結構的第一表面為N型半導體層的表面，第二表面為P型半導體層的表面。
  10. 如請求項1所述的半導體器件，其中，所述P型半導體層和N型半導體層層疊設置形成一P-N結。
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