TWI662469B - Logic analysis system and signal processing and display method thereof - Google Patents

Logic analysis system and signal processing and display method thereof Download PDF

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TWI662469B
TWI662469B TW106136551A TW106136551A TWI662469B TW I662469 B TWI662469 B TW I662469B TW 106136551 A TW106136551 A TW 106136551A TW 106136551 A TW106136551 A TW 106136551A TW I662469 B TWI662469 B TW I662469B
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TW201917560A (en
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林松輝
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孕龍科技股份有限公司
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Abstract

一種邏輯分析系統及其訊號處理與顯示方法,其包括有:一類比數位轉換器,與一類比訊號源連接,用以接收類比訊號源所提供的類比訊號進行數位化後輸出;一邏輯分析儀,與類比數位轉換器以及一數位訊號源電性連接,用以擷取數位化後之類比訊號以及數位訊號源所提供的一數位訊號,以及對數位訊號進行解碼後取得對應的一解碼封包;以及一顯示裝置,與邏輯分析儀電性連接,用以接收數位化後之類比訊號、數位訊號以及解碼封包,顯示裝置具有一顯示畫面,用以同時顯示數位化後之類比訊號的波形、數位訊號的波形以及解碼封包之內容。A logic analysis system and a signal processing and display method thereof, comprising: an analog-to-digital converter connected to a analog signal source for receiving an analog signal provided by an analog signal source for digitizing and outputting; a logic analyzer And electrically connecting with the analog digital converter and the digital signal source, for capturing the digital signal provided by the digital analog signal and the digital signal source, and decoding the digital signal to obtain a corresponding decoding packet; And a display device electrically connected to the logic analyzer for receiving the digital analog signal, the digital signal and the decoding packet, and the display device has a display screen for simultaneously displaying the waveform and digit of the digital analog signal The waveform of the signal and the content of the decoded packet.

Description

一種邏輯分析系統及其訊號處理與顯示方法Logic analysis system and signal processing and display method thereof

本發明係與邏輯分析系統及其訊號處理與顯示方法有關;特別是指一種將類比訊號、數位訊號及封包內容顯示在同一畫面的邏輯分析系統及其訊號處理與顯示方法。 The invention relates to a logic analysis system and a signal processing and display method thereof; in particular, to a logic analysis system and a signal processing and display method for displaying an analog signal, a digital signal and a package content on the same screen.

隨著數位科技的進步,如電子晶片、液晶螢幕(LCD)之影像處理晶片、互補性氧化金屬半導體(Complementary Metal-Oxide Semiconductor,CMOS)、以及電荷耦合元件(Charge Coupled Device,CCD)等使用數位訊號傳輸資料之電子裝置日漸普及。隨著數位科技的進步,如電子晶片、液晶螢幕(LCD)之影像處理晶片、互補性氧化金屬半導體(Complementary Metal-Oxide Semiconductor,CMOS)、以及電荷耦合元件(Charge Coupled Device,CCD)等使用數位訊號傳輸資料之電子裝置日漸普及。當研發人員在研發具有上述電子裝置時,通常會利用邏輯分析儀來擷取待測物所輸出之資料中的數位訊號,並藉由分析上述所擷取之數位訊號,來判定上述電子裝置之設計是否正常。 With the advancement of digital technology, such as electronic wafers, liquid crystal display (LCD) image processing chips, Complementary Metal-Oxide Semiconductor (CMOS), and Charge Coupled Device (CCD), etc. Electronic devices for transmitting data have become increasingly popular. With the advancement of digital technology, such as electronic wafers, liquid crystal display (LCD) image processing chips, Complementary Metal-Oxide Semiconductor (CMOS), and Charge Coupled Device (CCD), etc. Electronic devices for transmitting data have become increasingly popular. When the R&D personnel develops the above-mentioned electronic device, the logic analyzer is usually used to extract the digital signal in the data outputted by the object to be tested, and the digital device is determined by analyzing the digital signal captured. Is the design normal?

而於目前已知技術中,若要檢測的訊號為類比訊號時,並無法使用邏輯分析儀直接進行類比訊號的擷取及顯示,而需使用示波器才可進行類比訊號的擷取及顯示。因此,於現有技術中,並未見有可同時擷取類比訊號以及數位訊號並同時顯示擷取結果的邏輯分析系統,以 至於研發工程師在研究開發的效率上無法更進一步地提升,而有亟待改善的地方。 However, in the currently known technology, if the signal to be detected is an analog signal, the logic analyzer cannot directly use the analog signal to capture and display the analog signal, and an oscilloscope is required to perform analog signal capture and display. Therefore, in the prior art, there is no logic analysis system that can simultaneously capture the analog signal and the digital signal and simultaneously display the captured result. As for R&D engineers, the efficiency of research and development cannot be further improved, and there is room for improvement.

有鑑於此,本發明之目的在於提供一種邏輯分析系統及其訊號處理與顯示方法,可利用邏輯分析儀將類比訊號、數位訊號以及解碼封包同時顯示在同一顯示畫面上,以提供研發工程師直觀地觀察類比訊號與數位訊號,藉以提升研發效率。 In view of this, the object of the present invention is to provide a logic analysis system and a signal processing and display method thereof, which can display analog signals, digital signals and decoding packets simultaneously on the same display screen by using a logic analyzer to provide a research and development engineer intuitively. Observe analog signals and digital signals to improve R&D efficiency.

緣以達成上述目的,本發明提供的邏輯分析系統包括有:一類比數位轉換器,與一類比訊號源電性連接,用以接收該類比訊號源所提供的一類比訊號進行數位化後輸出;一邏輯分析儀,與該類比數位轉換器以及一數位訊號源電性連接,用以擷取數位化後之該類比訊號以及該數位訊號源所提供的一數位訊號,以及對該數位訊號進行解碼後取得對應的一解碼封包;以及一顯示裝置,與該邏輯分析儀電性連接,用以接收數位化後的該類比訊號、該數位訊號以及該解碼封包,該顯示裝置具有一顯示畫面,用以同時顯示數位化後之該類比訊號的波形、該數位訊號的波形以及該解碼封包之內容。 In order to achieve the above object, the logic analysis system provided by the present invention comprises: an analog-to-digital converter electrically connected to a analog signal source for receiving a analog signal provided by the analog signal source for digitizing and outputting; a logic analyzer electrically coupled to the analog-to-digital converter and a digital signal source for capturing the digitized analog signal and a digital signal provided by the digital signal source, and decoding the digital signal And obtaining a corresponding decoding packet; and a display device electrically connected to the logic analyzer for receiving the digitized analog signal, the digital signal and the decoding packet, the display device having a display screen The waveform of the analog signal after digitization, the waveform of the digital signal, and the content of the decoding packet are simultaneously displayed.

緣以達成上述目的,本發明提供的邏輯分析系統之訊號處理與顯示方法包括有以下步驟:自一類比訊號源擷取一類比訊號,並將該類比訊號數位化後輸出;使用一邏輯分析儀擷取數位化後之該類比訊號,以及自一數位訊號源擷取一數位訊號,並對該數位訊號進行解碼後取得對應的一解碼封包;以及於一顯示畫面中,同時顯示數位化後之該類比訊號的波形、該數位訊號的波形以及該解碼封包之內容。 In order to achieve the above object, the signal processing and display method of the logic analysis system provided by the present invention includes the following steps: taking an analog signal from a class of analog signal sources, and digitally outputting the analog signal; using a logic analyzer Obtaining the analog signal after digitization, and extracting a digital signal from a digital signal source, and decoding the digital signal to obtain a corresponding decoding packet; and displaying the digitized display in a display screen The waveform of the analog signal, the waveform of the digital signal, and the content of the decoding packet.

本發明之效果在於,於一顯示畫面中,以圖形化顯示數位化後的類比訊號的波形、數位訊號的波形以及解碼封包之內容,藉以讓研發人員直觀地觀察與分析類比及數位訊號波形與內容,從而可提升其研究開發的效率。 The effect of the invention is to graphically display the waveform of the digital analog signal, the waveform of the digital signal and the content of the decoding packet in a display screen, so that the researcher can intuitively observe and analyze the analog and digital signal waveforms. Content, which can improve the efficiency of its research and development.

1‧‧‧類比訊號源 1‧‧‧ analog signal source

2‧‧‧數位訊號源 2‧‧‧ digital signal source

〔本發明〕 〔this invention〕

100‧‧‧邏輯分析系統 100‧‧‧Logic Analysis System

10‧‧‧類比數位轉換器 10‧‧‧ analog digital converter

20‧‧‧邏輯分析儀 20‧‧‧Logic Analyzer

30‧‧‧顯示裝置 30‧‧‧Display device

32‧‧‧顯示畫面 32‧‧‧Display screen

321‧‧‧水平刻度 321‧‧‧ horizontal scale

322‧‧‧垂直刻度 322‧‧‧Vertical scale

34‧‧‧第一顯示區 34‧‧‧First display area

341‧‧‧區塊 341‧‧‧ Block

342‧‧‧區塊 342‧‧‧ Block

36‧‧‧第二顯示區 36‧‧‧Second display area

38‧‧‧第三顯示區 38‧‧‧ Third display area

圖1為本發明一實施例之邏輯分析系統的方塊圖。 1 is a block diagram of a logic analysis system in accordance with an embodiment of the present invention.

圖2為上述實施例之邏輯分析系統之訊號處理與顯示方法的流程圖。 2 is a flow chart of a signal processing and display method of the logic analysis system of the above embodiment.

圖3為上述實施例之顯示裝置的顯示畫面示意圖。 Fig. 3 is a schematic view showing a display screen of the display device of the above embodiment.

圖4為另一實施例之顯示裝置的顯示畫面示意圖。 4 is a schematic diagram of a display screen of a display device according to another embodiment.

為能更清楚地說明本發明,茲舉一較佳實施例並配合圖式詳細說明如後。請參圖1及圖2所示,為本發明一較佳實施例之邏輯分析系統100,用以分別自一類比訊號源1以及一數位訊號源2擷取一類比訊號以及一數位訊號並輸出以供研發人員檢視,以對類比訊號以及數位訊號進行訊號分析與比對。該邏輯分析系統100包括有一類比數位轉換器10、一邏輯分析儀20以及一顯示裝置30。本發明之邏輯分析系統的訊號處理與顯示方法包括有以下步驟:自類比訊號源1擷取一類比訊號並將類比訊號數位化後輸出。於本實施例中,該類比數位轉換器10與該類比訊號源1電性連接,用以接收該類比訊號源所提供(或稱產生)的類比訊號,並將該類比訊 號數位化後輸出。更進一步地說,該類比數位轉換器10係依據一取樣率對連續時間的類比訊號進行取樣,以轉換為離散時間的數位訊號,而後再進一步對取樣所得之離散時間的數位訊號進行量化處理,以獲得數位化後的該類比訊號。 In order to explain the present invention more clearly, a preferred embodiment will be described in detail with reference to the drawings. Referring to FIG. 1 and FIG. 2, a logic analysis system 100 for extracting an analog signal and a digital signal from a analog signal source 1 and a digital signal source 2 is outputted according to a preferred embodiment of the present invention. For the developer to view, to analyze and compare the analog signal and digital signal. The logic analysis system 100 includes an analog to digital converter 10, a logic analyzer 20, and a display device 30. The signal processing and display method of the logic analysis system of the present invention comprises the steps of: taking a analog signal from the analog signal source 1 and digitizing the analog signal and outputting the analog signal. In the embodiment, the analog-to-digital converter 10 is electrically connected to the analog signal source 1 for receiving analog signals provided by the analog signal source, and comparing the analog signals. The number is digitized and output. Furthermore, the analog-to-digital converter 10 samples the continuous-time analog signal according to a sampling rate, converts it into a discrete-time digital signal, and then further quantizes the discrete-time digital signal obtained by sampling. To obtain the digital analog signal.

使用邏輯分析儀20擷取數位化後之該類比訊號,以及自數位訊號源2擷取一數位訊號,並對該數位訊號進行解碼後取得對應的一解碼封包。於本實施例中,該邏輯分析儀20與該類比數位轉換器10以及該數位訊號源2電性連接,用以擷取該類比數位轉換器10所輸出之數位化後之該類比訊號以及該數位訊號源2所提供(或稱產生)的數位訊號,並且根據一解碼手段對該數位訊號進行解碼(或稱解譯)後以取得對應的解碼封包。其中,於實務上,可透過探棒或排線等連接器電性連接邏輯分析儀20與數位訊號源2以及類比數位轉換器10,以擷取訊號,但不以此為限;另外,所述解碼手段通常將對應待測物的通訊協定進行選擇。此外,於一實施例中,該邏輯分析儀20係包含有一記憶體,用以供暫存所擷取之數位後的類比訊號、數位訊號以及解碼封包,並且於邏輯分析儀20擷取完畢或者所儲存之資料量達一預定容量後,再將記憶體所儲存之資料輸出。 The logic analyzer 20 is used to capture the digitized analog signal, and a digital signal is extracted from the digital signal source 2, and the digital signal is decoded to obtain a corresponding decoding packet. In the embodiment, the logic analyzer 20 is electrically connected to the analog-to-digital converter 10 and the digital signal source 2, and is configured to capture the analogized analog signal output by the analog-to-digital converter 10 and the analog signal. The digital signal provided by the digital signal source 2 is generated (or generated), and the digital signal is decoded (or interpreted) according to a decoding means to obtain a corresponding decoding packet. In practice, the logic analyzer 20 and the digital signal source 2 and the analog digital converter 10 can be electrically connected through a connector such as a probe or a cable to capture the signal, but not limited thereto; The decoding means usually selects a communication protocol corresponding to the object to be tested. In addition, in an embodiment, the logic analyzer 20 includes a memory for temporarily storing the digital signal, the digital signal, and the decoding packet after the digital image is captured, and is captured by the logic analyzer 20 or After the amount of stored data reaches a predetermined capacity, the data stored in the memory is output.

於一顯示畫面中,同時顯示數位化後之該類比訊號的波形、該數位訊號的波形以及該解碼封包之內容。於本實施例中,提供有顯示裝置30,該顯示裝置30與該邏輯分析儀20電性連接,用以自邏輯分析儀20接收數位化後之該類比訊號、該數位訊號以及該解碼封包,且該顯示裝置30具有一顯示畫面32(圖3參照),用以同時顯示數位化後之該類比訊號的波形、該數位訊號的波形以及該解碼封包的內容出來,以供研發人員檢視與分析。於本實施例中,所述的顯示裝置30係以一電腦 的顯示器為例,該邏輯分析儀20係可透過有線傳輸或無線傳輸的方式將前述資料傳輸予電腦,且該電腦係安裝有一對應該邏輯分析儀20的應用程式,藉以,該電腦可透過該應用程式將自邏輯分析儀所接收的資料顯示於該顯示器上。 In a display screen, the waveform of the digital signal after the digitization, the waveform of the digital signal, and the content of the decoding packet are simultaneously displayed. In the present embodiment, a display device 30 is provided. The display device 30 is electrically connected to the logic analyzer 20 for receiving the digitized analog signal, the digital signal and the decoding packet from the logic analyzer 20. The display device 30 has a display screen 32 (refer to FIG. 3) for simultaneously displaying the waveform of the analogized analog signal, the waveform of the digital signal, and the content of the decoded packet for review and analysis by the developer. . In the embodiment, the display device 30 is a computer For example, the logic analyzer 20 can transmit the foregoing data to a computer by means of wired transmission or wireless transmission, and the computer is installed with a pair of applications that should be the logic analyzer 20, so that the computer can pass the The application displays the data received from the logic analyzer on the display.

請一併配合圖3所示,於本實施例中,所述顯示畫面32包括有一第一顯示區34、一第二顯示區36以及一第三顯示區38,該第一顯示區34用以顯示數位化後之該類比訊號的波形,該第二顯示區36用以顯示該數位訊號的波形,該第三顯示區38用以顯示該解碼封包之內容。藉此,可在同一顯示畫面中,同時顯示數位化後之該類比訊號的波形、數位訊號之波形以及對應該數位訊號之解碼封包的內容,以方便研發人員可直觀地觀察圖形化顯示之類比訊號波形、數位訊號波形以及封包內容。另外,於顯示畫面32上,還顯示有水平刻度321以及垂直刻度322,其中,水平刻度321標示時間軸以及時間單位,所述時間單位可為秒、毫秒、微秒等,並可由研發人員根據需求選擇;垂直刻度322標示數位化之類比訊號的振幅單位以及大小,藉以輔助研發人員直觀地觀察數位化之類比訊號波形的變化,於本實施例中,振幅單位為伏特,但於其他應用上,並不以此為限,亦可根據檢測之待測物的種類進行改變,或由研發人員選擇使用其他單位,另外,關於振幅大小的數量級同樣可供研發人員基於需求進行適當選擇,而不以圖式上所示出的內容為限。 As shown in FIG. 3, in the embodiment, the display screen 32 includes a first display area 34, a second display area 36, and a third display area 38. The first display area 34 is used. The waveform of the analog signal is displayed. The second display area 36 is used to display the waveform of the digital signal, and the third display area 38 is used to display the content of the decoded packet. In this way, the waveform of the analog signal, the waveform of the digital signal, and the content of the decoding packet corresponding to the digital signal can be simultaneously displayed in the same display screen, so that the developer can intuitively observe the analog display. Signal waveform, digital signal waveform, and packet content. In addition, on the display screen 32, a horizontal scale 321 and a vertical scale 322 are also displayed, wherein the horizontal scale 321 indicates a time axis and a time unit, and the time unit can be seconds, milliseconds, microseconds, etc., and can be Demand selection; vertical scale 322 indicates the amplitude unit and size of the analog signal, so as to assist the developer to visually observe the variation of the analog signal waveform. In this embodiment, the amplitude unit is volt, but in other applications. It is not limited to this, it can be changed according to the type of object to be tested, or other units can be selected by the R&D personnel. In addition, the magnitude of the amplitude can also be appropriately selected by the R&D personnel based on the demand, instead of The content shown on the drawings is limited.

此外,於本實施例中,該第一顯示區34以及該第二顯示區36係位於該第三顯示區38的上方,且第一顯示區34與第二顯示區36係並列對齊顯示,且數位化後之類比訊號的波形、數位訊號的波形以及解碼封包內容是以時序同步的方式呈現,例如,於本實施例當中,是同時開始擷取類比訊號源1以及數位訊號源2的訊號,並且在同一時間軸上圖形 化顯示數位化後之類比訊號以及數位訊號之波形,藉以達到時序同步的方式呈現。藉此,當研發人員欲觀察一待測物輸入一類比訊號(數位訊號)後所產生相對應之數位訊號(類比訊號)輸出的變化以及時序上的關聯性或時間差時,前述的顯示方式便可幫助研發人員直觀地觀察、分析與比對類比訊號之波形、數位訊號之波形之間的前後時序關係或響應時間差、波形變化以及當時刻的解碼封包內容。 In addition, in the embodiment, the first display area 34 and the second display area 36 are located above the third display area 38, and the first display area 34 and the second display area 36 are displayed in parallel alignment, and The waveform of the analog signal, the waveform of the digital signal, and the content of the decoded packet are presented in a time-synchronized manner. For example, in this embodiment, the signals of the analog signal source 1 and the digital signal source 2 are simultaneously started. And on the same timeline graphics The waveforms of the analog signals and the digital signals after digitization are displayed, so as to achieve timing synchronization. Therefore, when the researcher wants to observe the change of the corresponding digital signal (analog signal) output and the timing correlation or time difference generated by inputting a type of analog signal (digital signal), the foregoing display mode It can help the developer to visually observe and analyze the front-to-back timing relationship or response time difference between the waveform of the analog signal and the waveform of the digital signal, the waveform change and the decoding packet content at the moment.

另外,前述第一顯示區34並不以顯示單一通道的類比訊號為限,舉例而言,請配合圖4所示,於一實施例中,所述第一顯示區34亦可劃分有多個區塊341、342,可供分別顯示不同通道的數位化後之類比訊號的波形,且各區塊341、342之垂直刻度部分,同樣可由研發人員自行選擇其表示之振幅單位及單位大小,而不以圖式所示的內容為限。另外一提的是,第二顯示區36也不以顯示單一數位訊號為限,於一實施例中,亦可選擇顯示多個數位訊號,藉以一併與數位化後之類比訊號進行比對分析。 In addition, the first display area 34 is not limited to the analog signal of the single channel. For example, as shown in FIG. 4, in an embodiment, the first display area 34 may be divided into multiple Blocks 341 and 342 are respectively configured to respectively display the waveforms of the digitized analog signals of different channels, and the vertical scale portions of the respective blocks 341 and 342 can also be selected by the developer to select the amplitude unit and the unit size thereof. Not limited to the content shown in the diagram. In addition, the second display area 36 is not limited to display a single digital signal. In an embodiment, multiple digital signals may also be selected for comparison analysis with the digital analog signal. .

此外,值得一提的是,於一實施例中,亦可將類比數位轉換器10整合至邏輯分析儀20當中,以構成具有可接收類比訊號並可將類比訊號數位化之邏輯分析儀,而不以前述實施例的分離式架構為限。 In addition, it is worth mentioning that, in an embodiment, the analog-to-digital converter 10 can also be integrated into the logic analyzer 20 to form a logic analyzer having a receivable analog signal and capable of digitizing the analog signal. It is not limited to the separate architecture of the foregoing embodiment.

其中前述類比訊號源1與數位訊號源2可來自同一待測物或不同待測物,其中所述待測物可以是指各種不同的訊號傳輸線(例如網路線、USB傳輸線或匯流排)、訊號傳輸接頭(例如,網路接頭、USB接頭或RS232接頭)或記憶裝置(例如,嵌入式多媒體卡)等,或是其他應用有類比/數位或數位/類比轉換之電子產品,例如血壓計、耳溫槍、音箱、麥克風等,但不以此為限。舉例而言,於一實施例中,假定研發人員所欲檢測的待測物為智慧音箱時,則該智慧音箱所接收的數位音頻 資料可作為數位訊號源2所輸出的數位訊號,該智慧音箱將音頻資料解碼後所產生的類比聲音訊號則可作為該類比訊號源1所輸出的類比訊號。另外,於一實施例中,假定研發人員所欲檢測的待測物為麥克風時,則該麥克風所接收的類比聲音訊號可作為類比訊號源1所輸出的類比訊號,該麥克風將類比聲音訊號轉換並輸出之數位音頻資料可作為數位訊號源2所輸出的數位訊號,但於其他應用上,並不以此為限。 The analog signal source 1 and the digital signal source 2 may be from the same object to be tested or different objects to be tested, wherein the object to be tested may refer to various signal transmission lines (such as a network route, a USB transmission line or a bus bar), and signals. Transmission connectors (eg, network connectors, USB connectors, or RS232 connectors) or memory devices (eg, embedded multimedia cards), or other electronic products with analog/digital or digital/analog conversion, such as sphygmomanometers, ear Temperature guns, speakers, microphones, etc., but not limited to this. For example, in an embodiment, if the object to be tested that the developer wants to detect is a smart speaker, the digital audio received by the smart speaker is The data can be used as the digital signal output by the digital signal source 2. The analog audio signal generated by the smart speaker after decoding the audio data can be used as the analog signal outputted by the analog signal source 1. In addition, in an embodiment, if the object to be tested that the developer wants to detect is a microphone, the analog audio signal received by the microphone can be used as an analog signal output by the analog signal source 1, and the microphone converts the analog audio signal. The digital audio data outputted can be used as the digital signal output by the digital signal source 2, but it is not limited to other applications.

以上所述僅為本發明較佳可行實施例而已,舉凡應用本發明說明書及申請專利範圍所為之等效變化,理應包含在本發明之專利範圍內。 The above is only a preferred embodiment of the present invention, and equivalent changes to the scope of the present invention and the scope of the patent application are intended to be included in the scope of the present invention.

Claims (6)

一種邏輯分析系統,其包括有:一類比數位轉換器,與一類比訊號源電性連接,用以接收該類比訊號源所提供的一類比訊號進行數位化後輸出;一邏輯分析儀,與該類比數位轉換器以及一數位訊號源電性連接,用以擷取該類比數位轉換器輸出之數位化後之該類比訊號以及該數位訊號源所提供的一數位訊號,以及對該數位訊號進行解碼後取得對應的一解碼封包;以及一顯示裝置,與該邏輯分析儀電性連接,用以自該邏輯分析儀接收數位化後之該類比訊號、該數位訊號以及該解碼封包,該顯示裝置具有一顯示畫面,用以同時顯示數位化後之該類比訊號的波形、該數位訊號的波形以及該解碼封包之內容。 A logic analysis system includes: an analog-to-digital converter electrically coupled to a analog signal source for receiving a analog signal provided by the analog signal source for digitizing and outputting; a logic analyzer, and the An analog digital converter and a digital signal source are electrically connected to capture the digitized analog signal outputted by the analog converter and a digital signal provided by the digital signal source, and decode the digital signal And obtaining a corresponding decoding packet; and a display device electrically connected to the logic analyzer for receiving the digitized analog signal, the digital signal, and the decoding packet from the logic analyzer, the display device having A display screen for simultaneously displaying the waveform of the digital signal after the digitization, the waveform of the digital signal, and the content of the decoding packet. 如請求項1所述之邏輯分析系統,其中該顯示畫面包括有一第一顯示區、一第二顯示區以及一第三顯示區,該第一顯示區用以顯示數位化後之該類比訊號的波形;該第二顯示區用以顯示該數位訊號的波形;該第三顯示區用以顯示該解碼封包之內容,其中該第一顯示區與該第二顯示區係位於該第三顯示區的上方。 The logic analysis system of claim 1, wherein the display screen comprises a first display area, a second display area, and a third display area, wherein the first display area is configured to display the digitized analog signal. a waveform of the second display area for displaying the waveform of the digital signal; the third display area is configured to display the content of the decoded packet, wherein the first display area and the second display area are located in the third display area Above. 如請求項1或2所述之邏輯分析系統,其中該顯示裝置係以時序同步的方式顯示數位化後之該類比訊號的波形、該數位訊號的波形以及該解碼封包之內容。 The logic analysis system of claim 1 or 2, wherein the display device displays the waveform of the analogized analog signal, the waveform of the digital signal, and the content of the decoded packet in a time-synchronized manner. 一種邏輯分析系統之訊號處理與顯示方法,包括有以下步驟:使用一類比數位轉換器自一類比訊號源擷取一類比訊號,並將該類比訊號數位化後輸出; 使用一邏輯分析儀擷取該類比數位轉換器輸出之數位化後之該類比訊號,以及自一數位訊號源擷取一數位訊號,並對該數位訊號進行解碼後取得對應的一解碼封包;以及提供一顯示裝置與該邏輯分析儀電性連接,用以自該邏輯分析儀接收數位化後之該類比訊號、該數位訊號以及該解碼封包,並於該顯示裝置的一顯示畫面中,同時顯示數位化後之該類比訊號的波形、該數位訊號的波形以及該解碼封包之內容。 A signal processing and display method for a logic analysis system, comprising the steps of: using an analog-to-digital converter to extract an analog signal from a analog signal source, and digitizing the analog signal and outputting the analog signal; Using a logic analyzer to capture the digital signal of the analog-to-digital converter output, and extracting a digital signal from a digital signal source, and decoding the digital signal to obtain a corresponding decoding packet; Providing a display device electrically connected to the logic analyzer for receiving the digitized analog signal, the digital signal and the decoding packet from the logic analyzer, and displaying the same in a display screen of the display device The waveform of the analog signal after digitization, the waveform of the digital signal, and the content of the decoding packet. 如請求項4所述之邏輯分析系統之訊號處理與顯示方法,其中,該顯示畫面包括有一第一顯示區、一第二顯示區以及一第三顯示區,該第一顯示區用以顯示數位化後之該類比訊號的波形;該第二顯示區用以顯示該數位訊號的波形;該第三顯示區用以顯示該解碼封包之內容,其中該第一顯示區與該第二顯示區係位於該第三顯示區的上方。 The signal processing and display method of the logic analysis system of claim 4, wherein the display screen comprises a first display area, a second display area and a third display area, wherein the first display area is used for displaying digits a waveform of the analog signal; the second display area is configured to display a waveform of the digital signal; the third display area is configured to display the content of the decoded packet, wherein the first display area and the second display area are Located above the third display area. 如請求項4或5所述之邏輯分析系統之訊號處理與顯示方法,其中,係以時序同步的方式顯示數位化後之該類比訊號的波形、該數位訊號的波形以及該解碼封包之內容。 The signal processing and display method of the logic analysis system according to claim 4 or 5, wherein the waveform of the analogized analog signal, the waveform of the digital signal, and the content of the decoded packet are displayed in a time synchronization manner.
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