TWI659596B - Method for synchronous driving of the power device and driving circuit thereof - Google Patents

Abstract

A synchronous driving method for a power element and a driving circuit thereof according to the present invention include a plurality of power elements and a plurality of delay circuits, wherein a first connection end and a second connection end of the power elements are respectively electrically connected to form an electrical property of the power element. In parallel, a delay circuit is connected between the driving end of each power element and a signal input end, and the delay circuits calculate the corresponding delay driving time τ _n according to the circuit wiring length L _{n of the} corresponding connected power element. , And then make delay adjustment according to the delay driving time τ _n , so that these power components are synchronously driven at the synchronous driving time dTs , so as to achieve the synchronous driving purpose of all the parallel power components can be synchronized on or off current to reduce the power components Failure rate.

Description

Synchronous driving method of power element and driving circuit thereof

The invention relates to a synchronous driving method of a power device and a driving circuit thereof, and in particular to a parallel power device suitable for high-power driving, a synchronous driving method and a driving circuit thereof.

Due to the increasingly serious air pollution, countries around the world are committed to the development of electric vehicles based on environmental protection and environmental protection factors. Europe and the United States have also proposed that the production of gasoline vehicles be banned completely from 2035 to 2040. Electric vehicle power comes from the motor, which is controlled and driven by the motor controller. The motor controller is mainly a high-power power system, so multiple power components need to be connected in parallel to disperse the high current to drive the load.

However, when multiple parallel power elements are arranged in the circuit position, due to the size and space constraints, the line path length of each power element may be different, resulting in a difference in startup time between the power elements. Some power components that start first will withstand high current first. Although this situation is in a short moment (microsecond or nanosecond), but over time, these power components that start first will be damaged first, in addition to causing power In addition to reducing, it may even affect other power components, forming a chain reaction of successive damage.

The driving method of the power element used in the switching power conversion technology is controlled by a switching signal. When the input signal is ON, the power element conducts current, and when the input signal is When OFF, the power element cuts off the current, and when it is necessary to output large power and high current, it is also necessary to connect multiple power elements in parallel to disperse the current. Therefore, there will also be a problem of the time difference of signal transmission. The power element with a short distance to the signal path will first For driving, the power element with a long distance from the signal path will be driven later, and the power element that is driven first will withstand all currents first. Therefore, the faster the frequency of the switch, the faster the power element that is driven will be damaged.

In terms of know-how, Chinese Utility Model Publication No. CN206506443U patent is a MOSFET parallel circuit system, and it is proposed to use circuit layout to equalize the drive paths of the power components in parallel to achieve the purpose of average current dispersion. However, although this method improves the influence of unequal drive signal paths, in practical applications, the circuit configuration and layout are limited by space or the number of circuit board layers, and it is not easy to achieve the actual path equality.

In order to solve the problem of the difference in driving time between conventional parallel power elements due to different line path lengths, the invention designs a synchronous driving method and driving circuit between multiple parallel power elements, which can achieve synchronous conduction between all parallel power elements. Or the purpose of synchronous driving of cut-off current to reduce the damage rate of power components.

In order to achieve the above object, the main technical feature of the present invention is to provide a synchronous driving circuit of a power element, including a complex power element and a complex delay circuit, wherein the first connection end and the second connection end of the power elements are respectively electrically connected. To form an electrical parallel connection of the power components, and a delay circuit is connected between the driving end of each power component and a signal input terminal, and the delay circuits are calculated according to the circuit wiring length Ln of the corresponding connected power components. Delay driving time τ n, and then adjusting the delay according to the delay driving time τ n so that the power components are driven synchronously at the synchronous driving time dTs.

In order to achieve the above object, a second technical feature of the present invention is to provide a synchronous driving method for power elements. First, measure the circuit trace length Ln between the driving end of each power element and the signal input end. A circuit trace length Ln calculates its signal trace time tn, and then calculates the synchronous drive time dTs based on the maximum value of each signal trace time tn, and then calculates the delay of each power element according to the synchronous drive time dTs. The driving time τ n is finally adjusted correspondingly to each of the delay driving times τ n so that the power components are driven synchronously at the synchronous driving time dTs.

10‧‧‧ Power Components

11‧‧‧first connection

12‧‧‧Second connection

20‧‧‧ Delay circuit

30‧‧‧ signal input

Q ₁ , Q ₂ , Q _n , Q _k ‧‧‧ power elements

R ₁ , R ₂ , R _n , R _k ‧‧‧ resistance

C ₁ , C ₂ , C _n , C _k ‧‧‧ capacitor

L ₁ , L ₂ , L _n , L _k ‧‧‧ circuit trace length

t ₁ , t ₂ , t ₃ , t ₄ ‧‧‧ signal routing time

τ, τ ₁ , τ ₂ , τ ₃ , τ ₄ ‧‧‧ delayed drive time

FIG. 1 is a connection circuit diagram of a power element according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of a connection state of a power element according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of driving voltage-time of a power element without adjusting a delay circuit according to the present invention.

FIG. 4 is a schematic diagram of driving voltage-time of a power element after a delay circuit has been adjusted according to the present invention.

Please refer to FIG. 1 and FIG. 2 together. FIG. 1 is a connection circuit diagram of a power element according to an embodiment of the present invention, and FIG. 2 is a schematic diagram of a power element connection state according to an embodiment of the present invention. The present invention mainly provides a method and a driving circuit capable of synchronously driving a plurality of power elements connected in parallel, so the present invention includes a plurality of power elements (Q ₁ , Q ₂ , Q _n , Q _k ) 10, Each power component 10 is provided with a first connection terminal 11, a second connection terminal 12 and a driving terminal 13. The first connection terminal 11 of each power component 10 is electrically connected to form an output terminal. The output terminal can be connected to a load (not shown), such as a motor. The second connection terminal 12 of each power element 10 is also electrically connected to form a reference potential terminal. Preferably, the reference potential terminal is a ground terminal.

The first connection end 11 and the second connection end 12 of the power elements 10 are respectively electrically connected to form an electrical parallel connection between the power elements 10, and the driving end 13 of each power element 10 is respectively electrically connected. A delay circuit 20 is connected to a signal input terminal 30. As shown in the embodiment of FIG. 1, each delay circuit 20 is composed of a resistor (R) and a capacitor (C) to form an RC charging and discharging circuit. However, in other embodiments, In the delay circuit, other passive components such as resistors, capacitors, or inductors may be used to form the delay circuit, or integrated circuits such as buffers may be used to form the delay circuit. Therefore, the components used in the delay circuit 20 are not limited by the embodiments of the present invention.

In other words, the present invention has a plurality of delay circuits 20 connected between the driving terminal 13 and the signal input terminal 30 of each power element 10, and each delay circuit 20 has a different length of the traces in the circuit for the corresponding power element 10, The delay driving time τ _{n of the} corresponding length is delayed, so that the power elements connected in parallel can be driven synchronously at the same time, that is, the synchronous driving time dTs .

As shown in FIG. 1, the power element 10 used in the embodiment of the present invention is a power MOSFET, but in other embodiments, the power element may use other active elements, such as power diodes, The power element is not limited by this embodiment. In this embodiment, the first connection terminal 11 of the power element 10 is a drain terminal, the second connection terminal 12 is a source terminal, and the driving terminal 13 is a gate terminal. However, in other embodiments, the first connection terminal 11 of the power element 10 may be a source terminal, and the second connection terminal 12 may be a drain terminal.

In the present invention, in order to achieve synchronous driving of a plurality of power elements 10 connected in parallel, it is necessary to design a delay for the materials electrically connected between the power elements 10, such as a circuit board (PCB) or a wire. The constant ε r will be different. Since different materials have different propagation speeds of electromagnetic waves in the materials, the present invention uses the propagation speed of electromagnetic waves in the materials as the formula of the signal transmission speed V: , Where C is the speed of light and ε r is the dielectric constant of the material.

For example, the power element 10 disposed on a circuit board (PCB) is electrically connected to the first connection end, the second connection end, or the driving end by a copper foil conductive wire on the circuit board, and the dielectric constant ε r of copper is 4.7 , Light speed C is 3 × 10 ⁸ , and its signal transmission speed .

Next, the present invention needs to design a delay for the signal transmission length of each power element 10, in other words, the present invention must measure the circuit trace length L _n between the driving end 13 and the signal input end 30 of each power element 10 , Where n is the nth power element, and n = 1 ~ k , k is an integer. Because each power element 10 will have a different circuit trace length L _n due to the circuit layout and spatial location configuration, and the measurement methods are also quite easy and diverse, such as image size measurement, probe measurement, impedance measurement Measurement, current measurement, etc., the present invention will not be described in detail here.

When the circuit trace length L _n of each power element 10 is known, the signal trace time t _n of each power element 10 can be calculated according to the signal transmission speed of Formula 1, and the formula is:

Since each power element 10 of the signal traces are time T _n and _n is proportional to the circuit trace length L, in other words, the longer the length of the circuit trace L _n, that the longer the time T _n signal traces, to know when all the power After the signal routing time t _n of the component 10, it is necessary to find the power component with the longest circuit routing length L _max , that is, the power component with the maximum signal routing time t _max , according to the delay circuit 30 connected to it. The delay time is defined as the minimum delay driving time τ _min , and then the delay time of the delay circuits 30 of other power components is adjusted. Therefore, the present invention uses the maximum signal routing time t _max plus the minimum delay driving time τ _min as the Synchronous driving time dTs , that is, formula 3 ............ dTs = t _max + τ _min .

In the present invention, the synchronous driving time dTs is taken as the unified driving time of all power elements 10, so the required delay driving time τ _{n of} each other power element 10 is calculated according to the synchronous driving time dTs . The calculation method is to reduce the synchronous driving time dTs by Go to the signal trace time t _{n of} each power element, which is Equation 4 ............ τ _{n =} dTs - t _n . In other words, when the signal wiring time t _{n is} long, the delay driving time τ _{n is} shortened, and when the signal wiring time t _{n is} short, the delay driving time τ _n is increased.

Finally, the present invention can adjust the delay circuit corresponding to each power element 10 after knowing the delay driving time τ _n required by each power element 10. As shown in the embodiment of FIG. 1, the delay circuit of this embodiment is The charge and discharge circuit composed of resistor (R) and capacitor (C), and adjust the charge and discharge time constant of resistor (R) and capacitor (C) correspondingly, that is,

Please refer to FIG. 1, FIG. 3, and FIG. 4 together, where FIG. 3 is a schematic diagram of driving voltage-time of a power element without adjusting a delay circuit of the present invention, and FIG. 4 is a driving voltage of power element after adjusting a delay circuit of the present invention -Time diagram. For example, suppose the signal wiring time t _{n from the} signal input terminal 30 to power element 1, power element 2, power element 3, and power element 4 are 1ns, 2ns, 3ns, and 4ns, respectively. The voltage waveform is shown in Figure 3.

Then select the minimum driving time τ _min = R ₄ * C ₄ = 1ns by the longest path. Then set the synchronous driving time dTs required for synchronously driving the multiple power elements 10 to be the longest wiring time plus the minimum driving time, which is formula 3: dTs = t ₄ + 1ns = 5ns, and then calculate the Driving time τ _{n =} dTs - t _n , that is: power element 1 requires 1ns, τ ₁ = dTs - t ₁ = 5ns-1ns = 4ns = R ₁ C ₁ ; power element 2 requires 2ns, τ ₂ = dTs - t ₂ = 5ns-2ns = 3ns = R ₂ C ₂ ; Power element 3 requires 3ns, τ ₃ = dTs - t ₃ = 5ns-3ns = 2ns = R ₃ C ₃ ; Power element 4 requires 4ns, τ ₄ = dTs - t ₄ = 5ns-4ns = 1ns = R ₄ C ₄ .

Finally, the present invention adjusts the delay circuit according to the driving time of each power element. In this embodiment, the fixed capacitor (C) = C ₁ = C ₂ = C ₃ = C ₄ = 100pF, so = 10Ω, R ₃ = 20Ω, R ₂ = 30Ω, R ₁ = 40Ω. By adjusting the resistance (R) in the delay circuit, as shown in FIG. 4, when the power devices are driven synchronously for 5 ns, the driving voltage is synchronized to the required voltage value, and the purpose of synchronous driving of the power components is achieved.

Therefore, from the above embodiments, it can be known that because the placement position of each power component has its sequence, the corresponding path length can be calculated in multiples, and it also shows multiples when matching the resistance (R) or capacitor (C) components, so it can be determined by The calculation parameters can be easily calculated to achieve the effect of synchronous driving of multiple power components. And by using the method for synchronously driving a plurality of power elements of the present invention, the current can be evenly distributed to extend the life of the elements, so as to reduce the occurrence of damage caused by a single power element to withstand large currents first.

Claims (15)

A synchronous driving method for power components includes the following steps: preparing a plurality of power components, wherein a first connection terminal and a second connection terminal of the power components are electrically connected to form power parallel connection of the power components, A driving circuit of each of the power elements is respectively electrically connected to a delay circuit to a signal input terminal; measuring a circuit trace length Ln between the driving end of each power element and the signal input terminal , Where n is the nth power device, and n = 1 ~ k, and k is an integer; a signal trace time tn is calculated according to each of the circuit trace lengths Ln; according to the signal trace time tn Calculates a synchronous drive time dTs; calculates a delayed drive time τ n for each power element according to the synchronous drive time dTs; and adjusts the connected delay circuit corresponding to each delayed drive time τ n So that all of the power devices are driven synchronously at the synchronous driving time dTs. According to the synchronous driving method of the power device of claim 1, the first connection terminals of the power devices are all electrically connected to form an output terminal, and the second connection terminals are all electrically connected to form a reference potential terminal. According to the synchronous driving method of the power device of item 2 of the patent application scope, wherein the delay circuit is composed of at least one resistor (R) and at least one capacitor (C), and the resistor (R) is serially connected to the driving end and Between the signal input terminal, the capacitor (C) is connected between the driving terminal and the reference potential terminal. According to the synchronous driving method of the power device according to item 2 of the patent application range, the reference potential terminal and a ground terminal. According to the synchronous driving method of the power component of claim 1, the power components are arranged on a circuit board (PCB), and the first connection terminals, the second connection terminals or the drive terminals The electrical connection is connected by conductive lines on the circuit board. According to the synchronous driving method of the power element of the first patent application, the step of calculating the signal trace time tn further includes the following steps: according to the materials to which the power elements are electrically connected, calculate the propagation of electromagnetic waves in the material A signal transmission speed V of

, Where C is the speed of light, ε r is the dielectric constant of the material, where the material can be a circuit board or wire; and each signal is calculated according to the signal transmission speed V and the length of each electrical trace Ln Trace time tn, that is

. According to the synchronous driving method of the power element of the third patent application, the step of calculating the synchronous driving time dTs further includes the following steps: selecting the power element with the maximum length Lmax of the circuit and connecting it The delay time of the delay circuit is a minimum delay driving time τ min, where τ min = RC, RC is the charge and discharge time constant of the resistor and the capacitor; and the maximum value of the signal trace time tmax plus the minimum delay The driving time τ min is taken as the synchronous driving time dTs, that is, dTs = tmax + τ min. According to the synchronous driving method of the power element of the first patent application, the step of calculating the delayed driving time τ n of each power element is to subtract the time of each signal trace from the synchronous driving time dTs tn, that is τ n = dTs-tn. According to the synchronous driving method of the power device according to item 7 of the patent application range, in the step of correspondingly adjusting the connected delay circuit, the corresponding charging and discharging time constant of the resistor and the capacitor is correspondingly adjusted, that is

,or

. A synchronous driving circuit for power components includes: a plurality of power components, provided with a first connection end, a second connection end and a drive end, wherein the first connection ends are electrically connected and the second connection ends are electrically connected To form a parallel connection of the power elements; and a plurality of delay circuits, respectively connected between the driving end and a signal input end of each of the power elements, wherein each of the delay circuits is connected in accordance with the corresponding power element The circuit trace length Ln of is calculated to correspond to a delayed driving time τ n, and then the delay adjustment is performed according to the delayed driving time τ n so that each of the power devices is driven synchronously at a synchronous driving time dTs. According to the synchronous driving circuit of the power device of claim 10, the first connection terminals of the power devices are electrically connected to form an output terminal, and the second connection terminals are electrically connected to form a reference potential terminal. According to the synchronous driving circuit of the power device of claim 11, the delay circuit is composed of at least one resistor (R) and at least one capacitor (C), and the resistor (R) is serially connected to the driving end and Between the signal input terminal, the capacitor (C) is connected between the driving terminal and the reference potential terminal. According to the synchronous driving circuit of the power element of the patent application item 11, the reference potential terminal is connected to a ground terminal. According to the synchronous driving circuit of the power component of the patent application item 10, wherein the power components are arranged on a circuit board (PCB), and the first connection terminals, the second connection terminals or the drive terminals The electrical connection is connected by conductive lines on the circuit board. According to the synchronous driving circuit of the power device of claim 12, the delay driving time of each of the delay circuits is adjusted correspondingly to adjust the charge and discharge time constants of the resistor and the capacitor.