TW202007058A - Method for synchronous driving of the power device and driving circuit thereof - Google Patents

Abstract

The present invention provides a method for synchronous driving of the power device and a driving circuit thereof, which include a plurality of power devices and a plurality of delay circuits, wherein a first connection end and a second connection end of the power device are respectively electrically connected to form a parallel connection in electrical property of the power device. A delay circuit is connected between the driving end of each power device and a signal input end respectively. The corresponding delay driving time [tau]n of the delay circuits is calculated according to the circuit wiring length Ln of the corresponding connected power devices, and then the delay is adjusted according to the delay driving time [tau]n, so that the power devices are driven synchronously at the synchronous driving time dTs, which achieves the synchronous driving purpose for all parallel power devices to conduct or cut off the current simultaneously, and reduces the failure rate of power devices.

Description

Synchronous driving method of power element and its driving circuit

The invention relates to a synchronous driving method of a power device (power device) and a driving circuit thereof, in particular to a synchronous driving method of a plurality of parallel power elements suitable for high-power driving, and a driving circuit thereof.

Due to the increasingly serious air pollution, countries around the world are committed to the development of electric vehicles based on environmental protection and environmental protection factors. Europe and the United States have also proposed to ban the production of gasoline vehicles in 2035-2040. The power of electric vehicles comes from the motor, which is controlled and driven by the motor controller. The motor controller is mainly based on a high-power power system, so it is necessary to connect multiple power components in parallel to spread the high current to drive the load.

However, when multiple parallel power elements are arranged in the circuit position, due to the limitation of volume and space, the line path length of each power element may be different, and there is a start-up time difference between the formed power elements. Some of the power components that start first will bear a large current first. Although this situation is at a very short time (microseconds or nanoseconds), but over time, these power components that start first will be damaged first, except for the power In addition to the reduction, it may even affect other power components and form a chain reaction of successive damage.

The driving method of the power element used in the switching power conversion technology is controlled by a switching signal. When the input signal is ON, the power element conducts current, and when the input signal is OFF, the power element cuts off the current, and when it is necessary to output high power In the case of large current, it is also necessary to connect multiple power elements in parallel to disperse the current, so there is also the problem of the time difference of signal transmission. Power elements with a short signal path will be driven first, and power elements with a long signal path will be driven later, and The power component driven first will bear all the current first, so the faster the frequency of the switch is, the faster the power component driven first will be damaged.

In terms of conventional techniques, the Chinese Utility Model Publication No. CN206506443U patent is a MOSFET parallel circuit system. It is proposed to use circuit layout to make the parallel drive paths of each power element equal to achieve the purpose of evenly distributing current. However, although this method improves the influence of the unequal driving signal path, in practical applications, the circuit configuration and layout are limited by the space or the number of circuit board layers, and it is not easy to achieve the actual path equalization.

In order to solve the problem of difference in driving time of conventional parallel power elements due to different line path lengths, the present invention has designed a synchronous driving method and driving circuit between a plurality of parallel power elements, which can achieve synchronous conduction between all parallel power elements Or the purpose of synchronous drive of cut-off current to reduce the damage rate of power components.

In order to achieve the above object, the main technical feature of the present invention is to provide a synchronous driving circuit for power elements, including a plurality of power elements and a plurality of delay circuits, wherein the first connection end and the second connection end of the power elements are respectively electrically connected To form an electrical parallel connection of the power elements, and a delay circuit is connected between the driving end of each power element and a signal input end respectively, and the delay circuits are calculated according to the circuit trace length Ln of the corresponding connected power element Delay drive time τ n, and then make delay adjustment according to the delay drive time τ n, so that all the power components are driven synchronously at the synchronous drive time dTs.

In order to achieve the above object, the next technical feature of the present invention is to provide a synchronous driving method for power elements. First, the length Ln of the circuit trace between the driving end of each power element and the signal input end is measured. A circuit trace length Ln calculates its signal trace time tn, and then calculates the synchronous drive time dTs according to the maximum value of each signal trace time tn, and then calculates the delay of each power element according to the synchronous drive time dTs The driving time τ n, and finally adjust the connected delay circuit according to each delayed driving time τ n respectively, so that the power devices are all synchronously driven at the synchronous driving time dTs.

10‧‧‧Power components

11‧‧‧First connection

12‧‧‧Second connector

20‧‧‧ Delay circuit

30‧‧‧Signal input

Q ₁ , Q ₂ , Q _n , Q _k ‧‧‧ power element

R ₁ , R ₂ , R _n , R _k ‧‧‧ resistance

C ₁ , C ₂ , C _n , C _k ‧‧‧ capacitance

L ₁ , L ₂ , L _n , L _k ‧‧‧ circuit trace length

t ₁ , t ₂ , t ₃ , t ₄ ‧‧‧ signal routing time

τ, τ ₁ , τ ₂ , τ ₃ , τ ₄ ‧‧‧ delayed drive time

FIG. 1 is a connection circuit diagram of a power device according to an embodiment of the invention.

FIG. 2 is a schematic diagram of a connection state of power components according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of the driving voltage-time of the power element of the unadjusted delay circuit of the present invention.

FIG. 4 is a schematic diagram of the driving voltage-time of the power element after the delay circuit of the present invention has been adjusted.

Please refer to FIG. 1 and FIG. 2 together. FIG. 1 is a connection circuit diagram of a power element according to an embodiment of the present invention, and FIG. 2 is a schematic diagram of a power element connection state according to an embodiment of the present invention. The present invention is mainly to provide a method for synchronously driving a plurality of power elements connected in parallel with each other, and a method and a driving circuit for synchronous driving. Therefore, the present invention includes a plurality of power elements (Q ₁ , Q ₂ , Q _n , Q _k ) 10, Each power element 10 is provided with a first connection end 11, a second connection end 12, and a driving end 13, wherein the first connection end 11 of each power element 10 is electrically connected to form an output end, preferably Ground, the output can be connected to a load (not shown), such as a motor. The second connection terminal 12 of each power element 10 is also electrically connected to form a reference potential terminal. Preferably, the reference potential terminal is a ground terminal.

The first connection end 11 and the second connection end 12 of the power elements 10 are respectively electrically connected to form an electrical parallel connection between the power elements 10, and the drive end 13 of each power element 10 is separately electrically A delay circuit 20 is connected to a signal input terminal 30. As shown in the embodiment of FIG. 1, each delay circuit 20 is composed of a resistor (R) and a capacitor (C) to form an RC charging and discharging circuit. However, in other embodiments In this case, passive elements such as other resistors, capacitors, or inductors may be used to form the delay circuit, or integrated circuits such as buffers may be used to form the delay circuit. Therefore, the elements used in the delay circuit 20 are not limited by the embodiments of the present invention.

In other words, the present invention has a complex delay circuit 20 connected between the driving terminal 13 and the signal input terminal 30 of each power element 10 respectively. Each delay circuit 20 is different for the corresponding power element 10 in the circuit. The delay driving time τ _n corresponding to the delay length enables the power elements connected in parallel to be driven at the same time, that is, the synchronous driving time dTs .

As shown in FIG. 1, the power element 10 used in the embodiment of the present invention is a power MOSFET, but in other embodiments, the power element may use other active elements, such as a power diode, Thyristors, etc., power components are not limited by this embodiment. In this embodiment, the first connection terminal 11 of the power device 10 is the drain terminal, the second connection terminal 12 is the source terminal, and the drive terminal 13 is the gate terminal. However, in other embodiments, the first connection terminal 11 of the power element 10 may be the source terminal, and the second connection terminal 12 may be the drain terminal.

，其中C為光速，ε r為材料的介電常數。 In order to achieve the simultaneous driving of a plurality of power elements 10 connected in parallel in the present invention, it is necessary to delay the design of the materials electrically connected between the power elements 10, such as a circuit board (PCB) or wires, etc. The constant ε r will be different. Different materials have differences in the propagation speed of electromagnetic waves in the material. Therefore, the present invention uses the propagation speed of electromagnetic waves in the material as the formula of the signal transmission speed V:

, Where C is the speed of light and ε r is the dielectric constant of the material.

。 For example, the power element 10 disposed on a circuit board (PCB), the material of which is electrically connected to the first connection end, the second connection end, or the driving end is a copper foil conductive wire on the circuit board, and the dielectric constant ε r of copper is 4.7 , The speed of light C is 3×10 ⁸ , its signal transmission speed

.

Next, the present invention needs to perform a delay design for the signal transmission length of each power element 10, in other words, the present invention must measure the length L _n of the circuit trace between the driving end 13 and the signal input end 30 of each power element 10 , Where n is the n- th power element, and n =1~ k , k is an integer. Because each power element 10 will have a different circuit trace length L _n due to the circuit layout and spatial location, and the measurement methods are also quite easy and diverse, such as image size measurement, probe measurement, and impedance measurement Measurement, current measurement, etc., the invention will not be described in detail here.

When the length L _n of the circuit trace of each power element 10 is known, the signal trace time t _n of each power element 10 can be calculated according to the signal transmission speed of Equation 1, the formula is:

Since the signal trace time t _{n of} each power element 10 is proportional to the circuit trace length L _n , in other words, the longer the circuit trace length L _n, the longer the signal trace time t _n , and when all power is known After the signal trace time t _n of the element 10, it is necessary to find the power element with the longest circuit trace length L _max , that is, the power element with the maximum signal trace time t _max , depending on the delay circuit 30 to which it is connected The delay time is taken as the minimum delay driving time τ _min , and then the delay time of the delay circuit 30 of other power elements is adjusted. Therefore, the present invention takes the maximum value of the signal wiring time t _max plus the minimum delay driving time τ _min as the Synchronous driving time dTs , that is, formula 3............ dTs = t _max + τ _min .

In the present invention, the synchronous driving time dTs is taken as the unified driving time of all power elements 10. Therefore, the required delayed driving time τ _{n of} each other power element 10 is calculated according to the synchronous driving time dTs . The calculation method is to reduce the synchronous driving time dTs The signal routing time t _n to each power element, that is, formula 4...... τ _{n =} dTs - t _n . In other words, when the signal routing time t _{n is} longer, the delayed driving time τ _{n is} to be shortened, whereas when the signal routing time t _{n is} shorter, the delayed driving time τ _n is increased.

Finally, after knowing the delay driving time τ _n required by each power element 10, the present invention can adjust the delay circuit corresponding to each power element 10. As shown in the embodiment of FIG. 1, the delay circuit of this embodiment is Charge and discharge circuit composed of resistance (R) and capacitance (C), and adjust the charge and discharge time constant of resistance (R) and capacitance (C), namely

Please also refer to FIG. 1, FIG. 3 and FIG. 4 together, wherein FIG. 3 is a schematic diagram of the power element driving voltage-time of the unadjusted delay circuit of the present invention, and FIG. 4 is a power element driving voltage of the present invention after the adjusted delay circuit -Schematic diagram of time. For example, assuming that the signal trace time t _{n from the} signal input terminal 30 to the power element 1, the power element 2, the power element 3, and the power element 4 is 1 ns, 2 ns, 3 ns, and 4 ns, respectively, the driving of the power elements 1 to 4 The voltage waveform is shown in Figure 3.

The minimum driving time τ _min =R ₄ *C ₄ =1ns is selected by the longest path. Then set the synchronous driving time dTs required to synchronously drive the complex power elements 10 as the longest trace time plus the minimum driving time, that is, Equation 3: dTs = t ₄ +1ns=5ns, and then calculate the power factor of each power element according to Equation 4. Driving time τ _{n =} dTs - t _n , that is: 1 ns for power element 1, τ ₁ = dTs - t ₁ = 5ns-1ns=4ns=R ₁ C ₁ ; 2 ns for power element 2, τ ₂ = dTs - t ₂ =5ns-2ns=3ns=R ₂ C ₂ ; power element 3 needs 3ns, τ ₃ = dTs - t ₃ =5ns-3ns=2ns=R ₃ C ₃ ; power element 4 needs 4ns, τ ₄ = dTs - t ₄ =5ns-4ns=1ns=R ₄ C ₄ .

=10Ω，R₃=20Ω，R₂=30Ω，R₁=40Ω。經由調整延遲電路中電阻(R)，就能如圖4所示，各功率元件在同步驅動時間5ns時，驅動電壓同步達到所需電壓值，達成各功率元件同步驅動的目的。 Finally, the present invention adjusts the delay circuit according to the driving time of each power element. In this embodiment, the capacitance (C) = C ₁ = C ₁ = C ₂ = C ₃ = C ₄ = 100 pF, so

=10Ω, R ₃ =20Ω, R ₂ =30Ω, R ₁ =40Ω. By adjusting the resistance (R) in the delay circuit, as shown in FIG. 4, when the synchronous driving time of each power element is 5 ns, the driving voltage synchronously reaches the required voltage value, and the purpose of synchronous driving of each power element is achieved.

Therefore, from the above embodiment, it can be seen that since the placement of each power element has its order, the corresponding path length can be calculated in multiples, and it also shows multiples when matching the resistance (R) or capacitor (C) elements, so it can be With simple calculation, matching parameters can be obtained to achieve the effect of synchronous driving of multiple power components. Moreover, by using the method for synchronously driving a plurality of power components of the present invention, the current can be evenly distributed to extend the life of the component, so as to reduce the occurrence of damage caused by a single power component firstly receiving a large current.

10‧‧‧Power components

11‧‧‧First connection

12‧‧‧Second connector

20‧‧‧ Delay circuit

30‧‧‧Signal input

Claims (15)

A synchronous driving method for power components includes the following steps: preparing a plurality of power components, wherein a first connection terminal and a second connection terminal of the power components are electrically connected to form power parallel connection of the power components, A driving circuit of each of the power elements is respectively electrically connected to a delay circuit to a signal input terminal; measuring a circuit trace length Ln between the driving end of each power element and the signal input terminal , Where n is the nth power device, and n=1~k, and k is an integer; a signal trace time tn is calculated according to each of the circuit trace lengths Ln; according to the signal trace time tn Calculates a synchronous driving time dTs; calculates a delayed driving time τ n for each power element according to the synchronous driving time dTs; and adjusts the connected delay circuit respectively according to each delayed driving time τ n So that all of the power devices are driven synchronously at the synchronous driving time dTs. According to the synchronous driving method of the power device of claim 1, the first connection terminals of the power devices are all electrically connected to form an output terminal, and the second connection terminals are all electrically connected to form a reference potential terminal. According to the synchronous driving method of the power device of item 2 of the patent application scope, wherein the delay circuit is composed of at least one resistor (R) and at least one capacitor (C), and the resistor (R) is serially connected to the driving end and Between the signal input terminal, the capacitor (C) is connected between the driving terminal and the reference potential terminal. According to the synchronous driving method of the power device according to item 2 of the patent application range, the reference potential terminal and a ground terminal. According to the synchronous driving method of the power component of claim 1, the power components are arranged on a circuit board (PCB), and the first connection terminals, the second connection terminals or the drive terminals The electrical connection is connected by conductive lines on the circuit board. According to the synchronous driving method of the power element of the first patent application, the step of calculating the signal trace time tn further includes the following steps: according to the materials to which the power elements are electrically connected, calculate the propagation of electromagnetic waves in the material A signal transmission speed V of

, Where C is the speed of light, ε r is the dielectric constant of the material, where the material can be a circuit board or wire; and each signal is calculated according to the signal transmission speed V and the length of each electrical trace Ln Trace time tn, that is

. According to the synchronous driving method of the power element of the third patent application, the step of calculating the synchronous driving time dTs further includes the following steps: selecting the power element with the maximum length Lmax of the circuit and connecting it The delay time of the delay circuit is a minimum delay driving time τ min, where τ min=RC, RC is the charge and discharge time constant of the resistor and the capacitor; and the maximum value of the signal trace time tmax plus the minimum delay The driving time τ min is taken as the synchronous driving time dTs, that is, dTs=tmax+τ min. According to the synchronous driving method of the power element of the first patent application, the step of calculating the delayed driving time τ n of each power element is to subtract the time of each signal trace from the synchronous driving time dTs tn, that is τ n=dTs-tn. According to the synchronous driving method of the power device according to item 7 of the patent application range, in the step of correspondingly adjusting the connected delay circuit, the corresponding charging and discharging time constant of the resistor and the capacitor is correspondingly adjusted, that is

,or

. A synchronous drive circuit for power components includes: a plurality of power components, provided with a first connection end, a second connection end and a drive end, wherein the first connection ends are electrically connected and the second connection ends are electrically connected To form a parallel connection of the power elements; and a plurality of delay circuits, which are respectively connected between the driving end and a signal input end of each of the power elements, wherein each of the delay circuits is connected in accordance with the corresponding power element The circuit trace length Ln of is calculated to correspond to a delayed driving time τ n, and then the delay adjustment is performed according to the delayed driving time τ n so that each of the power devices is driven synchronously at a synchronous driving time dTs. According to the synchronous driving circuit of the power device of claim 10, the first connection terminals of the power devices are electrically connected to form an output terminal, and the second connection terminals are electrically connected to form a reference potential terminal. According to the synchronous driving circuit of the power device of claim 11, the delay circuit is composed of at least one resistor (R) and at least one capacitor (C), and the resistor (R) is serially connected to the driving end and Between the signal input terminal, the capacitor (C) is connected between the driving terminal and the reference potential terminal. According to the synchronous driving circuit of the power element of the patent application item 11, the reference potential terminal is connected to a ground terminal. According to the synchronous driving circuit of the power component of the patent application item 10, wherein the power components are arranged on a circuit board (PCB), and the first connection terminals, the second connection terminals or the drive terminals The electrical connection is connected by conductive lines on the circuit board. According to the synchronous driving circuit of the power device of claim 12, the delay driving time of each of the delay circuits is adjusted correspondingly to adjust the charge and discharge time constants of the resistor and the capacitor.

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