TWI653666B - Epitaxial bonding substrate and manufacturing method thereof - Google Patents

Abstract

An epitaxial bonded substrate and a manufacturing method thereof, the manufacturing method includes: providing a first substrate with a first doping concentration; providing a second substrate with a second doping concentration , The second doping concentration is less than the first doping concentration; a second surface of the second substrate is bonded to a first surface of the first substrate to form a bonded substrate; the bonded substrate is annealed to A high-impedance layer is formed in the bonding substrate; and a part of the second substrate needs to be removed in the rear view to expose the high-impedance layer. In this way, the epitaxial bonding substrate manufactured by this method has a substrate with a high doping concentration and a high-impedance layer formed thereon, which can effectively improve the strength of the substrate, reduce leakage current and increase the breakdown voltage. Tolerance.

Description

Epitaxial bonding substrate and manufacturing method thereof

The invention belongs to the field of semiconductor manufacturing; it is an epitaxial bonding substrate and its manufacturing method, in particular to a high-impedance layer structure formed on the substrate to withstand a large breakdown voltage, so that the semiconductor device has high power and high frequency applications Features.

In a general semiconductor manufacturing process, an epitaxial step is performed on the surface of a substrate of single crystal or polycrystalline material to form an epitaxial layer, and then a desired structure, semiconductor device or circuit is fabricated on the epitaxial layer.

In order to meet the needs of high-power, high-frequency semiconductor applications, semiconductor devices must withstand large breakdown voltages and minimize defects such as leakage current from the substrate; for example, silicon on insulator (Silicon on Insulator) Wafer, SOI Wafer) is used to effectively reduce the problem of substrate leakage, but in the conventional SOI structure, it is common to add an oxide layer (such as SiO ₂ ) between the two substrates as an insulator and help two silicon substrates For the purpose of bonding, however, since the oxide layer is a poor thermal conductor, the substrates manufactured by the conventional SOI process generally have the disadvantage of poor heat dissipation.

In addition, in order to enhance the strength of the substrate, a heavily doped substrate can be used for epitaxy. However, although the strength of the heavily doped substrate is better, it is prone to leakage due to its low resistance. In addition to the generation of flow, during epitaxy, the lattice constants of the substrate and the epitaxial layer do not match, so that the substrate is likely to be bent or even broken after epitaxy.

Therefore, how to manufacture a substrate with better strength, low leakage current, good heat dissipation effect, and high breakdown voltage tolerance is one of the directions that the industry is eager to develop.

In view of this, the object of the present invention is to provide a method of manufacturing an epitaxial bonded substrate, to manufacture an epitaxial bonded substrate with a small leakage current, a high breakdown voltage, a good heat dissipation effect and a good strength.

In order to achieve the above object, the method for manufacturing an epitaxial bonded substrate provided by the present invention includes the following steps: providing a first substrate with a first doping concentration; providing a second substrate and the second The substrate has a second doping concentration that is less than the first doping concentration; a second surface of the second substrate is directly bonded to a first surface of the first substrate to form a bond Substrate; annealing the bonded substrate to form a high impedance layer in the bonded substrate.

In order to achieve the above object, the present invention also provides an epitaxial bonding substrate, which includes: a first substrate having a first doping concentration; a second substrate connected to the first substrate, the second substrate having A second doping concentration, and the second doping concentration is less than the first doping concentration; a high resistance layer is formed in the epitaxial bonding substrate.

The effect of the present invention is to provide a bonding substrate composed of a first substrate and a second substrate. Since no thermally poor conductive substances such as oxides appear on the bonding interface between the first substrate and the second substrate, the present invention The bonded substrate constructed has high heat dissipation. In addition, the bonding substrate of the present invention can effectively reduce the bending and cracking of the substrate after epitaxy to improve The strength of the substrate, because the high-resistance layer has a high resistivity, also has the effect of reducing leakage current and improving breakdown voltage tolerance.

〔this invention〕

10‧‧‧The first substrate

10a‧‧‧First surface

20‧‧‧Second substrate

20a‧‧‧Second surface

20b‧‧‧upper surface

30‧‧‧High impedance layer

30a‧‧‧The third surface

40‧‧‧buffer layer

50‧‧‧Active layer

60‧‧‧channel layer

70‧‧‧ Barrier layer

D‧‧‧ Jiji

G‧‧‧Gate

S‧‧‧Source

R1‧‧‧ removal

R2‧‧‧thickness

R3‧‧‧Diffusion depth

R4‧‧‧Depth

FIG. 1 is a schematic diagram of a preferred embodiment of the present invention.

FIG. 2 is a schematic diagram of the above-mentioned preferred embodiment, showing the removal amount of the second substrate and the thickness design of the high-resistance layer.

FIG. 3 is a schematic diagram showing the formation of an epitaxial structure on the substrate of the present invention.

4 to 6 are respectively one of the embodiments of the present invention, and a schematic diagram of the diffusion depth corresponding to the resistance value after the substrate is subjected to different annealing times (30 hours, 40 hours, and 50 hours).

In order to explain the present invention more clearly, an embodiment will be described in detail with reference to the drawings. Please refer to FIG. 1, which is an epitaxial bonded substrate manufactured by a method for manufacturing an epitaxial bonded substrate according to an embodiment of the present invention. The manufacturing steps are described below.

First, a first substrate 10 is provided. The first substrate 10 has a first surface 10a and the first substrate 10 has a first doping concentration. In this embodiment, the thickness of the first substrate 10 is about 1000 μm. The first substrate 10 is a heavily doped single crystal silicon substrate, and its first doping concentration is greater than or equal to 1 × 10 ¹⁸ atom / cm ³ . It can also be between 1 × 10 ¹⁸ to 1 × 10 ¹⁹ atom / cm ³ , and its resistivity is between 0.0025 ohm-cm to 0.0045 ohm-cm. Wherein, the dopant of the first substrate 10 may be a donor (Donor) dopant or an acceptor (Acceptor) dopant, for example, boron (B), aluminum (Al), gallium ( Elements such as Ga), phosphorus (P), arsenic (As), and antimony (Sb), or combinations thereof, are not limited thereto.

Next, a second substrate 20 is provided. The second substrate 20 has a second doping concentration that is less than the first doping concentration. Among them, preferably, the difference between the second doping concentration and the first doping concentration needs to be at least greater than 1 × 10 ² atom / cm ³ or more. For example, in one embodiment, the second substrate 20 The second doping concentration is less than or equal to 1 × 10 ¹⁵ atom / cm ³ , the resistivity is between 40 ~ 45ohm-cm, the first doping concentration of the first substrate is greater than or equal to 1 × 10 ¹⁸ atom / cm ³ , the difference from the first doping concentration is at least greater than 1 × 10 ³ atom / cm ³ or more. In addition, the second substrate 20 and the first substrate 10 are mutually different conductive substrates. For example, in this embodiment, the first substrate 10 is a P-type single crystal silicon substrate, and the second substrate 20 is an N-type single crystal silicon substrate. As shown in FIG. 1, the second substrate 20 has a second surface 20 a. The second surface 20 a of the second substrate 20 is bonded to the first surface 10 a of the first substrate 10. After the bonding, the second substrate 20 A bonding substrate is formed with the first substrate 10. Wherein, in this embodiment, the bonding method is that the second surface 20a of the second substrate 20 and the first surface 10a of the first substrate 10 are contacted and pressed together, so that the first substrate 10 and the second substrate 20 Directly bonded to form a bonded substrate. It is worth mentioning that, since the bonding substrate is formed by directly bonding the first substrate 10 and the second substrate 20, the bonding interface between the first substrate 10 and the second substrate 20 does not have bad conductors such as oxides, etc. Existence, therefore, may have the advantage of high heat dissipation.

In addition, in an embodiment, before the two substrates are bonded, the surfaces of the first substrate 10 and the second substrate 20 can be cleaned and / or polished, for example, the first surface 10a of the first substrate 10 and The second surface 20a of the second substrate 20 is cleaned to remove impurities such as organic substances and photoresist on the surface of the substrate, and polished to reduce surface roughness and improve surface flatness, thereby improving yield during subsequent bonding. Among them, the cleaning method The formula system can use a cleaning process such as RCA. The polishing method can be a process such as CMP, but it is not limited to other practical implementations.

Next, the bonding substrate is annealed to strengthen the bonding between the first substrate 10 and the second substrate 20 and form a high resistance layer 30 in the bonding substrate. For example, in this embodiment, the high-resistance layer 30 is formed by annealing the bonding substrate, and forming the high-resistance layer 30 by interdiffusion of different conductivity type dopants and ion compensation. Moreover, by controlling the dopant concentration and the annealing time, the formation position of the high-resistance layer 30 and the resistance value thereof can be controlled. Furthermore, in this embodiment, when the annealing process is performed, the dopants of the first substrate 10 will diffuse into the second substrate 20, and a concentration will be created in the second substrate 20 that is higher than the original second substrate 20. High-resistance region with high initial concentration (equivalent to high-resistance layer 30); and the present invention utilizes a doping concentration between 1 × and within a certain range (eg, within the range of the second substrate 20) during the annealing High resistance layer 30 of 10 ¹⁵ to 1 × 10 ¹⁹ atom / cm ³ .

Among them, in this embodiment, when annealing treatment is performed, the annealing temperature of the annealing treatment is between 1000 ° C and 1300 ° C, and the annealing time is between 4 hours and 50 hours. Furthermore, according to the substrate Different applications, for example, different annealing temperature or time can be set according to the required resistivity of the high-impedance layer, for example, the temperature can be 1100-1275 ℃, the annealing time can be selected from 30 hours, 40 hours or 50 Hours vary, but not limited to this.

Accordingly, the resistivity of the formed high-impedance layer 30 is greater than or equal to 300 ohm-cm, or greater than or equal to 1000 ohm-cm. Moreover, based on the dopant concentration, annealing temperature, and an appropriate thickness of the first substrate 10 as in this embodiment, the formed epitaxial bonding substrate with the high-resistance layer 30 still has high resistance in the subsequent high-temperature epitaxial process For layer 30, the formed high-resistance layer 30 does not disappear due to the high temperature diffusion of epitaxial.

In particular, the epitaxial bonding substrate provided by the present invention is a bonding substrate formed by directly bonding the first substrate 10 and the second substrate 20, and there is no oxide layer between the substrate and the substrate. Therefore, compared with the substrate made by the conventional SOI process, the epitaxial bonding substrate made by the present invention adopts the high-impedance layer which is the same as the substrate as the insulator because it eliminates the step of introducing the oxide layer In comparison with the substrate made by the SOI process, the epitaxial bonding substrate of the present invention has the advantage of better heat dissipation.

In this embodiment, the thickness of the high-resistance layer 30 is between 1 μm and 10 μm, preferably, the thickness is between 2 μm and 3 μm. In addition, in other embodiments, the thickness of the high-impedance layer 30 may be based on the relationship between the resistivity and the doping concentration between the first substrate 10 and the second substrate 20, or the conditions of the applied process are different , To make corresponding adjustments, not limited to this.

Then, subsequent device processes, epitaxial processes, etc., can be performed on the second substrate 20 and the high-impedance layer 30, for example, forming a nucleation layer, an epitaxial layer, an active layer (Active Layer), an electrode, or other materials, or Such as seed layer, buffer layer, channel layer, barrier layer or source region (Source), gate region (Gate) and drain region (Drain), etc., for applications such as power semiconductors, RF semiconductors and other components.

The design of the first substrate 10 of the present invention is a heavily doped substrate, so that the first substrate 10 as a supporting substrate can effectively suppress the subsequent expansion of the epitaxial stack due to the lattice coefficient and thermal expansion of the material between the substrate and the epitaxial layer The epitaxial layer is broken due to warpage and bow caused by differences in coefficients and the like. For example, please refer to the following table 1 for the data table of the MOCVD process for three groups of substrates with different wafer resistivities. Among them, after comparison, we can see that under the same wafer thickness and epitaxial layer thickness, when the chip resistance The lower the rate, the higher the doping concentration, the warpage of the substrate is relatively low and can be controlled below 10 μm, when the wafer resistivity is higher (the lower the doping concentration), the warpage is Relatively high. The present invention provides an epitaxial bonding substrate with low warpage and high resistance by controlling the dopant concentration and annealing time of the first and second substrates.

The high-resistivity characteristic of the high-impedance layer of the present invention can effectively prevent the substrate of the present invention from passing through the high-impedance layer during the formation of semiconductor devices or circuits during epitaxial or other processes such as subsequent MOCVD processes The leakage current is formed, that is, the problem of leakage current generated by the semiconductor element or circuit can be effectively improved. It can be seen that the substrate provided by the present invention can withstand higher voltages and breakdown voltage values in the subsequent manufacturing process, and is particularly advantageous for applications in the field of high-frequency and high-power semiconductors.

In addition, in the present invention, in order to expose the high-resistance layer as much as possible for the subsequent epitaxial process, the second substrate above the high-resistance layer is usually removed, and the second substrate accounts for the first by proper control The removal ratio of the substrate can reduce the overall thickness of the epitaxial bonding substrate as much as possible, and still maintain the existence of the high-resistance layer in the subsequent high-temperature epitaxial process.

For example, after the annealing step, at least a portion of the second substrate 20 can be removed, that is, the second substrate 20 can be reduced in thickness, so that the third surface 30a of the high-resistance layer 30 (refer to FIG. 2 ) Exposed to expose the high-resistance layer 30 as much as possible for subsequent processes.

For example, as shown in FIG. 2, the removal amount of the second substrate 20 is R1, and the thickness of the high-resistance layer 30 is R2, where the removal amount R1 refers to the removal of the second substrate 20 Except for the thickness, it is the depth calculated from the upper surface 20b of the second substrate 20 in the figure to the third surface 30a of the high impedance layer 30. In this embodiment, the removal amount R1 of the second substrate 20 is preferably at least 60% of the volume of the first substrate 10, that is, the removal thickness of the second substrate 20 accounts for the first The thickness of the substrate 10 is more than 60%, in other words, the thickness of the second substrate 20 remaining after the removal process occupies 40% or less of the thickness of the first substrate 10, thereby effectively reducing the thickness of the entire substrate and maintaining high The advantage of withstand breakdown voltage value.

Among them, the aforementioned method of reducing the thickness of the second substrate 20 can be achieved through a grinding or polishing process, but in other practical implementations, it is not limited to this, in other implementations, chemical etching, micro Shadow etching, laser, etc. or other physical removal methods.

Among them, under the substrate resistivity and doping concentration set in this embodiment, based on the different annealing time performed when bonding the substrate, different annealing time will affect the formation position of its high-impedance layer, for example: heavily doped The diffusion depth of ions will increase with time. When the annealing time is longer, the high resistance layer will be closer to the upper surface of the second substrate. To further elaborate on the relationship between the removal amount of the second substrate and the annealing time, etc., based on the substrate resistivity and the doping concentration set in the previous embodiment, three different annealing times are implemented. Please refer to FIG. 4 to FIG. 6, which are graphs of the diffusion depth corresponding to the resistance value after the annealing time of the substrate in the above embodiment at 1275 ° C. for 30 hours, 40 hours, and 50 hours, respectively.

And please refer to the following table 2 for the removal of the depth R4 of the high-resistance layer 30, the diffusion depth R3 of the high-resistance layer 30 and the second substrate 20 after an annealing time of 30 hours, 40 hours and 50 hours, respectively R1 and other data, wherein the depth R4 (or formation position) of the high-resistance layer 30 is the depth from the upper surface 20b of the second substrate 20 toward the second surface 20a; the diffusion of the high-resistance layer 30 The depth R3 refers to the diffusion depth of heavily doped ions calculated from the second surface 20a where the second substrate 20 and the first substrate 10 are connected to the upper surface 20b The degree increases with time; the removal amount R1 of the second substrate 20 is the depth R4 of the high-resistance layer 30 minus the thickness R2 of the high-resistance layer 30 (for example, in this embodiment, the high The thickness of the impedance layer 30 is between 1-10 μm). It can be seen from the table that the removal amount of the second substrate 20 is inversely proportional to the diffusion depth and diffusion time of the heavily doped ions, that is, the longer the diffusion time, the deeper the diffusion depth, the second substrate is removed The smaller the amount, the thicker the bonded substrate formed.

As shown in Table 3 below, the relationship between the removal amount of the second substrate 20 and the thickness of the first substrate 10 under different annealing times (30 hours, 40 hours, and 50 hours).

Please refer to the following Table 4 for the experimental parameters and data of the epitaxial bonding substrate manufactured by the manufacturing method of the above embodiment. The thickness of the high-resistance layer is represented by R2 (refer to FIG. 2), and the diffusion depth of the high-resistance layer is represented by R3 (refer to FIG. 1).

The first substrates used in Experiments 1 to 4 are all the same. They are all P-type single crystal silicon substrates. The dopant is boron, the doping concentration is greater than 1 × 10 ¹⁹ atom / cm ³ , and the resistance value is about It is 0.0035Ω-cm and its thickness is about 1000μm. The second substrates used in Experiments 1 to 4 are all the same, all of which are N-type single crystal silicon substrates. The dopant is phosphorus, the doping concentration is less than 1 × 10 ¹⁴ atom / cm ³ , and the resistance value is about It is 45Ω-cm and its thickness is about 650μm.

After the first substrate and the second substrate of Experiments 1 to 4 are directly bonded to form a bonded substrate, the bonded substrates of Experiments 1 to 4 are respectively annealed, wherein Experiments 1 to 4 are performed The annealing temperature of the annealing process is 1150 ° C, and the annealing time for performing the annealing process in experiments 1 to 4 is 0 hours, 6 hours, 10 hours, and 20 hours in sequence. After that, an epitaxial process with a temperature of about 1000 ° C. and a time of about 6 hours is performed on the bonded substrate to grow a gallium nitride (GaN) epitaxial layer on the bonded substrate.

After the GaN epitaxial process, the bonding substrates of Experiments 1 to 4 were measured to obtain the following results: (1) The diffusion depth of the high-impedance layer in Experiment 1 is about 3.35 μm, the thickness of the high-impedance layer is about 2.01 μm, and its resistance value is greater than 300Ω-cm; (2) The diffusion depth of the high-impedance layer in Experiment 2 is about 7.51 μm , The thickness of its high-impedance layer is about 2.74 μm, its resistance value is greater than 300 Ω-cm; (3) the diffusion depth of the high-impedance layer of Experiment 3 is about 9.3 μm, the thickness of its high-impedance layer is about 2.82 μm, and its resistance value Greater than 300Ω-cm; (4) The diffusion depth of the high-impedance layer of Experiment 4 is about 12.75μm, the thickness of the high-impedance layer is about 2.97μm, and the resistance value is greater than 300Ω-cm.

It can be seen from the above experimental results that the diffusion depth and thickness of the high-resistance layer are different according to the length of the annealing time. Furthermore, when the annealing time is extended, the diffusion depth of the high-resistance layer will increase and the thickness of the high-resistance layer Will also increase. Therefore, the corresponding annealing time can be selected according to the application requirements of the bonded substrate. In addition, in practice, the diffusion depth, thickness, and resistivity of the high-resistance layer can be adjusted not only by the annealing time, but also by controlling the annealing temperature, or the doping concentration of the first substrate and the second substrate , Resistance value and other parameters to control, not limited to the above description.

In addition, please refer to FIG. 3, which is an application example of forming an epitaxial structure on the epitaxial bonding substrate of this embodiment. For example, a buffer layer 40 can be grown on the high-resistance layer 30, wherein In an embodiment, one or more seed layers (not shown) may be included between the buffer layer 40 and the high impedance layer 30; then an active layer 50 may be grown on the buffer layer 40, the active The layer may include a channel layer 60 and a barrier layer 70; then, on the active layer 50, a source electrode S, a gate electrode G, and a drain electrode D may be provided, but not limited thereto.

In this way, the present invention controls the concentration and resistivity of the different conductivity type dopants of the first substrate and the second substrate, so that the high-impedance layer formed at the junction is still in the subsequent process (e.g., epitaxial process) It can be maintained without being destroyed or disappeared, and can still be formed in the bonded substrate, thereby providing higher voltage and breakdown voltage values that can withstand higher voltages in the subsequent device manufacturing process for use in the field of high-frequency, high-power semiconductors .

The above is only one of the possible embodiments of the present invention. In other practical implementations, the thicknesses of the first substrate and the second substrate according to the ordinary technical level in the art can be adjusted according to the requirements of the manufacturing process and components. The corresponding adjustment can be used to achieve the effects as disclosed in the present invention. The dopant of the first substrate is not limited to the acceptor dopant, and a silicon substrate of a donor dopant may also be used. For example, in one embodiment, the dopant of the first substrate Elements such as phosphorus (P), arsenic (As), antimony (Sb), or combinations thereof can be selected; and the dopant of the second substrate is not limited to a single crystal silicon substrate with a donor dopant Alternatively, silicon substrates with acceptor dopants can be used instead. For example, boron (B), aluminum (Al), gallium (Ga) and other elements or combinations thereof can be selected.

In addition, the first substrate and the second substrate are not limited to silicon substrates, as long as the first substrate and the second substrate are of the same material and have different conductivity types, they can be applied to the manufacturing method of the present invention. In other words, the first substrate and the second substrate may also be silicon carbide substrates, gallium nitride substrates, etc., and are not limited to the aforementioned single crystal silicon substrates.

In addition, in some embodiments, the selection of materials for the first substrate and the second substrate may include, but is not limited to: single crystal, polycrystalline, and / or amorphous, etc. In some embodiments, regarding the first substrate and The selection of the second substrate material may include, but is not limited to: silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide, etc. In some embodiments, regarding the first The selection of materials for the substrate and the second substrate may include but are not limited to: SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and / or GaInAsP, etc .; in some embodiments, regarding the selection of the first substrate and the second substrate materials , Including but not limited to: sapphire, gallium oxide, lithium gallium oxide, lithium aluminum oxide, spinel, germanium, glass, zirconium diboride, ScALMgO ₄ , SrCu ₂ O ₂ , LiGaO ₂ , LiAlO ₂ , YSZ (Yttria-Stabilized Zirconia), or other suitable materials.

In addition, in the foregoing embodiments, the first and second substrates are bonded by high temperature direct bonding. However, in other practical applications, in one embodiment, low temperature direct bonding may be used instead of the above description. limit.

It is also mentioned that the epitaxial bonded substrate and the manufacturing method thereof provided by the present invention are not limited to the thickness range of the first substrate and the second substrate disclosed in the foregoing embodiments. Due to the difference in application, the substrates with other thickness designs are selected for use. Any equivalent changes in the application of the present specification and the scope of patent application should be included in the patent scope of the present invention.

Claims (13)

A method of manufacturing an epitaxial bonded substrate includes the following steps: A. Provide a first substrate with a first doping concentration; B. Provide a second substrate with a second substrate Two doping concentrations, the second doping concentration is less than the first doping concentration; C, a second surface of the second substrate is directly bonded to a first surface of the first substrate to form a bonded substrate D. Annealing the bonded substrate to form a high-impedance layer in the bonded substrate. The method of manufacturing an epitaxial bonded substrate according to claim 1, wherein the first doping concentration is greater than or equal to 1

10 ¹⁸ atom / cm ³ , and the second doping concentration is less than or equal to 1

10 ¹⁵ atom / cm ³ . The method of manufacturing an epitaxial bonded substrate according to claim 1, wherein the first substrate and the second substrate are mutually different conductivity type substrates. The method for manufacturing an epitaxial bonded substrate according to claim 1, wherein after step D, there is a step E: removing at least a part of the second substrate and exposing a third surface of the second substrate, wherein the The third surface is a surface opposite to the second surface. The method of manufacturing an epitaxial bonded substrate according to claim 4, wherein the removal amount of the second substrate accounts for at least 60% of the thickness of the first substrate. An epitaxial bonding substrate includes: a first substrate having a first doping concentration; a second substrate connected to the first substrate, the second substrate having a second doping concentration, and the first The second doping concentration is less than the first doping concentration; a high resistance layer is formed in the epitaxial bonding substrate. As described in claim 6, the thickness of the second substrate is less than 40% of the thickness of the first substrate. The epitaxial bonded substrate according to claim 6, wherein the resistivity of the high-impedance layer is not less than 300 ohm-cm. The epitaxial bonding substrate according to claim 6, wherein the first substrate and the second substrate are mutually different conductivity type substrates. The epitaxial bonding substrate according to claim 6, wherein the thickness of the high-resistance layer is between 1 and 10 µm. The epitaxial bonded substrate according to claim 10, wherein the thickness of the high-resistance layer is between 2 and 3 µm. The epitaxial bonded substrate according to claim 6, wherein the first doping concentration is greater than or equal to 1

10 ¹⁸ atom / cm ³ , and the second doping concentration is less than or equal to 1

10 ¹⁵ atom / cm ³ . The epitaxial bonded substrate according to claim 6, wherein the difference between the first doping concentration and the second doping concentration is at least greater than 1

10 ² atom / cm ³ or more.