TWI652949B - Headset apparatus - Google Patents

Headset apparatus Download PDF

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TWI652949B
TWI652949B TW106103087A TW106103087A TWI652949B TW I652949 B TWI652949 B TW I652949B TW 106103087 A TW106103087 A TW 106103087A TW 106103087 A TW106103087 A TW 106103087A TW I652949 B TWI652949 B TW I652949B
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pin
coupled
type universal
voltage
resistor
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TW106103087A
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TW201828714A (en
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蔡明宏
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美律實業股份有限公司
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Priority to CN201710861600.0A priority patent/CN107547964B/en
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Abstract

一種耳機裝置,包括耳機主體、C型通用序列匯流排埠及控制電路。C型通用序列匯流排埠耦接耳機主體及外部電子裝置,用以做為耳機主體與外部電子裝置間的信號傳輸介面。控制電路耦接C型通用序列匯流排埠,且將來自外部電子裝置的第一電源的電壓與參考電壓進行比較。當第一電源的電壓大於參考電壓時,控制電路設定C型通用序列匯流排埠為數位介面模式,致使耳機主體與外部電子裝置傳輸數位音訊。當第一電源的電壓小於或等於參考電壓時,控制電路將C型通用序列匯流排埠切換為類比介面模式,致使耳機主體與外部電子裝置傳輸類比音訊。A headphone device includes a headphone body, a C-type universal serial bus bar and a control circuit. The C-type universal serial bus bar is coupled to the main body of the earphone and the external electronic device, and is used as a signal transmission interface between the main body of the earphone and the external electronic device. The control circuit is coupled to the C-type universal sequence bus bar and compares the voltage of the first power source from the external electronic device with the reference voltage. When the voltage of the first power source is greater than the reference voltage, the control circuit sets the C-type universal sequence bus bar to the digital interface mode, so that the earphone body and the external electronic device transmit the digital audio. When the voltage of the first power source is less than or equal to the reference voltage, the control circuit switches the C-type universal sequence bus 埠 to the analog interface mode, so that the headphone body and the external electronic device transmit analog audio.

Description

耳機裝置Earphone device

本發明是有關於一種耳機裝置,且特別是有關於一種具備數位介面模式與類比介面模式自動切換機制的C型通用序列匯流排埠的耳機裝置。The present invention relates to an earphone device, and more particularly to an earphone device having a C-type universal serial bus bar with a digital interface mode and an analog interface mode automatic switching mechanism.

一般來說,常見的耳機裝置大多是類比介面模式的耳機裝置,其中類比介面模式的耳機裝置所接收或輸出的信號皆為類比信號。然而,隨著科技技術的發展,目前已發展出具備數位介面模式與類比介面模式的耳機裝置,例如C型通用序列匯流排埠的耳機裝置,其中,操作在數位介面模式下的耳機裝置所接收或輸出的信號皆為數位信號。一般來說,數位介面模式具備音效好、噪音干擾小之優點,且便於其他附加功能(例如心跳偵測、身體數據監測、主動消噪等)之應用,但該數位介面模式必須傳送較好音質的數位信號,以致使用數位介面模式的外部電子裝置非常耗電,因此如何針對有利於使用消費者相關之面向加以進一步改進完善,實為相關業者須不斷努力思索突破之重要技術課題及目標。In general, the common earphone devices are mostly analog interface mode earphone devices, wherein the signals received or output by the analog interface mode earphone device are analog signals. However, with the development of technology, earphone devices having a digital interface mode and an analog interface mode have been developed, such as a C-type universal serial bus headphone device, in which a headphone device operating in a digital interface mode is received. Or the output signals are all digital signals. In general, the digital interface mode has the advantages of good sound effect and low noise interference, and is convenient for other additional functions (such as heartbeat detection, body data monitoring, active noise cancellation, etc.), but the digital interface mode must transmit better sound quality. The digital signal makes the external electronic device using the digital interface mode very power-hungry. Therefore, how to further improve and improve the consumer-oriented aspect, it is necessary for the relevant industry to constantly think about the important technical issues and objectives.

本發明提供一種可支援類比介面模式以及數位介面模式的耳機裝置,其可監控其所耦接的電子裝置的電量狀態,並可即時地因應電子裝置的電量狀態,而自動地將耳機裝置與電子裝置之間的介面由數位介面模式切換為類比介面模式,以延長電子裝置的使用時間。The invention provides an earphone device capable of supporting an analog interface mode and a digital interface mode, which can monitor the state of charge of an electronic device to which it is coupled, and can automatically and automatically connect the earphone device and the electronic device according to the state of charge of the electronic device. The interface between the devices is switched from the digital interface mode to the analog interface mode to extend the use time of the electronic device.

本發明的耳機裝置包括耳機主體、C型通用序列匯流排埠以及控制電路。C型通用序列匯流排埠耦接耳機主體,且用以與外部電子裝置連接,以做為耳機主體與外部電子裝置間的信號傳輸介面。控制電路包括偵測電路以及切換電阻模組。偵測電路耦接C型通用序列匯流排埠,用以接收來自外部電子裝置的第一電源,且將第一電源的電壓與參考電壓進行比較。切換電阻模組耦接偵測電路與C型通用序列匯流排埠。當第一電源的電壓大於參考電壓時,偵測電路透過切換電阻模組設定C型通用序列匯流排埠為數位介面模式,致使耳機主體與外部電子裝置傳輸數位音訊。當第一電源的電壓小於或等於參考電壓時,偵測電路透過切換電阻模組將C型通用序列匯流排埠切換為類比介面模式,致使耳機主體與外部電子裝置傳輸類比音訊。The earphone device of the present invention includes a headphone body, a C-type universal serial bus bar, and a control circuit. The C-type universal serial bus bar is coupled to the earphone body and is connected to the external electronic device as a signal transmission interface between the earphone body and the external electronic device. The control circuit includes a detection circuit and a switching resistance module. The detecting circuit is coupled to the C-type universal serial bus bar for receiving the first power source from the external electronic device and comparing the voltage of the first power source with the reference voltage. The switching resistor module is coupled to the detection circuit and the C-type universal serial bus. When the voltage of the first power source is greater than the reference voltage, the detecting circuit sets the C-type universal serial bus to the digital interface mode through the switching resistor module, so that the earphone body and the external electronic device transmit the digital audio. When the voltage of the first power source is less than or equal to the reference voltage, the detecting circuit switches the C-type universal sequence bus bar to the analog interface mode through the switching resistor module, so that the earphone body and the external electronic device transmit the analog audio.

在本發明的一實施例中,上述的偵測電路透過切換電阻模組改變C型通用序列匯流排埠的通道組態接腳與接地電位之間的組態電阻值,致使C型通用序列匯流排埠於數位介面模式與類比介面模式之間切換。In an embodiment of the invention, the detecting circuit changes the configured resistance value between the channel configuration pin of the C-type universal serial bus bar and the ground potential through the switching resistor module, so that the C-type universal sequence convergence Switch between digital interface mode and analog interface mode.

在本發明的一實施例中,當組態電阻值為5.1千歐姆時,C型通用序列匯流排埠為數位介面模式。當組態電阻值介於800歐姆至1.2千歐姆時,C型通用序列匯流排埠為類比介面模式。In an embodiment of the invention, when the configured resistance value is 5.1 kilo ohms, the C-type universal sequence bus is configured in a digital interface mode. When the configured resistance value is between 800 ohms and 1.2 kilo ohms, the C-type universal sequence bus 埠 is in the analog interface mode.

在本發明的一實施例中,上述的偵測電路將第一電源的電壓與參考電壓進行比較以產生控制信號。切換電阻模組耦接在通道組態接腳與接地電位之間,其中切換電阻模組的電阻值為組態電阻值,且切換電阻模組受控於控制信號而改變組態電阻值。In an embodiment of the invention, the detecting circuit compares the voltage of the first power source with a reference voltage to generate a control signal. The switching resistor module is coupled between the channel configuration pin and the ground potential, wherein the resistance value of the switching resistor module is a configured resistance value, and the switching resistor module is controlled by the control signal to change the configured resistance value.

在本發明的一實施例中,當C型通用序列匯流排埠設定為數位介面模式時,偵測電路透過C型通用序列匯流排埠的A4接腳、B4接腳、A9接腳與B9接腳的至少其中之一接收第一電源。In an embodiment of the invention, when the C-type universal serial bus is set to the digital interface mode, the detecting circuit is connected to the B9 pin, the B4 pin, the A9 pin and the B9 through the C-type universal serial bus. At least one of the feet receives the first power source.

在本發明的一實施例中,當C型通用序列匯流排埠設定為類比介面模式時,偵測電路透過C型通用序列匯流排埠的B8接腳接收來自外部電子裝置的第二電源。偵測電路包括蕭基二極體、分壓電路、第一電阻、電晶體、第一二極體及第二二極體。蕭基二極體的陽極接收第一電源。蕭基二極體的陰極輸出第一調整電壓。分壓電路耦接蕭基二極體的陰極以接收第一調整電壓,並對第一調整電壓進行分壓以產生第二調整電壓。第一電阻的第一端耦接蕭基二極體的陰極。電晶體的第一端耦接第一電阻的第二端。電晶體的控制端耦接分壓電路以接收第二調整電壓,且電晶體的第二端耦接接地電位。第一二極體的陽極耦接電晶體的第一端。第二二極體的陽極接收第二電源。第二二極體的陰極與第一二極體的陰極相耦接以產生控制信號。In an embodiment of the invention, when the C-type universal serial bus is set to the analog interface mode, the detecting circuit receives the second power from the external electronic device through the B8 pin of the C-type universal serial bus. The detection circuit includes a Schottky diode, a voltage dividing circuit, a first resistor, a transistor, a first diode, and a second diode. The anode of the Xiaoji diode receives the first power source. The cathode of the Xiaoji diode outputs the first adjustment voltage. The voltage dividing circuit is coupled to the cathode of the Schottky diode to receive the first adjustment voltage, and divides the first adjustment voltage to generate a second adjustment voltage. The first end of the first resistor is coupled to the cathode of the Schottky diode. The first end of the transistor is coupled to the second end of the first resistor. The control end of the transistor is coupled to the voltage dividing circuit to receive the second adjustment voltage, and the second end of the transistor is coupled to the ground potential. The anode of the first diode is coupled to the first end of the transistor. The anode of the second diode receives the second power source. The cathode of the second diode is coupled to the cathode of the first diode to generate a control signal.

在本發明的一實施例中,通道組態接腳為C型通用序列匯流排埠的A5接腳。切換電阻模組包括第一電阻、第二電阻以及電晶體。第一電阻的第一端耦接通道組態接腳。第一電阻的第二端耦接接地電位。第二電阻的第一端耦接第一電阻的第一端。電晶體的第一端耦接第二電阻的第二端。電晶體的控制端接收控制信號。電晶體的第二端耦接接地電位。In an embodiment of the invention, the channel configuration pin is an A5 pin of the C-type universal sequence bus. The switching resistor module includes a first resistor, a second resistor, and a transistor. The first end of the first resistor is coupled to the channel configuration pin. The second end of the first resistor is coupled to the ground potential. The first end of the second resistor is coupled to the first end of the first resistor. The first end of the transistor is coupled to the second end of the second resistor. The control terminal of the transistor receives the control signal. The second end of the transistor is coupled to a ground potential.

基於上述,本發明實施例的耳機裝置可監控其所耦接的外部電子裝置的電量狀態,並可即時地因應外部電子裝置的電量狀態,而自動地將耳機裝置與外部電子裝置之間的介面由數位介面模式切換為類比介面模式,以延長外部電子裝置的使用時間。由於外部電子裝置的電量是由耳機裝置來監控,且數位介面模式與類比介面模式的切換是由耳機裝置來控制,故外部電子裝置不需執行特定的應用程式以監控其本身的電量,更不需據以執行數位介面模式與類比介面模式的切換運作,如此一來,可避免電子裝置因上述應用程式的常駐執行而產生額外的耗電。Based on the above, the earphone device of the embodiment of the present invention can monitor the state of charge of the external electronic device to which it is coupled, and can automatically interface the earphone device with the external electronic device in response to the state of charge of the external electronic device. Switch from digital interface mode to analog interface mode to extend the use time of external electronic devices. Since the power of the external electronic device is monitored by the earphone device, and the switching between the digital interface mode and the analog interface mode is controlled by the earphone device, the external electronic device does not need to execute a specific application to monitor its own power, nor does it The switching operation between the digital interface mode and the analog interface mode is performed, so that the electronic device can be prevented from generating additional power consumption due to the resident execution of the above application.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the invention will be apparent from the following description.

為了使本發明之內容可以被更容易明瞭,以下特舉實施例做為本發明確實能夠據以實施的範例。另外,凡可能之處,在圖式及實施方式中使用相同標號的元件/構件,係代表相同或類似部件。In order to make the content of the present invention easier to understand, the following specific embodiments are examples of the invention that can be implemented. In addition, wherever possible, the same reference numerals in the FIGS.

以下請參照圖1,圖1是依照本發明一實施例所繪示的耳機裝置100的電路方塊示意圖。耳機裝置100可包括耳機主體120、C型通用序列匯流排埠140以及控制電路160,但本發明不限於此。C型通用序列匯流排埠140耦接耳機主體120,其中C型通用序列匯流排埠140可用以與外部電子裝置900連接,以做為耳機主體120與外部電子裝置900間的信號傳輸介面。除此之外,外部電子裝置900可透過C型通用序列匯流排埠140提供耳機主體120正常運作所需的電源(例如第一電源PM1或第二電源PM2)。Please refer to FIG. 1 , which is a circuit block diagram of a headset device 100 according to an embodiment of the invention. The earphone device 100 may include a headphone main body 120, a C-type universal serial bus bar 140, and a control circuit 160, but the present invention is not limited thereto. The C-type universal serial bus bar 140 is coupled to the earphone body 120. The C-type universal serial bus bar 140 can be used to connect with the external electronic device 900 as a signal transmission interface between the earphone body 120 and the external electronic device 900. In addition, the external electronic device 900 can provide the power source (for example, the first power source PM1 or the second power source PM2) required for the headphone body 120 to operate normally through the C-type universal serial bus bar 140.

在本發明的一實施例中,外部電子裝置900可例如是具有C型通用序列匯流排埠且可同時支援數位音訊與類比音訊輸出的行動手機、平板電腦或是行動音樂播放器等等之類的行動電子裝置,但本發明不限於此。在本發明的一實施例中,耳機主體120可為已知的耳機主體,其可包括用以播放聲音的發音元件及/或擷取聲音的收音元件,故在此不再贅述。In an embodiment of the present invention, the external electronic device 900 can be, for example, a mobile phone, a tablet computer, or a mobile music player having a C-type universal serial bus and capable of simultaneously supporting digital audio and analog audio output. Mobile electronic device, but the invention is not limited thereto. In an embodiment of the present invention, the earphone body 120 may be a known earphone body, which may include a sounding component for playing sound and/or a sound pickup component for capturing sound, and thus will not be described herein.

控制電路160耦接C型通用序列匯流排埠140。控制電路160可透過C型通用序列匯流排埠140接收來自外部電子裝置900的第一電源PM1。特別是,隨著外部電子裝置900的持續使用,第一電源PM1的電壓變化曲線可例如圖2所示(在此以通用序列匯流排的5伏特電源為例,但本發明並不以此為限),其中縱軸為第一電源PM1的電壓值,而橫軸為外部電子裝置900的使用時間。根據圖2可知,第一電源PM1的電壓會隨著外部電子裝置900的持續使用而下降。因此,控制電路160可透過監控第一電源PM1的電壓,以判斷外部電子裝置900的電量狀態。The control circuit 160 is coupled to the C-type universal sequence bus bar 140. The control circuit 160 can receive the first power source PM1 from the external electronic device 900 through the C-type universal sequence bus bar 140. In particular, as the external electronic device 900 continues to be used, the voltage variation curve of the first power source PM1 can be, for example, as shown in FIG. 2 (here, a 5 volt power source of a general-purpose serial bus bar is taken as an example, but the present invention does not The vertical axis is the voltage value of the first power source PM1, and the horizontal axis is the usage time of the external electronic device 900. As can be seen from FIG. 2, the voltage of the first power source PM1 decreases as the external electronic device 900 continues to be used. Therefore, the control circuit 160 can monitor the voltage of the first power source PM1 to determine the state of charge of the external electronic device 900.

詳細來說,控制電路160可將第一電源PM1的電壓與參考電壓VT進行比較。當第一電源PM1的電壓大於參考電壓VT時,控制電路160可判斷外部電子裝置900的電量足夠,故控制電路160可設定C型通用序列匯流排埠140為數位介面模式。此時,耳機主體120與外部電子裝置900可傳輸數位音訊。In detail, the control circuit 160 can compare the voltage of the first power source PM1 with the reference voltage VT. When the voltage of the first power source PM1 is greater than the reference voltage VT, the control circuit 160 can determine that the power of the external electronic device 900 is sufficient, so the control circuit 160 can set the C-type universal sequence bus bar 140 to the digital interface mode. At this time, the earphone main body 120 and the external electronic device 900 can transmit digital audio.

相對地,當第一電源PM1的電壓小於或等於參考電壓VT時,控制電路160可判斷外部電子裝置900的電量不足,故控制電路160可將C型通用序列匯流排埠140切換為類比介面模式,並將數位介面模式的附加功能(例如心跳偵測、身體數據監測、主動消躁等)自動關閉,如此一來,可節省外部電子裝置900的用電量,從而延長外部電子裝置900的使用時間。此時,耳機主體120與外部電子裝置900將傳輸類比音訊。In contrast, when the voltage of the first power source PM1 is less than or equal to the reference voltage VT, the control circuit 160 can determine that the power of the external electronic device 900 is insufficient, so the control circuit 160 can switch the C-type universal sequence bus bar 140 to the analog interface mode. And automatically turning off the additional functions of the digital interface mode (such as heartbeat detection, body data monitoring, active cancellation, etc.), thereby saving power consumption of the external electronic device 900, thereby extending the use of the external electronic device 900. time. At this time, the earphone main body 120 and the external electronic device 900 will transmit analog audio.

在本發明的一實施例中,控制電路160可改變C型通用序列匯流排埠140的通道組態接腳C_PIN與接地電位GND之間的組態電阻值,致使C型通用序列匯流排埠140於數位介面模式與類比介面模式之間切換。In an embodiment of the invention, the control circuit 160 can change the configured resistance value between the channel configuration pin C_PIN of the C-type universal sequence bus bar 140 and the ground potential GND, so that the C-type universal sequence bus bar 140 Switch between digital interface mode and analog interface mode.

更進一步來說,本實施例的C型通用序列匯流排埠140可為現有的C型通用序列匯流排埠,其最大的特點是可支援正反兩面均可插接的「正反插」功能。進一步來說,現有的C型通用序列匯流排埠包括A面與B面,且A面與B面各具有12支接腳(即A1~A12接腳及B1~B12接腳)。關於A1~A12接腳及B1~B12接腳的詳細描述可參考現有的C型通用序列匯流排埠的標準,在此不再贅述。Furthermore, the C-type universal serial bus 埠 140 of the present embodiment can be an existing C-type universal serial bus, and the biggest feature is that it can support the "positive and backward insertion" function that can be inserted on both sides. . Further, the existing C-type universal serial bus bar includes A side and B side, and each of the A side and the B side has 12 pins (ie, A1~A12 pins and B1~B12 pins). For a detailed description of the A1~A12 pin and the B1~B12 pin, refer to the existing C-type universal serial bus bar standard, and details are not described herein.

以下請參照表1,表1列示了耳機裝置100的C型通用序列匯流排埠140的接腳於數位介面模式及類比介面模式下的接腳定義。詳細來說,於數位介面模式下,C型通用序列匯流排埠140的A4接腳、B4接腳、A9接腳與B9接腳為電源接腳;A6接腳及A7接腳為數位音訊接腳;A1接腳、B1接腳、A12接腳與B12接腳為接地接腳;而A5接腳則是圖1所示的通道組態接腳C_PIN,用以做為數位介面模式與類比介面模式的切換接腳。另外,於類比介面模式下,C型通用序列匯流排埠140的A6接腳及A7接腳為類比音訊接腳;A5接腳仍為通道組態接腳C_PIN;A8接腳為接地接腳;而B8接腳則可做為類比音訊接腳及電源接腳。 表1 Please refer to Table 1 below. Table 1 lists the pins of the C-type universal serial bus 埠 140 of the earphone device 100 in the digital interface mode and the pin interface definition in the analog interface mode. In detail, in the digital interface mode, the A4 pin, the B4 pin, the A9 pin and the B9 pin of the C-type universal serial bus bar 140 are power pins; the A6 pin and the A7 pin are digital audio connections. Foot; A1 pin, B1 pin, A12 pin and B12 pin are ground pins; and A5 pin is the channel configuration pin C_PIN shown in Figure 1, used as digital interface mode and analog interface Mode switching pin. In addition, in the analog interface mode, the A6 pin and the A7 pin of the C-type universal serial bus 埠 140 are analog audio pins; the A5 pin is still the channel configuration pin C_PIN; the A8 pin is the ground pin; The B8 pin can be used as an analog audio pin and a power pin. Table 1

因此,當C型通用序列匯流排埠140設定為數位介面模式時,耳機主體120可透過C型通用序列匯流排埠的A4接腳、B4接腳、A9接腳與B9接腳的至少其中之一接收來自外部電子裝置900的第一電源PM1,以做為耳機主體120的供電來源。此外,耳機主體120與外部電子裝置900可透過該C型通用序列匯流排埠140的A6接腳及A7接腳傳輸數位音訊。Therefore, when the C-type universal serial bus 140 is set to the digital interface mode, the earphone body 120 can pass through at least one of the A4 pin, the B4 pin, the A9 pin and the B9 pin of the C-type universal serial bus. The first power source PM1 from the external electronic device 900 is received as a power source for the earphone body 120. In addition, the earphone body 120 and the external electronic device 900 can transmit digital audio through the A6 pin and the A7 pin of the C-type universal serial bus bar 140.

相對地,當C型通用序列匯流排埠140設定為類比介面模式時,耳機主體120可透過C型通用序列匯流排埠140的B8接腳接收來自外部電子裝置900的第二電源PM2,以做為耳機主體120的供電來源。此外,耳機主體120與外部電子裝置900可透過C型通用序列匯流排埠140的A6接腳、A7接腳及B8接腳傳輸類比音訊,其中A6接腳可用以傳輸右聲道信號,A7接腳可用以傳輸左聲道信號,且B8接腳可用以傳輸麥克風信號。In contrast, when the C-type universal sequence bus bar 140 is set to the analog interface mode, the earphone body 120 can receive the second power source PM2 from the external electronic device 900 through the B8 pin of the C-type universal serial bus bar 140. A source of power for the headphone body 120. In addition, the earphone body 120 and the external electronic device 900 can transmit analog audio through the A6 pin, the A7 pin and the B8 pin of the C-type universal serial bus bar 140, wherein the A6 pin can be used to transmit the right channel signal, and the A7 is connected. The foot can be used to transmit the left channel signal and the B8 pin can be used to transmit the microphone signal.

在本發明的一實施例中,如表1所示,當A5接腳透過5.1千歐姆的電阻接地時,表示C型通用序列匯流排埠140設定為數位介面模式;當A5接腳透過800歐姆~1.2千歐姆的電阻接地時,表示C型通用序列匯流排埠140設定為類比介面模式。因此,外部電子裝置900只要根據C型通用序列匯流排埠140的A5接腳的對地電阻值,即可得知目前的操作模式是數位介面模式或是類比介面模式。In an embodiment of the present invention, as shown in Table 1, when the A5 pin is grounded through a 5.1 kΩ resistor, it indicates that the C-type universal sequence bus bar 140 is set to the digital interface mode; when the A5 pin transmits 800 ohms When the ~1.2 kΩ resistor is grounded, it means that the C-type universal sequence bus bar 140 is set to the analog interface mode. Therefore, the external electronic device 900 can know whether the current operation mode is the digital interface mode or the analog interface mode according to the ground resistance value of the A5 pin of the C-type general-purpose bus bar 140.

以下請同時參照圖1及圖3,圖3繪示圖1的控制電路160的電路方塊示意圖。控制電路160可包括偵測電路262以及切換電阻模組264。偵測電路262可接收第一電源PM1,且對第一電源PM1的電壓與參考電壓VT進行比較以產生控制信號CS。切換電阻模組264耦接在通道組態接腳C_PIN與接地電位GND之間。特別是,切換電阻模組264的電阻值即為通道組態接腳C_PIN與接地電位GND之間的組態電阻值,且切換電阻模組264可受控於控制信號CS而改變此組態電阻值。Please refer to FIG. 1 and FIG. 3 simultaneously. FIG. 3 is a schematic block diagram of the control circuit 160 of FIG. The control circuit 160 can include a detection circuit 262 and a switching resistance module 264. The detecting circuit 262 can receive the first power source PM1 and compare the voltage of the first power source PM1 with the reference voltage VT to generate the control signal CS. The switching resistor module 264 is coupled between the channel configuration pin C_PIN and the ground potential GND. In particular, the resistance value of the switching resistor module 264 is the configured resistance value between the channel configuration pin C_PIN and the ground potential GND, and the switching resistor module 264 can be controlled by the control signal CS to change the configured resistance. value.

舉例來說,當偵測電路262判斷第一電源PM1的電壓大於參考電壓VT時,偵測電路262可產生邏輯低位準的控制信號CS。而切換電阻模組264可受控於邏輯低位準的控制信號CS而將組態電阻值設定為5.1千歐姆。如此一來,外部電子裝置900可根據C型通用序列匯流排埠140的通道組態接腳C_PIN(即A5接腳)的對地電阻值為5.1千歐姆,而得知目前的操作模式為數位介面模式。For example, when the detecting circuit 262 determines that the voltage of the first power source PM1 is greater than the reference voltage VT, the detecting circuit 262 can generate a logic low level control signal CS. The switching resistor module 264 can be controlled by the logic low level control signal CS to set the configured resistance value to 5.1 kilo ohms. In this way, the external electronic device 900 can configure the pin C_PIN (ie, the A5 pin) to have a ground resistance value of 5.1 kohm according to the channel configuration of the C-type universal serial bus bar 140, and know that the current operation mode is digital. Interface mode.

相對地,一旦偵測電路262判斷第一電源PM1的電壓小於或等於參考電壓VT時,偵測電路262可產生邏輯高位準的控制信號CS。而切換電阻模組264可受控於邏輯高位準的控制信號CS而將組態電阻值由5.1千歐姆切換至800歐姆~1.2千歐姆之間。如此一來,外部電子裝置900可根據C型通用序列匯流排埠140的通道組態接腳C_PIN(即A5接腳)的對地電阻值介於800歐姆~1.2千歐姆之間,而得知目前的操作模式為類比介面模式。In contrast, once the detecting circuit 262 determines that the voltage of the first power source PM1 is less than or equal to the reference voltage VT, the detecting circuit 262 can generate a logic high level control signal CS. The switching resistor module 264 can be controlled by the logic high level control signal CS to switch the configuration resistance value from 5.1 kilo ohms to 800 ohms to 1.2 kilo ohms. In this way, the external electronic device 900 can be configured according to the channel configuration pin C_PIN (ie, the A5 pin) of the C-type universal serial bus bar 140, and the ground resistance value is between 800 ohms and 1.2 kilo ohms. The current mode of operation is the analog interface mode.

附帶一提的是,上述範例的控制信號CS的邏輯高低位準與組態電阻值的關係僅只是一個範例,並非用以限制本發明。本領域具通常知識者皆知,控制信號CS的邏輯高低位準與組態電阻值的關係是可以由設計者依實際需求來進行定義的。Incidentally, the relationship between the logic level of the control signal CS of the above example and the configured resistance value is only an example and is not intended to limit the present invention. It is well known in the art that the relationship between the logic level of the control signal CS and the configured resistance value can be defined by the designer according to actual needs.

以下請同時參照圖1、圖3及圖4,圖4繪示圖3的偵測電路262及切換電阻模組264的電路架構示意圖。當C型通用序列匯流排埠140設定為數位介面模式時,偵測電路262透過C型通用序列匯流排埠140的A4接腳、B4接腳、A9接腳與B9接腳的至少其中之一接收來自外部電子裝置900的第一電源PM1。當C型通用序列匯流排埠140設定為類比介面模式時,偵測電路262透過C型通用序列匯流排埠140的B8接腳接收來自外部電子裝置900的第二電源PM2。偵測電路262可包括蕭基二極體DS、分壓電路361、第一電阻R11、電晶體Q1、第一二極體D1以及第二二極體D2,但本發明不限於此。Please refer to FIG. 1 , FIG. 3 and FIG. 4 simultaneously. FIG. 4 is a schematic diagram showing the circuit structure of the detecting circuit 262 and the switching resistor module 264 of FIG. 3 . When the C-type universal serial bus 140 is set to the digital interface mode, the detecting circuit 262 passes through at least one of the A4 pin, the B4 pin, the A9 pin and the B9 pin of the C-type universal serial bus bar 140. The first power source PM1 from the external electronic device 900 is received. When the C-type universal sequence bus bar 140 is set to the analog interface mode, the detecting circuit 262 receives the second power source PM2 from the external electronic device 900 through the B8 pin of the C-type universal sequence bus bar 140. The detecting circuit 262 may include a Schottky diode DS, a voltage dividing circuit 361, a first resistor R11, a transistor Q1, a first diode D1, and a second diode D2, but the invention is not limited thereto.

蕭基二極體DS的陽極接收第一電源PM1,且蕭基二極體DS的陰極輸出第一調整電壓VD1。分壓電路361耦接蕭基二極體DS的陰極以接收第一調整電壓VD1,並對第一調整電壓VD1進行分壓以產生第二調整電壓VD2。第一電阻R11的第一端耦接蕭基二極體DS的陰極。電晶體Q1的第一端耦接第一電阻R11的第二端,電晶體Q1的控制端耦接分壓電路361以接收第二調整電壓VD2,且電晶體Q1的第二端耦接至接地電位GND。第一二極體D1的陽極耦接電晶體Q1的第一端。第二二極體D2的陽極接收第二電源PM2,且第二二極體D2的陰極與第一二極體D1的陰極相耦接以產生控制信號CS。The anode of the Xiaoji diode DS receives the first power source PM1, and the cathode of the Xiaoji diode DS outputs a first adjustment voltage VD1. The voltage dividing circuit 361 is coupled to the cathode of the Schottky diode DS to receive the first adjustment voltage VD1 and divide the first adjustment voltage VD1 to generate the second adjustment voltage VD2. The first end of the first resistor R11 is coupled to the cathode of the Schottky diode DS. The first end of the transistor Q1 is coupled to the second end of the first resistor R11, the control end of the transistor Q1 is coupled to the voltage dividing circuit 361 to receive the second adjusting voltage VD2, and the second end of the transistor Q1 is coupled to Ground potential GND. The anode of the first diode D1 is coupled to the first end of the transistor Q1. The anode of the second diode D2 receives the second power source PM2, and the cathode of the second diode D2 is coupled to the cathode of the first diode D1 to generate a control signal CS.

在本發明的一實施例中,電晶體Q1可為NPN型雙載子接面電晶體,但本發明並不以此為限。在本發明的一實施例中,分壓電路361可包括電容C1、第二電阻R12、第三電阻R13以及穩壓二極體DZ。電容C1耦接在蕭基二極體DS的陰極與接地電位GND之間。第二電阻R12耦接在蕭基二極體DS的陰極與電晶體Q1的控制端之間。第三電阻R13耦接在電晶體Q1的控制端與接地電位GND之間。穩壓二極體DZ的陰極耦接電晶體Q1的控制端,且穩壓二極體DZ的陽極耦接接地電位GND。In an embodiment of the invention, the transistor Q1 may be an NPN type bipolar junction transistor, but the invention is not limited thereto. In an embodiment of the invention, the voltage dividing circuit 361 may include a capacitor C1, a second resistor R12, a third resistor R13, and a voltage stabilizing diode DZ. The capacitor C1 is coupled between the cathode of the Schottky diode DS and the ground potential GND. The second resistor R12 is coupled between the cathode of the Schottky diode DS and the control terminal of the transistor Q1. The third resistor R13 is coupled between the control terminal of the transistor Q1 and the ground potential GND. The cathode of the Zener diode DZ is coupled to the control terminal of the transistor Q1, and the anode of the Zener diode DZ is coupled to the ground potential GND.

切換電阻模組264可包括第一電阻R21、第二電阻R22以及電晶體Q2。第一電阻R21的第一端耦接通道組態接腳C_PIN,且第一電阻R21的第二端耦接至接地電位GND。第二電阻R22的第一端耦接第一電阻R21的第一端。電晶體Q2的第一端耦接第二電阻R22的第二端,電晶體Q2的控制端接收控制信號CS,且電晶體Q2的第二端耦接至接地電位GND。在本發明的一實施例中,電晶體Q2可為N型金氧半場效電晶體,第一電阻R21的電阻值可為5.1千歐姆,且第二電阻R22的電阻值可為1.2千歐姆,但本發明不限於此。以下將針對圖4的電路運作進行說明。The switching resistor module 264 can include a first resistor R21, a second resistor R22, and a transistor Q2. The first end of the first resistor R21 is coupled to the channel configuration pin C_PIN, and the second end of the first resistor R21 is coupled to the ground potential GND. The first end of the second resistor R22 is coupled to the first end of the first resistor R21. The first end of the transistor Q2 is coupled to the second end of the second resistor R22. The control terminal of the transistor Q2 receives the control signal CS, and the second end of the transistor Q2 is coupled to the ground potential GND. In an embodiment of the present invention, the transistor Q2 may be an N-type MOS field effect transistor, the resistance of the first resistor R21 may be 5.1 kilo ohms, and the resistance of the second resistor R22 may be 1.2 kilo ohms. However, the invention is not limited thereto. The operation of the circuit of Fig. 4 will be described below.

當第一電源PM1的電壓大於參考電壓VT時,第一電源PM1透過蕭基二極體DS、第二電阻R12以及第三電阻R13所產生的第二調整電壓VD2將大於電晶體Q1的臨界電壓,因此電晶體Q1可被導通,並據以產生邏輯低位準的控制信號CS。邏輯低位準的控制信號CS可將電晶體Q2關斷,如此一來,通道組態接腳C_PIN與接地電位GND之間的組態電阻值實質上等於第一電阻R21的電阻值(例如5.1千歐姆)。故C型通用序列匯流排埠140被設定為數位介面模式。When the voltage of the first power source PM1 is greater than the reference voltage VT, the second adjustment voltage VD2 generated by the first power source PM1 through the Schottky diode DS, the second resistor R12, and the third resistor R13 will be greater than the threshold voltage of the transistor Q1. Therefore, the transistor Q1 can be turned on and accordingly generate a logic low level control signal CS. The logic low level control signal CS can turn off the transistor Q2, so that the configured resistance value between the channel configuration pin C_PIN and the ground potential GND is substantially equal to the resistance value of the first resistor R21 (for example, 5.1 thousand ohm). Therefore, the C-type universal sequence bus 埠 140 is set to the digital interface mode.

一旦外部電子裝置900的電量下降,致使第一電源PM1的電壓小於或等於參考電壓VT時,第一電源PM1透過蕭基二極體DS、第二電阻R12以及第三電阻R13所產生的第二調整電壓VD2將小於電晶體Q1的臨界電壓,因此電晶體Q1將被關斷,並據以產生邏輯高位準的控制信號CS。邏輯高位準的控制信號CS可將電晶體Q2導通,如此一來,通道組態接腳C_PIN與接地電位GND之間的組態電阻值實質上等於第一電阻R21與第二電阻R22的並聯電阻值(約為971歐姆,介於800歐姆至1.2千歐姆之間)。故C型通用序列匯流排埠140被設定為類比介面模式。此時,外部電子裝置900停止供應第一電源PM1,而是透過C型通用序列匯流排埠140的B8接腳提供第二電源PM2。第二電源PM2可提供邏輯高位準的控制信號CS而維持電晶體Q2為導通的狀態,致使通道組態接腳C_PIN與接地電位GND之間的組態電阻值維持在第一電阻R21與第二電阻R22的並聯電阻值,以讓C型通用序列匯流排埠140維持在類比介面模式。The second power source PM1 transmits the second power source PM1, the second resistor R12, and the third resistor R13. The adjustment voltage VD2 will be less than the threshold voltage of the transistor Q1, so the transistor Q1 will be turned off and a logic high level control signal CS will be generated accordingly. The logic high level control signal CS can turn on the transistor Q2, so that the configured resistance value between the channel configuration pin C_PIN and the ground potential GND is substantially equal to the parallel connection of the first resistor R21 and the second resistor R22. Resistance (approximately 971 ohms, between 800 ohms and 1.2 kilo ohms). Therefore, the C-type universal sequence bus 埠 140 is set to the analog interface mode. At this time, the external electronic device 900 stops supplying the first power source PM1, but provides the second power source PM2 through the B8 pin of the C-type universal sequence bus bar 140. The second power source PM2 can provide a logic high level control signal CS to maintain the transistor Q2 in a conducting state, so that the configured resistance value between the channel configuration pin C_PIN and the ground potential GND is maintained at the first resistor R21 and the second The parallel resistance value of resistor R22 is such that the C-type universal sequence bus 埠 140 is maintained in the analog interface mode.

在本發明的另一實施例中,圖3的偵測電路262也可採用常見的比較器(comparator)或是微控制器(micro-controller)等等之類的電路來實現,但本發明不限於此,端視實際應用或設計需求而定。In another embodiment of the present invention, the detection circuit 262 of FIG. 3 can also be implemented by a common comparator or a micro-controller or the like, but the present invention does not. Limited to this, depending on the actual application or design needs.

綜上所述,本發明實施例的耳機裝置可監控其所耦接的外部電子裝置的電量狀態,並可即時地因應外部電子裝置的電量狀態,而自動地將耳機裝置與外部電子裝置之間的介面由數位介面模式切換為類比介面模式,以延長外部電子裝置的使用時間。由於外部電子裝置的電量是由耳機裝置來監控,且數位介面模式與類比介面模式的切換是由耳機裝置來控制,故外部電子裝置不需執行特定的應用程式以監控其本身的電量,更不需據以執行數位介面模式與類比介面模式的切換運作,如此一來,可避免外部電子裝置因上述應用程式的常駐執行而產生額外的耗電。In summary, the earphone device of the embodiment of the present invention can monitor the state of charge of the external electronic device to which it is coupled, and can automatically synchronize the earphone device with the external electronic device in response to the state of charge of the external electronic device. The interface is switched from digital interface mode to analog interface mode to extend the use time of external electronic devices. Since the power of the external electronic device is monitored by the earphone device, and the switching between the digital interface mode and the analog interface mode is controlled by the earphone device, the external electronic device does not need to execute a specific application to monitor its own power, nor does it The switching operation between the digital interface mode and the analog interface mode is performed, so that the external electronic device can be prevented from generating additional power consumption due to the resident execution of the above application.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧耳機裝置100‧‧‧ headphone device

120‧‧‧耳機主體120‧‧‧ headphone body

140‧‧‧C型通用序列匯流排埠140‧‧‧C type universal sequence bus arrangement

160‧‧‧控制電路160‧‧‧Control circuit

262‧‧‧偵測電路262‧‧‧Detection circuit

264‧‧‧切換電阻模組264‧‧‧Switching resistance module

361‧‧‧分壓電路361‧‧‧voltage circuit

900‧‧‧外部電子裝置900‧‧‧External electronic devices

C1‧‧‧電容C1‧‧‧ capacitor

C_PIN‧‧‧通道組態接腳C_PIN‧‧‧ channel configuration pin

CS‧‧‧控制信號CS‧‧‧Control signal

D1‧‧‧第一二極體D1‧‧‧First Diode

D2‧‧‧第二二極體D2‧‧‧ second diode

DS‧‧‧蕭基二極體DS‧‧‧Xiaoji diode

DZ‧‧‧穩壓二極體DZ‧‧‧ Regulators

GND‧‧‧接地電位GND‧‧‧ Ground potential

PM1‧‧‧第一電源PM1‧‧‧First power supply

PM2‧‧‧第二電源PM2‧‧‧second power supply

Q1、Q2‧‧‧電晶體Q1, Q2‧‧‧O crystal

R11、R21‧‧‧第一電阻R11, R21‧‧‧ first resistance

R12、R22‧‧‧第二電阻R12, R22‧‧‧ second resistor

R13‧‧‧第三電阻R13‧‧‧ third resistor

VD1‧‧‧第一調整電壓VD1‧‧‧First adjustment voltage

VD2‧‧‧第二調整電壓VD2‧‧‧second adjustment voltage

VT‧‧‧參考電壓VT‧‧‧reference voltage

圖1是依照本發明一實施例所繪示的耳機裝置的電路方塊示意圖。 圖2是依照本發明一實施例所繪示的外部電子裝置在持續使用的情況下,第一電源的電壓變化曲線示意圖。 圖3繪示圖1的控制電路的電路方塊示意圖。 圖4繪示圖3的偵測電路及切換電阻模組的電路架構示意圖。FIG. 1 is a circuit block diagram of a headphone device according to an embodiment of the invention. 2 is a schematic diagram showing a voltage variation curve of a first power source in the case where the external electronic device is continuously used according to an embodiment of the invention. 3 is a circuit block diagram of the control circuit of FIG. 1. 4 is a schematic diagram showing the circuit structure of the detecting circuit and the switching resistor module of FIG. 3.

Claims (8)

一種耳機裝置,包括:一耳機主體;一C型通用序列匯流排埠,耦接該耳機主體,且用以與一外部電子裝置連接,以做為該耳機主體與該外部電子裝置間的一信號傳輸介面;以及一控制電路,包括:一偵測電路,耦接該C型通用序列匯流排埠,用以接收來自該外部電子裝置的一第一電源,且將該第一電源的一電壓與一參考電壓進行比較;以及一切換電阻模組,耦接該偵測電路與該C型通用序列匯流排埠,其中當該第一電源的該電壓大於該參考電壓時,該偵測電路透過該切換電阻模組設定該C型通用序列匯流排埠為一數位介面模式,致使該耳機主體與該外部電子裝置傳輸一數位音訊,其中當該第一電源的該電壓小於或等於該參考電壓時,該偵測電路透過該切換電阻模組將該C型通用序列匯流排埠切換為一類比介面模式,致使該耳機主體與該外部電子裝置傳輸一類比音訊,其中該偵測電路透過該切換電阻模組改變該C型通用序列匯流排埠的一通道組態接腳與一接地電位之間的一組態電阻值,致使該C型通用序列匯流排埠於該數位介面模式與該類比介面模式 之間切換。 An earphone device includes: a headphone body; a C-type universal serial bus bar coupled to the earphone body and connected to an external electronic device as a signal between the earphone body and the external electronic device And a control circuit, comprising: a detecting circuit coupled to the C-type universal serial bus bar for receiving a first power source from the external electronic device, and a voltage of the first power source a reference voltage is compared; and a switching resistor module is coupled to the detection circuit and the C-type universal sequence bus, wherein when the voltage of the first power source is greater than the reference voltage, the detecting circuit transmits the The switching resistor module sets the C-type universal serial bus as a digital interface mode, so that the earphone body and the external electronic device transmit a digital audio, wherein when the voltage of the first power source is less than or equal to the reference voltage, The detecting circuit switches the C-type universal serial bus bar to an analog interface mode through the switching resistor module, so that the earphone body and the external electronic device transmit A type of analog audio, wherein the detecting circuit changes a configuration resistance value between a channel configuration pin of the C-type universal serial bus bar and a ground potential through the switching resistor module, so that the C-type universal sequence The bus is connected to the digital interface mode and the analog interface mode Switch between. 如申請專利範圍第1項所述的耳機裝置,其中:當該組態電阻值為5.1千歐姆時,該C型通用序列匯流排埠為該數位介面模式;以及當該組態電阻值介於800歐姆至1.2千歐姆時,該C型通用序列匯流排埠為該類比介面模式。 The earphone device of claim 1, wherein: when the configured resistance value is 5.1 kilo ohms, the C-type universal sequence bus bar is the digital interface mode; and when the configured resistance value is between The C-type universal sequence bus 埠 is the analog interface mode from 800 ohms to 1.2 kilo ohms. 如申請專利範圍第1項所述的耳機裝置,其中:該偵測電路將該第一電源的該電壓與該參考電壓進行比較以產生一控制信號;以及該切換電阻模組耦接在該通道組態接腳與該接地電位之間,其中該切換電阻模組的一電阻值為該組態電阻值,且該切換電阻模組受控於該控制信號而改變該組態電阻值。 The earphone device of claim 1, wherein the detecting circuit compares the voltage of the first power source with the reference voltage to generate a control signal; and the switching resistor module is coupled to the channel Between the configuration pin and the ground potential, wherein a resistance value of the switching resistance module is the configured resistance value, and the switching resistance module is controlled by the control signal to change the configured resistance value. 如申請專利範圍第3項所述的耳機裝置,其中:當該C型通用序列匯流排埠設定為該數位介面模式時,該偵測電路透過該C型通用序列匯流排埠的A4接腳、B4接腳、A9接腳與B9接腳的至少其中之一接收該第一電源。 The earphone device of claim 3, wherein: when the C-type universal serial bus is set to the digital interface mode, the detecting circuit transmits the A4 pin of the C-type universal serial bus, At least one of the B4 pin, the A9 pin and the B9 pin receives the first power source. 如申請專利範圍第4項所述的耳機裝置,其中當該C型通用序列匯流排埠設定為該類比介面模式時,該偵測電路透過該C型通用序列匯流排埠的B8接腳接收來自該外部電子裝置的一第二電源,其中該偵測電路包括:一蕭基二極體,該蕭基二極體的陽極接收該第一電源,且該蕭基二極體的陰極輸出一第一調整電壓; 一分壓電路,耦接該蕭基二極體的該陰極以接收該第一調整電壓,並對該第一調整電壓進行分壓以產生一第二調整電壓;一第一電阻,該第一電阻的一第一端耦接該蕭基二極體的該陰極;一電晶體,該電晶體的一第一端耦接該第一電阻的一第二端,該電晶體的一控制端耦接該分壓電路以接收該第二調整電壓,且該電晶體的一第二端耦接該接地電位;一第一二極體,該第一二極體的陽極耦接該電晶體的該第一端;以及一第二二極體,該第二二極體的陽極接收該第二電源,且該第二二極體的陰極與該第一二極體的陰極相耦接以產生該控制信號。 The earphone device of claim 4, wherein when the C-type universal serial bus is set to the analog interface mode, the detecting circuit receives the B8 pin from the C-type universal serial bus. a second power source of the external electronic device, wherein the detecting circuit comprises: a Schottky diode, the anode of the Schottky diode receives the first power source, and the cathode output of the Schottky diode is Adjusting the voltage; a voltage dividing circuit, coupled to the cathode of the Schottky diode to receive the first adjustment voltage, and dividing the first adjustment voltage to generate a second adjustment voltage; a first resistor, the first a first end of a resistor is coupled to the cathode of the Schottky diode; a transistor, a first end of the transistor is coupled to a second end of the first resistor, and a control end of the transistor The voltage dividing circuit is coupled to receive the second adjusting voltage, and a second end of the transistor is coupled to the ground potential; a first diode, an anode of the first diode is coupled to the transistor The first end; and a second diode, the anode of the second diode receives the second power source, and the cathode of the second diode is coupled to the cathode of the first diode This control signal is generated. 如申請專利範圍第5項所述的耳機裝置,其中該電晶體為一NPN型雙載子接面電晶體,其中該分壓電路包括:一電容,耦接在該蕭基二極體的該陰極與該接地電位之間;一第二電阻,耦接在該蕭基二極體的該陰極與該電晶體的該控制端之間;一第三電阻,耦接在該電晶體的該控制端與該接地電位之間;以及一穩壓二極體,該穩壓二極體的陰極耦接該電晶體的該控制端,且該穩壓二極體的陽極耦接該接地電位。 The earphone device of claim 5, wherein the transistor is an NPN type dual carrier junction transistor, wherein the voltage dividing circuit comprises: a capacitor coupled to the Schottky diode a cathode between the cathode and the control end of the transistor; a third resistor coupled to the transistor Between the control terminal and the ground potential; and a voltage stabilizing diode, the cathode of the voltage stabilizing diode is coupled to the control end of the transistor, and the anode of the voltage stabilizing diode is coupled to the ground potential. 如申請專利範圍第3項所述的耳機裝置,其中該通道組態接腳為該C型通用序列匯流排埠的A5接腳,其中該切換電阻模組包括:一第一電阻,該第一電阻的一第一端耦接該通道組態接腳,且該第一電阻的一第二端耦接該接地電位;一第二電阻,該第二電阻的一第一端耦接該第一電阻的該第一端;以及一電晶體,該電晶體的一第一端耦接該第二電阻的一第二端,該電晶體的一控制端接收該控制信號,且該電晶體的一第二端耦接該接地電位。 The earphone device of claim 3, wherein the channel configuration pin is an A5 pin of the C-type universal serial bus bar, wherein the switching resistor module comprises: a first resistor, the first a first end of the resistor is coupled to the channel configuration pin, and a second end of the first resistor is coupled to the ground potential; a second resistor is coupled to the first end of the second resistor a first end of the resistor; and a transistor, a first end of the transistor is coupled to a second end of the second resistor, a control end of the transistor receives the control signal, and one of the transistors The second end is coupled to the ground potential. 如申請專利範圍第1項所述的耳機裝置,其中:當該C型通用序列匯流排埠設定為該數位介面模式時,該耳機主體透過該C型通用序列匯流排埠的A4接腳、B4接腳、A9接腳與B9接腳的至少其中之一接收該第一電源,以做為該耳機主體的一供電來源,且該耳機主體與該外部電子裝置透過該C型通用序列匯流排埠的A6接腳及A7接腳傳輸該數位音訊;以及當該C型通用序列匯流排埠設定為該類比介面模式時,該耳機主體透過該C型通用序列匯流排埠的B8接腳接收來自該外部電子裝置的一第二電源,以做為該耳機主體的該供電來源,且該耳機主體與該外部電子裝置透過該C型通用序列匯流排埠的該A6接腳、該A7接腳及該B8接腳傳輸該類比音訊,其中該A6接腳用以傳輸一右聲道信號,該A7接腳用以傳輸一左聲道信號,且該 B8接腳用以傳輸一麥克風信號。 The earphone device of claim 1, wherein: when the C-type universal serial bus is set to the digital interface mode, the earphone body transmits the A4 pin and the B4 of the C-type universal serial bus. At least one of the pin, the A9 pin and the B9 pin receives the first power source as a power source of the earphone body, and the earphone body and the external electronic device pass through the C-type universal serial bus. The A6 pin and the A7 pin transmit the digital audio; and when the C-type universal serial bus is set to the analog interface mode, the earphone body receives the B8 pin through the C-type universal serial bus a second power source of the external electronic device as the power supply source of the earphone body, and the earphone body and the external electronic device pass through the A6 pin of the C-type universal serial bus, the A7 pin and the The analog audio is transmitted by the B8 pin, wherein the A6 pin is used for transmitting a right channel signal, and the A7 pin is used for transmitting a left channel signal, and the The B8 pin is used to transmit a microphone signal.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105933810A (en) 2016-04-29 2016-09-07 乐视控股(北京)有限公司 Earphone mode switching method and apparatus, electronic device, and earphones
CN106210949A (en) 2016-06-29 2016-12-07 乐视控股(北京)有限公司 The mode switching method of a kind of earphone and mode-changeover device
CN205829949U (en) 2016-05-30 2016-12-21 歌尔股份有限公司 A kind of earphone

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202258331U (en) * 2011-10-21 2012-05-30 深圳市奥尼电子工业有限公司 Small portable sound box capable of automatically switching playing modes
CN103683348B (en) * 2012-09-12 2016-06-29 国基电子(上海)有限公司 There is the electronic installation of power consumption detecting function
CN105872899A (en) * 2016-04-20 2016-08-17 乐视控股(北京)有限公司 Audio playing method and device and terminal equipment
CN105872900A (en) * 2016-04-20 2016-08-17 乐视控股(北京)有限公司 Switching device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105933810A (en) 2016-04-29 2016-09-07 乐视控股(北京)有限公司 Earphone mode switching method and apparatus, electronic device, and earphones
CN205829949U (en) 2016-05-30 2016-12-21 歌尔股份有限公司 A kind of earphone
CN106210949A (en) 2016-06-29 2016-12-07 乐视控股(北京)有限公司 The mode switching method of a kind of earphone and mode-changeover device

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