TWI651589B - Detecting method of circuit board and exposing method of circuit board - Google Patents
Detecting method of circuit board and exposing method of circuit board Download PDFInfo
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Abstract
一種電路板檢測方法包括:篩選步驟與再生步驟。其中,篩選步驟為以一第一預設值進行X個待測電路板的檢測,篩選出能在所述第一預設值下進行曝光作業的Y個適格電路板、及不能在所述第一預設值下進行曝光作業的Z個淘汰電路板,並且X=Y+Z。再生步驟為找出能夠使Z個所述淘汰電路板中的至少其中一個所述淘汰電路板進行曝光作業的一第二預設值。藉此,本發明能夠有效地降低電路板的淘汰率及節省生產時間。 A circuit board detection method includes: a screening step and a regeneration step. The screening step is to perform X detection of the circuit board to be tested with a first preset value, and screen out Y suitable circuit boards capable of performing the exposure operation at the first preset value, and cannot be in the first Z eliminator boards that perform exposure operations at a preset value, and X = Y + Z. The reproducing step is to find a second preset value capable of performing an exposure operation on at least one of the Z culling boards. Thereby, the invention can effectively reduce the elimination rate of the circuit board and save production time.
Description
本發明涉及一種電路板生產方法,且還涉及一種電路板檢測方法及電路板曝光方法。 The invention relates to a method for producing a circuit board, and to a method for detecting a circuit board and a method for exposing the circuit board.
現今科技發達進而帶動各式電子產品的發展,而各式電子產品又多以印刷電路板為其基礎元件,因此提供優良的印刷電路板便為各家廠商所欲追求的發展方向。在現有的電路板生產方法中,電路板的曝光作業需搭配底片來加以實施,但電路板常會因為製程上的誤差而使電路板產生形變,進而造成每個電路板的尺寸非完全相同。因此,電路板在以底片進行曝光作業時,常會產生對位問題而使電路板被淘汰。 Nowadays, the development of science and technology has led to the development of various electronic products, and various electronic products have mostly printed circuit boards as their basic components. Therefore, providing excellent printed circuit boards is the development direction that various manufacturers are pursuing. In the existing circuit board production method, the exposure operation of the circuit board needs to be implemented with the negative film, but the circuit board often deforms the circuit board due to the error in the manufacturing process, and thus the size of each circuit board is not completely the same. Therefore, when the board performs the exposure operation on the negative film, the alignment problem often occurs and the circuit board is eliminated.
於是,本發明人認為上述缺陷可改善,乃特潛心研究並配合科學原理的運用,終於提出一種設計合理且有效改善上述缺陷的本發明。 Accordingly, the inventors believe that the above-mentioned defects can be improved, and that the invention has been studied with great interest and with the use of scientific principles, and finally proposes a present invention which is rational in design and effective in improving the above-mentioned defects.
本發明實施例在於提供一種電路板檢測方法及電路板曝光方法,有效地改善現有電路板生產方法所產生的缺陷。 Embodiments of the present invention provide a circuit board detecting method and a circuit board exposure method, which effectively improve defects caused by the existing circuit board manufacturing method.
本發明實施例公開一種電路板檢測方法,包括:一篩選步驟:以一第一預設值進行X個待測電路板的檢測,篩選出能在所述第一預設值下進行曝光作業的Y個適格電路板、及不能在所述第一預設值下進行曝光作業的Z個淘汰電路板,並且X=Y+Z;以及一 再生步驟:找出能夠使Z個所述淘汰電路板中的至少其中一個所述淘汰電路板進行曝光作業的一第二預設值。 The embodiment of the invention discloses a circuit board detecting method, comprising: a screening step: performing X detection of a circuit board to be tested with a first preset value, and filtering out an exposure operation capable of performing the exposure operation at the first preset value. Y compliant circuit boards, and Z eliminator boards that are not capable of performing exposure operations at the first predetermined value, and X = Y + Z; Regeneration step: finding a second preset value capable of causing at least one of the Z culling boards to perform an exposure operation.
優選地,所述第一預設值定義為一第一底片的尺寸相對於一容許誤差而向內縮及向外擴的一虛擬尺寸範圍,而所述第二預設值定義為一第二底片的尺寸相對於所述容許誤差而向內縮及向外擴的一虛擬尺寸範圍。 Preferably, the first preset value is defined as a virtual size range in which the size of a first negative film is inwardly and outwardly expanded relative to an allowable error, and the second preset value is defined as a second A virtual size range in which the size of the backsheet is inwardly and outwardly expanded relative to the tolerance.
本發明實施例也公開一種電路板曝光方法,包括:如上所述的電路板檢測方法;以及一曝光步驟:依據所述第一預設值依序使Y個所述適格電路板進行曝光作業,並且依據所述第二預設值使相對應的至少一個所述淘汰電路板進行曝光作業。 The embodiment of the invention also discloses a circuit board exposure method, comprising: the circuit board detecting method as described above; and an exposing step: sequentially performing Y exposure of the appropriate circuit boards according to the first preset value, And performing, according to the second preset value, the corresponding at least one of the eliminating circuit boards to perform an exposure operation.
綜上所述,本發明實施例所公開的電路板檢測方法及電路板曝光方法,能因應每個電路板的尺寸並非完全相同,以底片進行曝光作業前,先進行篩選步驟與再生步驟,藉以避免待測電路板與底片在曝光作業的過程中產生對位問題,並且於再生步驟中,依據上述淘汰電路板來選擇其他合適的底片,進而有效地降低電路板的淘汰率及節省生產時間。 In summary, the method for detecting a circuit board and the method for exposing the circuit board disclosed in the embodiments of the present invention can be performed in accordance with the size of each circuit board, and the screening step and the regeneration step are performed before the exposure operation is performed on the negative film. The problem that the circuit board and the negative film to be tested are in alignment during the exposure operation is avoided, and in the regeneration step, other suitable negative films are selected according to the above-mentioned elimination circuit board, thereby effectively reducing the elimination rate of the circuit board and saving production time.
為使能更進一步瞭解本發明的特徵及技術內容,請參閱以下有關本發明的詳細說明與附圖,但是此等說明與附圖僅用來說明本發明,而非對本發明的保護範圍作任何的限制。 For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying drawings limits.
1‧‧‧檢測設備 1‧‧‧Testing equipment
11‧‧‧攝像裝置 11‧‧‧ camera
12‧‧‧運算裝置 12‧‧‧ arithmetic device
2‧‧‧底片 2‧‧‧ negative film
21‧‧‧第一底片 21‧‧‧ first negative
21P‧‧‧中心點 21P‧‧‧ Center Point
22‧‧‧第二底片 22‧‧‧ second negative
3‧‧‧標準玻璃底片 3‧‧‧Standard glass film
4‧‧‧待測電路板 4‧‧‧Device board to be tested
41‧‧‧適格電路板 41‧‧‧ Sigma board
42‧‧‧淘汰電路板 42‧‧‧Retire the board
4P‧‧‧中心點 4P‧‧‧ Center Point
R1‧‧‧第一預設值 R1‧‧‧ first preset value
R2‧‧‧第二預設值 R2‧‧‧ second preset value
W‧‧‧寬度方向 W‧‧‧Width direction
L‧‧‧長度方向 L‧‧‧ Length direction
圖1為本發明電路板檢測方法的流程示意圖。 FIG. 1 is a schematic flow chart of a method for detecting a circuit board according to the present invention.
圖2為本發明電路板檢測方法所使用的檢測設備的功能方塊示意圖。 2 is a functional block diagram of a detecting device used in the method for detecting a circuit board of the present invention.
圖3為本發明電路板檢測方法的底片及預設值的示意圖。 FIG. 3 is a schematic diagram of a film and a preset value of the circuit board detecting method of the present invention.
圖4為本發明電路板檢測方法的篩選步驟示意圖(一)。 4 is a schematic diagram (1) of a screening step of a circuit board detecting method according to the present invention.
圖5為本發明電路板檢測方法的篩選步驟示意圖(二)。 FIG. 5 is a schematic diagram showing the screening steps of the circuit board detecting method of the present invention (2).
圖6為本發明電路板檢測方法的再生步驟示意圖。 FIG. 6 is a schematic diagram showing the regeneration steps of the circuit board detecting method of the present invention.
圖7為本發明電路板曝光方法的流程示意圖。 FIG. 7 is a schematic flow chart of a method for exposing a circuit board of the present invention.
請參閱圖1至圖6,為本發明的實施例一,需先說明的是,本實施例對應附圖所提及的相關數量與外型,僅用來具體地說明本發明的實施方式,以便於了解本發明的內容,而非用來侷限本發明的保護範圍。 1 to FIG. 6 is a first embodiment of the present invention. It should be noted that the related embodiments of the present invention are only used to specifically describe the embodiments of the present invention. The scope of the present invention is not to be construed as limiting the scope of the present invention.
如圖1所示,本實施例公開一種電路板檢測方法,尤其是指一種電路板在進行曝光作業前的檢測方法。所述電路板檢測方法包括步驟如下:一準備步驟、一篩選步驟、及一再生步驟。以下將對各步驟的具體實施方式作一說明,但下述說明並非限制各個步驟的必要實施順序。 As shown in FIG. 1 , the embodiment discloses a circuit board detecting method, and particularly relates to a method for detecting a circuit board before performing an exposure operation. The circuit board detecting method comprises the following steps: a preparation step, a screening step, and a regeneration step. The specific embodiments of the steps will be described below, but the following description is not intended to limit the necessary order of implementation of the various steps.
準備步驟:請參閱圖2和圖3所示,提供一檢測設備1,包括一攝像裝置11以及電性連接於所述攝像裝置11的一運算裝置12,藉以通過上述檢測設備1的攝像裝置11與運算裝置12而實施下述各種比較或選擇作業。其中,所述攝像裝置11能擷取N種底片2的影像及X個待測電路板4的影像並傳送至所述運算裝置12。上述底片2與待測電路板4於本實施例中皆大致呈四邊形,並且所述待測電路板4於本實施例中是指尚未搭配底片2進行曝光作業的電路板。 Preparation step: Referring to FIG. 2 and FIG. 3, a detecting device 1 is provided, including an imaging device 11 and an arithmetic device 12 electrically connected to the imaging device 11, thereby passing through the imaging device 11 of the detecting device 1 The following comparison or selection operations are performed with the arithmetic unit 12. The image capturing device 11 can capture images of the N types of the negative film 2 and X images of the circuit board 4 to be tested and transmit the image to the computing device 12. The above-mentioned negative film 2 and the circuit board 4 to be tested are substantially quadrangular in this embodiment, and the circuit board 4 to be tested in this embodiment refers to a circuit board which has not been subjected to an exposure operation with the negative film 2.
進一步地說,所述運算裝置12能比較上述N種底片2以及一標準玻璃底片3(N為大於1的正整數),並將每種底片2定義出相關於電路板曝光作業的一漲縮係數。舉例來說,所述標準玻璃底片3在相互垂直的寬度方向W與長度方向L的漲縮係數皆預設為1,運算裝置12可以依據各種底片2的影像與上述標準玻璃底片3的影像,而在寬度方向W與長度方向L上進行尺寸比較,藉 以定義出各種底片2在寬度方向W與長度方向L的漲縮係數(如:0.995、1.005)。 Further, the computing device 12 can compare the above-mentioned N kinds of negative films 2 and a standard glass negative film 3 (N is a positive integer greater than 1), and define each negative film 2 with respect to a shrinking operation of the circuit board exposure operation. coefficient. For example, the standard glass backsheet 3 has a first and a third expansion and contraction coefficient in the width direction W and the length direction L, and the computing device 12 can be based on the images of the various negative films 2 and the image of the standard glass negative film 3 described above. And comparing the dimensions in the width direction W and the length direction L, borrowing The expansion and contraction coefficients (for example, 0.995, 1.005) of the various negative films 2 in the width direction W and the longitudinal direction L are defined.
再者,本實施例的標準玻璃底片3可以是透明狀,藉以利於將兩種底片2分別對位地設置於上述標準玻璃底片3的相反兩個表面上,使攝像裝置11能夠同時取得標準玻璃底片3及置於其上的兩種底片2的影像,進而能令運算裝置12同時進行上述兩種底片2的漲縮係數運算。需說明的是,本實施例雖是以攝像裝置11同時擷取標準玻璃底片3及置於其上的兩種底片2的影像,以作為底片2漲縮係數的判斷標準,但本發明不排除以其他方式實施。例如:運算裝置12內可預設有標準玻璃底片3的影像,以使攝像裝置11僅需擷取各種底片2的影像後,即可通過運算裝置12進行底片2的漲縮係數運算。 Furthermore, the standard glass backsheet 3 of the present embodiment may be transparent, so as to facilitate the positioning of the two types of the backsheets 2 on opposite surfaces of the standard glass backsheet 3, so that the camera device 11 can simultaneously obtain standard glass. The image of the backsheet 3 and the two types of film 2 placed thereon, in turn, allows the computing device 12 to simultaneously perform the expansion and contraction coefficient calculations of the two types of film 2 described above. It should be noted that, in this embodiment, the image of the standard glass backsheet 3 and the two kinds of the negative film 2 placed thereon are simultaneously taken by the image capturing device 11 as the criterion for judging the shrinkage coefficient of the film 2, but the present invention does not exclude Implemented in other ways. For example, the image of the standard glass backsheet 3 can be pre-set in the computing device 12 so that the imaging device 11 can capture the image of the various negative films 2, and then the arithmetic unit 12 can perform the calculation of the expansion and contraction coefficient of the negative film 2.
篩選步驟:請參閱圖4和圖5所示,以一第一預設值R1進行上述X個待測電路板4的檢測,篩選出能在所述第一預設值R1下進行曝光作業的Y個適格電路板41、及不能在所述第一預設值R1下進行曝光作業的Z個淘汰電路板42。其中,X=Y+Z、X為正整數、Y與Z皆為不小於零的整數。於本實施例中,所述第一預設值R1定義為一第一底片21的尺寸相對於一容許誤差(如:小於35微米)而向內縮及向外擴的一虛擬尺寸範圍(如圖3中,鄰近第一底片21邊緣的內側矩形虛線與外側矩形虛線所包圍的區域)。再者,所述N種底片2包括上述第一底片21,也就是說,所述攝像裝置11已擷取所述第一底片21的影像並傳送至所述運算裝置12中。 The screening step is as follows: Referring to FIG. 4 and FIG. 5, the detection of the X circuit boards 4 to be tested is performed by using a first preset value R1, and the exposure operation can be performed under the first preset value R1. Y compliant circuit boards 41 and Z eliminating circuit boards 42 that are not capable of performing exposure operations at the first predetermined value R1. Where X=Y+Z, X is a positive integer, and Y and Z are all integers not less than zero. In this embodiment, the first preset value R1 is defined as a virtual size range in which the size of the first negative film 21 is inwardly and outwardly expanded relative to an allowable error (eg, less than 35 micrometers) (eg, In Fig. 3, an area surrounded by an inner rectangular dotted line and an outer rectangular dotted line adjacent to the edge of the first negative film 21). Furthermore, the N types of negative films 2 include the first negative film 21 described above, that is, the image pickup device 11 has captured the image of the first negative film 21 and transferred it to the arithmetic device 12.
更詳細地說,所述運算裝置12是依據所述X個待測電路板的影像,藉以在上述N種底片2中,選擇出在所述容許誤差內能夠進行曝光作業的待測電路板4數量為最多的第一底片21。並且所述運算裝置12依據自攝像裝置11傳送的所述第一底片21的影像 與X個待測電路板4的影像,而判斷出上述Y個適格電路板41及Z個淘汰電路板42。 In more detail, the computing device 12 selects the circuit board under test 4 capable of performing the exposure operation within the tolerance of the N kinds of negative films 2 according to the images of the X circuit boards to be tested. The first film 21 having the largest number. And the computing device 12 is based on the image of the first film 21 transmitted from the camera 11 With respect to the X images of the circuit board 4 to be tested, the Y adaptive circuit boards 41 and the Z eliminating circuit boards 42 are determined.
進一步地說,所述篩選步驟於本實施例中是將所述第一底片21依序疊置於每個待測電路板4,並且所述第一底片21的中心點21P大致對齊或鄰近於相疊置的待測電路板4的中心點4P;接著,當所述第一底片21與相疊置的待測電路板4的尺寸差異大於或小於所述容許誤差時(如圖5),則相疊置的待測電路板4判定為一個淘汰電路板42,反之,當所述第一底片21與相疊置的待測電路板4的尺寸差異在所述容許誤差內時(如圖4),則相疊置的待測電路板4判定為一個適格電路板41。此外,上述雖是以第一底片21的中心點21P大致對齊或鄰近於相疊置待測電路板4的中心點4P為例,但本發明並不受限於此。上述中心點21P及中心點4P,於本實施例中皆大致定義為由其所有頂點相對於平面中心的連線的交點。 Further, in the present embodiment, the screening step is to sequentially stack the first negative film 21 on each circuit board 4 to be tested, and the center point 21P of the first negative film 21 is substantially aligned or adjacent to The center point 4P of the circuit board 4 to be tested is stacked; then, when the difference in size between the first film 21 and the circuit board 4 to be tested is greater than or less than the tolerance (Fig. 5), Then, the stacked circuit board 4 to be tested is determined to be a circuit board 42. Conversely, when the size difference between the first film 21 and the circuit board 4 to be tested is within the tolerance, 4), the stacked circuit boards 4 to be tested are determined to be a suitable circuit board 41. Further, although the above is exemplified by the center point 21P of the first film 21 being substantially aligned or adjacent to the center point 4P of the circuit board 4 to be tested, the present invention is not limited thereto. The center point 21P and the center point 4P are generally defined in the present embodiment as the intersection of the lines of all their vertices with respect to the center of the plane.
換個角度來說,上述第一底片21與相疊置待測電路板4間的尺寸差異判斷過程也可以是:所述第一底片21在四個角落各預設有對位部(圖中未標示),並且上述待測電路板4的四個角落也各預設有相對應的對位部(圖中未標示)。將所述第一底片21的其中一個對位部大致對齊於上述待測電路板4的其中一個對位部,接著取得第一底片21的其他對位部與相疊置待測電路板4的相鄰對位部之間的距離值,而後再比較上述距離值與容許誤差;若上述第一底片21與待測電路板4在上述四個角落所測得的其中一個距離值大於容許誤差,則相疊置待測電路板4判定為淘汰電路板42。 In other words, the process of judging the difference in size between the first film 21 and the circuit board 4 to be tested may be: the first film 21 is pre-positioned at four corners (not shown) Marked), and the four corners of the circuit board 4 to be tested are also pre-arranged with corresponding alignment portions (not shown). One of the alignment portions of the first film 21 is substantially aligned with one of the alignment portions of the circuit board 4 to be tested, and then the other alignment portions of the first film 21 and the circuit board 4 to be tested are stacked. The distance value between the adjacent alignment portions, and then comparing the distance value and the tolerance; if one of the distance values measured by the first film 21 and the circuit board 4 to be tested in the four corners is greater than the tolerance, Then, the circuit board 4 to be tested is stacked to determine that the circuit board 42 is eliminated.
再生步驟:請參閱圖6所示,找出能夠使Z個所述淘汰電路板42中的至少其中一個淘汰電路板42進行曝光作業的一第二預設值R2。其中,當Z大於1時,所述Z個淘汰電路板42能夠依 據M種預設值進行曝光作業(M大於1並且小於Z的正整數),所述M種預設值包含有上述第二預設值R2,也可進一步包含有第三預設值、第四預設值、及第五預設值等等。再者,於所述M種預設值中,上述第二預設值R2能夠進行曝光作業的淘汰電路板42數量為最多。而於本實施例中,第二預設值R2定義為一第二底片22的尺寸相對於所述容許誤差而向內縮及向外擴的一虛擬尺寸範圍,並且所述N種底片2包括上述第二底片22。 Regeneration Step: Referring to FIG. 6, a second preset value R2 capable of causing at least one of the Z reject boards 42 to perform the exposure operation is found. Wherein, when Z is greater than 1, the Z culling circuit boards 42 can Performing an exposure operation (M is greater than 1 and less than a positive integer of Z) according to the M preset values, the M preset values include the second preset value R2, and may further include a third preset value, Four preset values, a fifth preset value, and the like. Furthermore, among the M preset values, the second preset value R2 is the most cullable circuit board 42 capable of performing an exposure job. In this embodiment, the second preset value R2 is defined as a virtual size range in which the size of the second negative film 22 is inwardly and outwardly expanded relative to the tolerance, and the N negative films 2 include The second backsheet 22 described above.
更詳細地說,所述運算裝置12依據上述Z個淘汰電路板42的影像,而判斷出能夠在所述容許誤差內對至少一個所述淘汰電路板42進行曝光作業的第二底片22。舉例來說,所述第一底片21的漲縮係數為1.005,而圖5所示的淘汰電路板42相較於第一底片21的尺寸差異,小於所述容許誤差,所以運算裝置12以小於第一底片21的漲縮係數為其中一個篩選條件,進而在其餘的底片2中進行選擇,例如:本實施例是選擇圖6所示的具有漲縮係數為0.995的第二底片22。 More specifically, the arithmetic unit 12 determines the second negative film 22 capable of performing exposure work on at least one of the eliminating circuit boards 42 within the allowable error based on the images of the Z eliminating circuit boards 42. For example, the first film 21 has a coefficient of expansion and contraction of 1.005, and the size difference between the circuit board 42 shown in FIG. 5 and the first film 21 is smaller than the tolerance, so the computing device 12 is smaller than The coefficient of expansion and contraction of the first film 21 is one of the screening conditions, and is selected in the remaining film 2, for example, this embodiment selects the second film 22 having a coefficient of expansion and contraction of 0.995 as shown in FIG.
藉此,因應每個電路板的尺寸並非完全相同,所以本實施例的待測電路板4在以底片2進行曝光作業前,先進行上述電路板檢測方法,藉以避免待測電路板4與底片2在曝光作業的過程中產生對位問題,並且所述電路板檢測方法通過再生步驟而能依據上述淘汰電路板42選擇其他合適的底片,進而有效地降低電路板的淘汰率及節省生產時間。 Therefore, in order to ensure that the size of each circuit board is not completely the same, the circuit board 4 to be tested in this embodiment performs the above-mentioned circuit board detection method before performing the exposure operation on the negative film 2, thereby avoiding the circuit board 4 and the negative film to be tested. 2 A problem of alignment occurs during the exposure operation, and the circuit board detection method can select other suitable negative films according to the above-mentioned elimination circuit board 42 through the regeneration step, thereby effectively reducing the elimination rate of the circuit board and saving production time.
請參閱圖7,為本發明的實施例二,本實施例與上述實施例一類似,相同處則不再加以贅述,而兩個實施例的主要差異如下所述。 Referring to FIG. 7, which is a second embodiment of the present invention, the present embodiment is similar to the above-mentioned first embodiment, and the same portions are not described again, and the main differences between the two embodiments are as follows.
具體來說,本實施例公開一種電路板曝光方法,包括實施例一所述的電路板檢測方法以及一曝光步驟。其中,所述曝光步驟 為:依據所述第一預設值R1依序使Y個所述適格電路板41進行曝光作業,並且依據所述第二預設值R2使相對應的至少一個所述淘汰電路板42進行曝光作業。進一步地說,依據上述M種預設值分別使相對應的所述淘汰電路板42進行曝光作業。 Specifically, the embodiment discloses a circuit board exposure method, including the circuit board detecting method and the exposure step according to the first embodiment. Wherein the exposure step And: causing the Y adaptive circuit boards 41 to perform an exposure operation according to the first preset value R1, and exposing the corresponding at least one of the eliminating circuit boards 42 according to the second preset value R2 operation. Further, the corresponding eliminator circuit board 42 is respectively subjected to an exposure operation according to the M kinds of preset values.
須說明的是,若是某個預設值所對應的淘汰電路板42數量過少時(如:少於三個),由於僅針對上述過少的淘汰電路板42進行曝光步驟所需花費的製造成本,反而比直接拋棄上述過少的淘汰電路板42還要高,所以上述過少的淘汰電路板42也可無須進一步實施上述的曝光步驟而直接拋棄。 It should be noted that if the number of the eliminating circuit boards 42 corresponding to a certain preset value is too small (for example, less than three), the manufacturing cost of performing the exposure step only for the excessively small eliminating circuit board 42 is required. On the contrary, it is higher than directly discarding the above-mentioned excessively-removed circuit board 42, so that the above-mentioned too few eliminated circuit boards 42 can be directly discarded without further performing the above-described exposure step.
以上所述僅為本發明的優選可行實施例,並非用來侷限本發明的保護範圍,凡依本發明申請專利範圍所做的同等變化與修飾,皆應屬本發明的涵蓋範圍。 The above are only the preferred embodiments of the present invention, and are not intended to limit the scope of the present invention, and all equivalent changes and modifications made by the scope of the present invention should be included in the scope of the present invention.
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TW201019805A (en) * | 2008-11-07 | 2010-05-16 | Compeq Mfg Co Ltd | Circuit board bearing device and the application thereof |
TW201127236A (en) * | 2010-01-22 | 2011-08-01 | Unimicron Technology Corp | Alignment structure of circuit board and method for producing the alignment structure of the circuit board |
CN103702516A (en) * | 2013-12-17 | 2014-04-02 | 梅州市志浩电子科技有限公司 | Printed circuit board factor calculation method and calculation system |
CN104460249A (en) * | 2013-09-23 | 2015-03-25 | 北大方正集团有限公司 | Method for detecting exposure alignment of two sides of inner-layer substrate of circuit board |
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CN1318839C (en) * | 2002-11-28 | 2007-05-30 | 威光机械工程股份有限公司 | Automated Optical Inspection Method for Defective Components on Printed Circuit Boards |
TW201019805A (en) * | 2008-11-07 | 2010-05-16 | Compeq Mfg Co Ltd | Circuit board bearing device and the application thereof |
TW201127236A (en) * | 2010-01-22 | 2011-08-01 | Unimicron Technology Corp | Alignment structure of circuit board and method for producing the alignment structure of the circuit board |
CN104460249A (en) * | 2013-09-23 | 2015-03-25 | 北大方正集团有限公司 | Method for detecting exposure alignment of two sides of inner-layer substrate of circuit board |
CN103702516A (en) * | 2013-12-17 | 2014-04-02 | 梅州市志浩电子科技有限公司 | Printed circuit board factor calculation method and calculation system |
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