TWI649596B - Liquid crystal display panel - Google Patents

Abstract

The present invention provides a liquid crystal display panel including a first substrate, a scan line, a data line, a pixel structure, a counter electrode layer, a liquid crystal layer, and a second substrate. The scan line, the data line and the pixel structure are located on the first substrate, each pixel structure includes a first active component electrically connected to the scan line and the data line, and a first pixel electrode electrically connected to the first active component . The first pixel electrode has a plurality of first strips. The second substrate is located opposite to the first substrate. The counter electrode layer and the liquid crystal layer are disposed between the first and second substrates. The counter electrode layer is disposed on the second substrate. The liquid crystal layer has a thickness d and includes a liquid crystal composition, and the liquid crystal display panel conforms to the formula (1): Formula (1), wherein 320 nm ≦(Δn.d) ≦ 350 nm, K ₁₁ is an expansion elastic coefficient, Δ ε is a dielectric constant anisotropy, and Δn is optical anisotropy.

Description

LCD panel

The present invention relates to a display panel, and more particularly to a liquid crystal display panel.

Flat display panels with superior characteristics such as no radiation and high image quality have become the mainstream in the market. Common flat panel displays include liquid crystal displays (LCDs), plasma displays, organic electroluminescent displays, and the like. Taking the most popular liquid crystal display as an example, the liquid crystal display is composed of a display medium sandwiched between two substrates. In a liquid crystal display, a field generating electrode such as a pixel electrode and a common electrode is formed on a substrate thereof, and a liquid crystal layer is disposed between the two display panels. In the liquid crystal display, an electric field is generated on the liquid crystal layer by applying a voltage to the field generating electrode, and the orientation of the liquid crystal molecules of the liquid crystal layer and the polarization of the incident light are determined by the generated electric field, thereby displaying a pattern.

For example, the LCD can form a plurality of liquid crystal molecules of different orientation directions in one pixel by inverting the liquid crystal in a direction of the strip electrode by forming only the strip electrode microstructure on one pixel electrode. The area, which in turn forms a wide viewing angle. However, in the above-described manner in which the liquid crystal is used to form a microstructured branch electrode in the pixel electrode, the liquid crystal molecules are slightly twisted or tilted due to the electric field at the edge of the electrode, so that the liquid crystal display is relatively low in resolution. Liquid crystal efficiency and display quality. However, by reducing the thickness d of the liquid crystal layer between the two substrates, the dispersion phenomenon of the liquid crystal corresponding to different wavelengths can be alleviated, which will cause the light transmittance to deteriorate. Therefore, how to optimize the display quality of the liquid crystal display at high resolution and improve the light transmittance is one of the topics that the researcher wants to solve.

The invention provides a liquid crystal display panel which can effectively improve the light transmittance in addition to improving the liquid crystal efficiency and display quality of the liquid crystal display.

The present invention provides a liquid crystal display panel including a first substrate, a scan line, a data line, a pixel structure, a counter electrode layer, a liquid crystal layer, and a second substrate. The scan line, the data line and the pixel structure are located on the first substrate, and each pixel structure comprises a first active component and a first pixel electrode. The first active component is electrically connected to one of the scan lines and one of the data lines. The first pixel electrode is electrically connected to the first active element and has a plurality of first strips. The second substrate is located opposite to the first substrate. The opposite electrode layer is disposed on the second substrate and located between the first substrate and the second substrate. The liquid crystal layer is disposed between the first substrate and the second substrate and has a thickness d. Wherein the crystal layer comprises a liquid crystal composition, and the liquid crystal display panel conforms to the following formula (1): Formula (1), wherein 320 nm ≦(Δn.d) ≦ 350 nm, k ₁₁ is the expansion elastic coefficient, Δ ε is the dielectric constant anisotropy, and Δn is the optical anisotropy.

Based on the above, the liquid crystal display panel of the present invention achieves better display quality and fast response time by adjusting the specific properties of the liquid crystal composition and adjusting the thickness of the liquid crystal layer, and is matched with the design of the specific pixel structure satisfying the above formula (1). It can effectively improve the light transmittance of the liquid crystal display panel.

The above described features and advantages of the invention will be apparent from the following description.

1 is a schematic cross-sectional view of a liquid crystal display panel 10 in accordance with an embodiment of the present invention. 2 is a circuit diagram of an active device layer in the liquid crystal display panel of FIG. 1. Referring to FIG. 1 , the liquid crystal display panel 10 includes a first substrate 100 , a second substrate 200 , an active device array layer 300 , a counter electrode layer 400 , a first alignment layer 502 , a second alignment layer 504 , and a liquid crystal layer 600 .

The material of the first substrate 100 may be glass, quartz, organic polymer, or an opaque/reflective material (for example, conductive material, metal, wafer, ceramic, or other applicable materials), or other applicable. The material of the invention is not limited thereto. If a conductive material or metal is used, the substrate 100 is covered with an insulating layer (not shown) to avoid short circuit problems. The first substrate 100 includes an active device array layer 300 as shown in FIG.

As described above, the active device array layer 300 is located on the first substrate 100. Referring first to FIG. 2, the active device array layer 300 includes a plurality of scan lines SL1 SLSLn, a plurality of data lines DL1 DLDLn, and a plurality of pixel structures P. The scan lines SL1 - SLn and the data lines DL1 - DLn are alternately arranged with each other, and each pixel structure P is electrically connected to one of the corresponding scan lines SL1 - SLn and one of the corresponding data lines DL1 - DLn. In the present embodiment, the plurality of pixel structures P are formed by interlacing the scan lines SL1 to SLn and the data lines DL1 to DLn, but are not limited thereto. In the embodiment of the present invention, the extending direction of the scanning lines SL1 to SLn is not parallel to the extending direction of the data lines DL1 to DLn. Preferably, the extending direction of the scanning lines SL1 to SLn is perpendicular to the extending direction of the data lines DL1 to DLn. Based on the conductivity considerations, an insulating layer is interposed between the scanning lines SL1 to SLn and the data lines DL1 to DLn. The scan lines SL1 to SLn and the data lines DL1 to DLn are generally made of a metal material. However, the present invention is not limited thereto, and according to other embodiments, other conductive materials may be used for the scan lines SL1 to SLn and the data lines DL1 to DLn. For example: alloys, nitrides of metallic materials, oxides of metallic materials, oxynitrides of metallic materials, or other suitable materials), or stacked layers of metallic materials and other electrically conductive materials. More specifically, each pixel structure P includes a first active device T1 and a first pixel electrode PE1, wherein the first active device T1 is electrically connected to one of the scan lines SL1 SLSLn and the data lines DL1 DL DLn One of the first pixel electrodes PE1 is electrically connected to the first active device T1. Further, the detailed structure of the pixel structure P of the active device array layer 300 will be explained in the subsequent paragraphs.

Referring to FIG. 1 again, the second substrate 200 is disposed on the opposite side of the first substrate 100. The material of the second substrate 200 may be glass, quartz, organic polymer, or an opaque/reflective material (for example, conductive material, metal, wafer, ceramic, or other applicable material), or other applicable. The material of the invention is not limited thereto. Specifically, the material of the second substrate 200 may be the same as or different from the material of the first substrate 100. In addition, in order to enable the liquid crystal display panel 100 to exhibit a colorful display effect, the first substrate 100 or the second substrate 200 may have a color filter layer (not shown) including red, green, and blue filters. pattern. That is, the second substrate 200 may be a color filter substrate or the first substrate 100 may be a color filter layer formed on a pixel array (Color filter on Array (COA) or a pixel array formed on a color filter layer. Array on Color filter (AOC) design. In addition, the liquid crystal display panel 10 may further include a light shielding pattern layer (also referred to as a black matrix, not shown) on the second substrate 200 or the first substrate 100, and disposed between the filter patterns of the color filter array.

The counter electrode layer 400 is disposed on the second substrate 200, and the counter electrode layer 400 is located between the first substrate 100 and the second substrate 200. The counter electrode layer 400 is a transparent conductive layer made of a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable oxidation. Or a stacked layer of at least two of the above. In the present embodiment, the counter electrode layer 400 is entirely covered on the second substrate 200, but the present invention is not limited thereto. In an embodiment, the counter electrode layer 400 is patterned and disposed on the second substrate 200. In the present embodiment, the counter electrode layer 400 is connected to a common voltage (Vcom), and when a voltage different from the common voltage is applied to the active device array layer 300, the active device array layer 300 and the counter electrode layer 400 A vertical electric field is generated to drive the liquid crystal composition in the liquid crystal layer 600 between the active device array layer 300 and the counter electrode layer 400.

The first alignment layer 502 is disposed on the active device array layer 300 to align the liquid crystal layer 600. On the other hand, the second alignment layer 504 is disposed on the counter electrode layer 400 to align the liquid crystal layer 600. The first alignment layer 502 and the second alignment layer 504 are, for example, organic materials, and the liquid crystal layer 600 may be aligned by a contact or non-contact alignment. In the present embodiment, the first alignment layer 502 and the second alignment layer 504 do not need to undergo a rubbing process.

The liquid crystal layer 600 is located between the first substrate 100 and the second substrate 200. Further, the liquid crystal layer 600 is located between the active device array layer 300 and the counter electrode layer 400, and is located between the first alignment layer 502 and the second alignment layer 504. On the other hand, the thickness of the liquid crystal layer 600 is d, wherein the thickness d is between 3.00 micrometers (μm) and 3.50 micrometers. Further, the liquid crystal layer 600 has a liquid crystal composition. In the present embodiment, the liquid crystal display panel 10 is a liquid crystal display panel using Polymer-Stabilized Alignment (PSA) technology, and therefore the liquid crystal composition in the liquid crystal layer 600 contains not only liquid crystal molecules which are essential components but also liquid crystal molecules which are essential components. Also included are reactive monomer compounds. In other words, when the liquid crystal display panel has not been subjected to the illumination process of the reactive monomer compound, the liquid crystal composition in the liquid crystal layer 600 contains liquid crystal molecules and a reactive monomer compound. When the liquid crystal display panel performs the illumination process of the monomer compound, the reactive monomer compound undergoes polymerization to form a polymer film on the surface of the active device array layer 300. Therefore, after the liquid crystal display panel is subjected to the illumination process of the reactive monomer compound, the liquid crystal composition in the liquid crystal layer 600 is mainly liquid crystal molecules.

In the present embodiment, the liquid crystal molecules of the liquid crystal composition in the liquid crystal layer 600 are, for example, at least one compound selected from the group consisting of the compounds represented by the chemical formula (1) as the first component described below, and as the second The component is at least one compound selected from the group consisting of compounds represented by the chemical formula (2).

Chemical formula (1)

In the chemical formula (1), Y ¹ and Y ² are each independently -CH=CH 2 (vinyl), -CH=CHCH ₃ , -CH=CHF, -CH=CF ₂ , and an alkyl group having 1 to 6 carbon atoms. For example, propyl (propyl), hexyl (hexyl), alkoxy groups having a carbon number of 1 to 6, such as ethoxyl (ethoxy) or methoxyl (methoxy); ring A and ring B are each independently 1,4- Cyclohexylene or 1,4-phenylene; m and n are each independently an integer from 0 to 3, m+n≧2.

In the chemical formula (2), Y ³ is an alkyl group having a carbon number of 1 to 6, such as -CH ₃ (methyl), -C ₂ H ₅ (ethyl), -C ₃ H ₇ (propyl) ), -C ₄ H ₉ (butyl), -C ₅ H ₁₁ (pentyl) or -C ₆ H ₁₂ (hexyl); Y ⁴ is an alkoxy group having a carbon number of 1 to 4 or a carbon number of 1 to An alkyl group of 4, for example, -OCH ₃ (methoxy), -OC ₂ H ₅ (ethoxy), -OC ₃ H ₇ (propoxy), -OC ₄ H ₉ (butoxy), -CH ₃ (methyl), -C ₂ H ₅ (ethyl), -C ₃ H ₇ (propyl) or -C _4H9 (butyl); Z is a single bond, -C ₂ H ₄ -, -COO-, -OCO- or -CH=CH-; ring C and ring D are each independently 1,4-cyclohexylene or 1,4-phenylene; R is F (fluorine), Cl (chlorine), Br (bromine) , CF ₃ (trifluoromethyl) or CN (cyano); p and q are each independently an integer from 0 to 3, p + q ≧ 1, r is an integer from 0 to 4, and when r ≧ 2, R is each Can be the same or different.

Fig. 3 is a graph showing the relationship between the ratio of (K ₁₁ / Δε) and the ratio of (Δn.d) of the liquid crystal display panel of the embodiment of the present invention. It is to be noted that the present invention does not particularly limit the composition of the liquid crystal composition in the liquid crystal layer 600, but the liquid crystal display panel 10 of the present embodiment must conform to the following formula (1): In the formula (1), K ₁₁ is the expansion elastic modulus of the liquid crystal composition in the liquid crystal layer 600, Δn is the optical anisotropy of the liquid crystal composition in the liquid crystal layer 600, and Δε is the liquid crystal in the liquid crystal layer 600. The dielectric constant anisotropy of the composition and d are the thickness of the liquid crystal layer 600, and (Δn.d) is equal to or greater than 320 nm (nm) and less than or equal to 350 nm. As can be seen from Fig. 3, when the value of (Δn.d) falls within 320 nm Δ(Δn.d) ≦350 nm, there is indeed an inverse linear relationship between the (K ₁₁ /Δε) ratio and the (Δn.d) value. Further, the liquid crystal composition in the liquid crystal layer 600 is a negative liquid crystal whose dielectric constant anisotropy Δ ε is less than 0 (that is, a negative value).

The Splay deformation of the liquid crystal molecules in the liquid crystal layer 600 is determined by the ratio of |K ₁₁ /Δε| and the electric field applied to the liquid crystal layer 600. When the liquid crystal display panel uses a low (Δn.d) value, in addition to improving the color shift of the liquid crystal display panel and the yellowing of the large viewing angle, the reaction time of the liquid crystal display panel can be reduced at the same time. However, since the thickness d of the liquid crystal layer 600 becomes small by using a low (Δn.d) value, the fringe electric field effect E _ff generated by the electric field applied to the liquid crystal layer 600 is relatively increased, resulting in a liquid crystal layer in the liquid crystal display panel. The expansion shape of the liquid crystal molecules of 600 is severely changed, and the light transmittance is lowered. Further, when the liquid crystal display panel has a high ratio of |K ₁₁ /Δε|, the liquid crystal molecules in the liquid crystal layer 600 are less likely to be deformed. Therefore, when the liquid crystal display panel 10 of the present embodiment satisfies the condition of the above formula (1), the color shift can be simultaneously solved, the reaction time can be improved, and the light transmittance can be improved.

In order to prove that the design of the liquid crystal display panel of the present embodiment does have a better light transmittance, experiments were carried out under several experimental conditions for verification. Figure 4 is a graph showing the transmittance-voltage curve of a liquid crystal display panel measured under different experimental conditions. In detail, Table 1 below lists the experimental conditions of each sample of the liquid crystal display panel in FIG. Table 1

Please refer to FIG. 4 and Table 1 at the same time, taking sample A-1 and sample A-2 as examples, and having the same liquid crystal composition as compared with the liquid crystal display panel of sample A-2 (having a high (Δn.d) value. The liquid crystal display panel of Sample A-1 (having a low (Δn.d) value) has a poor light transmittance when the measured voltage value is 7.5 volts (V). Similarly, taking sample B-1 and sample B-2 as an example, the same liquid crystal composition is also used, compared to the liquid crystal display panel of sample B-2 (having a high (Δn.d) value), the voltage value is measured. At 7.5 volts (V), the liquid crystal display panel of sample B-1 (having a low (Δn.d) value) has a poor light transmittance. From this, it is understood that lowering the value of (Δn.d) improves the reaction time and improves the display quality, but causes deterioration of the light transmittance. In addition, when the (Δn.d) value is about 325-326 nm and the measured voltage value is 7.5 volts (V), the liquid transmittance of the liquid crystal display panel of the sample B-1 is higher than that of the liquid crystal display panel of the sample A-1. Light penetration rate. When the (Δn.d) value is about 348-349 nm and the measured voltage value is 7.5 volts (V), the light transmittance of the liquid crystal display panel of the sample B-2 is higher than that of the liquid crystal display panel of the sample A-2. Penetration rate. In other words, when a similar (Δn.d) value, compared with low | K ₁₁ / Δε | ratio of the liquid crystal display panel having a high | K ₁₁ / Δε | ratio of the liquid crystal display panel does have a high light Penetration rate. Wherein, when the measured voltage value is 7.5 volts (V), it can be further seen from FIG. 4 that for a liquid crystal display panel having a low (Δn.d) value (sample A-1 and sample B-1), |K ₁₁ The effect of the ratio of /Δε| on the light transmittance is more pronounced. Specifically, when the value of (Δn.d) is about 325-326 nm, the light transmittance of the liquid crystal display panel of the sample B-1 is improved by about 3.74 with respect to the light transmittance of the liquid crystal display panel of the sample A-1. %. As described above, when the liquid crystal display panel 10 of the present embodiment satisfies the condition of the above formula (1), in addition to solving the color shift and improving the reaction time, the expansion deformation of the liquid crystal molecules in the liquid crystal layer 600 can be balanced, and further When driven, a better arrangement is provided, so that the light transmittance of the liquid crystal display panel 10 can be improved.

FIG. 5 is an enlarged top plan view of the pixel structure P in the active device layer 300 of FIG. 2. The pixel structure P of the active device array layer 300 will be explained in detail below. Referring to FIG. 5, each pixel structure P includes a first active element T1 and a first pixel electrode PE1. The first active device T1 includes a first gate G1, a first channel layer CH1, a first source S1, and a first drain D1. In this embodiment, the first active device T1 is electrically connected to the corresponding scan line (exemplified by the scan line SL1) and the corresponding data line (exemplified by the data line DL1). Specifically, the first gate G1 is electrically connected to the scan line SL1. The first channel layer CH1 is located above the first gate G1. The first source S1 and the first drain D1 are located above the first channel layer CH1, and the first source S1 is electrically connected to the data line DL1. In the present embodiment, the first active device T1 is exemplified by a bottom gate type thin film transistor, but the present invention is not limited thereto. In other embodiments, the first active device T1 may also be a top gate type thin film transistor. In addition, the first pixel electrode PE1 is electrically connected to the first drain D1 of the first active device T1 via the first contact window C1. The first gate G1, the first source S1, and the first drain D1 are, for example, metal materials, but are not limited thereto. On the other hand, the material of the first channel CH1 may be selected from amorphous germanium, polycrystalline germanium or an oxide semiconductor material (for example, Indium-Gallium-Zinc Oxide (IGZO), zinc oxide (ZnO), tin oxide ( SnO), Indium-Zinc Oxide (IZO), Gallium-Zinc Oxide (GZO), Zinc-Tin Oxide (ZTO) or Indium-Tin Oxide (ITO) ), but the invention is not limited thereto. In addition to this, the pixel structure P may further include a common electrode line (not shown) connected to the common voltage (Vcom). The common electrode line CL is, for example, the same film layer as the data line DL1 or the scan line DL1, wherein the common electrode line overlaps with the first pixel electrode PE1 to form a storage capacitor (not shown).

The first pixel electrode PE1 has a first body portion 700 and a plurality of first strip portions 702 connected to the first body portion 700. The first strip portion 702 is extended by the first body portion 700 in four directions. In other words, the first strip 702 extends from the first body portion 700 to the periphery of the first pixel electrode PE1 to form a fishbone pattern and defines four domain regions. On the other hand, a first slit 704 is defined between the adjacent two first strips 702.

FIG. 6 is an enlarged top plan view showing a partial area A in the pixel structure P of FIG. 5. Referring to FIG. 6, the first strip 702 has a first line width L1, and the first slit 704 has a first slit width S1. In other words, a first slit 704 is defined between the two adjacent first strips 702. In the present embodiment, the distance between the center points of the two adjacent first strips 702 defines a first pitch P1. That is, the first pitch P1 may be equal to the sum of the first line width L1 of the first strip 702 and the first slit width S1 of the first slit 704, wherein the first pitch P1 is between 4 micrometers and 10 micrometers. . In addition, the first pixel electrode PE1 has a first line width/pitch ratio (L1/P1), and the first line width/pitch ratio (L1/P1) conforms to the following formula (2): Formula (2).

7A to 7F are views showing a liquid crystal reverse distribution of a change in transmittance of a liquid crystal display panel with respect to a first pitch according to an embodiment of the present invention. Specifically, the liquid crystal display panels of FIGS. 7A to 7F have the same |K ₁₁ /Δε| ratio (about 4.33) and the same (Δn.d) value (about 340 nm). The first pitch P1 of the liquid crystal display panel of FIGS. 7A to 7F is 4 micrometers, 6 micrometers, 7 micrometers, 8 micrometers, 10 micrometers, and 12 micrometers, respectively. In each of the experimental examples, a same operating voltage was applied to the display panel of each experimental example, so that the upper and lower electrode layers (for example, the counter electrode layer and the first pixel electrode) in the display panel of each experimental example were used. There is a consistent voltage difference between them. Comparing the liquid crystal reverse distribution patterns of the liquid crystal display panels of FIGS. 7A to 7F with the same voltage difference; compared with the liquid crystal display panels of FIGS. 7A, 7E and 7F, the liquid crystal display of FIGS. 7B to 7D The panel does improve the reverse instability of the liquid crystal and has a better light transmittance.

8A to 8F are views showing a liquid crystal reverse distribution of a change in transmittance of a liquid crystal display panel to a first portion pitch according to another embodiment of the present invention. Specifically, the liquid crystal display panels of FIGS. 8A to 8F have the same |K ₁₁ /Δε| ratio (about 4.93) and the same (Δn.d) value (about 340 nm). The first pitch P1 of the liquid crystal display panel of FIGS. 8A to 8F is 4 micrometers, 6 micrometers, 7 micrometers, 8 micrometers, 10 micrometers, and 12 micrometers, respectively. In each of the experimental examples, a same operating voltage was applied to the display panel of each experimental example, so that the upper and lower electrode layers (for example, the counter electrode layer and the first pixel electrode) in the display panel of each experimental example were used. There is a consistent voltage difference between them. Comparing the liquid crystal reverse distribution patterns of the liquid crystal display panels of FIGS. 8A to 8F with the same voltage difference; compared with the liquid crystal display panels of FIGS. 8A, 8E and 8F, the liquid crystal display of FIGS. 8B to 8D The panel does improve the reverse instability of the liquid crystal and has a better light transmittance.

9A to 9F are views showing a liquid crystal reverse distribution of a change in transmittance of a liquid crystal display panel to a first portion pitch according to another embodiment of the present invention. Specifically, the liquid crystal display panels of FIGS. 9A to 9F have the same |K ₁₁ /Δε| ratio (about 5.17) and the same (Δn.d) value (about 340 nm). The first pitch P1 of the liquid crystal display panel of FIGS. 9A to 9F is 4 micrometers, 6 micrometers, 7 micrometers, 8 micrometers, 10 micrometers, and 12 micrometers, respectively. In each of the experimental examples, a same operating voltage was applied to the display panel of each experimental example, so that the upper and lower electrode layers (for example, the counter electrode layer and the first pixel electrode) in the display panel of each experimental example were used. There is a consistent voltage difference between them. Comparing the liquid crystal reverse distribution patterns of the liquid crystal display panels of FIGS. 9A to 9F with the same voltage difference; compared with the liquid crystal display panels of FIGS. 9A, 9E and 9F, the liquid crystal display of FIGS. 9B to 9D The panel does improve the reverse instability of the liquid crystal and has a better light transmittance.

As described above, when the pixel electrode of the liquid crystal display panel of the embodiment of the present invention has the first pitch P1 of between 4 μm and 10 μm, the light transmittance of the liquid crystal display panel can be effectively improved.

10A to 10F are views showing a liquid crystal reverse distribution of a transmittance of a liquid crystal display panel according to an embodiment of the present invention with respect to a change in a first line width/pitch ratio. Specifically, the liquid crystal display panels of FIGS. 10A to 10F have the same |K ₁₁ /Δε| ratio (about 4.33) and the same (Δn.d) value (about 340 nm). The first line width/pitch ratio (L1/P1) of the liquid crystal display panel of FIGS. 10A to 10F is 75%, 67%, 58%, 50%, 42%, and 33%, respectively. In each of the experimental examples, a same operating voltage was applied to the display panel of each experimental example, so that the upper and lower electrode layers (for example, the counter electrode layer and the first pixel electrode) in the display panel of each experimental example were used. There is a consistent voltage difference between them. Comparing the liquid crystal reverse distribution patterns of the liquid crystal display panels of FIGS. 10A to 10F with the same voltage difference; compared with the liquid crystal display panel of FIG. 10A, the liquid crystal display panels of FIGS. 10B to 10F can actually improve the liquid crystal display. It has a better light transmittance to the phenomenon of instability.

11A to 11F are views showing a liquid crystal reverse distribution of a transmittance of a liquid crystal display panel to a first line width/pitch ratio according to another embodiment of the present invention. Specifically, the liquid crystal display panels of FIGS. 11A to 11F have the same |K ₁₁ /Δε| ratio (about 4.93) and the same (Δn.d) value (about 340 nm). The first line width/pitch ratio (L1/P1) of the liquid crystal display panel of FIGS. 11A to 11F is 75%, 67%, 58%, 50%, 42%, and 33%, respectively. In each of the experimental examples, a same operating voltage was applied to the display panel of each experimental example, so that the upper and lower electrode layers (for example, the counter electrode layer and the first pixel electrode) in the display panel of each experimental example were used. There is a consistent voltage difference between them. Comparing the liquid crystal reverse distribution patterns of the liquid crystal display panels of FIGS. 11A to 11F with the same voltage difference; compared with the liquid crystal display panel of FIG. 11A, the liquid crystal display panels of FIGS. 11B to 11F can actually improve the liquid crystal display. It has a better light transmittance to the phenomenon of instability.

12A to 12F are views showing a liquid crystal reverse distribution of a transmittance of a liquid crystal display panel to a first line width/pitch ratio according to another embodiment of the present invention. Specifically, the liquid crystal display panels of FIGS. 12A to 12F have the same |K ₁₂ /Δε| ratio (about 5.17) and the same (Δn.d) value (about 340 nm). The first line width/pitch ratio (L1/P1) of the liquid crystal display panel of FIGS. 12A to 12F is 75%, 67%, 58%, 50%, 42%, and 33%, respectively. In each of the experimental examples, a same operating voltage was applied to the display panel of each experimental example, so that the upper and lower electrode layers (for example, the counter electrode layer and the first pixel electrode) in the display panel of each experimental example were used. There is a consistent voltage difference between them. Comparing the liquid crystal reverse distribution patterns of the liquid crystal display panels of FIGS. 12A to 12F with the same voltage difference; compared with the liquid crystal display panel of FIG. 12A, the liquid crystal display panels of FIGS. 12B to 12F can actually improve the liquid crystal display. It has a better light transmittance to the phenomenon of instability.

As described above, when the first line width/pitch ratio (L1/P1) of the liquid crystal display panel of the embodiment of the present invention satisfies the condition of the above formula (2), the light penetration of the liquid crystal display panel can be effectively improved. rate.

Figure 13 is an enlarged top plan view of a pixel structure P in accordance with another embodiment of the present invention. The pixel structure P of the present embodiment is similar to the embodiment of FIG. 5, and therefore the same elements are denoted by the same reference numerals and the description is not repeated. The difference between the embodiment and the embodiment of FIG. 5 is that the pixel structure P of the embodiment further includes the second active element T2 and the second pixel electrode PE2. The second active device T2 includes a second gate G2, a second channel layer CH2, a second source S2, and a second drain D2.

Referring to FIG. 13, in the embodiment, the second active device T2 is electrically connected to the corresponding scan line SL1 and the corresponding data line DL2. Specifically, the second gate G2 is electrically connected to the scan line SL1. The second channel layer CH2 is located above the second gate G2. The second source S2 and the second drain D2 are located above the second channel layer CH2, and the second source S2 is electrically connected to the data line DL2. In other words, in the present embodiment, the first active device T1 and the second active device T2 are connected to the same scan line SL1, so that the first gate G1 and the second gate G2 are also electrically connected. The material of each component in the second active component T2 may be the same as or different from the material of each component in the first active component T1, and the invention is not particularly limited. In addition, the second pixel electrode PE2 is electrically connected to the second drain D2 of the second active device T2 via the second contact window C2. On the other hand, the pixel structure P may further include a common electrode line (not shown) connected to the common voltage (Vcom). The common electrode line overlaps the first pixel electrode PE1 and the second pixel electrode PE2 to form a storage capacitor.

Similar to the first pixel electrode PE1, the second pixel electrode PE2 also has a second body portion 710 and a plurality of second strip portions 706 connected to the second body portion 710. The second strip 706 is extended by the second body portion 710 in four directions. In other words, the second strip 706 extends from the second body portion 710 to the periphery of the second pixel electrode PE2 to form a fishbone pattern and defines four alignment regions. Therefore, in the pixel structure P of the present embodiment, the first pixel electrode PE1 and the second pixel electrode PE2 define a total of eight alignment regions. In addition to this, a second slit 708 is defined between the adjacent two second strips 706.

Fig. 14 is an enlarged top plan view showing a partial region B in the pixel structure of Fig. 13. Referring to FIG. 14, similar to the embodiment of FIG. 6, the second strip 706 has a second line width L2, and the second slit 708 has a second slit width S2. In other words, a second slit 708 is defined between the two adjacent second strips 706. In the present embodiment, the distance between the center points of the two adjacent second strips 706 defines a second pitch P2. That is, a second pitch P2 will be equal to the sum of the second line width L2 of one second strip 706 and the second slit width S2 of a second slit 708, wherein the second pitch P2 is between 4 microns Up to 10 microns. In addition, the second pixel electrode PE2 has a second line width/pitch ratio (L2/P2), and the second line width/pitch ratio (L2/P2) conforms to the following formula (3): Formula (3).

It is noted that the second line width L2, the second slit width S2, and the second pitch P2 of the second pixel electrode PE2 in the second active device T2 are respectively the first picture in the first active device T1. The first line width L1, the first slit width S1, and the first pitch P1 of the element electrode PE1 have the same definition, and thus the display screen corresponding to the second pixel electrode PE2 and the display screen corresponding to the first pixel electrode PE1 have The same display quality performance can achieve better light transmittance.

In summary, the liquid crystal display panel of the present invention achieves better display quality and fast response time by adjusting the specific properties of the liquid crystal composition and adjusting the thickness of the liquid crystal layer, and is matched with the specific pixel structure satisfying the above formula (1). The design can effectively improve the light transmittance of the liquid crystal display panel. And the first pixel electrode of the liquid crystal display panel of the embodiment of the present invention has a first pitch P1 of between 4 micrometers and 10 micrometers and/or a first line width/pitch ratio (L1/P1) conforming to the above formula. The condition of (2) can effectively increase the light transmittance of the liquid crystal display panel. In addition, the liquid crystal display panel of the embodiment of the present invention has a second pixel electrode, and the second pixel electrode has a second pitch P2 of between 4 micrometers and 10 micrometers and/or a second line width/ When the pitch ratio (L2/P2) satisfies the condition of the above formula (3), the light transmittance of the liquid crystal display panel can be effectively improved.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

10‧‧‧LCD panel

100‧‧‧First substrate

200‧‧‧second substrate

300‧‧‧Active component array layer

400‧‧‧ opposite electrode

502‧‧‧First alignment layer

504‧‧‧Second alignment layer

600‧‧‧Liquid layer

SL1~SLn‧‧‧ scan line

DL1~DLn‧‧‧ data line

P‧‧‧ pixel structure

T1‧‧‧ first active component

T2‧‧‧second active component

G1‧‧‧ first gate

G2‧‧‧second gate

CH1‧‧‧ first channel layer

CH2‧‧‧Second channel layer

S1‧‧‧first source

S2‧‧‧Second source

D1‧‧‧First bungee

D2‧‧‧second bungee

C1‧‧‧ first contact window

C2‧‧‧second contact window

PE1‧‧‧ first pixel electrode

PE2‧‧‧second pixel electrode

700‧‧‧First Main Body

702‧‧‧ first article

704‧‧‧first slit

706‧‧‧Second section

708‧‧‧Second slit

710‧‧‧Second Main Body

D‧‧‧thickness

L1‧‧‧first line width

L2‧‧‧ second line width

P1‧‧‧ first spacing

P2‧‧‧Second spacing

S1‧‧‧ first slit

S2‧‧‧Second slit

A, B‧‧‧ area

A-1, A-2, B-1, B-2‧‧‧ curves

1 is a cross-sectional view of a liquid crystal display panel in accordance with an embodiment of the present invention. 2 is a circuit diagram of an active device layer in the liquid crystal display panel of FIG. 1. Fig. 3 is a graph showing the relationship between the ratio of (K ₁₁ / Δε _{) and the} value of (Δn.d) of the liquid crystal display panel of the embodiment of the present invention. Figure 4 is a graph showing the transmittance-voltage curve of a liquid crystal display panel measured under different experimental conditions. FIG. 5 is an enlarged top plan view of a pixel structure in the active device layer of FIG. 2. FIG. Figure 6 is an enlarged top plan view of a portion of the pixel structure of Figure 5. 7A to 7F are views showing a liquid crystal reverse distribution of a change in transmittance of a liquid crystal display panel with respect to a first pitch according to an embodiment of the present invention. 8A to 8F are views showing a liquid crystal reverse distribution of a change in transmittance of a liquid crystal display panel with respect to a first pitch according to another embodiment of the present invention. 9A to 9F are views showing a liquid crystal reverse distribution of a change in transmittance of a liquid crystal display panel with respect to a first pitch according to another embodiment of the present invention. 10A to 10F are views showing a liquid crystal reverse distribution of a transmittance of a liquid crystal display panel to a first line width/pitch ratio according to another embodiment of the present invention. 11A to 11F are views showing a liquid crystal reverse distribution of a transmittance of a liquid crystal display panel to a first line width/pitch ratio according to another embodiment of the present invention. 12A to 12F are views showing a liquid crystal reverse distribution of a transmittance of a liquid crystal display panel to a first line width/pitch ratio according to another embodiment of the present invention. Figure 13 is an enlarged top plan view of a pixel structure in accordance with another embodiment of the present invention. Figure 14 is an enlarged top plan view showing a partial region of the pixel structure of Figure 13;

Claims (8)

A liquid crystal display panel includes: a first substrate; a plurality of scan lines and a plurality of data lines on the first substrate; and a plurality of pixel structures on the first substrate, wherein each pixel structure comprises: a first active component electrically connected to one of the scan lines and one of the data lines; and a first pixel electrode electrically connected to the first active component, the first pixel electrode Having a plurality of first strips; a second substrate located opposite the first substrate; a pair of electrode layers disposed on the second substrate and located between the first substrate and the second substrate And a liquid crystal layer disposed between the first substrate and the second substrate, wherein the liquid crystal layer has a thickness d between the first substrate and the second substrate, and the liquid crystal layer comprises a liquid crystal composition , wherein the liquid crystal display panel conforms to the following formula (1): Wherein 320 nm △ (Δn.d) ≦ 340 nm, k11 is the expansion modulus of the liquid crystal composition, Δ ε is the dielectric constant anisotropy of the liquid crystal composition, and Δn is the liquid crystal composition Optical anisotropy, and There is an inverse linear relationship between the value and the value of (Δ n . d ). The liquid crystal display panel of claim 1, further comprising: a first alignment layer disposed between the pixel structure and the liquid crystal layer; and a second alignment layer disposed on the opposite electrode layer And between the liquid crystal layers. The liquid crystal display panel of claim 1, wherein a first slit is defined between the two adjacent first strips, wherein the first strips have a first line width L1, the first slits have a first slit width S1, the first strips have a first pitch P1 therebetween, and P1=L1+S1, wherein the first pitch P1 is between 4 micrometers Between 10 microns. The liquid crystal display panel of claim 1, wherein a first slit is defined between the two adjacent first strips, wherein the first strips have a first line width L1, the first slits have a first slit width S1, the first strips have a first pitch P1 therebetween, and P1=L1+S1, and the first pixel electrode has a first A line width/pitch ratio (L1/P1), and the first line width/pitch ratio (L1/P1) conforms to the following formula (2): The liquid crystal display panel of claim 1, wherein the thickness d of the liquid crystal layer is between 3.00 micrometers and 3.50 micrometers. The liquid crystal display panel of claim 1, wherein each of the pixel structures further comprises: a second active component electrically connected to one of the scan lines and one of the data lines; a second pixel electrode electrically connected to the second active component, the second pixel electrode has a plurality of second strips, and a second is defined between the adjacent second strips a slit, wherein the second strips have a second line width L2, the second slits have a second slit width S2, and the second strips have a second pitch P2 therebetween. And P2 = L2 + S2. The liquid crystal display panel of claim 6, wherein the second pitch P2 is between 4 micrometers and 10 micrometers. The liquid crystal display panel of claim 6, wherein the second pixel electrode has a second line width/pitch ratio (L2/P2), and the second line width/pitch ratio (L2/P2) Comply with the following formula (3):