TWI648830B - Package structure and manufacturing method thereof - Google Patents
Package structure and manufacturing method thereof Download PDFInfo
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- TWI648830B TWI648830B TW106114549A TW106114549A TWI648830B TW I648830 B TWI648830 B TW I648830B TW 106114549 A TW106114549 A TW 106114549A TW 106114549 A TW106114549 A TW 106114549A TW I648830 B TWI648830 B TW I648830B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/81005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
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- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
一種封裝結構,其包括一重佈線路層、一晶片、一封裝膠體、一球底支撐層、一附著層及多個銲球。重佈線路層包括一第一表面、相對第一表面的一第二表面以及設置於第一表面的一圖案化線路層,其中圖案化線路層的一外表面與第一表面共平面。晶片設置於第二表面並電性連接圖案化線路層。封裝膠體設置於第二表面以包覆晶片。球底支撐層設置於第一表面上並包括多個開口,且開口暴露圖案化線路層的外表面。附著層覆蓋各開口的內壁以及被各開口所暴露的部分圖案化線路層。銲球分別設置於開口內並電性連接圖案化線路層。A packaging structure includes a redistribution circuit layer, a chip, an encapsulant, a ball-bottom support layer, an attachment layer, and a plurality of solder balls. The redistribution circuit layer includes a first surface, a second surface opposite to the first surface, and a patterned circuit layer disposed on the first surface, wherein an outer surface of the patterned circuit layer is coplanar with the first surface. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface to cover the wafer. The ball bottom support layer is disposed on the first surface and includes a plurality of openings, and the openings expose the outer surface of the patterned circuit layer. The adhesion layer covers the inner wall of each opening and the part of the patterned circuit layer exposed by each opening. The solder balls are respectively arranged in the openings and are electrically connected to the patterned circuit layer.
Description
本揭露是有關於一種封裝結構及其製作方法。This disclosure is about a packaging structure and its manufacturing method.
晶片封裝的目的在於保護裸露的晶片及提供晶片良好的散熱。當晶片的接點數不斷地增加,而晶片的面積卻越來越小的情況下,勢必難以將晶片所有的接點以面矩陣的方式重新分佈於晶片的表面,即使晶片表面容納得下所有的接點,也將造成接點之間的間距過小,而影響後續銲接銲球時的電性可靠度。The purpose of the chip package is to protect the bare chip and provide good heat dissipation of the chip. When the number of contacts on the wafer is increasing and the area of the wafer is getting smaller and smaller, it is difficult to redistribute all the contacts of the wafer on the surface of the wafer in a surface matrix, even if the wafer surface can accommodate all Of the contacts will also cause the spacing between the contacts to be too small, which will affect the electrical reliability of subsequent solder ball soldering.
因此,習知技術提出了可先利用封裝膠體封裝晶片來增加晶片的面積,其中晶片的主動表面與封裝膠體的底面暴露於外。之後,再於晶片的主動表面以及封裝膠體的底面上形成重佈線路層,並在重佈線路層的接點上分別形成銲球,來作為晶片與外界接點相電性連接的媒介。然而,此種方法由於封裝時易產生溢膠的現象,而導致封裝膠體延伸至晶片的部分主動表面上,污染晶片之主動面。Therefore, the conventional technology proposes that the chip can be encapsulated with encapsulant to increase the area of the chip, wherein the active surface of the chip and the bottom surface of the encapsulant are exposed. After that, a redistribution circuit layer is formed on the active surface of the chip and the bottom surface of the encapsulant, and solder balls are respectively formed on the contacts of the redistribution circuit layer as a medium for the electrical connection between the chip and the external contacts. However, this method is prone to overflowing during packaging, which causes the packaging gel to extend to a part of the active surface of the chip and contaminate the active surface of the chip.
目前業界正在研發先於載板上形成重佈線路層之後,再設置晶片於重佈線路層上,並利用封裝膠體封裝晶片之後再移除載板的做法。然而,移除載板後所暴露的重佈線路層為平面,植球後可能連接強度不足。At present, the industry is developing a method of forming a redistribution circuit layer on a carrier board first, and then setting a chip on the redistribution circuit layer, and encapsulating the chip with a packaging gel before removing the carrier board. However, the redistribution circuit layer exposed after the carrier board is removed is flat, and the connection strength may be insufficient after the ball is implanted.
本揭露實施例提供一種封裝結構及其製作方法,其可在先形成重佈線路層而後設置晶片的製作方法中對銲球提供結構支撐及對位。The disclosed embodiments provide a packaging structure and a manufacturing method thereof, which can provide structural support and alignment for solder balls in a manufacturing method in which a redistribution circuit layer is first formed and then a chip is provided.
本揭露實施例的封裝結構包括一重佈線路層、一晶片、一封裝膠體、一球底支撐層、一附著層及多個銲球。重佈線路層包括一第一表面、相對第一表面的一第二表面以及設置於第一表面的一圖案化線路層,其中圖案化線路層的一外表面與第一表面共平面。晶片設置於第二表面並電性連接圖案化線路層。封裝膠體設置於第二表面以包覆晶片。球底支撐層設置於第一表面上並包括多個開口,且開口暴露圖案化線路層的外表面。附著層覆蓋各開口的內壁以及被各開口所暴露的部分圖案化線路層。銲球分別設置於開口內並電性連接圖案化線路層。The package structure of the disclosed embodiment includes a redistribution circuit layer, a chip, an encapsulant, a ball-bottom support layer, an adhesion layer, and a plurality of solder balls. The redistribution circuit layer includes a first surface, a second surface opposite to the first surface, and a patterned circuit layer disposed on the first surface, wherein an outer surface of the patterned circuit layer is coplanar with the first surface. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface to cover the wafer. The ball bottom support layer is disposed on the first surface and includes a plurality of openings, and the openings expose the outer surface of the patterned circuit layer. The adhesion layer covers the inner wall of each opening and the part of the patterned circuit layer exposed by each opening. The solder balls are respectively arranged in the openings and are electrically connected to the patterned circuit layer.
本揭露實施例的封裝結構的製作方法包括下列步驟。形成一球底支撐層於一載板上。形成一重佈線路層於球底支撐層上,其中重佈線路層包括連接球底支撐層的一第一表面、相對第一表面的一第二表面以及內嵌於第一表面的一圖案化線路層,圖案化線路層的一外表面與第一表面共平面。設置一晶片於第二表面上,其中晶片電性連接圖案化線路層。形成一封裝膠體於第二表面以包覆晶片。移除載板並形成暴露圖案化線路層的多個開口於球底支撐層上。形成多個銲球於開口內,其中銲球電性連接圖案化線路層。The manufacturing method of the package structure of the disclosed embodiment includes the following steps. A ball-bottom supporting layer is formed on a carrier board. Forming a redistribution circuit layer on the ball bottom support layer, wherein the redistribution circuit layer includes a first surface connected to the ball bottom support layer, a second surface opposite to the first surface, and a patterned circuit embedded in the first surface Layer, an outer surface of the patterned circuit layer is coplanar with the first surface. A chip is disposed on the second surface, wherein the chip is electrically connected to the patterned circuit layer. An encapsulant is formed on the second surface to cover the wafer. The carrier board is removed and a plurality of openings exposing the patterned circuit layer are formed on the underlayer support layer. A plurality of solder balls are formed in the opening, wherein the solder balls are electrically connected to the patterned circuit layer.
基於上述,本揭露實施例的封裝結構及其製作方法是先在載板上形成球底支撐層再於其上形成重佈線路層,並可在之後移除載板時形成具有開口的球底支撐層。如此,在先形成重佈線路層而後設置晶片的製程下所形成的封裝結構得以具有球底支撐層,因而可對銲球提供結構支撐並可幫助銲球對位,提升封裝結構的可靠度。並且,附著層覆蓋開口的內壁以及被開口所暴露的部分圖案化線路層,因而可提升銲球與開口及圖案化線路層之間的連接強度。此外,球底支撐層可防止水氣進入封裝結構內,因而可增加封裝結構的阻擋水氣及/或抗氧化的能力。Based on the above, the package structure and the manufacturing method of the disclosed embodiment first form a ball bottom support layer on the carrier board and then form a redistribution circuit layer thereon, and can form a ball bottom with an opening when the carrier board is removed later Support layer. In this way, the package structure formed under the process of forming the redistribution circuit layer and then setting the chip can have a ball-bottom support layer, thus providing structural support for the solder balls and helping the solder balls to be aligned, improving the reliability of the package structure. Moreover, the adhesion layer covers the inner wall of the opening and the part of the patterned circuit layer exposed by the opening, so that the connection strength between the solder ball and the opening and the patterned circuit layer can be improved. In addition, the spherical bottom support layer can prevent moisture from entering the packaging structure, and thus can increase the capacity of the packaging structure to block moisture and / or anti-oxidation.
為讓本揭露能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the disclosure more comprehensible, the embodiments are specifically described below and described in detail in conjunction with the accompanying drawings.
有關本揭露實施例之前述及其他技術內容,在以下配合參考圖式之各實施例的詳細說明中,將可清楚的呈現。以下實施例中所提到的方向用語,例如:「上」、「下」、「前」、「後」、「左」、「右」等,僅是參考附加圖式的方向。因此,使用的方向用語是用來說明,而並非用來限制本揭露。並且,在下列各實施例中,相同或相似的元件將採用相同或相似的標號。The foregoing and other technical contents of the disclosed embodiments will be clearly presented in the following detailed description of the embodiments with reference to the drawings. Directional terms mentioned in the following embodiments, for example: "upper", "lower", "front", "rear", "left", "right", etc., are only for the directions referring to the attached drawings. Therefore, the terminology used is for illustration, not for limiting this disclosure. Moreover, in the following embodiments, the same or similar elements will use the same or similar reference numbers.
圖1至圖10是依照本揭露的一實施例的一種封裝結構的製作方法的流程剖面示意圖。本實施例的封裝結構的製作方法包括下列步驟。首先,請參照圖1,在本實施例中,可先形成多個突起110於載板105上,其中,任兩相鄰的突起110之間可維持一間距。在本實施例中,載板105可為玻璃載板、晶圓載板或不鏽鋼載板等,而突起110的材料則可包括聚醯亞胺(Polyimide, PI)、聚苯噁唑(Polybenzoxazole, PBO)、聚酸甲酯(Polymethylmethacrylate,PMMA)等,本揭露並不限定載板105及突起110的材料。1 to 10 are schematic flow cross-sectional views of a method for manufacturing a packaging structure according to an embodiment of the disclosure. The manufacturing method of the packaging structure of this embodiment includes the following steps. First, please refer to FIG. 1, in this embodiment, a plurality of protrusions 110 may be formed on the carrier board 105 first, wherein a distance between any two adjacent protrusions 110 may be maintained. In this embodiment, the carrier board 105 may be a glass carrier board, a wafer carrier board, or a stainless steel carrier board, etc., and the material of the protrusion 110 may include polyimide (Polyimide, PI), polybenzoxazole (Polybenzoxazole, PBO) ), Polymethylmethacrylate (PMMA), etc., the disclosure does not limit the materials of the carrier board 105 and the protrusion 110.
接著,請參照圖2,形成一離型層112於載板105上,其中,離型層112覆蓋突起110以及被突起110所暴露的載板105的表面。在本實施例中,離型層112可為選擇性地設置。也就是說,在其他實施例中亦可不設置離型層112。本揭露不限制離型層112的材料,只要載板105可透過離型層112而輕易與封裝結構脫離即可。Next, referring to FIG. 2, a release layer 112 is formed on the carrier board 105, wherein the release layer 112 covers the protrusion 110 and the surface of the carrier board 105 exposed by the protrusion 110. In this embodiment, the release layer 112 may be selectively provided. In other words, in other embodiments, the release layer 112 may not be provided. The disclosure does not limit the material of the release layer 112, as long as the carrier board 105 can easily separate from the packaging structure through the release layer 112.
接著,請參照圖3,形成球底支撐層120於載板105上。在本實施例中,球底支撐層120可填充於突起110之間,且球底支撐層120的上表面與突起110的上表面共平面,如此,突起110可在球底支撐層120上定義出多個開口122。在本實施例中,球底支撐層120的材料可包括有機高分子材料、無機高分子材料或有機無機混合材料。上述有機高分子材料可為聚亞醯胺(PI)、聚苯并噁唑(PBO)、苯環丁烯聚合物(BCB) 或其他適合的材料,無機高分子材料可為氧化矽(silicon oxide)、氮化矽(silicon nitride)、氧氮化矽(silicon oxynitride)、聚矽氧烷(polysiloxane)、聚矽氮烷(polysilazane)、聚矽氮氧烷(polysiloxazane)、聚碳矽烷(polycarbosilane)或其他適合的材料。並且,球底支撐層120的厚度約介於1微米(μm)至50微米之間,或者,球底支撐層120的厚度約可大於或等於各開口122的直徑的十分之一,以對之後形成的銲球160提供足夠的結構支撐並幫助銲球160的對位。Next, please refer to FIG. 3 to form the ball bottom support layer 120 on the carrier 105. In this embodiment, the ball bottom support layer 120 may be filled between the protrusions 110, and the upper surface of the ball bottom support layer 120 and the upper surface of the protrusion 110 are coplanar, so that the protrusions 110 may be defined on the ball bottom support layer 120出 Multiple opening 122. In this embodiment, the material of the spherical bottom support layer 120 may include an organic polymer material, an inorganic polymer material, or an organic-inorganic hybrid material. The organic polymer material can be polyimide (PI), polybenzoxazole (PBO), benzocyclobutene polymer (BCB) or other suitable materials, and the inorganic polymer material can be silicon oxide ), Silicon nitride (silicon nitride), silicon oxynitride, polysiloxane (polysiloxane), polysilazane (polysilazane), polysiloxazane (polysiloxazane), polycarbosilane (polycarbosilane) Or other suitable materials. Moreover, the thickness of the ball-bottom supporting layer 120 is approximately between 1 micrometer (μm) and 50 microns, or the thickness of the ball-bottom supporting layer 120 may be greater than or equal to one-tenth of the diameter of each opening 122. The solder balls 160 formed later provide sufficient structural support and assist in the alignment of the solder balls 160.
接著,請參照圖4至圖7,形成一重佈線路層130於球底支撐層120上。在本實施例中,重佈線路層130可如圖7所示之包括連接球底支撐層120的第一表面S1、相對第一表面S1的一第二表面S2以及內嵌於第一表面S1的一圖案化線路層132,圖案化線路層132的外表面與重佈線路層130的第一表面S1共平面。Next, please refer to FIG. 4 to FIG. 7 to form a redistribution circuit layer 130 on the ball bottom support layer 120. In this embodiment, the redistribution circuit layer 130 may include a first surface S1 connected to the ball bottom support layer 120, a second surface S2 opposite to the first surface S1, and embedded in the first surface S1 as shown in FIG. A patterned circuit layer 132, the outer surface of the patterned circuit layer 132 and the first surface S1 of the redistribution circuit layer 130 are coplanar.
詳細而言,形成重佈線路層130的方法可包括下列步驟。首先,如圖4所示之形成圖案化線路層132於球底支撐層120上,再形成第一介電層134於球底支撐層120上,以使圖案化線路層132內嵌於第一介電層134,如此,由於圖案化線路層132及第一介電層134皆形成於同一平面上,故圖案化線路層132的外表面與第一介電層134的表面共平面,以共同定義出重佈線路層130的第一表面S1。在本實施例中,由於球底支撐層120並非為重佈線路層130的介電層,而是另外形成的疊構層,故球底支撐層120與重佈線路層130的介電層的材料可不相同。In detail, the method of forming the redistribution circuit layer 130 may include the following steps. First, as shown in FIG. 4, a patterned circuit layer 132 is formed on the ball support layer 120, and then a first dielectric layer 134 is formed on the ball support layer 120, so that the patterned circuit layer 132 is embedded in the first For the dielectric layer 134, since the patterned circuit layer 132 and the first dielectric layer 134 are formed on the same plane, the outer surface of the patterned circuit layer 132 and the surface of the first dielectric layer 134 are coplanar to share The first surface S1 of the redistribution circuit layer 130 is defined. In this embodiment, since the ball bottom support layer 120 is not a dielectric layer of the redistribution circuit layer 130, but a stacked structure layer formed separately, the material of the ball bottom support layer 120 and the dielectric layer of the redistribution circuit layer 130 It can be different.
接著,請參照圖5,形成多個導通孔136於圖案化線路層132上。在本實施例中,形成導通孔136的方法可包括:先形成一種子層(未繪示)於圖案化線路層132及第一介電層134上,接著形成一圖案化光阻層R1於種子層上,其中圖案化光阻層R1包括多個開口,以暴露部分的種子層,接著再以種子層作為導電路徑進行電鍍,以於圖案化光阻層R1的開口內形成導通孔136,之後再移除圖案化光阻層R1並蝕刻移除被暴露的部分種子層,即可完成導通孔136的製作。Next, referring to FIG. 5, a plurality of via holes 136 are formed on the patterned circuit layer 132. In this embodiment, the method of forming the via 136 may include: first forming a sub-layer (not shown) on the patterned circuit layer 132 and the first dielectric layer 134, and then forming a patterned photoresist layer R1 on On the seed layer, the patterned photoresist layer R1 includes a plurality of openings to expose part of the seed layer, and then the seed layer is used as a conductive path for electroplating to form a via hole 136 in the opening of the patterned photoresist layer R1, After that, the patterned photoresist layer R1 is removed and the exposed part of the seed layer is etched to complete the fabrication of the via 136.
接著,請參照圖6,形成一第二介電層138於第一介電層134上,且第二介電層138環繞導通孔136,以使導通孔136貫穿第二介電層138,且導通孔136連通重佈線路層130的第一表面S1及第二表面S2。之後,再如圖7所示之形成一球底金屬層139於第二介電層138上,並使球底金屬層139電性連接導通孔136。Next, referring to FIG. 6, a second dielectric layer 138 is formed on the first dielectric layer 134, and the second dielectric layer 138 surrounds the via hole 136 so that the via hole 136 penetrates the second dielectric layer 138, and The via hole 136 communicates the first surface S1 and the second surface S2 of the redistribution circuit layer 130. After that, as shown in FIG. 7, a bottom metal layer 139 is formed on the second dielectric layer 138, and the bottom metal layer 139 is electrically connected to the via 136.
在本實施例中,形成球底金屬層139的方法可相似於前述形成導通孔136的方法:先形成一種子層137於導通孔136及第二介電層138上,接著形成圖案化光阻層於種子層137上,且圖案化光阻層的開口暴露導通孔136,接著再以種子層137作為導電路徑進行電鍍,以於圖案化光阻層的開口內形成球底金屬層139,之後再移除圖案化光阻層並蝕刻移除被暴露的部分種子層137,即可完成如圖7所示之球底金屬層139的製作。In this embodiment, the method of forming the bottom metal layer 139 may be similar to the method of forming the via hole 136 described above: first forming a sub-layer 137 on the via hole 136 and the second dielectric layer 138, and then forming a patterned photoresist Layer is on the seed layer 137, and the opening of the patterned photoresist layer exposes the via hole 136, and then the seed layer 137 is used as a conductive path for electroplating to form a bottom metal layer 139 in the opening of the patterned photoresist layer, after Then, the patterned photoresist layer is removed and the exposed part of the seed layer 137 is removed by etching to complete the production of the under-ball metal layer 139 as shown in FIG. 7.
接著,請參照圖8,設置一晶片140於重佈線路層130的第二表面S2上。在本實施例中,晶片140利用多個導電凸塊142以覆晶接合的方法設置於重佈線路層130的球底金屬層139上,且晶片140透過球底金屬層139及導通孔136而電性連接至圖案化線路層132。Next, referring to FIG. 8, a chip 140 is disposed on the second surface S2 of the redistribution circuit layer 130. In this embodiment, the wafer 140 is disposed on the bottom metal layer 139 of the redistribution circuit layer 130 by flip chip bonding using a plurality of conductive bumps 142, and the wafer 140 passes through the bottom metal layer 139 and the via 136 It is electrically connected to the patterned circuit layer 132.
之後,請參照圖9,形成一封裝膠體150於重佈線路層130的第二表面S2以包覆晶片140。接著,使載板105及突起110自球底支撐層120脫離,以移除載板105及突起110並同時形成暴露圖案化線路層132的開口122於球底支撐層120上。具體而言,球底支撐層120的開口122暴露圖案化線路層132的外表面。在本實施例中,移除載板105的方法可包括機械式移除載板或是利用對離型層112進行照光、雷射或加熱等方法來移除載板105。當然,本揭露並不侷限於此。Afterwards, please refer to FIG. 9, a encapsulant 150 is formed on the second surface S2 of the redistribution circuit layer 130 to cover the wafer 140. Next, the carrier board 105 and the protrusion 110 are detached from the ball base support layer 120 to remove the carrier board 105 and the protrusion 110 and at the same time form an opening 122 exposing the patterned circuit layer 132 on the ball base support layer 120. Specifically, the opening 122 of the ball bottom support layer 120 exposes the outer surface of the patterned circuit layer 132. In this embodiment, the method for removing the carrier board 105 may include mechanically removing the carrier board or using a method of illuminating, releasing, or heating the release layer 112 to remove the carrier board 105. Of course, this disclosure is not limited to this.
此外,由於在移除載板105時容易對封裝結構產生應力,進而導致重佈線路層130中的線路產生斷裂的情形,有鑑於此,在本實施例中,重佈線路層130中的第一介電層134的材料的楊氏係數可小於第二介電層138的材料的楊氏係數,並且,進一步而言,第一介電層的楊氏係數約可小於10GPa。因此,換句話說,重佈線路層130中較靠近載板105的介電層會比遠離載板105的介電層更軟,因而可幫助吸收遠離載板105的介電層因載板105被移除而承受的應力,進而可防止介電層內的線路產生斷裂的情形。舉例來說,由於無機材料相較於有機材料較硬,因此,在一實施例中,第一介電層134的材料可包括有機材料或有機無機混合材料,而第二介電層138的材料則可包括無機材料。或者,在另一實施例中,第一介電層134的材料可為有機材料,而第二介電層138的材料則可包括無機材料或有機無機混合材料。上述有機材料可為聚亞醯胺(PI)、聚苯并噁唑(PBO)、苯環丁烯聚合物(BCB),無機材料可為氧化矽(silicon oxide)、氮化矽(silicon nitride)、氧氮化矽(silicon oxynitride)、聚矽氧烷(polysiloxane)、聚矽氮烷(polysilazane)、聚矽氮氧烷(polysiloxazane)、聚碳矽烷(polycarbosilane)或其他適合的材料。在本實施例中,球底支撐層120可為有機高分子材料。In addition, since it is easy to generate stress to the package structure when the carrier 105 is removed, which may cause the circuit in the redistribution circuit layer 130 to break, in view of this, in this embodiment, the first in the redistribution circuit layer 130 The Young's coefficient of the material of one dielectric layer 134 may be smaller than that of the material of the second dielectric layer 138, and further, the Young's coefficient of the first dielectric layer may be less than about 10 GPa. Therefore, in other words, the dielectric layer closer to the carrier board 105 in the redistribution circuit layer 130 is softer than the dielectric layer far from the carrier board 105, and thus can help absorb the dielectric layer far away from the carrier board 105 due to the carrier board 105 The stress that is removed and withstands can prevent the circuit in the dielectric layer from breaking. For example, since inorganic materials are harder than organic materials, in one embodiment, the material of the first dielectric layer 134 may include an organic material or an organic-inorganic hybrid material, and the material of the second dielectric layer 138 It can then include inorganic materials. Alternatively, in another embodiment, the material of the first dielectric layer 134 may be an organic material, and the material of the second dielectric layer 138 may include an inorganic material or an organic-inorganic hybrid material. The above-mentioned organic materials may be polyimide (PI), polybenzoxazole (PBO), phenylcyclobutene polymer (BCB), and the inorganic materials may be silicon oxide (silicon oxide) or silicon nitride (silicon nitride) , Silicon oxynitride, polysiloxane, polysilazane, polysiloxazane, polycarbosilane or other suitable materials. In this embodiment, the spherical bottom support layer 120 may be an organic polymer material.
接著,便可如圖10所示之形成多個銲球160於球底支撐層120的開口122內,且銲球160電性連接圖案化線路層132。至此,本實施例的封裝結構100的製作方法即大致完成。如此配置,本實施例的封裝結構100的製作方法可在先形成重佈線路層而後設置晶片140的流程下,在移除載板105時即可同時形成具有開口122的球底支撐層120,以對銲球160提供結構支撐並可幫助銲球160對位,提升封裝結構100的可靠度。此外,球底支撐層120更可防止水氣進入封裝結構100,因而可增加封裝結構100的阻擋水氣及/或抗氧化的能力。Then, as shown in FIG. 10, a plurality of solder balls 160 can be formed in the opening 122 of the bottom support layer 120, and the solder balls 160 are electrically connected to the patterned circuit layer 132. So far, the manufacturing method of the packaging structure 100 of this embodiment is almost completed. With this configuration, the manufacturing method of the packaging structure 100 of the present embodiment can form the ball bottom support layer 120 with the opening 122 at the same time when the carrier 105 is removed under the process of forming the redistribution circuit layer and then setting the wafer 140, In order to provide structural support to the solder balls 160 and help the solder balls 160 to be aligned, the reliability of the packaging structure 100 is improved. In addition, the ball bottom support layer 120 can further prevent moisture from entering the packaging structure 100, and thus can increase the ability of the packaging structure 100 to block moisture and / or resist oxidation.
圖11是依照本揭露的另一實施例的一種封裝結構的流程剖面示意圖。圖12是依照本揭露的另一實施例的一種封裝結構的流程剖面示意圖。在前述實施例中,設置於載板105上的突起110是呈方塊狀,故據此而形成的球底支撐層120的開口122為方形開口,然而,本揭露並不侷限突起110及據此形成的球底支撐層120的開口122的形狀。在如圖11所示的實施例中,設置於載板105上的突起110a的剖面形狀呈梯形,換句話說,突起110a的頂面尺寸小於突起110a的底面尺寸。在如圖12所示的實施例中,設置於載板105上的突起110b的剖面形狀呈球狀,因此,據此形成的球底支撐層120的開口122為球形開口。當然,上述實施例僅為示例,而非用以限定本揭露的範圍。11 is a schematic flow cross-sectional view of a packaging structure according to another embodiment of the present disclosure. 12 is a schematic flow cross-sectional view of a packaging structure according to another embodiment of the present disclosure. In the foregoing embodiment, the protrusions 110 provided on the carrier 105 are in the shape of a square, so the opening 122 of the bottom support layer 120 formed accordingly is a square opening. However, the disclosure does not limit the protrusions 110 and the data The shape of the opening 122 of the spherical bottom support layer 120 formed in this way. In the embodiment shown in FIG. 11, the cross-sectional shape of the protrusion 110 a provided on the carrier plate 105 is trapezoidal, in other words, the top surface size of the protrusion 110 a is smaller than the bottom surface size of the protrusion 110 a. In the embodiment shown in FIG. 12, the cross-sectional shape of the protrusion 110 b provided on the carrier 105 is spherical. Therefore, the opening 122 of the ball-bottom support layer 120 formed accordingly is a spherical opening. Of course, the above-mentioned embodiments are only examples, not intended to limit the scope of the present disclosure.
圖13至圖15是依照本揭露的另一實施例的一種封裝結構的製作方法的部分流程剖面示意圖。在此必須說明的是,本實施例之封裝結構的製作方法與前述實施例的封裝結構的製作方法相似,因此,本實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,本實施例不再重複贅述。請參照圖13至圖15,以下將針對本實施例之封裝結構的製作方法與前述實施例的封裝結構的製作方法之間的差異做說明。13 to 15 are schematic partial cross-sectional views of a method for manufacturing a packaging structure according to another embodiment of the present disclosure. It should be noted here that the manufacturing method of the packaging structure of this embodiment is similar to the manufacturing method of the packaging structure of the foregoing embodiment, therefore, this embodiment uses the component labels and part of the content of the foregoing embodiments, in which the same labels are used The same or similar elements are indicated, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated in this embodiment. Please refer to FIG. 13 to FIG. 15, the difference between the manufacturing method of the packaging structure of this embodiment and the manufacturing method of the packaging structure of the foregoing embodiment will be described below.
請先參照圖13,本實施例的封裝結構的製作方法可在圖2的步驟之後(也就是在形成多個突起110及離形層112於載板105上之後),如圖13所示之形成一附著層114於覆蓋突起110的部分離型層112上。在本實施例中,形成附著層114的方法可包括網板印刷,也就是利用具有多個暴露突起110的開口之網板來進行印刷,以形成附著層114。之後,再參照圖14,形成球底支撐層120於突起110之間,並且,球底支撐層120的上表面與附著層114的頂面共平面。在本實施例中,附著層114的材料包括鈦、銅、鎳或銀。當然,本實施例僅用以舉例說明,本揭露並不限制附著層114的材料。Please refer to FIG. 13 first, the manufacturing method of the packaging structure of this embodiment can be after the steps of FIG. 2 (that is, after forming a plurality of protrusions 110 and a release layer 112 on the carrier 105), as shown in FIG. 13 An adhesion layer 114 is formed on the partial separation layer 112 covering the protrusion 110. In this embodiment, the method of forming the adhesion layer 114 may include screen printing, that is, printing using a screen having a plurality of openings that expose the protrusions 110 to form the adhesion layer 114. After that, referring again to FIG. 14, the ball bottom support layer 120 is formed between the protrusions 110, and the top surface of the ball bottom support layer 120 and the top surface of the adhesion layer 114 are coplanar. In this embodiment, the material of the adhesion layer 114 includes titanium, copper, nickel, or silver. Of course, this embodiment is for illustration only, and the disclosure does not limit the material of the adhesion layer 114.
接著,再接續執行如圖4至圖9的製程步驟而可得到如圖15所示之結構。之後,再使載板105及突起110自球底支撐層120及附著層114脫離,以形成暴露圖案化線路層132的開口122於球底支撐層120上,並且,附著層114如圖16所示之覆蓋各開口122的內壁以及被各開口122所暴露的部分圖案化線路層132。在本實施例中,附著層114遠離圖案化線路層132的一底面與球底支撐層120遠離圖案化線路層的一下表面共平面。接著,便可如圖16所示之形成多個銲球160於球底支撐層120的開口122內,且銲球160可通過附著層114而電性連接圖案化線路層132。並且,附著層114可增強銲球160的連接強度。至此,本實施例的封裝結構100的製作方法即大致完成。Then, the process steps shown in FIG. 4 to FIG. 9 are successively executed to obtain the structure shown in FIG. 15. After that, the carrier board 105 and the protrusion 110 are detached from the ball bottom support layer 120 and the adhesion layer 114 to form an opening 122 exposing the patterned circuit layer 132 on the ball bottom support layer 120, and the adhesion layer 114 is as shown in FIG. It shows the patterned circuit layer 132 covering the inner wall of each opening 122 and the portion exposed by each opening 122. In this embodiment, a bottom surface of the attachment layer 114 away from the patterned circuit layer 132 is coplanar with a bottom surface of the ball bottom support layer 120 away from the patterned circuit layer. Then, as shown in FIG. 16, a plurality of solder balls 160 can be formed in the opening 122 of the bottom support layer 120, and the solder balls 160 can be electrically connected to the patterned circuit layer 132 through the adhesion layer 114. Also, the adhesion layer 114 can enhance the connection strength of the solder ball 160. So far, the manufacturing method of the packaging structure 100 of this embodiment is almost completed.
圖17至圖20是依照本揭露的另一實施例的一種封裝結構的製作方法的流程剖面示意圖。在此必須說明的是,本實施例之封裝結構的製作方法與前述實施例的封裝結構的製作方法相似,因此,本實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,本實施例不再重複贅述。請參照圖17至圖20,以下將針對本實施例之封裝結構的製作方法與前述實施例的封裝結構的製作方法之間的差異做說明。17-20 are schematic cross-sectional flow diagrams of a method of manufacturing a packaging structure according to another embodiment of the present disclosure. It should be noted here that the manufacturing method of the packaging structure of this embodiment is similar to the manufacturing method of the packaging structure of the foregoing embodiment, therefore, this embodiment uses the component labels and part of the content of the foregoing embodiments, in which the same labels are used The same or similar elements are indicated, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated in this embodiment. Please refer to FIG. 17 to FIG. 20. The difference between the manufacturing method of the packaging structure of this embodiment and the manufacturing method of the packaging structure of the foregoing embodiment will be described below.
在本實施例中,球底支撐層120可如圖17所示之全面覆蓋載板105的上表面。前述實施例中的離型層112可選擇性的設置於載板105與球底支撐層120之間。接著,可依照相似於前述實施例圖4至圖9的製作流程依序進行形成重佈線路層130、設置晶片140以及形成封裝膠體150等步驟而得到如圖18所示之結構。接著,移除載板105並對球底支撐層120進行圖案化製程,以於球底支撐層120上形成如圖19所示之暴露圖案化線路層132的開口122。上述的圖案化製程可包括雷射鑽蝕、乾式蝕刻或濕式蝕刻等方法。In this embodiment, the ball bottom support layer 120 can cover the upper surface of the carrier board 105 as shown in FIG. 17. The release layer 112 in the foregoing embodiment can be selectively disposed between the carrier 105 and the ball bottom support layer 120. Next, the steps shown in FIG. 18 can be obtained by sequentially forming the redistribution circuit layer 130, setting the wafer 140, and forming the encapsulant 150 in accordance with the manufacturing process similar to the previous embodiment shown in FIGS. 4-9. Next, the carrier 105 is removed and the ball base support layer 120 is patterned to form an opening 122 on the ball base support layer 120 that exposes the patterned circuit layer 132 as shown in FIG. 19. The above patterning process may include laser drilling, dry etching or wet etching.
此外,在另一實施例中,球底支撐層的材料可為光敏感材料。如此,在移除載板105之前,也就是在如圖18所示之狀態下,對球底支撐層120中對應欲形成開口122的部分進行圖案化曝光製程,也就是針對欲形成開口122的部分球底支撐層120以紫外光或雷射進行局部曝光。本實施例僅為示例,實際曝光的區域可依球底支撐層120的材料屬於正光阻或負光阻來決定。對應開口122的部分球底支撐層120會因曝光而產生裂解,因此,當載板105自球底支撐層120脫離時,對應開口122的部分球底支撐層120會隨著載板105而被移除,因而可在球底支撐層120上形成如圖19所示的暴露圖案化線路層132的開口122。如此,本實施例可在移除載板105的同時在球底支撐層120上形成暴露圖案化線路層132的開口122。In addition, in another embodiment, the material of the spherical bottom support layer may be a light-sensitive material. In this way, before the carrier 105 is removed, that is, in a state as shown in FIG. 18, a patterned exposure process is performed on the portion of the ball support layer 120 corresponding to the opening 122 to be formed. Part of the bottom support layer 120 is partially exposed with ultraviolet light or laser. This embodiment is only an example, and the actual exposed area may be determined according to whether the material of the bottom support layer 120 belongs to positive photoresist or negative photoresist. The part of the bottom support layer 120 corresponding to the opening 122 will be cracked due to exposure. Therefore, when the carrier board 105 is detached from the bottom support layer 120, the part of the bottom support layer 120 corresponding to the opening 122 will be Removal, so that the opening 122 exposing the patterned circuit layer 132 as shown in FIG. 19 can be formed on the ball bottom support layer 120. In this way, in this embodiment, the opening 122 exposing the patterned circuit layer 132 can be formed on the ball-bed support layer 120 while removing the carrier 105.
接著,銲球160可如圖20所示之設置於球底支撐層120的開口122內,並與圖案化線路層132電性連接。因此,球底支撐層120可對銲球160提供結構支撐並可幫助銲球160對位,提升封裝結構100的可靠度。此外,球底支撐層120更可防止水氣進入封裝結構100,因而可增加封裝結構100的阻擋水氣及/或抗氧化的能力。Next, the solder ball 160 may be disposed in the opening 122 of the bottom support layer 120 as shown in FIG. 20 and electrically connected to the patterned circuit layer 132. Therefore, the ball bottom support layer 120 can provide structural support for the solder balls 160 and can help the solder balls 160 to be aligned, thereby improving the reliability of the packaging structure 100. In addition, the ball bottom support layer 120 can further prevent moisture from entering the packaging structure 100, and thus can increase the ability of the packaging structure 100 to block moisture and / or resist oxidation.
圖21至圖23是依照本揭露的另一實施例的一種封裝結構的製作方法的部分流程剖面示意圖。在此必須說明的是,本實施例之封裝結構的製作方法與前述實施例的封裝結構的製作方法相似,因此,本實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,本實施例不再重複贅述。請參照圖21至圖23,以下將針對本實施例之封裝結構的製作方法與前述實施例的封裝結構的製作方法之間的差異做說明。21 to 23 are schematic partial cross-sectional views of a method for manufacturing a packaging structure according to another embodiment of the present disclosure. It should be noted here that the manufacturing method of the packaging structure of this embodiment is similar to the manufacturing method of the packaging structure of the foregoing embodiment, therefore, this embodiment uses the component labels and part of the content of the foregoing embodiments, in which the same labels are used The same or similar elements are indicated, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated in this embodiment. Please refer to FIG. 21 to FIG. 23, the difference between the manufacturing method of the packaging structure of this embodiment and the manufacturing method of the packaging structure of the foregoing embodiment will be described below.
請先參照圖21,本實施例的封裝結構的製作方法可在圖19的步驟之後(也就是形成暴露圖案化線路層132的開口122之後),形成一圖案化光阻層R2於球底支撐層120上,其中,圖案化光阻層R2暴露各個開口122。Please refer to FIG. 21 first. The manufacturing method of the package structure of this embodiment may form a patterned photoresist layer R2 on the bottom of the ball after the steps of FIG. 19 (that is, after forming the opening 122 exposing the patterned circuit layer 132) On the layer 120, wherein the patterned photoresist layer R2 exposes each opening 122.
接著,請參照圖22,以圖案化光阻層R2作為罩幕進行一金屬化製程,以形成如圖22所示之附著層114。在本實施例中,上述的金屬化可為一化鍍(無電電鍍)製程,以於圖案化光阻層R2所暴露的部分形成附著層114,其中,附著層114是透過各開口122的內壁產生化學反應而形成。在本實施例中,附著層114的材料可包括鈦、銅、鎳或銀。當然,本實施例僅用以舉例說明,本揭露並不侷限於此。Next, referring to FIG. 22, a metallization process is performed using the patterned photoresist layer R2 as a mask to form the adhesion layer 114 shown in FIG. 22. In this embodiment, the above-mentioned metallization may be an electroless plating (electroless plating) process to form an adhesion layer 114 on the exposed portion of the patterned photoresist layer R2, wherein the adhesion layer 114 passes through the inside of each opening 122 The wall is formed by a chemical reaction. In this embodiment, the material of the adhesion layer 114 may include titanium, copper, nickel, or silver. Of course, this embodiment is for illustration only, and the disclosure is not limited to this.
接著,請參照圖23,移除圖案化光阻層R2。之後,便可如圖16所示之形成多個銲球160於球底支撐層120的開口122內,而可形成相似於圖16所示之封裝結構100,惟本實施例之附著層114為金屬與球底支撐層120經由化學反應而生成,因此,附著層114與球底支撐層120遠離圖案化線路層的下表面共平面,且圖案化線路層132的表面無附著層114覆蓋。Next, referring to FIG. 23, the patterned photoresist layer R2 is removed. After that, a plurality of solder balls 160 can be formed in the opening 122 of the bottom support layer 120 as shown in FIG. 16, and a packaging structure 100 similar to that shown in FIG. 16 can be formed, but the adhesion layer 114 in this embodiment is The metal and the ball support layer 120 are generated through a chemical reaction. Therefore, the adhesion layer 114 and the ball support layer 120 are coplanar with the lower surface of the patterned circuit layer, and the surface of the patterned circuit layer 132 is not covered by the adhesion layer 114.
綜上所述,本揭露實施例的封裝結構及其製作方法是先在載板上形成球底支撐層再於其上形成重佈線路層,並可在之後移除載板時形成具有開口的球底支撐層。如此,在先形成重佈線路層而後設置晶片的製程下所形成的封裝結構得以具有球底支撐層,因而可對銲球提供結構支撐並可幫助銲球對位,提升封裝結構的可靠度。並且,附著層覆蓋開口的內壁以及被開口所暴露的部分圖案化線路層,因而可提升銲球與開口及圖案化線路層之間的連接強度。此外,球底支撐層可防止水氣進入封裝結構內,因而可增加封裝結構的阻擋水氣及/或抗氧化的能力。因此,本揭露的封裝結構及其製作方法可有效提升封裝結構的製程良率及結構可靠度。In summary, the package structure and the manufacturing method of the disclosed embodiment first form a ball-bottom support layer on the carrier board and then form a redistribution circuit layer thereon, and can form an opening with an opening when the carrier board is removed later Support layer of the ball bottom. In this way, the package structure formed under the process of forming the redistribution circuit layer and then setting the chip can have a ball-bottom support layer, thus providing structural support for the solder balls and helping the solder balls to be aligned, improving the reliability of the package structure. Moreover, the adhesion layer covers the inner wall of the opening and the part of the patterned circuit layer exposed by the opening, so that the connection strength between the solder ball and the opening and the patterned circuit layer can be improved. In addition, the spherical bottom support layer can prevent moisture from entering the packaging structure, and thus can increase the capacity of the packaging structure to block moisture and / or anti-oxidation. Therefore, the package structure and the manufacturing method of the present disclosure can effectively improve the process yield and structural reliability of the package structure.
雖然本揭露已以實施例揭露如上,然其並非用以限定本揭露,任何所屬技術領域中具有通常知識者,在不脫離本揭露的精神和範圍內,當可作些許的更動與潤飾,故本揭露的保護範圍當視後附的申請專利範圍所界定者為準。Although this disclosure has been disclosed as above with examples, it is not intended to limit this disclosure. Anyone who has ordinary knowledge in the technical field should make some changes and retouching without departing from the spirit and scope of this disclosure. The scope of protection disclosed in this disclosure shall be subject to the scope defined in the appended patent application.
100‧‧‧封裝結構100‧‧‧Package structure
105‧‧‧載板105‧‧‧ carrier board
110、110a、110b‧‧‧突起110, 110a, 110b
112‧‧‧離型層112‧‧‧ Release layer
114‧‧‧附著層114‧‧‧ adhesion layer
120‧‧‧球底支撐層120‧‧‧Ball support layer
122‧‧‧開口122‧‧‧ opening
130‧‧‧重佈線路層130‧‧‧ Rerouting circuit layer
132‧‧‧圖案化線路層132‧‧‧patterned circuit layer
134‧‧‧第一介電層134‧‧‧First dielectric layer
136‧‧‧導通孔136‧‧‧via
137‧‧‧種子層137‧‧‧Seed layer
138‧‧‧第二介電層138‧‧‧Second dielectric layer
139‧‧‧球底金屬層139‧‧‧Ball metal layer
140‧‧‧晶片140‧‧‧chip
142‧‧‧導電凸塊142‧‧‧conductive bump
150‧‧‧封裝膠體150‧‧‧Packing colloid
160‧‧‧銲球160‧‧‧solder ball
R1、R2‧‧‧圖案化光阻層R1, R2‧‧‧ Patterned photoresist layer
S1‧‧‧第一表面S1‧‧‧First surface
S2‧‧‧第二表面S2‧‧‧Second surface
圖1至圖10是依照本揭露的一實施例的一種封裝結構的製作方法的流程剖面示意圖。 圖11是依照本揭露的另一實施例的一種封裝結構的流程剖面示意圖。 圖12是依照本揭露的另一實施例的一種封裝結構的流程剖面示意圖。 圖13至圖16是依照本揭露的另一實施例的一種封裝結構的製作方法的部分流程剖面示意圖。 圖17至圖20是依照本揭露的另一實施例的一種封裝結構的製作方法的流程剖面示意圖。 圖21至圖23是依照本揭露的另一實施例的一種封裝結構的製作方法的部分流程剖面示意圖。1 to 10 are schematic flow cross-sectional views of a method for manufacturing a packaging structure according to an embodiment of the disclosure. 11 is a schematic flow cross-sectional view of a packaging structure according to another embodiment of the present disclosure. 12 is a schematic flow cross-sectional view of a packaging structure according to another embodiment of the present disclosure. 13 to 16 are schematic partial cross-sectional views of a method for manufacturing a packaging structure according to another embodiment of the present disclosure. 17-20 are schematic cross-sectional flow diagrams of a method of manufacturing a packaging structure according to another embodiment of the present disclosure. 21 to 23 are schematic partial cross-sectional views of a method for manufacturing a packaging structure according to another embodiment of the present disclosure.
Claims (20)
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