TW201830613A - Package structure and manufacturing method thereof - Google Patents

Abstract

A package structure includes a redistribution layer, a chip, an encapsulant, an under bump supporting layer, a cohering layer and solder balls. The redistribution layer includes a first surface, a second surface opposite to the first surface and a patterned circuit layer disposed on the first surface, wherein an outer surface of the patterned circuit layer is coplanar with the first surface. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface to encapsulate the chip. The under bump supporting layer is disposed on the first surface and includes a plurality of openings. The openings expose the outer surface of the patterned circuit layer. The cohering layer covers the openings and the patterned circuit layer exposed by the openings. The solder balls are disposed in the openings respectively and electrically connected to the patterned circuit layer.

Description

Packaging structure and manufacturing method thereof

This disclosure is about a packaging structure and its manufacturing method.

The purpose of the chip package is to protect the bare chip and provide good heat dissipation of the chip. When the number of contacts on the wafer is increasing and the area of the wafer is getting smaller and smaller, it is difficult to redistribute all the contacts of the wafer on the surface of the wafer in a surface matrix, even if the wafer surface can accommodate all Of the contacts will also cause the spacing between the contacts to be too small, which will affect the electrical reliability of subsequent solder ball soldering.

Therefore, the conventional technology proposes that the chip can be encapsulated with encapsulant to increase the area of the chip, wherein the active surface of the chip and the bottom surface of the encapsulant are exposed. After that, a redistribution circuit layer is formed on the active surface of the chip and the bottom surface of the encapsulant, and solder balls are respectively formed on the contacts of the redistribution circuit layer as a medium for the electrical connection between the chip and the external contacts. However, this method is prone to overflowing during packaging, which causes the packaging gel to extend to a part of the active surface of the chip and contaminate the active surface of the chip.

At present, the industry is developing a method of forming a redistribution circuit layer on a carrier board first, and then setting a chip on the redistribution circuit layer, and encapsulating the chip with a packaging gel before removing the carrier board. However, the redistribution circuit layer exposed after the carrier board is removed is flat, and the connection strength may be insufficient after the ball is implanted.

The disclosed embodiments provide a packaging structure and a manufacturing method thereof, which can provide structural support and alignment for solder balls in a manufacturing method in which a redistribution circuit layer is first formed and then a chip is provided.

The package structure of the disclosed embodiment includes a redistribution circuit layer, a chip, an encapsulant, a ball-bottom support layer, an adhesion layer, and a plurality of solder balls. The redistribution circuit layer includes a first surface, a second surface opposite to the first surface, and a patterned circuit layer disposed on the first surface, wherein an outer surface of the patterned circuit layer is coplanar with the first surface. The chip is disposed on the second surface and electrically connected to the patterned circuit layer. The encapsulant is disposed on the second surface to cover the wafer. The ball bottom support layer is disposed on the first surface and includes a plurality of openings, and the openings expose the outer surface of the patterned circuit layer. The adhesion layer covers the inner wall of each opening and the part of the patterned circuit layer exposed by each opening. The solder balls are respectively arranged in the openings and are electrically connected to the patterned circuit layer.

The manufacturing method of the package structure of the disclosed embodiment includes the following steps. A ball-bottom supporting layer is formed on a carrier board. Forming a redistribution circuit layer on the ball bottom support layer, wherein the redistribution circuit layer includes a first surface connected to the ball bottom support layer, a second surface opposite to the first surface, and a patterned circuit embedded in the first surface Layer, an outer surface of the patterned circuit layer is coplanar with the first surface. A chip is disposed on the second surface, wherein the chip is electrically connected to the patterned circuit layer. An encapsulant is formed on the second surface to cover the wafer. The carrier board is removed and a plurality of openings exposing the patterned circuit layer are formed on the underlayer support layer. A plurality of solder balls are formed in the opening, wherein the solder balls are electrically connected to the patterned circuit layer.

Based on the above, the package structure and the manufacturing method of the disclosed embodiment first form a ball bottom support layer on the carrier board and then form a redistribution circuit layer thereon, and can form a ball bottom with an opening when the carrier board is removed later Support layer. In this way, the package structure formed under the process of forming the redistribution circuit layer and then setting the chip can have a ball-bottom support layer, thus providing structural support for the solder balls and helping the solder balls to be aligned, improving the reliability of the package structure. Moreover, the adhesion layer covers the inner wall of the opening and the part of the patterned circuit layer exposed by the opening, so that the connection strength between the solder ball and the opening and the patterned circuit layer can be improved. In addition, the spherical bottom support layer can prevent moisture from entering the packaging structure, and thus can increase the capacity of the packaging structure to block moisture and / or anti-oxidation.

In order to make the disclosure more comprehensible, the embodiments are specifically described below and described in detail in conjunction with the accompanying drawings.

The foregoing and other technical contents of the disclosed embodiments will be clearly presented in the following detailed description of the embodiments with reference to the drawings. Directional terms mentioned in the following embodiments, for example: "upper", "lower", "front", "rear", "left", "right", etc., are only for the directions referring to the attached drawings. Therefore, the terminology used is for illustration, not for limiting this disclosure. Moreover, in the following embodiments, the same or similar elements will use the same or similar reference numbers.

1 to 10 are schematic flow cross-sectional views of a method for manufacturing a packaging structure according to an embodiment of the disclosure. The manufacturing method of the packaging structure of this embodiment includes the following steps. First, please refer to FIG. 1, in this embodiment, a plurality of protrusions 110 may be formed on the carrier board 105 first, wherein a distance between any two adjacent protrusions 110 may be maintained. In this embodiment, the carrier board 105 may be a glass carrier board, a wafer carrier board, or a stainless steel carrier board, etc., and the material of the protrusion 110 may include polyimide (Polyimide, PI), polybenzoxazole (Polybenzoxazole, PBO) ), Polymethylmethacrylate (PMMA), etc., the disclosure does not limit the materials of the carrier board 105 and the protrusion 110.

Next, referring to FIG. 2, a release layer 112 is formed on the carrier board 105, wherein the release layer 112 covers the protrusion 110 and the surface of the carrier board 105 exposed by the protrusion 110. In this embodiment, the release layer 112 may be selectively provided. In other words, in other embodiments, the release layer 112 may not be provided. The disclosure does not limit the material of the release layer 112, as long as the carrier board 105 can easily separate from the packaging structure through the release layer 112.

Next, please refer to FIG. 3 to form the ball bottom support layer 120 on the carrier 105. In this embodiment, the ball bottom support layer 120 may be filled between the protrusions 110, and the upper surface of the ball bottom support layer 120 and the upper surface of the protrusion 110 are coplanar, so that the protrusions 110 may be defined on the ball bottom support layer 120出 Multiple opening 122. In this embodiment, the material of the spherical bottom support layer 120 may include an organic polymer material, an inorganic polymer material, or an organic-inorganic hybrid material. The organic polymer material can be polyimide (PI), polybenzoxazole (PBO), benzocyclobutene polymer (BCB) or other suitable materials, and the inorganic polymer material can be silicon oxide ), Silicon nitride (silicon nitride), silicon oxynitride, polysiloxane (polysiloxane), polysilazane (polysilazane), polysiloxazane (polysiloxazane), polycarbosilane (polycarbosilane) Or other suitable materials. Moreover, the thickness of the ball-bottom supporting layer 120 is approximately between 1 micrometer (μm) and 50 microns, or the thickness of the ball-bottom supporting layer 120 may be greater than or equal to one-tenth of the diameter of each opening 122. The solder balls 160 formed later provide sufficient structural support and assist in the alignment of the solder balls 160.

Next, please refer to FIG. 4 to FIG. 7 to form a redistribution circuit layer 130 on the ball bottom support layer 120. In this embodiment, the redistribution circuit layer 130 may include a first surface S1 connected to the ball bottom support layer 120, a second surface S2 opposite to the first surface S1, and embedded in the first surface S1 as shown in FIG. A patterned circuit layer 132, the outer surface of the patterned circuit layer 132 and the first surface S1 of the redistribution circuit layer 130 are coplanar.

In detail, the method of forming the redistribution circuit layer 130 may include the following steps. First, as shown in FIG. 4, a patterned circuit layer 132 is formed on the ball support layer 120, and then a first dielectric layer 134 is formed on the ball support layer 120, so that the patterned circuit layer 132 is embedded in the first For the dielectric layer 134, since the patterned circuit layer 132 and the first dielectric layer 134 are formed on the same plane, the outer surface of the patterned circuit layer 132 and the surface of the first dielectric layer 134 are coplanar to share The first surface S1 of the redistribution circuit layer 130 is defined. In this embodiment, since the ball bottom support layer 120 is not a dielectric layer of the redistribution circuit layer 130, but a stacked structure layer formed separately, the material of the ball bottom support layer 120 and the dielectric layer of the redistribution circuit layer 130 It can be different.

Next, referring to FIG. 5, a plurality of via holes 136 are formed on the patterned circuit layer 132. In this embodiment, the method of forming the via 136 may include: first forming a sub-layer (not shown) on the patterned circuit layer 132 and the first dielectric layer 134, and then forming a patterned photoresist layer R1 on On the seed layer, the patterned photoresist layer R1 includes a plurality of openings to expose part of the seed layer, and then the seed layer is used as a conductive path for electroplating to form a via hole 136 in the opening of the patterned photoresist layer R1, After that, the patterned photoresist layer R1 is removed and the exposed part of the seed layer is etched to complete the fabrication of the via 136.

Next, referring to FIG. 6, a second dielectric layer 138 is formed on the first dielectric layer 134, and the second dielectric layer 138 surrounds the via hole 136 so that the via hole 136 penetrates the second dielectric layer 138, and The via hole 136 communicates the first surface S1 and the second surface S2 of the redistribution circuit layer 130. After that, as shown in FIG. 7, a bottom metal layer 139 is formed on the second dielectric layer 138, and the bottom metal layer 139 is electrically connected to the via 136.

In this embodiment, the method of forming the bottom metal layer 139 may be similar to the method of forming the via hole 136 described above: first forming a sub-layer 137 on the via hole 136 and the second dielectric layer 138, and then forming a patterned photoresist Layer is on the seed layer 137, and the opening of the patterned photoresist layer exposes the via hole 136, and then the seed layer 137 is used as a conductive path for electroplating to form a bottom metal layer 139 in the opening of the patterned photoresist layer, after Then, the patterned photoresist layer is removed and the exposed part of the seed layer 137 is removed by etching to complete the production of the under-ball metal layer 139 as shown in FIG. 7.

Next, referring to FIG. 8, a chip 140 is disposed on the second surface S2 of the redistribution circuit layer 130. In this embodiment, the wafer 140 is disposed on the bottom metal layer 139 of the redistribution circuit layer 130 by flip chip bonding using a plurality of conductive bumps 142, and the wafer 140 passes through the bottom metal layer 139 and the via 136 It is electrically connected to the patterned circuit layer 132.

Afterwards, please refer to FIG. 9, a encapsulant 150 is formed on the second surface S2 of the redistribution circuit layer 130 to cover the wafer 140. Next, the carrier board 105 and the protrusion 110 are detached from the ball base support layer 120 to remove the carrier board 105 and the protrusion 110 and at the same time form an opening 122 exposing the patterned circuit layer 132 on the ball base support layer 120. Specifically, the opening 122 of the ball bottom support layer 120 exposes the outer surface of the patterned circuit layer 132. In this embodiment, the method for removing the carrier board 105 may include mechanically removing the carrier board or using a method of illuminating, releasing, or heating the release layer 112 to remove the carrier board 105. Of course, this disclosure is not limited to this.

In addition, since it is easy to generate stress to the package structure when the carrier 105 is removed, which may cause the circuit in the redistribution circuit layer 130 to break, in view of this, in this embodiment, the first in the redistribution circuit layer 130 The Young's coefficient of the material of one dielectric layer 134 may be smaller than that of the material of the second dielectric layer 138, and further, the Young's coefficient of the first dielectric layer may be less than about 10 GPa. Therefore, in other words, the dielectric layer closer to the carrier board 105 in the redistribution circuit layer 130 is softer than the dielectric layer far from the carrier board 105, and thus can help absorb the dielectric layer far away from the carrier board 105 due to the carrier board 105 The stress that is removed and withstands can prevent the circuit in the dielectric layer from breaking. For example, since inorganic materials are harder than organic materials, in one embodiment, the material of the first dielectric layer 134 may include an organic material or an organic-inorganic hybrid material, and the material of the second dielectric layer 138 It can then include inorganic materials. Alternatively, in another embodiment, the material of the first dielectric layer 134 may be an organic material, and the material of the second dielectric layer 138 may include an inorganic material or an organic-inorganic hybrid material. The above-mentioned organic materials may be polyimide (PI), polybenzoxazole (PBO), phenylcyclobutene polymer (BCB), and the inorganic materials may be silicon oxide (silicon oxide) or silicon nitride (silicon nitride) , Silicon oxynitride, polysiloxane, polysilazane, polysiloxazane, polycarbosilane or other suitable materials. In this embodiment, the spherical bottom support layer 120 may be an organic polymer material.

Then, as shown in FIG. 10, a plurality of solder balls 160 can be formed in the opening 122 of the bottom support layer 120, and the solder balls 160 are electrically connected to the patterned circuit layer 132. So far, the manufacturing method of the packaging structure 100 of this embodiment is almost completed. With this configuration, the manufacturing method of the packaging structure 100 of the present embodiment can form the ball bottom support layer 120 with the opening 122 at the same time when the carrier 105 is removed under the process of forming the redistribution circuit layer and then setting the wafer 140, In order to provide structural support to the solder balls 160 and help the solder balls 160 to be aligned, the reliability of the packaging structure 100 is improved. In addition, the ball bottom support layer 120 can further prevent moisture from entering the packaging structure 100, and thus can increase the ability of the packaging structure 100 to block moisture and / or resist oxidation.

11 is a schematic flow cross-sectional view of a packaging structure according to another embodiment of the present disclosure. 12 is a schematic flow cross-sectional view of a packaging structure according to another embodiment of the present disclosure. In the foregoing embodiment, the protrusions 110 provided on the carrier 105 are in the shape of a square, so the opening 122 of the bottom support layer 120 formed accordingly is a square opening. However, the disclosure does not limit the protrusions 110 and the data The shape of the opening 122 of the spherical bottom support layer 120 formed in this way. In the embodiment shown in FIG. 11, the cross-sectional shape of the protrusion 110 a provided on the carrier plate 105 is trapezoidal, in other words, the top surface size of the protrusion 110 a is smaller than the bottom surface size of the protrusion 110 a. In the embodiment shown in FIG. 12, the cross-sectional shape of the protrusion 110 b provided on the carrier 105 is spherical. Therefore, the opening 122 of the ball-bottom support layer 120 formed accordingly is a spherical opening. Of course, the above-mentioned embodiments are only examples, not intended to limit the scope of the present disclosure.

13 to 15 are schematic partial cross-sectional views of a method for manufacturing a packaging structure according to another embodiment of the present disclosure. It should be noted here that the manufacturing method of the packaging structure of this embodiment is similar to the manufacturing method of the packaging structure of the foregoing embodiment, therefore, this embodiment uses the component labels and part of the content of the foregoing embodiments, in which the same labels are used The same or similar elements are indicated, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated in this embodiment. Please refer to FIG. 13 to FIG. 15, the difference between the manufacturing method of the packaging structure of this embodiment and the manufacturing method of the packaging structure of the foregoing embodiment will be described below.

Please refer to FIG. 13 first, the manufacturing method of the packaging structure of this embodiment can be after the steps of FIG. 2 (that is, after forming a plurality of protrusions 110 and a release layer 112 on the carrier 105), as shown in FIG. 13 An adhesion layer 114 is formed on the partial separation layer 112 covering the protrusion 110. In this embodiment, the method of forming the adhesion layer 114 may include screen printing, that is, printing using a screen having a plurality of openings that expose the protrusions 110 to form the adhesion layer 114. After that, referring again to FIG. 14, the ball bottom support layer 120 is formed between the protrusions 110, and the top surface of the ball bottom support layer 120 and the top surface of the adhesion layer 114 are coplanar. In this embodiment, the material of the adhesion layer 114 includes titanium, copper, nickel, or silver. Of course, this embodiment is for illustration only, and the disclosure does not limit the material of the adhesion layer 114.

Then, the process steps shown in FIG. 4 to FIG. 9 are successively executed to obtain the structure shown in FIG. 15. After that, the carrier board 105 and the protrusion 110 are detached from the ball bottom support layer 120 and the adhesion layer 114 to form an opening 122 exposing the patterned circuit layer 132 on the ball bottom support layer 120, and the adhesion layer 114 is as shown in FIG. It shows the patterned circuit layer 132 covering the inner wall of each opening 122 and the portion exposed by each opening 122. In this embodiment, a bottom surface of the attachment layer 114 away from the patterned circuit layer 132 is coplanar with a bottom surface of the ball bottom support layer 120 away from the patterned circuit layer. Then, as shown in FIG. 16, a plurality of solder balls 160 can be formed in the opening 122 of the bottom support layer 120, and the solder balls 160 can be electrically connected to the patterned circuit layer 132 through the adhesion layer 114. Also, the adhesion layer 114 can enhance the connection strength of the solder ball 160. So far, the manufacturing method of the packaging structure 100 of this embodiment is almost completed.

17-20 are schematic cross-sectional flow diagrams of a method of manufacturing a packaging structure according to another embodiment of the present disclosure. It should be noted here that the manufacturing method of the packaging structure of this embodiment is similar to the manufacturing method of the packaging structure of the foregoing embodiment, therefore, this embodiment uses the component labels and part of the content of the foregoing embodiments, in which the same labels are used The same or similar elements are indicated, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated in this embodiment. Please refer to FIG. 17 to FIG. 20. The difference between the manufacturing method of the packaging structure of this embodiment and the manufacturing method of the packaging structure of the foregoing embodiment will be described below.

In this embodiment, the ball bottom support layer 120 can cover the upper surface of the carrier board 105 as shown in FIG. 17. The release layer 112 in the foregoing embodiment can be selectively disposed between the carrier 105 and the ball bottom support layer 120. Next, the steps shown in FIG. 18 can be obtained by sequentially forming the redistribution circuit layer 130, setting the wafer 140, and forming the encapsulant 150 in accordance with the manufacturing process similar to the previous embodiment shown in FIGS. 4-9. Next, the carrier 105 is removed and the ball base support layer 120 is patterned to form an opening 122 on the ball base support layer 120 that exposes the patterned circuit layer 132 as shown in FIG. 19. The above patterning process may include laser drilling, dry etching or wet etching.

In addition, in another embodiment, the material of the spherical bottom support layer may be a light-sensitive material. In this way, before the carrier 105 is removed, that is, in a state as shown in FIG. 18, a patterned exposure process is performed on the portion of the ball support layer 120 corresponding to the opening 122 to be formed. Part of the bottom support layer 120 is partially exposed with ultraviolet light or laser. This embodiment is only an example, and the actual exposed area may be determined according to whether the material of the bottom support layer 120 belongs to positive photoresist or negative photoresist. The part of the bottom support layer 120 corresponding to the opening 122 will be cracked due to exposure. Therefore, when the carrier board 105 is detached from the bottom support layer 120, the part of the bottom support layer 120 corresponding to the opening 122 will be Removal, so that the opening 122 exposing the patterned circuit layer 132 as shown in FIG. 19 can be formed on the ball bottom support layer 120. In this way, in this embodiment, the opening 122 exposing the patterned circuit layer 132 can be formed on the ball-bed support layer 120 while removing the carrier 105.

Next, the solder ball 160 may be disposed in the opening 122 of the bottom support layer 120 as shown in FIG. 20 and electrically connected to the patterned circuit layer 132. Therefore, the ball bottom support layer 120 can provide structural support for the solder balls 160 and can help the solder balls 160 to be aligned, thereby improving the reliability of the packaging structure 100. In addition, the ball bottom support layer 120 can further prevent moisture from entering the packaging structure 100, and thus can increase the ability of the packaging structure 100 to block moisture and / or resist oxidation.

21 to 23 are schematic partial cross-sectional views of a method for manufacturing a packaging structure according to another embodiment of the present disclosure. It should be noted here that the manufacturing method of the packaging structure of this embodiment is similar to the manufacturing method of the packaging structure of the foregoing embodiment, therefore, this embodiment uses the component labels and part of the content of the foregoing embodiments, in which the same labels are used The same or similar elements are indicated, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiment, which will not be repeated in this embodiment. Please refer to FIG. 21 to FIG. 23, the difference between the manufacturing method of the packaging structure of this embodiment and the manufacturing method of the packaging structure of the foregoing embodiment will be described below.

Please refer to FIG. 21 first. The manufacturing method of the package structure of this embodiment may form a patterned photoresist layer R2 on the bottom of the ball after the steps of FIG. 19 (that is, after forming the opening 122 exposing the patterned circuit layer 132) On the layer 120, wherein the patterned photoresist layer R2 exposes each opening 122.

Next, referring to FIG. 22, a metallization process is performed using the patterned photoresist layer R2 as a mask to form the adhesion layer 114 shown in FIG. 22. In this embodiment, the above-mentioned metallization may be an electroless plating (electroless plating) process to form an adhesion layer 114 on the exposed portion of the patterned photoresist layer R2, wherein the adhesion layer 114 passes through the inside of each opening 122 The wall is formed by a chemical reaction. In this embodiment, the material of the adhesion layer 114 may include titanium, copper, nickel, or silver. Of course, this embodiment is for illustration only, and the disclosure is not limited to this.

Next, referring to FIG. 23, the patterned photoresist layer R2 is removed. After that, a plurality of solder balls 160 can be formed in the opening 122 of the bottom support layer 120 as shown in FIG. 16, and a packaging structure 100 similar to that shown in FIG. 16 can be formed, but the adhesion layer 114 in this embodiment is The metal and the ball support layer 120 are generated through a chemical reaction. Therefore, the adhesion layer 114 and the ball support layer 120 are coplanar with the lower surface of the patterned circuit layer, and the surface of the patterned circuit layer 132 is not covered by the adhesion layer 114.

In summary, the package structure and the manufacturing method of the disclosed embodiment first form a ball-bottom support layer on the carrier board and then form a redistribution circuit layer thereon, and can form an opening with an opening when the carrier board is removed later Support layer of the ball bottom. In this way, the package structure formed under the process of forming the redistribution circuit layer and then setting the chip can have a ball-bottom support layer, thus providing structural support for the solder balls and helping the solder balls to be aligned, improving the reliability of the package structure. Moreover, the adhesion layer covers the inner wall of the opening and the part of the patterned circuit layer exposed by the opening, so that the connection strength between the solder ball and the opening and the patterned circuit layer can be improved. In addition, the spherical bottom support layer can prevent moisture from entering the packaging structure, and thus can increase the capacity of the packaging structure to block moisture and / or anti-oxidation. Therefore, the package structure and the manufacturing method of the present disclosure can effectively improve the process yield and structural reliability of the package structure.

Although this disclosure has been disclosed as above with examples, it is not intended to limit this disclosure. Anyone who has ordinary knowledge in the technical field should make some changes and retouching without departing from the spirit and scope of this disclosure. The scope of protection disclosed in this disclosure shall be subject to the scope defined in the appended patent application.

100‧‧‧Package structure

105‧‧‧ carrier board

110, 110a, 110b

112‧‧‧ Release layer

114‧‧‧ adhesion layer

120‧‧‧Ball support layer

122‧‧‧ opening

130‧‧‧ Rerouting circuit layer

132‧‧‧patterned circuit layer

134‧‧‧First dielectric layer

136‧‧‧via

137‧‧‧Seed layer

138‧‧‧Second dielectric layer

139‧‧‧Ball metal layer

140‧‧‧chip

142‧‧‧conductive bump

150‧‧‧Packing colloid

160‧‧‧solder ball

R1, R2‧‧‧ Patterned photoresist layer

S1‧‧‧First surface

S2‧‧‧Second surface

1 to 10 are schematic flow cross-sectional views of a method for manufacturing a packaging structure according to an embodiment of the disclosure. 11 is a schematic flow cross-sectional view of a packaging structure according to another embodiment of the present disclosure. 12 is a schematic flow cross-sectional view of a packaging structure according to another embodiment of the present disclosure. 13 to 16 are schematic partial cross-sectional views of a method for manufacturing a packaging structure according to another embodiment of the present disclosure. 17-20 are schematic cross-sectional flow diagrams of a method of manufacturing a packaging structure according to another embodiment of the present disclosure. 21 to 23 are schematic partial cross-sectional views of a method for manufacturing a packaging structure according to another embodiment of the present disclosure.

Claims (22)

A packaging structure includes: a redistribution circuit layer, including a first surface, a second surface opposite to the first surface, and a patterned circuit layer disposed on the first surface, wherein an outer portion of the patterned circuit layer The surface is coplanar with the first surface; a chip is disposed on the second surface and is electrically connected to the patterned circuit layer; an encapsulant is disposed on the second surface to cover the chip; a ball-bottom support layer, Disposed on the first surface and including a plurality of openings that expose the outer surface of the patterned circuit layer; an adhesion layer covering an inner wall of each of the openings; and a plurality of solder balls respectively disposed on the The openings are electrically connected to the patterned circuit layer. The packaging structure as described in Item 1 of the patent application range, wherein the material of the dielectric layer of the ball-bottom support layer and the redistribution circuit layer is different. The packaging structure as recited in item 1 of the patent application scope, wherein the redistribution circuit layer further includes: a plurality of via holes communicating with the first surface and the second surface, and electrically connected to the patterned circuit layer; and a The ball bottom metal layer is disposed on the second surface and electrically connected to the via holes. The packaging structure as recited in item 3 of the patent application range, wherein the redistribution circuit layer further includes: a first dielectric layer, wherein the patterned circuit layer is embedded in the first dielectric layer, and the patterned circuit The outer surface of the layer is coplanar with the surface of the first dielectric layer to jointly define the first surface; a second dielectric layer is disposed on the first dielectric layer, wherein the vias penetrate the The second dielectric layer and the bottom metal layer are disposed on the second dielectric layer. The packaging structure according to item 4 of the patent application scope, wherein the Young's coefficient of the material of the first dielectric layer is smaller than the Young's coefficient of the material of the second dielectric layer, and the material of the first dielectric layer Young's coefficient is less than 10Gpa. The packaging structure as described in item 1 of the patent application range, wherein the thickness of the underlayer support layer is between 1 micrometer (μm) and 50 micrometers or greater than or equal to one-tenth of a diameter of each opening. The packaging structure as described in item 1 of the patent application scope, wherein the material of the adhesion layer includes titanium, copper, nickel or silver. The packaging structure as described in item 1 of the patent application scope, wherein the adhesion layer covers a portion of the patterned circuit layer exposed by the openings. The package structure as described in item 1 of the patent application range, wherein a bottom surface of the attachment layer away from the patterned circuit layer and a bottom surface of the ball-bottom support layer away from the patterned circuit layer are coplanar. A manufacturing method of a packaging structure includes: forming a ball-bottom support layer on a carrier board; forming a re-routing circuit layer on the ball-bottom supporting layer, wherein the re-wiring circuit layer includes a first connecting the ball-bottom supporting layer A surface, a second surface opposite to the first surface, and a patterned circuit layer embedded in the first surface, an outer surface of the patterned circuit layer is coplanar with the first surface; a chip is disposed on the On the second surface, wherein the chip is electrically connected to the patterned circuit layer; forming a encapsulant on the second surface to cover the chip; removing the carrier board and forming a plurality of openings exposing the patterned circuit layer Forming a plurality of solder balls in the openings, wherein the solder balls are electrically connected to the patterned circuit layer. The method for manufacturing a packaging structure as described in item 10 of the patent application scope further includes: forming a plurality of protrusions on the carrier board before forming the ball-bottom support layer on the carrier board. The manufacturing method of the packaging structure as described in item 11 of the patent application scope further includes: before forming the ball-bottom support layer on the carrier board, forming a release layer on the carrier board, wherein the release layer covers The protrusions and a surface of the carrier board exposed by the protrusions. The manufacturing method of the packaging structure as described in item 12 of the patent application scope further includes: before filling the ball-bottom supporting layer between the protrusions, forming an adhesion layer on the part covering the protrusions of the release layer The upper surface of the ball bottom support layer is coplanar with a top surface of the adhesion layer, and a bottom surface of the adhesion layer away from the patterned circuit layer and the bottom surface of the ball bottom support layer away from the patterned circuit layer Coplanar. The method for manufacturing a packaging structure as recited in item 13 of the patent application range, wherein the attachment layer covers an inner wall of each opening and a portion of the patterned circuit layer exposed by each opening. The method for manufacturing a packaging structure as described in item 11 of the patent application scope, wherein the ball bottom support layer is filled between the protrusions, an upper surface of the ball bottom support layer is coplanar with an upper surface of the protrusions, The protrusions define the openings on the ball bottom support layer. The method for manufacturing a packaging structure as described in item 15 of the patent application scope, wherein the step of removing the carrier board further includes: detaching the carrier board and the protrusions from the ball-bottom support layer to form an exposed patterned circuit The openings of the layer are on the ball support layer. The method for manufacturing a packaging structure as described in item 10 of the patent application scope, wherein the step of forming the redistribution circuit layer on the ball base support layer further includes: forming a first dielectric layer on the ball base support layer, Wherein the patterned circuit layer is embedded in the first dielectric layer, and the outer surface of the patterned circuit layer and the surface of the first dielectric layer are coplanar to jointly define the first surface; forming a plurality of A via hole on the patterned circuit layer; a second dielectric layer is formed on the first dielectric layer, and the second dielectric layer surrounds the via holes; and a ball-bottom metal layer is formed on the second On the dielectric layer, the bottom metal layer is electrically connected to the vias. The method for manufacturing a packaging structure as described in item 10 of the patent application range, wherein the wafer is disposed on the redistribution circuit layer by flip-chip bonding using a plurality of conductive bumps. The method for manufacturing a packaging structure as described in item 10 of the patent application range, wherein the method of forming the openings exposing the patterned circuit layer on the underlayer support layer includes laser drilling, dry etching or wet etching. The method for manufacturing a packaging structure as described in item 10 of the patent application scope further includes: before removing the carrier, performing a patterned exposure process on the portion of the ball base support layer corresponding to the openings, wherein the ball base The material of the support layer includes a light-sensitive material; and the carrier plate is detached from the ball bottom support layer, so that the portion of the ball bottom support layer corresponding to the openings is removed along with the carrier plate to form the exposed pattern The openings of the chemical circuit layer are on the spherical bottom support layer. The method for manufacturing a packaging structure as described in item 20 of the patent application scope further includes: forming a patterned photoresist layer on the ball-bottom support layer, wherein the patterned photoresist layer exposes each of the openings; The photoresist layer is used as a mask to perform a metallization process to form an adhesion layer, wherein the adhesion layer covers an inner wall of each opening; and the patterned photoresist layer is removed. The method for manufacturing a packaging structure as described in item 10 of the patent application scope, wherein the method for removing the carrier board includes mechanical, illuminating, laser, or heating removal methods.