TWI635438B - Expandable universal serial bus audio instruction decoding circuit - Google Patents

Abstract

The invention relates to a universal serial bus (USB) audio command decoding circuit. The USB audio command decoding circuit comprises a USB connector, a readable and writable non-volatile memory, a description element read-only memory and a USB device control. Device. The USB connector is used to electrically connect to the USB host. Read and write non-volatile memory for storing multiple USB audio commands. The meta-read memory is used to store a preset USB description element. The USB device controller electrically connects the meta-read memory and the readable and writable non-volatile memory. When the readable and writable non-volatile memory does not store the code, the universal sequence bus device controller reads the description element read-only memory and transmits a preset USB description element to the USB host to establish a USB connection. When the USB connection is established, the USB host can issue a write command to write the code and the general sequence bus audio description element to the readable and writable non-volatile memory.

Description

Universal sequence bus audio command decoding circuit with expandable instructions

The present invention relates to a technique for universal sequence bus audio, and more particularly to a universal sequence bus audio command decoding circuit.

Universal serial bus audio technology, generally used in general-purpose serial bus headphones, universal serial bus sound card. However, the general sequence bus instructions are becoming more complex and the specifications are constantly updated, resulting in the use of new universal serial bus circuits for general-purpose serial bus audio products, and the use of old universal serial buss. Integrated circuit. The reason is that new specifications will add new instructions. In addition, new universal serial bus description elements are needed, so the product line needs to be updated for new specifications, resulting in an increase in production costs.

It is an object of the present invention to provide an expandable The general sequence bus instruction audio decoding circuit of the instruction writes the code by the host when the internal non-volatile memory has no code. This allows the new universal serial bus audio specification to be supported by the same product line without the need for another production line.

In view of the above, the present invention provides a universal serial bus (USB) audio command decoding circuit, which is configured in a universal serial bus device (USB device), wherein the universal serial bus device is used to transmit a universal sequence. The bus bar is electrically connected to a universal serial bus host (USB host). The universal sequence bus audio command decoding circuit includes a universal serial connector (USB connector), a readable and writable non-volatile memory, a descriptive memory (descriptor ROM), and a universal serial bus device. Controller (USB device controller). The universal serial bus connector is used to electrically connect to the universal serial bus master. The readable and writable non-volatile memory is used to store the firmware of the universal serial bus audio command decoding circuit, which includes the code and the universal sequence bus audio description element. The meta-read memory is used to store a preset universal sequence bus description element. The universal serial bus device controller is electrically connected to the description element read-only memory and the readable and writable non-volatile memory.

When the readable and writable non-volatile memory does not store the code, the universal sequence bus device controller reads the description element read-only memory and transmits the preset universal sequence bus description element to the universal sequence bus master to establish a universal sequence. Bus connection. When the universal sequence bus connection is established, the universal sequence bus master can issue a write command and write The above firmware is readable and writable non-volatile memory.

According to a general sequence bus audio command decoding circuit according to a preferred embodiment of the present invention, the universal sequence bus audio command decoding circuit further includes a register bank and a microprocessor. The temporary storage area is electrically connected to the universal serial bus device controller for temporarily storing the universal serial bus audio command corresponding to the universal serial bus audio description element. The microprocessor is coupled to the readable and writable non-volatile memory and the temporary storage area for reading the universal serial bus audio description element and interpreting the corresponding universal serial bus audio command, and placing the same in the temporary register Library area.

According to a general-purpose serial bus audio command decoding circuit according to a preferred embodiment of the present invention, the universal sequence bus audio command decoding circuit further includes a random access memory electrically connected to the microprocessor. When the readable and writable non-volatile memory stores the code, and the universal serial bus device is connected to the universal serial bus host, the microprocessor reads the description element in the readable and writable non-volatile memory code, and Stored in the random access memory, and the universal sequence bus device controller fetches the description element from the random access memory to establish a universal sequence bus connection with the universal sequence bus master.

The universal sequence bus audio command decoding circuit according to the preferred embodiment of the present invention, when the readable and writable non-volatile memory stores the code, and the universal sequence bus device is connected to the universal serial bus host, the micro processing Read the above-mentioned universal sequence bus audio command in the readable and writable non-volatile memory, and transfer it to the scratchpad area, general order The busbar device controller compares the instruction passed by the universal serial bus host with the above-mentioned universal sequence bus audio command in the register area until the instruction content of the register area and the universal sequence bus host The passed instructions match or until the scratchpad area is read. In a preferred embodiment, if any instruction in the scratchpad area matches the instruction passed by the general sequence bus master, then the instruction is valid and all parameters are stored in the random access memory. In another preferred embodiment, if a specific instruction transmitted by the universal sequence bus master has no matching instruction in the scratchpad area, the specific instruction is an invalid instruction, and the universal sequence bus device controller returns a pause. (stall) to the universal sequence bus master.

The spirit of the present invention is to set a default description descriptor ROM on a universal serial bus audio product, and the universal sequence bus is before the readable and writable non-volatile memory has been written. When the audio product is electrically connected to the universal serial bus host through the universal serial bus, the universal serial bus audio product uses the description element in the described meta-read memory to perform a universal sequence bus connection with the universal serial bus host, and further The general sequence bus master writes the corresponding code according to the nature of the product. Then, when the universal serial bus audio product is connected to the universal serial bus host again, the description element in the above written code is used to connect with the universal serial bus host. Therefore, the present invention does not need to change the product line or design a new integrated circuit due to the specification upgrade, and only needs to change the code stored in the universal serial bus host.

The above and other objects, features and features of the present invention are The advantages can be more clearly understood, and the preferred embodiments are described below in conjunction with the drawings and are described in detail below.

101‧‧‧Common serial bus connector (USB connector)

102‧‧‧Read and write non-volatile memory

103‧‧‧Description of the only read-only memory (descriptor ROM)

104‧‧‧Common serial bus controller controller (USB device controller)

105‧‧‧Command circuit

106‧‧‧Common sequence bus master

201‧‧‧Register bank (register bank)

202‧‧‧Microprocessor

203‧‧‧Static Random Access Memory

204‧‧‧flash memory (flash memory)

S300~S310‧‧‧ The operational flow of the universal sequence bus audio command decoding circuit in the universal serial bus device of a preferred embodiment of the present invention

1 is a circuit block diagram of a general-purpose serial bus audio command decoding circuit in a universal serial bus device according to a preferred embodiment of the present invention.

2 is a circuit block diagram of a general-purpose serial bus audio command decoding circuit in a universal serial bus device according to a preferred embodiment of the present invention.

FIG. 3 is a flow chart showing the operation of the universal sequence bus audio command decoding circuit in the universal serial bus device according to a preferred embodiment of the present invention.

1 is a circuit block diagram of a general-purpose serial bus audio command decoding circuit in a universal serial bus device according to a preferred embodiment of the present invention. Referring to FIG. 1 , the universal sequence bus audio command decoding circuit includes a universal serial port connector (USB connector) 101, a readable and writable non-volatile memory 102, a descriptive memory (descriptor ROM) 103, A universal serial device controller (USB device controller) 104 and an instruction circuit 105. In order to facilitate the description of the present invention, in this embodiment, a universal serial bus master 106 is also illustrated.

The universal serial bus connector 101 is used to electrically connect the universal serial bus host 106. The readable and non-volatile memory 102 is mainly used to store the firmware of the universal serial bus device. In this embodiment, the firmware includes a code and a general sequence bus audio description element and an audio command. Universal sequence bus audio descriptions and audio commands can be found in the USB audio class 1.0 specification, the USB audio class 2.0 specification, or the USB audio class 3.0 specification. The description meta-read memory 103 is used to store a preset universal sequence bus description element, the function of which is detailed later. The universal serial bus device controller 104 is electrically coupled to describe the meta-read memory 103 and the readable and writable non-volatile memory 102.

First, it is assumed that the readable and writable non-volatile memory 102 of the universal serial bus device is not written into the firmware or the code. Therefore, the host cannot recognize the device as a universal serial bus audio device (USB audio). Device). At this time, it is assumed that the universal serial bus device is inserted into the universal serial bus host, such as a computer, a tablet, a server, and the like. In the case that the readable and writable non-volatile memory 102 is not written into the firmware or the code, the universal sequence bus device controller 104 directly retrieves the preset description stored in the description element read-only memory 103. yuan. For example, the preset description element may be a description element of a universal serial bus storage device (USB Mass Storage Device). At this time, the universal sequence bus bar device recognizes the universal sequence bus bar device as a flash drive. Therefore, the universal serial bus master can directly program the code into the readable and writable non-volatile memory 102. The above code will include the description element of the universal serial bus audio device and its corresponding pass. Use the sequence bus to order audio commands.

Thereafter, when the readable and writable non-volatile memory 102 has a code, the universal sequence bus device controller 104 extracts the universal sequence from the code of the readable and writable non-volatile memory 102 at the next connection. The description element of the bus audio device, at this time, the universal sequence bus master recognizes the device inserted into the universal sequence bus slot as a universal sequence bus audio device. Thereafter, the above-described command circuit 105 performs an operation such as a comparison command to execute the operation of the universal sequence bus audio device.

In the prior art, the universal serial bus audio device requires a production line in the USB audio class 1.0 specification, another production line in the USB audio class 2.0 specification, and another production line in the USB audio class 3.0 specification. The reason is that the program must be programmed in readable and writable non-volatile memory before starting the system. The general procedure is to first program the code into a readable and writable non-volatile memory on another machine, and then solder the readable and writable non-volatile memory to the system. However, it can be seen from the above embodiment that no matter how the specifications are introduced, the hardware part does not need to be changed at all, and only the code inside the universal serial bus host is changed, and the product is upwardly phased by programming the code. Capacity, increase the compatibility of the hardware. Therefore, the present invention can achieve the purpose of supporting the USB audio class 1.0 specification and the USB audio class 2.0 specification without changing the hardware.

In addition, the general-purpose serial bus audio decoding circuit of the present invention has a wide range of application products, and the fixed description elements of the prior art are limited. The use range of the universal serial bus audio integrated circuit, the invention adopts the elastic adjustment description element, which can maximize the product diversity supported by the universal serial bus audio decoding circuit. For example, the setting of the two-channel and eight-channel or six-bit sampling rate and the thirty-two-bit sampling rate can be achieved by filling different readable elements in the readable and writable non-volatile memory 102.

In the above embodiment, although the description element of the universal serial storage device (USB Mass Storage Device) is taken as an example, those skilled in the art should know that, besides the description element of the mass storage device of the universal serial bus. The other description elements can also achieve the function of accessing the readable and writable non-volatile memory 102, so the invention is not limited thereto.

2 is a circuit block diagram of a general-purpose serial bus audio command decoding circuit in a universal serial bus device according to a preferred embodiment of the present invention. Referring to FIG. 2, in the embodiment, the instruction circuit 105 is implemented by a register bank 201, a microprocessor 202, and a static random access memory (SRAM) 203. . Further, the readable and writable non-volatile memory 102 is implemented by a flash memory 204. The coupling relationship is as shown in the figure.

When the universal serial bus audio device starts to operate, the microprocessor 202 writes the universal serial bus audio command supported by the product into the temporary memory area 201, and the description element of the universal serial bus audio device is The flash memory 204 is stored in the static random access memory 203. General-purpose serial bus audio device and universal serial bus When the host 106 establishes a connection, the universal sequence bus device controller 104 reads the description meta-return universal sequence bus master 106 from the static random access memory 203.

After the universal sequence bus device controller 104 receives the universal sequence bus audio command sent by the universal sequence bus master 106, the comparison circuit or program inside the universal sequence bus device controller 104 reads the scratchpad library. The content of the area 201 is compared with the general sequence bus audio command stored in the scratchpad area 201 and the general sequence bus audio command sent by the universal serial bus host 106 until the register area 201 The contents of the instruction match the instructions passed by the universal sequence bus master 106 or until the register is completed.

If any instruction in the scratchpad area 201 matches the instruction passed by the general sequence bus master 106, then the instruction is valid and all parameters will be stored in the static random access memory 203 by the microprocessor 202. In the process of comparison, if there is no matching instruction in the scratchpad area 201, this is an invalid instruction, and the control circuit stalls the back to the universal sequence bus host 106.

FIG. 3 is a flow chart showing the operation of the universal sequence bus audio command decoding circuit in the universal serial bus device according to a preferred embodiment of the present invention. Please refer to FIG. 3, the operation process of the universal sequence bus audio instruction decoding circuit includes:

Step S300: Start.

Step S301: Insert the universal serial bus device into the host.

Step S302: Determine whether there is a code in the flash memory. If there is a code in the flash memory, step S303 is performed, and if there is no code in the flash memory, step S307 is performed.

Step S303: Download the code to the static random access memory inside the microprocessor. The universal serial bus device controller 104 dumps the code from the flash memory 204 to the static random access memory inside the microprocessor 202.

Step S304: Fill in the description element according to different applications. The microprocessor 202 fills in the description element and audio instructions into the scratchpad area 201.

Step S305: Upload the audio device description element to the host to establish a connection. The universal sequence bus device controller 104 uploads the description elements in the scratchpad pool area to the universal sequence bus master 106.

Step S306: The universal sequence bus master recognizes that the inserted universal sequence bus device is an audio device.

Step S307: Start the built-in description element. When there is no code in the flash memory, the universal sequence bus device controller 104 extracts the preset description element from the description element read-only memory 103.

Step S308: Upload the preset description element to the universal sequence bus host to establish a connection. The universal sequence bus device controller 104 sends the fetched preset description elements to the universal sequence bus master to establish a preset universal sequence bus connection, such as a universal serial bus mass storage device connection.

Step S309: the system is connected to the general sequence bus master The machine is recognized as a universal serial bus device. The universal sequence bus device controller 104, by the above actions, causes the universal sequence bus master to identify the device as, for example, a universal serial bus mass storage device.

Step S310: The universal sequence bus master writes the code to the flash memory. Thereby, the system will be recognized as a universal serial bus audio device when the next connection is established.

In summary, the spirit of the present invention is to set a default description descriptor ROM on a universal serial bus audio product, before the readable and writable non-volatile memory has been written. When the universal serial bus audio product is electrically connected to the universal serial bus host through the universal serial bus, the universal serial bus audio product uses the description element described above in the meta-read memory and the universal serial bus host to perform a universal sequence. The bus is connected, and the general-purpose serial bus host writes the corresponding code according to the nature of the product. Then, when the universal serial bus audio product is connected to the universal serial bus host again, the description element in the above written code is used to connect with the universal serial bus host. Therefore, the present invention does not need to change the product line or design a new integrated circuit due to the specification upgrade, and only needs to change the code stored in the universal serial bus host.

The specific embodiments of the present invention are intended to be illustrative only and not to limit the invention to the above embodiments, without departing from the spirit of the invention and the following claims. The scope of the invention and the various changes made are within the scope of the invention. Therefore, the scope of protection of the present invention is attached to the application for the application. The scope defined by the scope of interest is subject to change.

Claims (5)

A universal serial bus (USB) audio command decoding circuit is configured in a universal serial bus device (USB device), wherein the universal serial bus device is connected to a universal serial bus through a power supply Connecting a universal serial bus host (USB host), comprising: a universal serial bus connector (USB connector) for electrically connecting the universal serial bus host; a readable and writable non-volatile memory for Storing a firmware of the universal serial bus audio command decoding circuit, comprising a plurality of universal serial bus audio commands; and a description memory (descriptor ROM) for storing a preset universal serial bus description element; And a universal serial device controller (USB device controller) electrically connected to the description element read-only memory and the readable and writable non-volatile memory, wherein when the readable and writable non-volatile memory is not stored When the code is coded, the universal sequence bus device controller reads the description element read-only memory and transmits the preset universal sequence bus description element to the universal Queue bus hosts to establish a universal sequence bus connection, wherein when the universal sequence bus connection is established, and the general sequence bus master issues a write command, the firmware is written to the readable and writable non-volatile memory The universal sequence bus audio decoding circuit further includes: a register bank, electrically connected to the universal sequence bus device controller for temporarily storing the plurality of universal sequence bus audio commands; and a microprocessor coupled to the readable and writable The volatile memory and the register storage area are configured to read the plurality of universal serial bus audio commands and place the same in the register storage area, wherein when the readable and writable non-volatile memory is stored When the code is coded, and the universal serial bus device is connected to the universal serial bus host: the microprocessor reads the plurality of universal serial bus audio commands in the readable and writable non-volatile memory, and dumps the a register area of the register; the universal sequence bus device controller compares the instruction passed by the universal sequence bus host with the plurality of common sequence bus line instructions in the register area until the temporary storage The instruction content of the library area matches the instruction passed by the universal sequence bus master or until the scratchpad area is read. The universal sequence bus audio command decoding circuit described in claim 1 further includes: a random access memory electrically connected to the microprocessor, wherein the readable and writable non-volatile memory is stored When there is a code, and the universal serial bus device is connected to the universal serial bus host: 1. The microprocessor reads the description element in the code of the readable and writable non-volatile memory, and stores it in the code Random access memory; second, the universal sequence bus device controller is operated by the random access memory The body fetches the description element to establish a universal sequence bus connection with the universal sequence bus master. The universal sequence bus audio command decoding circuit according to claim 1, wherein the instruction is valid if any instruction in the register area matches the instruction transmitted by the universal sequence bus host All parameters will be stored in the random access memory. The universal sequence bus audio command decoding circuit according to claim 1, wherein if the specific instruction transmitted by the universal sequence bus host has no matching instruction in the register area, the specific The instruction is an invalid instruction, and the universal sequence bus device controller returns a stall to the universal sequence bus master. The universal sequence bus audio command decoding circuit as described in claim 2, wherein the random access memory system is a static random access memory.