TWI632690B - Semiconductor substrate, solar cell, solar cell module, method for cutting a semicroductor brick and device cutting a semicroductor brick - Google Patents

Abstract

A semiconductor substrate includes: a first surface including a periodic first waveform profile, wherein the first waveform has a plurality of peaks and troughs, and any of the peaks and troughs of the first waveform extend in a straight line direction; a second surface opposite to the first surface and including a periodic second waveform profile, wherein the second waveform has a plurality of peaks and troughs, and any of the peaks and troughs of the second waveform are along the line The direction extends, and the peaks of the second waveform correspond to the valleys of the first waveform, and the valleys of the second waveform correspond to the peaks of the first waveform.

Description

Semiconductor substrate, solar cell, solar cell module, semiconductor ingot cutting Cutting method, semiconductor ingot cutting device

The present invention relates to a semiconductor substrate, a solar cell, a solar cell module, a semiconductor ingot cutting method, a semiconductor ingot cutting device, and more particularly to a semiconductor substrate, a solar cell, a solar cell module, and a semiconductor ingot cutting. The method, a semiconductor ingot cutting device, the surface of the semiconductor substrate comprising a periodic waveform profile.

A solar cell is a kind of photoelectric component that converts light energy into electrical energy. It is one of the important alternative energy sources due to low pollution, low cost and the use of endless solar energy as an energy source. The basic structure of a solar cell is formed by bonding a P-type semiconductor to an N-type semiconductor. When sunlight is applied to a solar substrate having the PN junction, light energy excites electrons in the germanium atom to generate convection of electrons and holes. Moreover, these electrons and holes are concentrated on the negative electrode and the positive electrode by the built-in electric field formed at the PN junction, so that voltage is generated at both ends of the solar cell. At this time, an electrode can be used to connect both ends of the solar cell to an external circuit to form a loop, thereby generating a current, which is the principle of solar cell power generation.

At present, a semiconductor ingot or a brick is cut into a solar substrate used for a solar cell, and the twin rod is required to be cut into a paper-like sheet, and the long metal wire is configured into a metal wire according to a certain method. After the net, the twine is cut at a speed of, for example, about 60 kilometers per hour, and the twine is simultaneously cut into hundreds of solar substrates. The process takes about 6 hours, and the resulting solar substrate is about 180 microns thick.

However, referring to FIG. 1a and FIG. 1b, the cutting method of the conventional semiconductor ingot 9 is mainly to cut through the ingot 8 by the straight cutting path 91, so that the two cutting surfaces 901 and 902 of the solar substrate 90 form a flat surface, which cannot be The area of the two cutting surfaces 901, 902 is increased.

Therefore, there is a need to provide a semiconductor substrate, a solar cell, a solar cell module, a semiconductor ingot cutting method, and a semiconductor ingot cutting device, which can solve the aforementioned problems.

SUMMARY OF THE INVENTION One object of the present invention is to provide a semiconductor substrate having a surface including a periodic waveform profile in which the front and back sides correspond to each other.

According to the above objective, the present invention provides a semiconductor substrate comprising: a first surface comprising a first waveform profile of a periodicity, wherein the first waveform has a plurality of peaks and troughs, and any peak of the first waveform and The troughs all extend in a straight line direction; and a second surface opposite to the first surface and including a periodic second waveform profile, wherein the second waveform has a plurality of peaks and troughs, the second waveform A peak and a valley extend along the linear direction, and the peaks of the second waveform correspond to the valleys of the first waveform, and the valleys of the second waveform correspond to the peaks of the first waveform.

The invention can increase the surface area of the cut semiconductor substrate by changing the cutting path of the semiconductor ingot from a straight line to a multiple turning line or a multiple curve, thereby increasing the overall light receiving area of the surface of the semiconductor cell, thereby increasing the current and Conversion efficiency to improve overall electrical efficiency.

5‧‧‧Solar battery module

51‧‧‧Front glass plate

52‧‧‧Back plate

53‧‧‧Package

6‧‧‧Solar battery

6'‧‧‧ solar cells

60‧‧‧Substrate

601‧‧‧ positive

602‧‧‧ back

61‧‧ ‧ emitter layer

62‧‧‧ Back electric field layer

63a‧‧‧First passivation layer

63b‧‧‧second passivation layer

64a‧‧‧First anti-reflective layer

64b‧‧‧second anti-reflection layer

65‧‧‧Wire

65a‧‧‧Front electrode

65b‧‧‧Back electrode

7‧‧‧Semiconductor ingot

70‧‧‧Semiconductor substrate

71‧‧‧ first surface

710‧‧‧First waveform

711‧‧‧Crest

712‧‧‧ trough

72‧‧‧ second surface

720‧‧‧second waveform

721‧‧‧Crest

722‧‧‧ trough

73‧‧‧ cutting path

74‧‧‧ cutting surface

741‧‧‧Roughened structure

742‧‧‧Roughened structure

75‧‧‧Line direction

8‧‧‧Semiconductor rod cutting equipment

81‧‧‧Base

82‧‧‧Longitudinal drive

820‧‧‧ portrait

83‧‧‧Transverse drive

830‧‧‧ Horizontal

84‧‧‧Sliced unit

840‧‧‧ cutting line network

841‧‧‧Distribution wheel

842‧‧‧Rewinder

843‧‧‧Roller

844‧‧‧ cutting line

9‧‧‧Semiconductor ingot

901‧‧‧ cutting surface

902‧‧‧ cutting surface

91‧‧‧ cutting path

A‧‧‧ bottom corner

H1‧‧‧ Height

H2‧‧‧ Height

L1‧‧‧All areas

L2‧‧‧ intermediate area

L3‧‧‧Edge area

TH‧‧‧ thickness

TX1‧‧‧ Acid etching step

TX2‧‧‧Alkaline etching step

D‧‧‧ wire diameter

1a and 1b are schematic cross-sectional views of a conventional semiconductor ingot and a semiconductor substrate after dicing.

2 is a perspective view of a semiconductor ingot cutting apparatus according to an embodiment of the present invention.

3a and 3b are schematic perspective views of a semiconductor ingot after dicing according to an embodiment of the present invention.

4a and 4b are perspective views of a semiconductor substrate after dicing according to an embodiment of the present invention.

5a and 5b are schematic cross-sectional views showing a semiconductor substrate during dicing according to an embodiment of the present invention.

6a and 6b are schematic cross-sectional views showing a cut surface of a semiconductor substrate during a roughening process according to an embodiment of the present invention.

7a to 7c are schematic cross-sectional views of a semiconductor ingot after dicing according to an embodiment of the present invention.

Figure 8 is a cross-sectional view showing a single-sided illumination solar cell according to an embodiment of the present invention.

Figure 9 is a cross-sectional view showing a double-sided illumination solar cell according to an embodiment of the present invention.

FIG. 10a is a perspective view of a solar cell module according to an embodiment of the present invention.

FIG. 10b is a partial perspective view of a solar cell module according to an embodiment of the invention.

Figure 11 is a partial cross-sectional view showing a solar cell module according to an embodiment of the present invention.

The above described objects, features, and characteristics of the present invention will become more apparent from the aspects of the invention.

Please refer to FIG. 2, which shows a semiconductor wafer cutting apparatus 8 according to an embodiment of the present invention. The semiconductor ingot may also be referred to as a semiconductor crystal column, which may be a circular or rectangular cylinder. . The semiconductor ingot cutting apparatus 8 includes a base 81, a longitudinal driver 82, a lateral driver 83, and a slicing unit 84. The pedestal 81 is used to hold a semiconductor ingot 7 (for example, a twin rod). For example, the susceptor 81 holds a strontium rod in an adhesive manner. The longitudinal driver 82 is coupled to the base 81 for driving the base 81 to move along a longitudinal direction 820. For example, the longitudinal drive 82 is a one-way thruster and can be a motor or A hydraulic actuator is used to drive the base 81 to move in one direction along the longitudinal direction 820. The lateral driver 83 is coupled to the base 81 for driving the base 81 to perform a reciprocating motion in a lateral direction 830. For example, the lateral drive 83 is a bi-directional advance/retractor that can be a screw, gear, motor or hydraulic drive for driving the base 81 to move back and forth in the lateral direction 830. The slicing unit 84 is disposed below the longitudinal direction 820 of the base 81, whereby when the semiconductor ingot 7 is driven by the longitudinal driver 82 and the lateral driver 83 to pass through the slicing unit 84, the slicing unit 84 The semiconductor ingot 7 is simultaneously cut into a plurality of semiconductor substrates. For example, the slicing unit 84 includes a movable parallel cutting wire web 840 (eg, a wire mesh) for simultaneously cutting the semiconductor ingot 7 into a plurality of semiconductor substrates. The slicing unit 84 further includes a payoff wheel 841, a take-up reel 842 and a plurality of rollers 843. One cutting line 844 starts from the pay-off wheel 841 at a specific speed (for example, about 60 kilometers per hour), and then is wound multiple times. The parallel cutting wire web 840 is formed by the roller 843 and finally returned to the take-up reel 842. For example, the cutting line 844 is a metal wire which is first wetted with a polishing liquid mixed with tantalum carbide and polyethylene glycol. This metal wire is harder than tantalum and can cut the crystal rod. Alternatively, the semiconductor ingot 7 may be sliced by, for example, a wire mesh formed by a diamond cutting line.

Referring to FIG. 3a, the semiconductor wafer cutting method of the present invention mainly provides a semiconductor ingot 7. Then, the semiconductor ingot 7 is simultaneously cut into a plurality of semiconductor substrates 70. For example, the semiconductor ingot 7 is driven by the longitudinal driver 82 and the lateral driver 83, and the parallel cutting line is passed through a waveform cutting path 73 such as a sawtooth shape (shown in FIG. 3a) or a wave shape (shown in FIG. 3b). The mesh 840 is cut through, wherein the Figure 3a shows a sharper waveform at the turning point, and Figure 3b shows a relatively gentle waveform at the turning point. In short, the two cutting surfaces 74 of the semiconductor substrate 70 are passed through. (shown in Figure 4a) is a waveform that increases the area of the two cutting surfaces 74 relative to the overall flat cutting surface.

Referring to FIG. 4a, any of the semiconductor substrates 70 of the present invention includes a first surface 71 and a second surface 72 (ie, two cutting surfaces 74), the second surface 72 being opposite the first surface 71. The first surface 71 includes a periodicity of one of the first waveforms 710 contours The first waveform 710 has a plurality of peaks 711 and valleys 712, and any of the peaks 711 and the valleys 712 of the first waveform 710 extend in the straight line direction 75. The second surface 72 includes a periodicity of a second waveform 720 profile having a plurality of peaks 721 and troughs 722 along which any of the peaks 721 and troughs 720 of the second waveform 720 are The peaks 721 of the second waveform 720 correspond to the valleys 712 of the first waveform 710, and the valleys 722 of the second waveform 720 correspond to the peaks 712 of the first waveform 710. That is, the peak of one surface of the semiconductor substrate 70 corresponds to the valley of the other surface of the semiconductor substrate 70. The first and second waveforms 710, 720 can be serrated (as shown in Figure 4a) (e.g., isosceles triangles) or wavy (shown in Figure 4b).

Referring again to FIG. 4a, the height H1 between any of the peaks 711 of the first waveform 710 and the adjacent valleys 712 is the same as the height H2 between the valleys 722 and the peaks 721 corresponding to the second waveform 720. In addition, the height between the peak 711 of the first waveform 710 and the height H1 between the adjacent valleys 712 may be less than half of the thickness TH of the semiconductor substrate 70 to avoid the thickness of the body layer of the semiconductor substrate 70 (ie, TH). Subtract the thickness of H1 or H2) too thin.

Referring to FIGS. 5a and 5b, for example, the cutting line 844 may have a wire diameter D of 100 to 150 μm, and the semiconductor substrate 70 may have a thickness TH of 180 to 200 μm or less. When controlling the longitudinal drive 82 and the lateral drive 83 to drive the speed ratio of the movement of the semiconductor ingot 7 (shown in FIG. 2), the first and second waveforms 710, 720 can be sawtooth (or wavy). The surface 74 is cut. The increased length (or area) of the cutting surface 74 is positively related to the ratio of the advancement/pullback speed of the transverse drive 83 divided by the cutting speed of the longitudinal drive 82. As the lateral drive 83 continues to advance/pull back, the first and second waveforms 710, 720 of the cutting surface 74 will form multiple turns (eg, serrated) or multiple curves of different curvature (eg, waves) having different turning angles. The shape of the shape has a round-trip conversion frequency of about 20 to 1000 μm/time. In this embodiment, the first and second waveforms 710, 720 are zigzag (isosceles triangle) waveforms, for example, the two base angles a of the isosceles triangles may be 20 degrees (shown in FIG. 5a) or 45 degrees ( Figure 5b). As can be seen from the figure, when the two base angles a of the isosceles triangles are larger, the area of the first and second surfaces 71, 72 is larger.

Referring to FIGS. 6a and 6b, the cutting surface 74 of the semiconductor substrate 70 may be subsequently subjected to a roughening process by using an etching step, also as an area for increasing the cutting surface 74. For example, referring to FIG. 6a, when the semiconductor substrate 70 is polysilicon, the roughening process of the cutting surface 74 of the semiconductor substrate 70 is generally performed by an acid etching step TX1, which is shown to be formed on the cutting surface 74. The roughened structure 741 on the first and second waveforms 710, 720, the roughened structure 741 mainly has a height of about 3 to 5 μm, and the range includes upper and lower limits, and preferably less than 4 μm in practice. Referring to FIG. 6b, when the semiconductor substrate 70 is a single crystal germanium, a roughening process of the cut surface 74 of the semiconductor substrate 70 is generally performed by an alkaline (Alkaline) etching step TX2, which is formed on the cut surface 74. The roughened structure 742 on the first and second waveforms 710, 720 has a size of about 3 to 5 μm in height, and the range includes upper and lower limits, and preferably less than 4 μm. Therefore, the height H1 between any peak of the first waveform 710 and the adjacent trough is preferably between 5 and 20 μm, and the range includes upper and lower limits, and any peak of the second waveform 720 and adjacent troughs The height H2 is preferably between 5 and 20 μm, and the range includes upper and lower limits, which significantly increases the area of the cutting surface 74 (i.e., the first surface 71 and the second surface 72). In practice, in order to further highlight the advantage of increasing surface area, the heights H1 and H2 may be set to be at least 10 μm or more, so that when the roughened structures 741 and 742 have a large size of 5 μm, the The surface area of the cutting surfaces 74 is significantly increased, so that the light receiving area of the solar substrate is also increased. In short, in the cutting surface of the first and second wave structures having periodicity of the present invention, the roughened structure 741 or 742 is further formed, so that the overall light receiving area of the semiconductor substrate 70 can be further improved, thereby It can increase the electrical effect and efficiency of solar cells.

Referring to FIG. 7a, in the embodiment, the waveform cutting path 73 of the semiconductor ingot 7 may be in a zigzag shape, and the sawtooth waveform appears on all the regions L1 of the cutting surface 74, whereby the first waveform 710 The peaks and troughs are sequentially present on the entire area L1 of the first surface 71, and the peaks and troughs of the second waveform 720 appear on the entire area L1 of the second surface 72. Please refer to FIG. 7b. In another embodiment, The waveform cutting path 71 of the semiconductor ingot 7 may be partially flat and partially serrated, and appears flat on the edge region L3 of the cutting surface 74, and the zigzag waveform appears only in the intermediate portion L2 of the cutting surface 74 ( That is, a partial region, whereby the peaks and troughs of the first waveform 710 appear only on the intermediate region L2 of the first surface 71, and the peaks and troughs of the second waveform 720 only appear in the On the intermediate portion L2 of the second surface 72. Referring to FIG. 7c, in another embodiment, the waveform cutting path 71 of the semiconductor ingot 7 may be partially flat and partially serrated, and appear flat on the intermediate portion L2 of the cutting surface 74. The sawtooth waveform Appearing only on the edge region L3 (ie, a partial region) of the cutting surface 74, whereby the peaks and troughs of the first waveform 710 appear only on the edge region L3 of the first surface 71, and the second The peaks and troughs of waveform 720 appear only on edge region L3 of second surface 72. The entire area L1 includes an intermediate area L2 and an edge area L3, which are located on both sides of the intermediate area L2. When the waveform cutting path 73 of the semiconductor ingot 7 is flat, it is possible to reduce cracks at the time of cutting.

Please refer to FIG. 8, which shows a single-sided illumination solar cell 6 in accordance with an embodiment of the present invention. The solar cell 6 includes a substrate 60, an emitter layer 61, a back field layer 62, a first passivation layer 63a, a first anti-reflective layer 64a, a second passivation layer 63b, a front electrode 65a and a Back electrode 65b. The substrate 60 is a semiconductor substrate 70 (shown in FIG. 3a) of the present invention and is of a first conductivity type having a front surface 601 and a back surface 602 opposite the front surface 601.

The front surface 601 (ie, the first surface 71 shown in FIG. 3a) includes a periodicity of a first waveform 710 having a plurality of peaks 711 and valleys 712, the first waveform 710 Any of the peaks 711 and troughs 712 extend in a straight line direction 75 (shown in Figure 3a). In addition, since the solar cell is single-sided illumination, the back surface 602 is generally subjected to a backside polishing process to be moderately flat, and the back surface 602 does not need to be a waveform profile of the second surface 72 shown in FIG. 3a.

Referring to FIG. 8 again, the emitter layer 61 is of a second conductivity type, and the emitter layer 61 is located in the substrate 60 near the front surface 601. The back electric field layer 62 is of a first conductivity type, and the back electric field layer 62 is located in the substrate 60 near the back surface 602. The first passivation layer 63a Located at the front side 601. The anti-reflective layer 64a is located on the first passivation layer 63a. The second passivation layer 63b is located at the back surface 602. The front electrode 65a passes through the first anti-reflective layer 64a and the first passivation layer 63a and contacts the emitter layer 61. The back surface electrode 65b passes through the second passivation layer 63b and contacts the back electric field layer 62.

The invention can increase the surface area of the cut semiconductor substrate by changing the cutting path of the semiconductor ingot from a straight line to a multiple turning line or a multiple curve, thereby increasing the overall light receiving area of the surface of the semiconductor cell, thereby increasing the current and Conversion efficiency to improve overall electrical efficiency. The cutting surface 74 of the front side 601 of Figure 8 of the embodiment will also have a roughened structure 741 or 742 (shown in Figure 6a or Figure 6b) whereby the overall surface area may be increased by the presence of the cutting surface 74. Then, these roughened structures 741 or 742 are formed on the polycrystalline or single crystal substrate by the process of surface roughening, thereby increasing the surface area of the light-receiving surface, thereby improving the photoelectric efficiency.

Referring to Figure 9, there is shown a double-sided illuminated solar cell 6' in accordance with one embodiment of the present invention. The solar cell 6 includes a substrate 60, an emitter layer 61, a back field layer 62, a first passivation layer 63a, a first anti-reflective layer 64a, a second passivation layer 63b, and a second anti-reflective layer. 64b is a front electrode 65a and a back electrode 65b. The substrate 60 is a semiconductor substrate of the present invention and is of a first conductivity type having a front surface 601 and a back surface 602 opposite the front surface 601.

The front surface 601 (ie, the first surface 71 shown in FIG. 3a) includes a periodicity of a first waveform 710 having a plurality of peaks 711 and valleys 712, the first waveform 710 Any of the peaks 711 and troughs 712 extend in a straight line direction 75, and the back surface 602 (ie, the second surface 72 shown in FIG. 3a) includes a periodicity of a second waveform 720 profile having a second waveform 720 having Each of the peaks 721 and the valleys 722 of the second waveform 720 extends along the linear direction 75. The peaks 721 of the second waveform 720 correspond to the valleys of the first waveform 710. 712, and the valleys 722 of the second waveform 720 correspond to the peaks 712 of the first waveform 710 (shown in FIG. 3a).

Referring again to FIG. 9, the emitter layer 61 is of a second conductivity type, and the emitter layer 61 is located within the substrate 60 proximate the front side 601. The back electric field layer 62 is of a first conductivity type, and the back electric field layer 62 is located in the substrate 60 near the back surface 602. The first passivation layer 63a is located at the front side 601. The first anti-reflective layer 64a is located on the first passivation layer 63a. The second passivation layer 63b is located at the back surface 602. The front electrode 65a passes through the first anti-reflective layer 64a and the first passivation layer 63a and contacts the emitter layer 61. The back surface electrode 65b passes through the second anti-reflective layer 64b and the second passivation layer 63b and contacts the back electric field layer 62. The cutting surface 74 of the front surface 601 and the back surface 602 in FIG. 9 of the embodiment also has a roughening structure 741 or 742 (as shown in FIG. 6a or FIG. 6b), thereby increasing the overall light receiving area. To further enhance the electrical efficiency of solar cells.

Referring to Figures 10a and 10b, a solar cell module 5 of one embodiment of the present invention is shown. The solar cell module 5 includes a plurality of solar cells electrically connected to each other, and the solar cells may be the single-sided solar cells 6 (or the double-sided solar cells 6'). For example, the front electrode 65a of the solar cell 6 is electrically connected to the back electrode 65b of the other solar cell 6 by the wire 65, so that the plurality of solar cells 6 are arranged in series or in parallel to provide a larger voltage. Or current. Referring to FIG. 11 , the solar cell module 5 further includes: a front glass plate 51 , a back plate 52 , and a package 53 , wherein the single-sided solar cells 6 (or double-sided solar cells 6 ′) are located. The front glass plate 51 and the back surface plate 52 are disposed, and the solar cells 6 are fixed by the package 53. When the solar cell module 5 is a single glass module (which includes the single-sided illumination solar cell 6), the back plate 52 is a non-transparent back plate. When the solar cell module 5 is a double glass module (which includes the above-described double-sided solar cell 6'), the back plate 52 is a transparent glass plate.

In summary, the present invention is only described as a preferred embodiment or embodiment of the technical means for solving the problem, and is not intended to limit the scope of the invention. That is, the equivalent changes and modifications made in accordance with the scope of the patent application of the present invention or the scope of the invention are covered by the scope of the invention.

Claims (19)

A semiconductor substrate comprising: a first surface comprising a first waveform profile of a periodicity, wherein the first waveform has a plurality of peaks and troughs, and any of the peaks and troughs of the first waveform extend in a straight line direction And a second surface back to the first surface and including a periodic second waveform profile, wherein the second waveform has a plurality of peaks and troughs, and any peaks and troughs of the second waveform are along The linear direction extends, and the peaks of the second waveform correspond to the valleys of the first waveform, and the valleys of the second waveform correspond to the peaks of the first waveform. The semiconductor substrate of claim 1, wherein a height between any peak of the first waveform and an adjacent valley is the same as a height between the valley and the peak corresponding to the second waveform. The semiconductor substrate according to claim 1 or 2, wherein a height between any peak of the first waveform and an adjacent valley is between 5 and 20 μm. The semiconductor substrate of claim 3, wherein the first surface comprises a roughened structure formed on the first waveform, and the roughened structure has a size of about 3 to 5 μm in height. The semiconductor substrate of claim 1, wherein the first surface comprises a roughened structure formed on the first waveform. The semiconductor substrate of claim 1, wherein a height between any peak of the first waveform and an adjacent valley is less than half of a thickness of the semiconductor substrate. The semiconductor substrate of claim 1, wherein the peaks and troughs of the first waveform appear on all or a partial region of the first surface. The semiconductor substrate of claim 1, wherein the peaks and troughs of the first waveform are only present on an intermediate portion of the first surface. The semiconductor substrate of claim 1, wherein the peaks and troughs of the first waveform appear only on an edge region of the first surface. The semiconductor substrate according to claim 1, wherein the first waveform forms a shape of a plurality of transition lines having different turning angles or multiple curves having different curvatures. The semiconductor substrate according to claim 10, wherein the multiple turning line has a zigzag shape, and the multi-curve shape is wavy. A solar cell comprising: a substrate having a first conductivity type, the substrate having a front surface and a back surface opposite the front surface, the front surface including a periodic first waveform profile, wherein the first waveform has a plurality of peaks And a trough, and any of the peaks and troughs of the first waveform extend in a straight line direction; an emitter layer is a second conductivity type, the emitter layer is located in the substrate near the front surface; and a back electric field layer is a first conductivity type, the back electric field layer is located in the substrate near the back surface; a first passivation layer is located at the front surface; a first anti-reflection layer is disposed on the first passivation layer; and a second passivation layer is Located at the back surface; a front electrode passing through the first anti-reflective layer and the first passivation layer and contacting the emitter layer; and a back electrode passing through the second passivation layer and contacting the back electric field layer . The solar cell as described in claim 12, further comprising: periodicity a second waveform profile having a plurality of peaks and troughs, wherein any of the peaks and troughs of the second waveform extend along the linear direction, and the peaks of the second waveform correspond to the first waveform The valleys, and the valleys of the second waveform correspond to the peaks of the first waveform. A solar cell module comprising: a plurality of solar cells connected to each other, the solar cells being the solar cell according to claim 12 or 13; and a front glass plate, a back plate and a package The solar cells are located between the front glass plate and the back plate, and the solar cells are fixed by the package. The solar cell module of claim 14, wherein the solar cell module is a double glass module, and the back plate material is a transparent glass plate. The solar cell module of claim 14, wherein the back sheet material is a non-transparent back sheet. A semiconductor ingot cutting method comprising the steps of: providing a semiconductor ingot; and simultaneously cutting the semiconductor ingot into a plurality of semiconductor substrates, wherein any one of the semiconductor substrates comprises a first surface and a second surface, the second Back surface of the first surface, the first surface includes a periodic first waveform profile, the first waveform having a plurality of peaks and troughs, any of the peaks and troughs of the first waveform extending in a straight line direction, The second surface includes one of the periodic second waveform profiles, the second waveform having a plurality of peaks and troughs, any of the peaks and troughs of the second waveform being along the straight The line direction extends, the peaks of the second waveform correspond to the valleys of the first waveform, and the valleys of the second waveform correspond to the peaks of the first waveform. A semiconductor ingot cutting device comprising: a base for holding a semiconductor ingot; a longitudinal driver coupled to the base for driving the base to move in a longitudinal direction; a lateral driver coupled to the a pedestal for driving the pedestal to reciprocate in a lateral direction; and a dicing unit disposed downstream of the pedestal, whereby the semiconductor ingot is driven by the longitudinal driver and the lateral driver When the dicing unit passes, the dicing unit simultaneously cuts the semiconductor ingot into a plurality of semiconductor substrates, wherein any one of the semiconductor substrates includes a first surface and a second surface, the second surface is opposite to the first surface The first surface includes a periodic first waveform profile, the first waveform having a plurality of peaks and troughs, any of the peaks and troughs of the first waveform extending in a straight line direction, the second surface comprising one of periodicity a second waveform profile having a plurality of peaks and troughs, any of the peaks and troughs of the second waveform extending along the linear direction, the second waveform Some peaks corresponding to the first wave of the plurality of troughs, and the troughs of the plurality of second waveform corresponding to the first peak of the plurality of waveforms. The semiconductor ingot cutting apparatus of claim 18, wherein the slicing unit comprises a movable parallel cutting wire mesh for simultaneously cutting the semiconductor ingot into a plurality of semiconductor substrates.