TWI629756B - Package structure and its package substrate - Google Patents

Abstract

An encapsulation substrate is formed with an opening corresponding to the crystal placement area on the insulating protection layer, and the side wall of the opening is concave and convex, so that the insulating protection layer extends into the crystal placement area to cover the crystal placement area Part of the circuit structure reduces the area of the circuit structure exposed to the crystal placement area, so when the insulating material is filled into the crystal placement area, fewer circuit structures can be contacted to avoid the problem of delamination.

Description

Packaging structure and packaging substrate

The invention relates to a semiconductor packaging technology, in particular to a packaging structure and a packaging substrate.

With the development of the electronics industry, today's electronic products have been designed in the direction of light, thin, short and diverse functions, and semiconductor packaging technologies have also developed different packaging types. In order to meet the requirements of high integration and miniaturization of semiconductor devices, the industry mostly adopts flip chip packaging structure.

FIG. 1A is a schematic cross-sectional view of a conventional flip-chip package structure 1. FIG. As shown in FIG. 1A, a semiconductor chip 13 is bonded to the electrical contact pads 110 of the circuit layer 11 of a package substrate 10 through a plurality of solder bumps 130 and electrically connected to the conductive traces 111 of the circuit layer 11, and A primer 14 is formed between the semiconductor wafer 13 and the packaging substrate 10 to cover the solder bumps 130.

However, as shown in FIG. 1A ′, the insulating protection layer 12 of the package substrate 10 is only formed with a plurality of openings 120 corresponding to the exposed electrical contact pads 110, so the primer 14 flows into the semiconductor chip 13 and the Package substrate When there are 10 rooms, it is easy to cause fillers with larger particles in the primer 14 to pass through between the semiconductor wafer 13 and the packaging substrate 10 to create voids, so that popcorn is likely to occur in the subsequent manufacturing process (Popcorn), resulting in a decrease in product yield.

FIG. 1B is a schematic cross-sectional view of another embodiment of the conventional flip-chip package structure 1 '. As shown in FIGS. 1B and 1B ′, the manufacturing process is the same as the manufacturing process shown in FIG. 1A, but the insulating protective layer 12 forms a single opening 120 ′ corresponding to the crystal region D, exposing each of the electrical contact pads 110 and Part of the conductive trace 111 prevents the insulating protective layer 12 between the electrical contact pads 110, so the larger particles in the primer 14 can easily pass between the semiconductor chip 13 and the packaging substrate 10 to avoid The primer 14 has a void problem.

However, since the bonding force between the primer 14 and the dielectric material (that is, the surface material of the packaging substrate 10) or the insulating protective layer 12 is good and the bonding strength between the copper circuit layer 11 is not good, it is In the crystal area D, the primer 14 contacts more circuit layers 11 and less dielectric materials (ie, the surface material of the package substrate 10) and the insulating protection layer 12, so the primer 14 and the package substrate The poor adhesion of 10 leads to the problem of delamination, that is, the problem of separation of the primer 14 and the packaging substrate 10.

Therefore, how to overcome the problems of the above-mentioned conventional technologies has become a problem that the industry urgently needs to overcome.

In view of the above-mentioned defects of the prior art, the present invention provides a package substrate, which includes: a substrate body with a circuit structure formed on a surface And defines at least one crystal placement region; and an insulating protective layer formed on the substrate body and the circuit structure, wherein the insulating protection layer has an opening corresponding to the crystal placement region, so that part of the circuit structure is exposed to the An opening, and the side wall of the opening is concave and convex, so that part of the insulating protective layer extends into the crystal placement region.

The present invention further provides a packaging structure including: the aforementioned packaging substrate; at least one electronic component coupled to the crystal placement area; and an insulating material formed between the electronic component and the packaging substrate.

In the aforementioned packaging structure, the insulating material is a primer or a packaging material.

In the aforementioned packaging structure and its packaging substrate, the insulating protective layer has a plurality of protrusions and a plurality of depressions extending from the side wall of the opening, and the portion exposed from the crystal placement area is covered by the protrusion Line structure.

In the aforementioned packaging structure and its packaging substrate, the concave-convex shape of the side wall of the opening is sawtooth; or, the convex-convex protrusion is rectangular, sword-shaped, arc-shaped or triangular.

In the aforementioned packaging structure, the insulating material is used as a groove communicating with the opening through the recessed portion to fill between the electronic component and the packaging substrate.

It can be seen from the above that the package structure and the package substrate of the present invention mainly use the side wall of the opening of the insulating protection layer to be concave and convex (non-flat surface), so that part of the insulating protection layer extends into the crystal placement region, In order to cover part of the circuit structure in the crystal placement area, the ratio of the area of the circuit structure exposed in the crystal placement area is reduced, so compared with the conventional technology, the insulating material of the present invention has less contact with the circuit structure, Therefore, the delamination problem can be avoided.

1,1 ’, 2‧‧‧Package structure

10,2a‧‧‧Package substrate

11‧‧‧ Line layer

110,210‧‧‧Electrical contact pad

111,211‧‧‧ conductive traces

12‧‧‧Insulation protective layer

120,220’‧‧‧opening

120 ’, 220‧‧‧ opening

13‧‧‧Semiconductor chip

130‧‧‧Solder bump

14‧‧‧ Primer

20‧‧‧Substrate body

20a‧‧‧First surface

20b‧‧‧Second surface

200‧‧‧Conductor

200a‧‧‧Through hole

21‧‧‧ First line structure

21’‧‧‧ Second line structure

22‧‧‧First insulating protective layer

22a‧‧‧Projection

22b‧‧‧Depression

22’‧‧‧Second insulation protective layer

220a‧‧‧Side wall

23‧‧‧Electronic components

23a‧‧‧action surface

23b‧‧‧non-acting surface

230‧‧‧Conducting element

24,24’‧‧‧Insulation

25‧‧‧solder ball

D‧‧‧ Crystal setting area

Figures 1A to 1A 'are schematic cross-sectional and top views of a conventional flip-chip package structure; Figures 1B to 1B' are schematic cross-sectional and top views of another conventional flip-chip package structure; section 2A Figure 2D is a schematic cross-sectional view of the manufacturing method of the package substrate and package structure of the present invention; Figure 2C 'is a schematic top view of Figure 2C; Figure 2D' is another embodiment of Figure 2D; 2D "Figures are schematic views of the top view of Figure 2D; Figures 3A to 3C are partial schematic views of another embodiment of Figure 2C '; and Figures 4A to 4C are partial views of other embodiments of Figure 2C' schematic diagram.

The following describes the implementation of the present invention by specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

It should be noted that the structure, ratio, size, etc. shown in the drawings of this specification are only used to match the contents disclosed in the specification, for those familiar with this skill to understand and read, not to limit the implementation of the present invention The limited conditions, so it does not have the technical significance, any modification of structure, change of proportional relationship or adjustment of size, should not fall within the scope of the invention without affecting the efficacy and the purpose of the invention. The technical content disclosed by the invention can be covered. At the same time, as cited in this manual The terms "upper", "first", "second", and "one" are only for the convenience of description, and are not used to limit the scope of the invention, and the relative relationship changes or adjustments. Without substantial changes in the technical content, it should also be regarded as the scope of the invention.

2A to 2D are schematic cross-sectional views of the manufacturing method of the package substrate 2a and the package structure 2 of the present invention.

As shown in FIG. 2A, a substrate body 20 having opposing first surface 20a and second surface 20b is provided, and a plurality of through holes 200a connecting the first surface 20a and the second surface 20b are formed in the substrate body 20 .

In this embodiment, the material of the substrate body 20 may be a dielectric material, such as polybenzoxazole (PBO), polyimide (PI), and prepreg (PP). ) Or other materials well known in the industry, there are no special restrictions.

As shown in FIG. 2B, a first circuit structure 21 and a second circuit structure 21 'are formed on the first surface 20a and the second surface 20b of the substrate body 20 by electroplating copper or other patterning methods, respectively, and forming electrical conductivity The body 200 electrically connects the first circuit structure 21 and the second circuit structure 21 'in the through hole 200a. In addition, the substrate body 20 may also be a circuit board with a core layer or a board body stacked with a plurality of circuit layers, and is not particularly limited.

As shown in FIG. 2C, a first insulating protective layer 22 and a second insulating protective layer 22 'are formed on the first surface 20a of the substrate body 20 and the first circuit structure 21 and the second surface 20b and the first On the two circuit structures 21 ', a package substrate 2a is made.

In this embodiment, as shown in FIG. 2C ’, on the substrate body 20 A crystal placement area D is defined on the first surface 20a, and the first circuit structure 21 has a plurality of electrical contact pads 210 located on the crystal placement area D and conductive traces 211 connected to the electrical contact pad 210 So that the first insulating protection layer 22 has a pair of openings 220 corresponding to the crystal placement area D, so that the electrical contact pads 210 and part of the conductive traces 211 are exposed to the opening 220, wherein the sidewall 220a of the opening 220 It is a non-flat surface (concavo-convex shape), so the first insulating protective layer 22 has a plurality of convex portions 22a extending from the side wall 220a of the opening 220 and a plurality of concave portions 22b opposite to the convex portions 22a.

Furthermore, the side wall 220a of the opening 220 may be irregularly shaped or irregularly shaped. Specifically, the regular concave-convex shape may be a sawtooth type, and the shape (ie, the tooth shape) of the protrusion 22a is a rectangle (as shown in FIG. 2C ′) and a sword shape (as shown in FIGS. 3A, 3B, and 4B ), Arcs (as shown in Figures 3C and 4C), triangles (as shown in Figure 4A), or other geometric shapes, etc., and the protrusions 22a can be spaced apart from each other as required (such as 2C 'and 3A to Figure 3C) or continuous adjacency (as shown in Figures 4A to 4C). It should be understood that the irregular concave-convex shape may be inconsistent in shape (e.g. mix and match various shapes), inconsistent in size (e.g. different protrusion widths of the protrusion 22a), inconsistent in arrangement (e.g. mix-and-match interval type and adjacent type) or different in pitch (As shown in Figure 2C ').

In addition, the second insulating protective layer 22 'has a plurality of openings 220', so that a part of the surface of the second circuit structure 21 'is exposed to the openings 220' correspondingly, so as to serve as an external pad or a ball pad.

In addition, the first and second insulating protective layers 22, 22 'are used as solder masks, which are made of green paint or other materials.

As shown in FIG. 2D, at least one electronic component 23 is bonded to the side of the first surface 20a of the substrate body 20 of the packaging substrate 2a, and an insulating material 24 is formed between the electronic component 23 and the packaging substrate 2a, And the solder balls 25 are combined on the exposed surface of the second circuit structure 21 '(ie the external pad or the ball pad).

In this embodiment, the electronic component 23 is an active component, a passive component, or a combination thereof, and the active component is, for example, a chip, and the passive component is, for example, a resistor, a capacitor, and an inductor. Specifically, the electronic component 23 has opposing active surfaces 23a and non-active surfaces 23b, and the active surface 23a has a plurality of electrode pads (not shown) and is combined by a plurality of conductive elements 230 and electrically connected to the electrical components Sexual contact pad 210, wherein the conductive elements 230 are blocks containing solder material or metal blocks (such as copper pillars), for example. Alternatively, the electronic component 23 can be electrically connected to the electrical contact pads 210 by wire bonding (not shown); or, the electronic component 23 can directly contact the electrical contact pads 210. Therefore, there is no limitation on the manner in which the electronic component 23 is electrically connected to the first circuit structure 21.

Furthermore, the insulating material 24 is a primer to cover the conductive elements 230. Or, as shown in FIG. 2D ', the insulating material 24' is an encapsulating material, such as polyimide (PI), dry film, epoxy, which can be pressed together (lamination) or molding (molding), and the packaging material simultaneously covers the electronic component 23.

Furthermore, as shown in FIGS. 2C ′ and 2D ″, the recess 22b of the first insulating protection layer 22 can be used as a groove communicating with the opening 220 for the insulating materials 24, 24 ′ to flow into the electronic component 23 effectively With the package substrate 2a between. Therefore, the manufacturing method of the present invention is to bond the electronic component 23 to the electrical contact pad 210 of the crystal placement area D of the package substrate 2a, and then form the insulating materials 24, 24 ', and make the insulating materials 24, 24' The groove formed along the recess 22b is smoothly filled between the electronic component 23 and the package substrate 2a.

In addition, the protrusion 22a of the side wall 220a of the first insulating protection layer 22 extends into the range of the crystal placement region D, so that it can reduce the exposure of the first circuit structure 21 to the surface of the opening 220 (i.e. the conductive The area of the top surface outside the trace 211). For example, the ratio of the area of the first circuit structure 21 originally exposed in the crystal placement area D is 62.7%, but part of the first circuit is covered by the concave-convex sidewall 220a (protruding portion 22a) of the first insulating protective layer 22 After the structure 21, the ratio of the area of the first circuit structure 21 exposed in the crystal placement area D is reduced to 58.9%. Specifically, the area of the conductive trace 111 shown in FIG. 1B 'exposed in the crystal placement area D is less than the area of the conductive trace 211 shown in FIG. 2C' exposed in the crystal placement area D.

In the manufacturing method of the present invention, the side wall 220a of the opening 220 of the first insulating protection layer 22 is a non-flat surface (concave-convex shape), so that part of the first insulating protection layer 22 (projection 22a) extends to In the crystal placement area D, a portion of the first circuit structure 21 exposed in the crystal placement area D is covered, so that the ratio of the area of the first circuit structure 21 exposed in the crystal placement area D is reduced, so compared to According to the prior art, the manufacturing method of the present invention can make the insulating material 24 contact with the first insulating protective layer 22 which is more combined with less contact with the first circuit structure 21, that is, reduce the number of the insulating material 24 and the first circuit structure 21 The contact area is to avoid delamination of the insulating material 24.

The present invention further provides a package substrate 2a, which includes: a substrate body 20. The first circuit structure 21 and the first insulating protection layer 22.

The substrate body 20 has a first surface 20a and a second surface 20b opposite to each other, and a crystal placement area D is defined on the first surface 20a.

The first circuit structure 21 is formed on the first surface 20a of the substrate body 20.

The first insulating protection layer 22 is formed on the first surface 20a of the substrate body 20 and the first circuit structure 21, and the first insulating protection layer 22 has an opening 220 corresponding to the crystal region D, A part of the first circuit structure 21 is exposed to the opening 220, wherein the side wall 220a of the opening 220 has a non-flat surface (concave and convex), so the first insulating protective layer 22 has a side wall 220a from the opening 220 The plurality of protruding portions 22a and the plurality of recessed portions 22b extend so that part of the first insulating protective layer 22 (protruding portion 22a) extends into the crystal placement region D to cover part of the first circuit structure 21.

In one embodiment, the side wall 220a of the opening 220 is concave and convex. For example, the concave-convex shape is zigzag; or, the concave-convex protrusion 22a is rectangular, sword-shaped, arc-shaped, or triangular.

The present invention also provides a packaging structure 2, which includes the packaging substrate 2 of any of the foregoing embodiments, an electronic component 23 bonded to the crystal placement area D, and the electronic component 23 formed between the electronic component 23 and the packaging substrate 2a Insulation materials 24, 24 ', and the insulation materials 24, 24' are primers or packaging materials. The insulating material 24, 24 'can pass through the recess 22b as a groove communicating with the opening 220 to fill between the electronic component 23 and the packaging substrate 2a

In summary, the package structure and the package substrate of the present invention have a non-flat surface due to the opening of the insulating protective layer formed in the crystal placement area of the package substrate (Concave and convex surface) design to cover part of the circuit structure in the crystal placement area, so that the ratio of the area of the circuit structure exposed in the crystal placement area is reduced, and the contact area between the insulating material and the circuit structure is reduced, so The delamination of the insulating material can be avoided, so the product yield can be improved.

The above embodiments are used to exemplify the principles and effects of the present invention, rather than to limit the present invention. Anyone who is familiar with this skill can modify the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be as listed in the scope of patent application mentioned later.

Claims (9)

A package substrate includes a substrate body with a circuit structure formed on a surface and defining at least one crystal placement area; and an insulating protection layer formed on the substrate body and the circuit structure, wherein the insulation protection The layer has an opening corresponding to the crystal placement region, so that part of the circuit structure is exposed to the opening, and the insulating protective layer has a plurality of protrusions and a plurality of depressions extending from the side wall of the opening, so that the side wall of the opening is The concave-convex shape makes part of the insulating protective layer extend into the crystal placement region, and covers the part of the circuit structure exposed to the crystal placement region by the protrusion. The package substrate as described in item 1 of the patent application range, wherein the protrusion is rectangular, sword-shaped, arc-shaped or triangular. The package substrate as described in item 1 of the patent application range, wherein the concave-convex shape is zigzag. A packaging structure includes: a packaging substrate, which includes: a substrate body with a circuit structure formed on a surface and defining at least one crystal placement area; and an insulating protective layer formed on the substrate body and the circuit structure In this case, the insulating protection layer has an opening corresponding to the crystal placement region, so that part of the circuit structure is exposed to the opening, and the insulating protection layer has a plurality of protrusions and a plurality of depressions extending from the side wall of the opening To make the side wall of the opening concave-convex, so that part of the insulating protective layer extends into the crystal placement area, and the portion of the circuit structure exposed to the crystal placement area is covered by the convex portion; at least one electronic component, It is bonded on the crystal placement area; and an insulating material is formed between the electronic component and the packaging substrate. The packaging structure as described in item 4 of the patent application scope, wherein the insulating material is a primer or a packaging material. The packaging structure as described in item 5 of the patent application scope, wherein the packaging material overcoats the electronic component. The packaging structure as described in item 4 of the patent application scope, wherein the protruding portion is rectangular, sword-shaped, curved or triangular. The packaging structure as described in item 4 of the patent application range, wherein the insulating material is used as a groove communicating with the opening through the recessed portion to fill between the electronic component and the packaging substrate. The packaging structure as described in item 4 of the patent application scope, wherein the concave-convex shape is zigzag.