TWI626669B - Thin film capacitor and manufacturing method thereof - Google Patents

Thin film capacitor and manufacturing method thereof Download PDF

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TWI626669B
TWI626669B TW106116922A TW106116922A TWI626669B TW I626669 B TWI626669 B TW I626669B TW 106116922 A TW106116922 A TW 106116922A TW 106116922 A TW106116922 A TW 106116922A TW I626669 B TWI626669 B TW I626669B
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layer
graphene
thin film
film capacitor
metal
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TW106116922A
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TW201901715A (en
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蘇偉誌
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中華精測科技股份有限公司
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Priority to CN201711035623.2A priority patent/CN108933041A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • H01G4/008Selection of materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/33Thin- or thick-film capacitors 

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

本揭示提供一種薄膜電容及其製造方法。薄膜電容包含:一介電層,以及一對石墨烯層,分別設置在該介電層之相對兩側,以作為該薄膜電容之電極。該電極可進一步包括一對金屬層位在該石墨烯層之外。本揭示可解決習用薄膜電容因在製造過程中金屬離子因高溫擴散進入介電層,導致電容效果不佳的問題。 The present disclosure provides a thin film capacitor and a manufacturing method thereof. The thin film capacitor includes a dielectric layer and a pair of graphene layers, which are respectively disposed on opposite sides of the dielectric layer to serve as electrodes of the thin film capacitor. The electrode may further include a pair of metal layers outside the graphene layer. The present disclosure can solve the problem that the conventional thin film capacitor has a poor capacitor effect due to the diffusion of metal ions into the dielectric layer due to high temperature during the manufacturing process.

Description

薄膜電容及其製造方法 Film capacitor and manufacturing method thereof

本揭示是關於一種薄膜電容及其製造方法,特別是關於一種具有石墨烯結構之薄膜電容及其製造方法。 The present disclosure relates to a thin film capacitor and a manufacturing method thereof, and more particularly, to a thin film capacitor having a graphene structure and a manufacturing method thereof.

現今,薄膜電容已被廣泛地應用在多種電子產品中,例如用於儲存能量、進行訊號的耦合或解耦、及電子濾波等。一般來說,薄膜電容係藉由在兩塊導電板之間設置一介電層而構成,其中介電層可使兩塊導電板之間形成電氣絕緣。當施加電壓時,電荷會堆積在導電板上並且產生電場。當施加的電壓除去時,電荷仍然保持在兩塊導電板上,以達到儲存能量之功效。 At present, thin film capacitors have been widely used in various electronic products, such as for storing energy, coupling or decoupling signals, and electronic filtering. Generally, a thin film capacitor is formed by providing a dielectric layer between two conductive plates, wherein the dielectric layer can form electrical insulation between the two conductive plates. When a voltage is applied, charges accumulate on the conductive plate and generate an electric field. When the applied voltage is removed, the charge remains on the two conductive plates to achieve the effect of storing energy.

請參照第1圖,其顯示一種習知的薄膜電容10之結構示意圖。薄膜電容10包含第一金屬層11、第二金屬層12、和介電層13,其中介電層13設置在第一金屬層11和第二金屬層12之間。由於設置在介電層13兩端的第一金屬層11和第二金屬層12皆是以金屬材料製成,因此,在薄膜電容10的製作過程中會因高溫而導致第一金屬層11和第二金屬層12中的金屬離子擴散進入介電層13中,進而在金屬層介電層13接近第一金屬層11與第二金屬層1的部分中分別形成擴散區14。然而,擴散區14的形成會造成介電層13的介電係數下降,導致電容性能不佳(如電容值下降)的問題。 Please refer to FIG. 1, which shows a structure diagram of a conventional thin film capacitor 10. The thin film capacitor 10 includes a first metal layer 11, a second metal layer 12, and a dielectric layer 13, wherein the dielectric layer 13 is disposed between the first metal layer 11 and the second metal layer 12. Since the first metal layer 11 and the second metal layer 12 disposed at both ends of the dielectric layer 13 are made of a metal material, the first metal layer 11 and the first metal layer 11 and The metal ions in the two metal layers 12 diffuse into the dielectric layer 13, and further, diffusion regions 14 are formed in portions of the metal layer dielectric layer 13 close to the first metal layer 11 and the second metal layer 1, respectively. However, the formation of the diffusion region 14 may cause the dielectric constant of the dielectric layer 13 to decrease, leading to a problem of poor capacitor performance (such as a decrease in capacitance value).

有鑑於此,有必要提供一種薄膜電容及其製造方法,以解決習知技術所存在的問題。 In view of this, it is necessary to provide a thin film capacitor and a manufacturing method thereof to solve the problems existing in the conventional technology.

為解決上述技術問題,本揭示之目的在於提供一種薄膜電容及其製造方法,其能改善在製造過程中因金屬離子擴散進入介電層,導致電容性能不佳的問題。 In order to solve the above technical problems, an object of the present disclosure is to provide a thin film capacitor and a manufacturing method thereof, which can improve the problem of poor capacitor performance due to metal ion diffusion into the dielectric layer during the manufacturing process.

為達成上述目的,本揭示提供一種薄膜電容,包含:一介電層;以及一對石墨烯層,分別設置在該介電層之相對兩側,以作為該薄膜電容之電極。 In order to achieve the above object, the present disclosure provides a thin film capacitor, including: a dielectric layer; and a pair of graphene layers respectively disposed on opposite sides of the dielectric layer as electrodes of the thin film capacitor.

於本揭示其中之一較佳實施例中,每一該石墨烯層之厚度介於0.3奈米至10微米之間。 In one preferred embodiment of the present disclosure, the thickness of each graphene layer is between 0.3 nm and 10 microns.

於本揭示其中之一較佳實施例中,該薄膜電容的電極還包含一對金屬層,分別設置在該對石墨烯層之相對兩外側,如此其中之一該石墨烯層設置在該介電層與其中之一該金屬層之間。 In one of the preferred embodiments of the present disclosure, the electrode of the thin film capacitor further includes a pair of metal layers disposed on two opposite outer sides of the pair of graphene layers, so that one of the graphene layers is disposed on the dielectric. Layer and one of the metal layers.

於本揭示其中之一較佳實施例中,每一該金屬層之厚度介於1微米至30微米之間。 In one preferred embodiment of the present disclosure, the thickness of each metal layer is between 1 micrometer and 30 micrometers.

於本揭示其中之一較佳實施例中,該介電層之厚度介於200奈米至800奈米之間。 In one preferred embodiment of the present disclosure, the thickness of the dielectric layer is between 200 nm and 800 nm.

於本揭示其中之一較佳實施例中,該介電層之材料選自於BaTiO3、Ta2O5、TiO2、HfO2、ZrO2、Al2O3、La2O3、Pr2O3及上述任意組合之其中之一。 In one preferred embodiment of the present disclosure, the material of the dielectric layer is selected from BaTiO 3 , Ta 2 O 5 , TiO 2 , HfO 2 , ZrO 2 , Al 2 O 3 , La 2 O 3 , and Pr 2. O 3 and any one of the above.

本揭示還提供一種薄膜電容之製作方法,包含形成一第一石 墨烯層;在該第一石墨烯層上形成一介電層;以及在該介電層上形成一第二石墨烯層,使得該介電層位在該第一石墨烯層與該第二石墨烯層之間。 The present disclosure also provides a method for manufacturing a thin film capacitor, including forming a first stone. An inkene layer; forming a dielectric layer on the first graphene layer; and forming a second graphene layer on the dielectric layer so that the dielectric layer is positioned between the first graphene layer and the second graphene layer Between graphene layers.

於本揭示其中之一較佳實施例中,形成該第一石墨烯層之步驟還包含:形成一第一金屬層;以及在該第一金屬層上形成該第一石墨烯層。 In one preferred embodiment of the present disclosure, the step of forming the first graphene layer further includes: forming a first metal layer; and forming the first graphene layer on the first metal layer.

於本揭示其中之一較佳實施例中,形成該第一金屬層之步驟還包含:提供一絕緣基板;在該絕緣基板上形成一金屬層;以及對該金屬層進行一光微影製程以形成該第一金屬層。 In one of the preferred embodiments of the present disclosure, the step of forming the first metal layer further includes: providing an insulating substrate; forming a metal layer on the insulating substrate; and performing a photolithography process on the metal layer to The first metal layer is formed.

於本揭示其中之一較佳實施例中,在形成該第二石墨烯層之後還包含:在該第二石墨烯層上形成一第二金屬層。 In one preferred embodiment of the present disclosure, after forming the second graphene layer, the method further includes: forming a second metal layer on the second graphene layer.

相較於習知技術,本揭示藉由採用石墨烯層作為薄膜電容的電極層,或者是將石墨烯層設置在介電層與金屬層之間以使該石墨烯層和該金屬層一起作用為該薄膜電容的電極層,進而能解決在製造過程中金屬離子因高溫擴散進入介電層,導致電容效果不佳的問題。 Compared with the conventional technology, the present disclosure uses a graphene layer as an electrode layer of a thin film capacitor, or arranges the graphene layer between a dielectric layer and a metal layer so that the graphene layer and the metal layer work together. The electrode layer of the thin film capacitor can further solve the problem that the metal ion diffuses into the dielectric layer due to high temperature during the manufacturing process, resulting in a poor capacitor effect.

1‧‧‧絕緣基板 1‧‧‧ insulating substrate

10、20、30‧‧‧薄膜電容 10, 20, 30‧‧‧ film capacitors

11‧‧‧第一金屬層 11‧‧‧ first metal layer

12‧‧‧第二金屬層 12‧‧‧Second metal layer

13‧‧‧介電層 13‧‧‧ Dielectric layer

14‧‧‧擴散區 14‧‧‧ proliferation zone

21、31‧‧‧介電層 21, 31‧‧‧ Dielectric layer

22、32‧‧‧第一石墨烯層 22, 32‧‧‧ the first graphene layer

23、33‧‧‧第二石墨烯層 23, 33‧‧‧ second graphene layer

34’‧‧‧金屬層 34’‧‧‧metal layer

34‧‧‧第一金屬層 34‧‧‧ first metal layer

35‧‧‧第二金屬層 35‧‧‧Second metal layer

D1、D2、D3、D4、D5、D6、D7、D8‧‧‧厚度 D1, D2, D3, D4, D5, D6, D7, D8‧‧‧thickness

第1圖顯示一種習知的薄膜電容之結構示意圖;第2圖顯示一種根據本揭示第一較佳實施例之薄膜電容之結構爆炸示意圖;第3A圖至第3C圖為一系列的剖面圖,顯示第2圖之薄膜電容之製造流程;第4圖顯示一種根據本揭示第二較佳實施例之薄膜電容之結構爆炸示 意圖;以及第5A圖至第5F圖為一系列的剖面圖,顯示第4圖之薄膜電容之製造流程。 Fig. 1 shows a schematic structural diagram of a conventional thin film capacitor; Fig. 2 shows a schematic structural explosion diagram of a thin film capacitor according to a first preferred embodiment of the present disclosure; Figs. 3A to 3C are a series of cross-sectional views, FIG. 2 shows a manufacturing process of a thin film capacitor. FIG. 4 shows an exploded view of a structure of a thin film capacitor according to a second preferred embodiment of the present disclosure. Intent; and FIGS. 5A to 5F are a series of cross-sectional views showing the manufacturing process of the thin film capacitor of FIG. 4.

為了讓本揭示之上述及其他目的、特徵、優點能更明顯易懂,下文將特舉本揭示較佳實施例,並配合所附圖式,作詳細說明如下。 In order to make the above and other objects, features, and advantages of the present disclosure more comprehensible, the following describes the preferred embodiments of the present disclosure and the accompanying drawings in detail, as follows.

請參照第2圖,其顯示一種根據本揭示第一較佳實施例之薄膜電容20之立結構爆炸示意圖。薄膜電容20包含介電層21、第一石墨烯層22、和第二石墨烯層23,其中第一石墨烯層22和第二石墨烯層23分別設置在介電層21之相對兩側。在本揭示第一較佳實施例中,第一石墨烯層22和第二石墨烯層23是作為薄膜電容20的電極使用。利用石墨烯本身具有的良好特性,可有效地增強薄膜電容20的使用壽命與電特性表現、提升電容儲存能力、以及降低應用於高速訊號量測時所產生的整體阻抗。另外,還可有效地達到提升薄膜電容20散熱能力以及使得薄膜電容20之整體構型小型化之效果。也就是說,在本揭示中,將第一石墨烯層22和第二石墨烯層23作為薄膜電容20之電極是增加薄膜電容20之效能的主要因子,且有利於將薄膜電容20應用於積體電路佈線或是內埋式電容。 Please refer to FIG. 2, which illustrates a schematic diagram of an exploded structure of a thin film capacitor 20 according to a first preferred embodiment of the present disclosure. The thin film capacitor 20 includes a dielectric layer 21, a first graphene layer 22, and a second graphene layer 23. The first graphene layer 22 and the second graphene layer 23 are respectively disposed on opposite sides of the dielectric layer 21. In the first preferred embodiment of the present disclosure, the first graphene layer 22 and the second graphene layer 23 are used as electrodes of the thin film capacitor 20. Utilizing the good characteristics of graphene itself, it can effectively enhance the service life and electrical characteristics of the thin film capacitor 20, improve the capacitor storage capacity, and reduce the overall impedance generated when applied to high-speed signal measurement. In addition, the effects of improving the heat dissipation capability of the thin film capacitor 20 and miniaturizing the overall configuration of the thin film capacitor 20 can be effectively achieved. That is, in the present disclosure, using the first graphene layer 22 and the second graphene layer 23 as the electrodes of the thin film capacitor 20 is a main factor that increases the performance of the thin film capacitor 20 and is beneficial to the application of the thin film capacitor 20 to the product. Body circuit wiring or embedded capacitors.

詳言之,石墨烯是由單層的碳原子以sp2軌域互相鍵結而組成之具有六角環形蜂巢狀的平面二維結構,其擁有多種優越的物理性質。舉例來說,石墨烯的熱傳導係數高達5300W/m‧K,藉此特點,可大幅度地提升薄膜電容20的散熱能力。因此,當將薄膜電容20應用在作為儲能元件時,可提升該元件於高溫工作環境的使用壽命。又,石墨烯是一種堅硬 的奈米材料,具有極高的楊氏係數(約1100GPa),並且其機械強度遠高於鋼鐵等金屬材料,藉此特點,將第一石墨烯層22和第二石墨烯層23作為薄膜電容20的電極使用時,還可兼具保護的效果。 In detail, graphene is a planar two-dimensional structure with a hexagonal ring honeycomb structure composed of single-layer carbon atoms bonded to each other with sp 2 orbital domains, and possesses various superior physical properties. For example, the thermal conductivity of graphene is as high as 5300W / m‧K. With this feature, the heat dissipation capacity of the thin film capacitor 20 can be greatly improved. Therefore, when the film capacitor 20 is applied as an energy storage element, the service life of the element in a high-temperature working environment can be improved. In addition, graphene is a hard nano material, has a very high Young's coefficient (about 1100 GPa), and its mechanical strength is much higher than metal materials such as steel. With this feature, the first graphene layer 22 and the second When the graphene layer 23 is used as an electrode of the thin film capacitor 20, it can also have a protective effect.

再者,單層的石墨烯的厚度僅約0.3奈米,並且石墨烯在室溫下的電阻率僅約10-6Ω‧cm,比銅或銀還低。又,石墨烯的比表面積高(約2,630m2g-1)且擁有豐富的中孔結構。中孔結構有助於電荷快速遷移至石墨烯表面。也就是說,石墨烯為一種薄型且具有高導電度的材料。因此,藉由將具有高比表面積的第一石墨烯層22和第二石墨烯層23作為薄膜電容20的電極層,不但可加速介電層21儲存電荷以使得薄膜電容20擁有更高的能量密度與充放電速率,還可以使得整體構型更為輕薄,以實現元件小型化之目的。此外,如第2圖所示,訊號是透過第一石墨烯層22和第二石墨烯層23製作成的電極做傳遞。由於石墨烯具有厚度薄、高比表面積與優異的電性表現,因此相對電子傳輸路徑較短,電容阻抗影響也較低,有利於用在高頻訊號傳輸。 Furthermore, the thickness of single-layer graphene is only about 0.3 nm, and the resistivity of graphene at room temperature is only about 10 -6 Ω · cm, which is lower than that of copper or silver. In addition, graphene has a high specific surface area (about 2,630 m 2 g -1 ) and has a rich mesoporous structure. The mesoporous structure facilitates the rapid migration of charge to the surface of graphene. That is, graphene is a thin and highly conductive material. Therefore, by using the first graphene layer 22 and the second graphene layer 23 with a high specific surface area as the electrode layers of the thin film capacitor 20, not only the charge storage of the dielectric layer 21 can be accelerated so that the thin film capacitor 20 has higher energy The density and charge / discharge rate can also make the overall configuration thinner and thinner, so as to achieve the purpose of miniaturizing the component. In addition, as shown in FIG. 2, the signal is transmitted through electrodes made of the first graphene layer 22 and the second graphene layer 23. Because graphene has a thin thickness, high specific surface area, and excellent electrical performance, it has a relatively short electron transmission path and a low capacitance impedance effect, which is beneficial for high-frequency signal transmission.

又,習知的薄膜電容均採用將金屬電極與介電材料直接接觸的架構,因此,在製作過程中會因高溫而導致金屬離子擴散進入介電材料中,進而造成介電材料的介電係數下降,導致電容性能不佳的問題。反觀,在本揭示中,由於石墨烯本身具有穩定的物理、化學特性,在與其他材料接觸後並不會產生離子擴散問題,故具有能優化接面電性的效果。因此,採用將介電層21與具有良好的穩定性的第一石墨烯層22和第二石墨烯層23直接接觸的架構,能有效地解決離子擴散進入介電層21的問題,以達成優化薄膜電容20效能之功效。 In addition, the conventional thin film capacitors adopt a structure in which a metal electrode directly contacts a dielectric material. Therefore, during the manufacturing process, metal ions will diffuse into the dielectric material due to high temperature, which will cause the dielectric constant of the dielectric material. Degradation, resulting in poor capacitor performance. In contrast, in the present disclosure, since graphene itself has stable physical and chemical properties, it does not cause ion diffusion problems after contacting with other materials, so it has the effect of optimizing the electrical properties of the interface. Therefore, the structure in which the dielectric layer 21 is in direct contact with the first graphene layer 22 and the second graphene layer 23 with good stability can effectively solve the problem of ion diffusion into the dielectric layer 21 to achieve optimization Thin film capacitor 20 performance.

請參照第3A圖至第3C圖,其為一系列的剖面圖,顯示第2圖之薄膜電容20之製造流程。首先,如第3A圖所示,提供一絕緣基板1,並且在絕緣基板1上形成第一石墨烯層22,其中第一石墨烯層22之厚度D1介於0.3奈米至10微米之間。接著,如第3B圖所示,在第一石墨烯層22上形成介電層21,其中介電層21之厚度D2介於200奈米至800奈米之間。介電層21是以高介電(high-K)材料製成。較佳地,介電層21之材料選自於BaTiO3、Ta2O5、TiO2、HfO2、ZrO2、Al2O3、La2O3、Pr2O3及上述任意組合之其中之一。接著,如第3C圖所示,在介電層21上形成第二石墨烯層23,其中第二石墨烯層23之厚度D3介於0.3奈米至10微米之間。如第3B圖所示,介電層21位在第一石墨烯層22和第二石墨烯層23之間。最後,將絕緣基板1移除,進而完成薄膜電容20之製作。 Please refer to FIGS. 3A to 3C, which are a series of cross-sectional views showing the manufacturing process of the thin film capacitor 20 of FIG. First, as shown in FIG. 3A, an insulating substrate 1 is provided, and a first graphene layer 22 is formed on the insulating substrate 1. The thickness D1 of the first graphene layer 22 is between 0.3 nm and 10 μm. Next, as shown in FIG. 3B, a dielectric layer 21 is formed on the first graphene layer 22, wherein the thickness D2 of the dielectric layer 21 is between 200 nm and 800 nm. The dielectric layer 21 is made of a high-k material. Preferably, the material of the dielectric layer 21 is selected from BaTiO 3 , Ta 2 O 5 , TiO 2 , HfO 2 , ZrO 2 , Al 2 O 3 , La 2 O 3 , Pr 2 O 3 and any combination thereof. one. Next, as shown in FIG. 3C, a second graphene layer 23 is formed on the dielectric layer 21, wherein the thickness D3 of the second graphene layer 23 is between 0.3 nm and 10 μm. As shown in FIG. 3B, the dielectric layer 21 is located between the first graphene layer 22 and the second graphene layer 23. Finally, the insulating substrate 1 is removed, and the manufacturing of the thin film capacitor 20 is completed.

請參照第4圖,其顯示一種根據本揭示第二較佳實施例之薄膜電容30之結構爆炸示意圖。薄膜電容30包含介電層31、第一石墨烯層32、第二石墨烯層33、第一金屬層34和第二金屬層35,其中第一石墨烯層32和第二石墨烯層33分別設置在介電層31之相對兩側,以及第一金屬層34和第二金屬層35係分別設置在第一石墨烯層32和第二石墨烯層33之相對兩側。也就是說,第一石墨烯層32係設置在介電層31與第一金屬層34之間,以及第二石墨烯層33係設置在介電層31與第二金屬層35之間。相較於第一較佳實施例,在第二較佳實施例中第一石墨烯層32和第二石墨烯層33會與第一金屬層34和第二金屬層35一起作用為該薄膜電容30的電極,並且第一石墨烯層32和第二石墨烯層33還可進一步作為介電層31與金屬層34、35之間的阻障層使用,可有效地增加薄膜電容30的效能,例如提升充放電速率、電 荷儲存量以及降低使用頻率點之電容阻抗影響等。 Please refer to FIG. 4, which shows a structural explosion diagram of a film capacitor 30 according to a second preferred embodiment of the present disclosure. The thin film capacitor 30 includes a dielectric layer 31, a first graphene layer 32, a second graphene layer 33, a first metal layer 34, and a second metal layer 35, wherein the first graphene layer 32 and the second graphene layer 33 are respectively The first and second metal layers 34 and 35 are disposed on opposite sides of the dielectric layer 31, and the first and second metal layers 34 and 33 are disposed on opposite sides of the first and second graphene layers 32 and 33, respectively. That is, the first graphene layer 32 is disposed between the dielectric layer 31 and the first metal layer 34, and the second graphene layer 33 is disposed between the dielectric layer 31 and the second metal layer 35. Compared with the first preferred embodiment, in the second preferred embodiment, the first graphene layer 32 and the second graphene layer 33 together with the first metal layer 34 and the second metal layer 35 serve as the thin film capacitor. 30 electrodes, and the first graphene layer 32 and the second graphene layer 33 can be further used as a barrier layer between the dielectric layer 31 and the metal layers 34 and 35, which can effectively increase the performance of the thin film capacitor 30, Such as increasing the charge and discharge rate, Load storage capacity and reducing the impact of capacitive impedance at the frequency of use.

在第二較佳實施例中,將石墨烯應用在薄膜電容30中同樣可發揮前述列舉的各項優點,具體說明如下。如第4圖所示,電流是透過第一金屬層34和第二金屬層35做傳遞,接著再透過第一石墨烯層32和第二石墨烯層33傳導至介電層31。由於石墨烯的比表面積高且擁有豐富的中孔結構,中孔結構有助於將電荷從第一金屬層34和第二金屬層35快速遷移至第一石墨烯層32和第二石墨烯層33之表面,進而提升介電層31儲存電荷的速率。因此,相較於市售之採用活性碳材料作為電極的電容,在本揭示中採用將金屬層34、35與石墨烯層32、33結合並作為薄膜電容30之電極的結構能獲得更高的能量密度與較快的充放電速率。 In the second preferred embodiment, applying the graphene to the thin film capacitor 30 can also exert the advantages listed above, which are described in detail below. As shown in FIG. 4, the current is transmitted through the first metal layer 34 and the second metal layer 35, and then is conducted to the dielectric layer 31 through the first graphene layer 32 and the second graphene layer 33. Due to the high specific surface area of graphene and its rich mesoporous structure, the mesoporous structure helps to quickly transfer charge from the first metal layer 34 and the second metal layer 35 to the first graphene layer 32 and the second graphene layer. 33 surface, thereby increasing the rate of charge storage of the dielectric layer 31. Therefore, compared with a commercially available capacitor using an activated carbon material as an electrode, in the present disclosure, a structure in which the metal layers 34 and 35 are combined with the graphene layers 32 and 33 and used as an electrode of the thin film capacitor 30 can obtain a higher Energy density and faster charge and discharge rates.

再者,如第4圖所示,薄膜電容30的訊號是經由金屬層34、35與石墨烯層32、33結合而成的電極進行傳遞。由於石墨烯具有厚度薄、高比表面積與優異的電性表現,因此相對電子傳輸路徑較短,電容阻抗影響也較低,有利於將薄膜電容30應用在高頻訊號傳輸。 In addition, as shown in FIG. 4, the signal of the thin film capacitor 30 is transmitted through electrodes formed by combining the metal layers 34 and 35 and the graphene layers 32 and 33. Because graphene has a thin thickness, a high specific surface area, and excellent electrical performance, it has a relatively short electronic transmission path and a low capacitance impedance effect, which is beneficial to the application of the thin film capacitor 30 in high frequency signal transmission.

又,由於單層石墨烯的厚度僅約0.3奈米,因此即使在第一金屬層34和第二金屬層35與介電層31之間增設第一石墨烯層32和第二石墨烯層33,並不會對於整體元件厚度產生不良影響。且由於石墨烯表面具有凡德瓦爾力,可提供第一金屬層34和第二金屬層35與介電層31間具有良好的結合力,有利於縮小元件尺寸。 In addition, since the thickness of the single-layer graphene is only about 0.3 nm, even if the first and second metal layers 34 and 35 and the dielectric layer 31 are added, the first and second graphene layers 32 and 33 are added. , Does not have an adverse effect on the overall component thickness. And because the graphene surface has Van der Waals force, it can provide a good bonding force between the first metal layer 34 and the second metal layer 35 and the dielectric layer 31, which is beneficial to reducing the size of the device.

又,習知的薄膜電容最大的問題存在於金屬電極與介電材料之間的接面效應。兩者之間的接合會造成金屬離子擴散至介電材料中,導致介電係數與電容性能下降的問題。反觀,在本揭示的第二較佳實施例中, 由於採用具有穩定的物理和化學特性的第一石墨烯層32和第二石墨烯層33作為介電層31與金屬層34、35之間的阻障層使用。能有效地避免離子擴散問題,以優化接面電性進而使薄膜電容30達到良好的電特性表現。 In addition, the biggest problem with conventional thin film capacitors is the interface effect between the metal electrode and the dielectric material. The bonding between the two will cause metal ions to diffuse into the dielectric material, leading to problems such as a decrease in dielectric constant and capacitance performance. In contrast, in the second preferred embodiment of the present disclosure, Since the first graphene layer 32 and the second graphene layer 33 having stable physical and chemical characteristics are used as the barrier layer between the dielectric layer 31 and the metal layers 34 and 35. It can effectively avoid the problem of ion diffusion, so as to optimize the electrical properties of the junction and thus achieve the good electrical performance of the thin film capacitor 30.

又,石墨烯的熱傳導係數高達5300W/m‧K,藉此特點,可實現介電層31與環境間的高效散熱。因此,當將薄膜電容20應用在作為儲能元件時,可提升該元件於高溫工作環境的使用壽命。 In addition, the thermal conductivity of graphene is as high as 5300 W / m‧K, which can realize efficient heat dissipation between the dielectric layer 31 and the environment. Therefore, when the film capacitor 20 is applied as an energy storage element, the service life of the element in a high-temperature working environment can be improved.

請參照第5A圖至第5F圖,其為一系列的剖面圖,顯示第4圖之薄膜電容之製造流程。首先,如第5A圖所示,提供一絕緣基板1,並且在絕緣基板1上形成金屬層34’。接著,如第5B圖所示,對金屬層34’進行一光微影製程以形成具有特定尺寸的第一金屬層34,其中第一金屬層34之厚度D4介於1微米至30微米之間。較佳地,第一金屬層34之材料選自於銅或鎳。接著,如第5C圖所示,在第一金屬層34之上形成第一石墨烯層32,其中第一石墨烯層32之厚度D5介於0.3奈米至10微米之間。接著,如第5D圖所示,在第一石墨烯層32上形成介電層31,其中介電層31之厚度D6介於200奈米至800奈米之間。介電層21是以高介電(high-K)材料製成。較佳地,介電層21之材料選自於BaTiO3、Ta2O5、TiO2、HfO2、ZrO2、Al2O3、La2O3、Pr2O3及上述任意組合之其中之一。應當注意的是,在此步驟中,由於第一石墨烯層32發揮阻障層的效果,使得在高溫的製作環境下第一金屬層34之金屬離子不會擴散到介電層21。接著,如第5E圖所示,在介電層31上形成第二石墨烯層33,其中第二石墨烯層33之厚度D7介於0.3奈米至10微米之間。接著,如第5F圖所示,在第二石墨烯層33上形成第二金屬層35,其中第二金屬層35之厚度D8介於1微米至30微米之間。較佳地,第二金屬層35之材料選 自於銅或鎳。應當注意的是,在此步驟中,由於第二石墨烯層33發揮阻障層的效果,使得在高溫的製作環境下第二金屬層35之金屬離子不會擴散到介電層21。如第5F圖所示,第一石墨烯層32係設置在介電層31與第一金屬層34之間,以及第二石墨烯層33係設置在介電層31與第二金屬層35之間。最後,將絕緣基板1移除,進而完成薄膜電容30之製作。 Please refer to FIGS. 5A to 5F, which are a series of cross-sectional views showing the manufacturing process of the thin film capacitor of FIG. First, as shown in FIG. 5A, an insulating substrate 1 is provided, and a metal layer 34 ′ is formed on the insulating substrate 1. Next, as shown in FIG. 5B, a photolithography process is performed on the metal layer 34 ′ to form a first metal layer 34 having a specific size, wherein the thickness D4 of the first metal layer 34 is between 1 μm and 30 μm. . Preferably, the material of the first metal layer 34 is selected from copper or nickel. Next, as shown in FIG. 5C, a first graphene layer 32 is formed on the first metal layer 34, wherein the thickness D5 of the first graphene layer 32 is between 0.3 nm and 10 μm. Next, as shown in FIG. 5D, a dielectric layer 31 is formed on the first graphene layer 32, wherein the thickness D6 of the dielectric layer 31 is between 200 nm and 800 nm. The dielectric layer 21 is made of a high-k material. Preferably, the material of the dielectric layer 21 is selected from BaTiO 3 , Ta 2 O 5 , TiO 2 , HfO 2 , ZrO 2 , Al 2 O 3 , La 2 O 3 , Pr 2 O 3 and any combination thereof. one. It should be noted that, in this step, since the first graphene layer 32 functions as a barrier layer, the metal ions of the first metal layer 34 will not diffuse to the dielectric layer 21 in a high-temperature manufacturing environment. Next, as shown in FIG. 5E, a second graphene layer 33 is formed on the dielectric layer 31, wherein the thickness D7 of the second graphene layer 33 is between 0.3 nm and 10 μm. Next, as shown in FIG. 5F, a second metal layer 35 is formed on the second graphene layer 33, wherein the thickness D8 of the second metal layer 35 is between 1 micrometer and 30 micrometers. Preferably, the material of the second metal layer 35 is selected from copper or nickel. It should be noted that, in this step, since the second graphene layer 33 functions as a barrier layer, metal ions of the second metal layer 35 will not diffuse to the dielectric layer 21 in a high-temperature manufacturing environment. As shown in FIG. 5F, the first graphene layer 32 is disposed between the dielectric layer 31 and the first metal layer 34, and the second graphene layer 33 is disposed between the dielectric layer 31 and the second metal layer 35. between. Finally, the insulating substrate 1 is removed, and the manufacturing of the thin film capacitor 30 is completed.

綜上所述,本揭示藉由採用石墨烯層作為薄膜電容的電極層,或者是將石墨烯層設置在介電層與金屬層之間以使該石墨烯層和該金屬層一起作用為該薄膜電容的電極層,進而能解決在製造過程中因金屬離子擴散進入介電層,導致電容性能不佳的問題。再者,藉由將石墨烯應用在本揭示的薄膜電容中,使得薄膜電容具有較佳的充電速率、電荷儲存及充放電能力。並且,利用石墨烯本身具有的良好特性可增強薄膜電容之電極的使用壽命與電荷傳輸速度,以提升電容儲存能力,以及降低應用於高速訊號量測時所產生的整體阻抗。 In summary, the present disclosure uses a graphene layer as an electrode layer of a thin film capacitor, or a graphene layer is disposed between a dielectric layer and a metal layer so that the graphene layer and the metal layer work together as the electrode layer. The electrode layer of a thin film capacitor can further solve the problem of poor capacitor performance due to metal ion diffusion into the dielectric layer during the manufacturing process. Furthermore, by applying graphene to the thin film capacitors disclosed herein, the thin film capacitors have better charging rates, charge storage, and charge and discharge capabilities. In addition, the good characteristics of graphene can enhance the service life and charge transfer speed of electrodes of thin film capacitors, improve the capacity of capacitor storage, and reduce the overall impedance generated when applied to high-speed signal measurement.

雖然本揭示已用較佳實施例揭露如上,然其並非用以限定本揭示,本揭示所屬技術領域中具有通常知識者,在不脫離本揭示之精神和範圍內,當可作各種之更動與潤飾,因此本揭示之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present disclosure has been disclosed as above with the preferred embodiment, it is not intended to limit the present disclosure. Those with ordinary knowledge in the technical field to which this disclosure belongs can make various changes and modifications without departing from the spirit and scope of this disclosure. Retouching, therefore, the scope of protection of this disclosure shall be determined by the scope of the attached patent application.

Claims (7)

一種薄膜電容,包含:一介電層;一對石墨烯層,分別設置在該介電層之相對兩側,以作為該薄膜電容之電極;以及一對金屬層,分別設置在該對石墨烯層之相對兩外側,如此其中之一該石墨烯層設置在該介電層與其中之一該金屬層之間來避免該金屬層之金屬離子擴散進入該介電層中。A thin film capacitor includes: a dielectric layer; a pair of graphene layers respectively disposed on opposite sides of the dielectric layer to serve as electrodes of the thin film capacitor; and a pair of metal layers respectively disposed on the pair of graphene The two opposite sides of the layer are such that one of the graphene layers is disposed between the dielectric layer and one of the metal layers to prevent metal ions of the metal layer from diffusing into the dielectric layer. 如申請專利範圍第1項所述之薄膜電容,其中每一該石墨烯層之厚度介於0.3奈米至10微米之間。The thin film capacitor according to item 1 of the scope of the patent application, wherein the thickness of each graphene layer is between 0.3 nm and 10 microns. 如申請專利範圍第1項所述之薄膜電容,其中每一該金屬層之厚度介於1微米至30微米之間。The thin film capacitor according to item 1 of the scope of patent application, wherein the thickness of each metal layer is between 1 micrometer and 30 micrometers. 如申請專利範圍第1項所述之薄膜電容,其中該介電層之厚度介於200奈米至800奈米之間。The thin film capacitor according to item 1 of the scope of patent application, wherein the thickness of the dielectric layer is between 200 nm and 800 nm. 如申請專利範圍第1項所述之薄膜電容,其中該介電層之材料選自於BaTiO3、Ta2O5、TiO2、HfO2、ZrO2、Al2O3、La2O3、Pr2O3及上述任意組合之其中之一。The thin film capacitor according to item 1 of the scope of patent application, wherein the material of the dielectric layer is selected from BaTiO 3 , Ta 2 O 5 , TiO 2 , HfO 2 , ZrO 2 , Al 2 O 3 , La 2 O 3 , Pr 2 O 3 and any one of the above combinations. 一種薄膜電容之製作方法,包含:形成一第一金屬層;在該第一金屬層上形成一第一石墨烯層;在該第一石墨烯層上形成一介電層,該第一石墨烯層介於該第一金屬層和該介電層之間來避免該第一金屬層之金屬離子擴散進入該介電層中;在該介電層上形成一第二石墨烯層,使得該介電層位在該第一石墨烯層與該第二石墨烯層之間;以及在該第二石墨烯層上形成一第二金屬層,該第二石墨烯層介於該第二金屬層和該介電層之間來避免該第二金屬層之金屬離子擴散進入該介電層中。A method for manufacturing a thin film capacitor includes: forming a first metal layer; forming a first graphene layer on the first metal layer; forming a dielectric layer on the first graphene layer; and the first graphene A layer is interposed between the first metal layer and the dielectric layer to prevent metal ions of the first metal layer from diffusing into the dielectric layer; forming a second graphene layer on the dielectric layer so that the dielectric An electrical layer is located between the first graphene layer and the second graphene layer; and a second metal layer is formed on the second graphene layer, the second graphene layer is interposed between the second metal layer and the Between the dielectric layers, metal ions of the second metal layer are prevented from diffusing into the dielectric layer. 如申請專利範圍第6項所述之薄膜電容之製作方法,其中形成該第一金屬層之步驟還包含:提供一絕緣基板;在該絕緣基板上形成一金屬層;以及對該金屬層進行一光微影製程以形成該第一金屬層。The method for manufacturing a thin film capacitor according to item 6 of the scope of patent application, wherein the step of forming the first metal layer further includes: providing an insulating substrate; forming a metal layer on the insulating substrate; and performing a metal layer Photolithography process to form the first metal layer.
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