TWI624906B - High dielectric constant dielectric layer forming method, image sensor device, and manufacturing method thereof - Google Patents
High dielectric constant dielectric layer forming method, image sensor device, and manufacturing method thereof Download PDFInfo
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- TWI624906B TWI624906B TW105102033A TW105102033A TWI624906B TW I624906 B TWI624906 B TW I624906B TW 105102033 A TW105102033 A TW 105102033A TW 105102033 A TW105102033 A TW 105102033A TW I624906 B TWI624906 B TW I624906B
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- substrate
- dielectric layer
- sensing device
- image sensing
- chloride
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- 238000000034 method Methods 0.000 title claims abstract description 57
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 239000000758 substrate Substances 0.000 claims abstract description 106
- VEXZGXHMUGYJMC-UHFFFAOYSA-M Chloride anion Chemical compound [Cl-] VEXZGXHMUGYJMC-UHFFFAOYSA-M 0.000 claims abstract description 27
- 239000002243 precursor Substances 0.000 claims abstract description 24
- 239000000460 chlorine Substances 0.000 claims abstract description 21
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims abstract description 20
- 229910052801 chlorine Inorganic materials 0.000 claims abstract description 20
- 239000007800 oxidant agent Substances 0.000 claims abstract description 17
- 230000001590 oxidative effect Effects 0.000 claims abstract description 17
- 230000008569 process Effects 0.000 claims description 35
- 125000004429 atom Chemical group 0.000 claims description 15
- 238000000231 atomic layer deposition Methods 0.000 claims description 14
- 239000010703 silicon Substances 0.000 claims description 9
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 125000004435 hydrogen atom Chemical group [H]* 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 5
- 238000012545 processing Methods 0.000 claims description 5
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 4
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 claims description 4
- 229910001510 metal chloride Inorganic materials 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 2
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 2
- 229910052735 hafnium Inorganic materials 0.000 claims 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims 1
- 229910052746 lanthanum Inorganic materials 0.000 claims 1
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 claims 1
- 239000010410 layer Substances 0.000 description 80
- 239000004065 semiconductor Substances 0.000 description 12
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 8
- 238000002955 isolation Methods 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000002184 metal Substances 0.000 description 7
- 229910021332 silicide Inorganic materials 0.000 description 7
- 229910044991 metal oxide Inorganic materials 0.000 description 6
- 230000005855 radiation Effects 0.000 description 6
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 239000002019 doping agent Substances 0.000 description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910005540 GaP Inorganic materials 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 229910000881 Cu alloy Inorganic materials 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 description 2
- 239000006117 anti-reflective coating Substances 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000032798 delamination Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- PDPJQWYGJJBYLF-UHFFFAOYSA-J hafnium tetrachloride Chemical compound Cl[Hf](Cl)(Cl)Cl PDPJQWYGJJBYLF-UHFFFAOYSA-J 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- -1 hydrogen ions Chemical class 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- ZXEYZECDXFPJRJ-UHFFFAOYSA-N $l^{3}-silane;platinum Chemical compound [SiH3].[Pt] ZXEYZECDXFPJRJ-UHFFFAOYSA-N 0.000 description 1
- 229910000967 As alloy Inorganic materials 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910000676 Si alloy Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910007926 ZrCl Inorganic materials 0.000 description 1
- KXNLCSXBJCPWGL-UHFFFAOYSA-N [Ga].[As].[In] Chemical compound [Ga].[As].[In] KXNLCSXBJCPWGL-UHFFFAOYSA-N 0.000 description 1
- CTNCAPKYOBYQCX-UHFFFAOYSA-N [P].[As] Chemical compound [P].[As] CTNCAPKYOBYQCX-UHFFFAOYSA-N 0.000 description 1
- TWRSDLOICOIGRH-UHFFFAOYSA-N [Si].[Si].[Hf] Chemical compound [Si].[Si].[Hf] TWRSDLOICOIGRH-UHFFFAOYSA-N 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- AUCDRFABNLOFRE-UHFFFAOYSA-N alumane;indium Chemical compound [AlH3].[In] AUCDRFABNLOFRE-UHFFFAOYSA-N 0.000 description 1
- MDPILPRLPQYEEN-UHFFFAOYSA-N aluminium arsenide Chemical compound [As]#[Al] MDPILPRLPQYEEN-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 150000001805 chlorine compounds Chemical class 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 230000005670 electromagnetic radiation Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- ICAKDTKJOYSXGC-UHFFFAOYSA-K lanthanum(iii) chloride Chemical compound Cl[La](Cl)Cl ICAKDTKJOYSXGC-UHFFFAOYSA-K 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 1
- 229910021334 nickel silicide Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000000049 pigment Substances 0.000 description 1
- 229910021339 platinum silicide Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- DUNKXUFBGCUVQW-UHFFFAOYSA-J zirconium tetrachloride Chemical compound Cl[Zr](Cl)(Cl)Cl DUNKXUFBGCUVQW-UHFFFAOYSA-J 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
- H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
- H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14607—Geometry of the photosensitive area
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
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Abstract
用於在基板上形成高介電係數介電層的方法,包含在基板的表面上引入氯化物前驅物。氧化劑引入至表面以在基板上形成高介電係數介電層。高介電係數介電層之氯濃度低於大約8原子/立方公分。 A method for forming a high-k dielectric layer on a substrate includes introducing a chloride precursor on a surface of the substrate. An oxidant is introduced to the surface to form a high-k dielectric layer on the substrate. The high-k dielectric layer has a chlorine concentration of less than about 8 atoms / cm3.
Description
本揭露係關於一種影像感測裝置。 This disclosure relates to an image sensing device.
積體電路(integrated circuit;IC)技術係不斷改良。此等改良經常涉及按比例縮小裝置幾何形狀以實現較低製造成本、較高裝置整合密度、較高速度及較好效能。不但從減小幾何形狀尺寸實現優勢,且直接改良IC裝置。如此的IC裝置係影像感測裝置。影像感測裝置包含用於偵測光且記錄所偵測光之強度(亮度)的像素陣列(或柵格)。像素陣列藉由累積電荷來響應光--舉例而言,光之強度愈高,像素陣列中累積之電荷愈高。隨後,(例如由其他電路)使用累積之電荷以提供用於例如數位攝影機之適宜應用的顏色及亮度。 Integrated circuit (IC) technology is continuously improved. These improvements often involve scaling down the device geometry to achieve lower manufacturing costs, higher device integration density, higher speed, and better performance. Not only realize the advantages from reducing the geometry size, but also directly improve the IC device. Such an IC device is an image sensing device. The image sensing device includes a pixel array (or grid) for detecting light and recording the intensity (brightness) of the detected light. Pixel arrays respond to light by accumulating charge--for example, the higher the intensity of light, the higher the charge accumulated in the pixel array. The accumulated charge is then used (for example by other circuits) to provide color and brightness for suitable applications such as digital cameras.
影像感測裝置之一種類型係背照射(bacκside illuminated;BSI)影像感測裝置。背照射影像感測裝置用 於感測基板(其支撐背照射影像感測裝置之影像感測器電路)之背表面所投影的光體積。像素柵格位於基板之前側,且基板足夠薄以使得向基板之背側所投影的光可達到像素柵格。與前照射(front-side illuminated;FSI)影像感測裝置相比,背照射影像感測裝置提供高填充因子及減小之有害干擾。由於裝置之尺寸縮小,背照射技術之改良持續進行以進一步改良背照射影像感測裝置之影像品質。 One type of image sensing device is a bacκside illuminated (BSI) image sensing device. For back-illuminated image sensor The volume of light projected on the back surface of the sensing substrate (which supports the backside illuminated image sensor circuit of the image sensor device). The pixel grid is located on the front side of the substrate, and the substrate is thin enough so that light projected toward the back side of the substrate can reach the pixel grid. Compared with a front-side illuminated (FSI) image sensing device, a back-illuminated image sensing device provides a high fill factor and reduced harmful interference. Due to the reduction in device size, improvements in back-illuminating technology continue to improve the image quality of back-illuminated image sensing devices.
根據本揭露之一些實施方式,用於在基板上形成高介電係數介電層之方法包含在基板之表面上引入氯化物前驅物。將氧化劑引入至表面以在基板上形成高介電係數介電層。高介電係數介電層之氯濃度低於大約8原子/立方公分。 According to some embodiments of the present disclosure, a method for forming a high-k dielectric layer on a substrate includes introducing a chloride precursor on a surface of the substrate. An oxidant is introduced to the surface to form a high-k dielectric layer on the substrate. The high-k dielectric layer has a chlorine concentration of less than about 8 atoms / cm3.
根據本揭露之一些實施方式,用於製造影像感測裝置之方法包含在基板中形成光感測區域。光感測區域面向基板之前表面。使用原子層沉積製程,高介電係數介電層在基板之與前表面相對的背表面上形成。原子層沉積製程之前驅物包含氯化物,且在實質上等於或大於大約0.5秒之原子層沉積製程期間引入氧化劑。 According to some embodiments of the present disclosure, a method for manufacturing an image sensing device includes forming a light sensing region in a substrate. The light sensing area faces the front surface of the substrate. Using an atomic layer deposition process, a high-k dielectric layer is formed on the back surface of the substrate opposite the front surface. The precursor of the atomic layer deposition process includes chloride, and an oxidant is introduced during the atomic layer deposition process substantially equal to or greater than about 0.5 seconds.
根據本揭露之一些實施方式,影像感測裝置包含基板及高介電係數介電層。基板具有前表面及與前表面相對之背表面。基板更具有面向前表面之光感測區域。高介電 係數介電層安置在基板之背表面上。高介電係數介電層之氯濃度低於大約8原子/立方公分。 According to some embodiments of the present disclosure, the image sensing device includes a substrate and a high-k dielectric layer. The substrate has a front surface and a back surface opposite to the front surface. The substrate further has a light sensing area facing the front surface. High dielectric The coefficient dielectric layer is disposed on the back surface of the substrate. The high-k dielectric layer has a chlorine concentration of less than about 8 atoms / cm3.
根據上述之實施方式,高介電係數介電層可使用原子層沉積製程形成。氯化物前驅物用於形成高介電係數介電層。由於在實質上等於或大於大約0.5秒之原子層沉積製程期間引入氧化劑,氯化物前驅物之氯化物可藉由氧化劑之離子被有效替代,以使得所形成之高介電係數介電層之氯濃度可減少且低於大約8原子/立方公分。低氯濃度改良高介電係數介電層之分層問題,且增加高介電係數介電層與基板之間的黏著。 According to the above embodiment, the high-k dielectric layer can be formed using an atomic layer deposition process. Chloride precursors are used to form high-k dielectric layers. Since the oxidant is introduced during the atomic layer deposition process that is substantially equal to or greater than about 0.5 seconds, the chloride of the chloride precursor can be effectively replaced by the ion of the oxidant, so that the chlorine of the formed high-k dielectric layer The concentration can be reduced to less than about 8 atoms / cm3. The low chlorine concentration improves the layering problem of the high-k dielectric layer and increases the adhesion between the high-k dielectric layer and the substrate.
102‧‧‧光感測區域 102‧‧‧light sensing area
110‧‧‧基板 110‧‧‧ substrate
112‧‧‧前表面 112‧‧‧ front surface
114‧‧‧背表面 114‧‧‧back surface
120‧‧‧隔離特徵 120‧‧‧Isolation characteristics
130‧‧‧互連結構 130‧‧‧Interconnection Structure
132‧‧‧通孔 132‧‧‧through hole
134‧‧‧線 134‧‧‧line
140‧‧‧緩衝層 140‧‧‧ buffer layer
150‧‧‧載體晶圓 150‧‧‧ carrier wafer
160‧‧‧高介電係數介電層 160‧‧‧High dielectric constant dielectric layer
162‧‧‧金屬氧化物接合 162‧‧‧ metal oxide bonding
170‧‧‧彩色濾光片 170‧‧‧ color filters
202、204、206‧‧‧線段 202, 204, 206‧‧‧ line segments
210‧‧‧氯化物前驅物 210‧‧‧Chloride precursors
220‧‧‧氧化劑 220‧‧‧Oxidant
P‧‧‧像素 P‧‧‧pixel
當結合隨附圖式閱讀時,自以下詳細描述將很好地理解本揭露之態樣。應注意,根據工業中的標準實務,各特徵並非按比例繪製。事實上,出於論述清晰之目的,可任意增加或減小各特徵之尺寸。 The aspect of this disclosure will be well understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that according to standard practice in the industry, features are not drawn to scale. In fact, the size of each feature can be arbitrarily increased or decreased for clarity of discussion.
第1A圖至第1F圖係根據本揭露之一些實施例之用於製造處於各階段之影像感測裝置之方法的剖面圖。 1A to 1F are cross-sectional views of a method for manufacturing an image sensing device at various stages according to some embodiments of the present disclosure.
第2圖係各原子濃度相對第1F圖之影像感測裝置之彩色濾光片、高介電係數介電層及基板之深度的圖表。 Fig. 2 is a graph showing the concentration of each atom with respect to the depth of the color filter, the high dielectric constant dielectric layer and the substrate of the image sensing device of Fig. 1F.
以下揭示內容提供許多不同實施例或範例,以便實施所提供標的之不同特徵。下文描述組件及排列之特定 範例以簡化本揭露。當然,此等範例僅為示例且並不意欲為限制性。舉例而言,以下描述中在第二特徵上方或第二特徵上形成第一特徵可包含以直接接觸形成第一特徵及第二特徵的實施例,且亦可包含可在第一特徵與第二特徵之間形成額外特徵以使得第一特徵及第二特徵可不處於直接接觸的實施例。另外,本揭露可在各範例中重複元件符號與/或字母。此重複係出於簡明性及清晰之目的,且本身並不指示所論述之各實施例與/或配置之間的關係。 The following disclosure provides many different embodiments or examples to implement different features of the provided subject matter. The specifics of components and arrangements are described below Examples to simplify this disclosure. Of course, these examples are merely examples and are not intended to be limiting. For example, forming the first feature above or on the second feature in the following description may include embodiments in which the first feature and the second feature are formed by direct contact, and may also include an embodiment in which the first feature and the second feature are formed. Embodiments in which additional features are formed so that the first feature and the second feature may not be in direct contact. In addition, the disclosure may repeat component symbols and / or letters in each example. This repetition is for conciseness and clarity, and does not in itself indicate the relationship between the embodiments and / or configurations discussed.
進一步地,為了便於描述,本文可使用空間相對性術語(例如「之下」、「下方」、「下部」、「上方」、「上部」及類似者)來描述諸圖中所圖示一個元件或特徵與另一元件(或多個元件)或特徵(或多個特徵)之關係。除了諸圖所描繪之定向外,空間相對性術語意欲包含使用或操作中裝置之不同定向。設備可經其他方式定向(旋轉90度或處於其他定向)且因此可同樣解讀本文所使用之空間相對性描述詞。 Further, for the convenience of description, spatially relative terms (such as "below", "below", "lower", "above", "upper", and the like) may be used to describe an element illustrated in the figures. The relationship of a feature or features to another element (or features) or feature (or features). In addition to the orientations depicted in the figures, spatially relative terms are intended to encompass different orientations of the device in use or operation. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and therefore the spatially relative descriptors used herein may also be interpreted as such.
在形成背照射(BSI)影像感測裝置之一些實施方式中,形成高介電係數(高κ)介電層在基板上,以成為影像感測裝置之底部抗反射塗覆(bottom anti-reflective coating;BARC)層。由高介電係數介電層形成之底部抗反射塗覆層具有累積電荷能力,改良暗電流、白色像素及暗影像非一致性(darκ image non-uniformity;DINU)的品質問題。在一些實施方式中,高介電係數介電層藉由原子層沉積製程形成且使用金屬氯化物作為前驅物。所形成之高介電 係數介電層的氯濃度與高介電係數介電層及基板之間的黏著相關。為改良高介電係數介電層之黏著及分層問題,在以下段落中提供影像感測裝置及其製造方法。 In some embodiments of forming a back-illuminated (BSI) image sensing device, a high dielectric constant (high κ) dielectric layer is formed on a substrate to become a bottom anti-reflective coating on the image sensing device. coating; BARC) layer. The bottom anti-reflection coating layer formed by the high-dielectric-constant dielectric layer has the ability to accumulate charges, which improves the quality problems of dark current, white pixels, and dark image non-uniformity (DINU). In some embodiments, the high-k dielectric layer is formed by an atomic layer deposition process and uses a metal chloride as a precursor. High dielectric The chlorine concentration of the dielectric constant layer is related to the adhesion between the high dielectric constant layer and the substrate. In order to improve the adhesion and delamination of the high-k dielectric layer, an image sensing device and a manufacturing method thereof are provided in the following paragraphs.
第1A圖至第1F圖係根據本揭露之一些實施方式用於製造影像感測裝置之方法於各階段的剖面圖。影像感測裝置包含像素P之陣列,且像素P可排列成行及列。詞「像素」指示含有用於將電磁輻射轉換至電信號之特徵(舉例而言,可包含各半導體裝置之光電偵測器及各電路)的基本單元。為簡單起見,影像感測裝置包含本揭露描述之單個像素P;然而,通常這些像素之陣列可形成第1A圖所圖示之影像感測裝置。 1A to 1F are cross-sectional views of a method for manufacturing an image sensing device at various stages according to some embodiments of the present disclosure. The image sensing device includes an array of pixels P, and the pixels P can be arranged in rows and columns. The word "pixel" indicates a basic unit containing a feature for converting electromagnetic radiation into an electrical signal (for example, it may include a photodetector of each semiconductor device and each circuit). For simplicity, the image sensing device includes a single pixel P as described in this disclosure; however, an array of these pixels can generally form the image sensing device illustrated in FIG. 1A.
像素P可包含光電二極體、互補金屬氧化物半導體(complementary metal oxide semiconductor;CMOS)影像感測裝置、電荷耦合裝置(charged coupling device;CCD)感測器、主動感測器、被動感測器、其他感測器,或上述之組合。像素P可經設計為具有各感測器類型。舉例而言,像素P之一個群組可為CMOS影像感測裝置且像素P之另一群組可為被動感測器。此外,像素P可包含色像感測裝置與/或單色影像感測裝置。在範例中,至少一像素P為例如CMOS影像感測裝置之主動像素感測器。在第1A圖中,像素P可包含光電偵測器(例如光電閘(photogate)類型之光電偵測器),用於記錄光(輻射)之強度或亮度。像素P亦可包含各半導體裝置,例如包含轉移電晶體、重置電晶體、源極隨耦器電晶體、選擇電晶體、其他適宜電晶體或 上述之組合的各電晶體。額外電路、輸入與/或輸出可耦合至像素陣列以提供用於像素P之操作環境,且支援與像素P之外部通訊。舉例而言,像素陣列可與讀出電路與/或控制電路耦合。但同等示意繪製之像素P可彼此相異以具有不同之接合面深度、厚度、寬度等等。 The pixel P may include a photodiode, a complementary metal oxide semiconductor (CMOS) image sensing device, a charged coupled device (CCD) sensor, an active sensor, and a passive sensor , Other sensors, or a combination of the above. The pixels P may be designed to have various sensor types. For example, one group of pixels P may be a CMOS image sensing device and another group of pixels P may be a passive sensor. In addition, the pixel P may include a color image sensing device and / or a monochrome image sensing device. In an example, the at least one pixel P is, for example, an active pixel sensor of a CMOS image sensing device. In FIG. 1A, the pixel P may include a photodetector (such as a photogate type photodetector) for recording the intensity or brightness of light (radiation). The pixel P may also include various semiconductor devices, such as a transfer transistor, a reset transistor, a source follower transistor, a selection transistor, other suitable transistors, or Each transistor is a combination of the above. Additional circuits, inputs and / or outputs can be coupled to the pixel array to provide an operating environment for the pixel P, and support external communication with the pixel P. For example, the pixel array may be coupled with a readout circuit and / or a control circuit. However, the pixels P drawn with the same schematic diagram may be different from each other to have different joint surface depths, thicknesses, widths, and the like.
在第1A圖中,影像感測裝置係背照射影像感測裝置。影像感測裝置可為積體電路(IC)晶片、晶片上系統(system on chip;SoC),或上述之部分,此晶片或系統包含各被動及主動微電子組件,例如電阻器、電容器、電感器、二極體、金屬-氧化物-半導體場效應電晶體(metal-oxide-semiconductor field effect transistors;MOSFETs)、CMOS電晶體、雙極接合面電晶體(bipolar junction transistors;BJTs)、橫向擴散MOS(laterally diffused MOS;LDMOS)電晶體、大功率MOS電晶體、類鰭式場效應電晶體(fin-liκe field effect transistors;FinFETs)、其他適宜組件,或上述之組合。為了清晰起見,第1A圖已被簡化以更好地理解本揭露之發明概念。額外特徵可添加在影像感測裝置中,且對於影像感測裝置之其他實施方式,下文描述之特徵的一些可被替代或消除。 In FIG. 1A, the image sensing device is a back-illuminated image sensing device. The image sensing device may be an integrated circuit (IC) chip, a system on chip (SoC), or a part thereof. The chip or system includes various passive and active microelectronic components, such as resistors, capacitors, and inductors. Devices, diodes, metal-oxide-semiconductor field effect transistors (MOSFETs), CMOS transistors, bipolar junction transistors (BJTs), lateral diffusion MOS (laterally diffused MOS; LDMOS) transistors, high-power MOS transistors, fin-liκe field effect transistors (FinFETs), other suitable components, or combinations thereof. For clarity, Figure 1A has been simplified to better understand the inventive concepts of this disclosure. Additional features may be added to the image sensing device, and for other implementations of the image sensing device, some of the features described below may be replaced or eliminated.
影像感測裝置包含具有前表面112與背表面114之基板110。在第1A圖中,基板110係包含矽之半導體基板。或者或另外,基板110包含例如鍺與/或金鋼石之另一元素半導體;包含碳化矽、砷化鎵、磷化鎵、磷化銦、砷化銦與/或銻化銦之化合物半導體;包含矽鍺(SiGe)、磷砷 化鎵(GaAsP)、砷化銦鋁(AlInAs)、砷化鎵鋁(AlGaAs)、砷化銦鎵(GaInAs)、磷化銦鎵(GaInP)與/或磷砷化銦鎵(GaInAsP)之合金半導體;或上述之組合。基板110可為絕緣體上半導體(semiconductor on insulator;SOI)。基板110可包含梯度半導體層,與/或覆蓋不同類型之另一半導體層的半導體層,此另一半導體層例如在鍺化矽層上之矽層。在第1A圖中,基板110可為p型基板。基板110所摻雜之p型摻雜物包含硼、鎵、銦、其他適宜之p型摻雜物,或上述之組合。基板110可或者為n型摻雜基板。基板110可摻雜之n型摻雜物包含磷、砷、其他適宜n型摻雜物,或上述之組合。基板110可包含各p型摻雜區域與/或n型摻雜區域。可在各步驟及技術中使用例如離子植入或擴散之製程實施摻雜。基板110之厚度可範圍在大約100微米(microns;μm)及大約3000微米之間。 The image sensing device includes a substrate 110 having a front surface 112 and a back surface 114. In FIG. 1A, the substrate 110 is a semiconductor substrate including silicon. Alternatively or in addition, the substrate 110 includes another element semiconductor such as germanium and / or diamond; a compound semiconductor including silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and / or indium antimonide; Contains silicon germanium (SiGe), phosphorus arsenic Alloys of gallium (GaAsP), indium aluminum arsenide (AlInAs), aluminum gallium arsenide (AlGaAs), indium gallium arsenide (GaInAs), indium gallium phosphide (GaInP), and / or indium gallium phosphide (GaInAsP) Semiconductor; or a combination thereof. The substrate 110 may be a semiconductor on insulator (SOI). The substrate 110 may include a gradient semiconductor layer and / or a semiconductor layer covering another semiconductor layer of a different type, such as a silicon layer on a silicon germanium layer. In FIG. 1A, the substrate 110 may be a p-type substrate. The p-type dopants doped on the substrate 110 include boron, gallium, indium, other suitable p-type dopants, or a combination thereof. The substrate 110 may alternatively be an n-type doped substrate. The n-type dopants that can be doped on the substrate 110 include phosphorus, arsenic, other suitable n-type dopants, or a combination thereof. The substrate 110 may include respective p-type doped regions and / or n-type doped regions. Doping can be performed in various steps and techniques using processes such as ion implantation or diffusion. The thickness of the substrate 110 may range between approximately 100 micrometers (μns) and approximately 3000 micrometers.
基板110包含例如矽之局部氧化(local oxidation of silicon;LOCOS)與/或淺溝槽隔離(shallow trench isolation;STI)之隔離特徵120,以分離(或隔離)形成在基板110上或形成在基板110內的各區域與/或裝置。舉例而言,隔離特徵120隔離像素P與鄰接像素。在第1A圖中,隔離特徵120為STI。隔離特徵120包含氧化矽、氮化矽、氮氧化矽、其他絕緣材料,或上述之組合。隔離特徵120藉由任何適宜之製程形成。作為一些範例,形成STI包含光微影製程,在基板中蝕刻溝槽(例如藉由使用乾式蝕刻、濕式蝕刻或上述之組合),且由一或更多個介電質材料 填充溝槽(舉例而言,藉由使用化學氣相沉積製程)。在一些範例中,所填充之溝槽可具有多層結構,例如由氮化矽或氧化矽填充之熱氧化襯墊層。在一些其他範例中,STI結構可由下列製程順序製成:生成墊氧化物,在墊氧化物上方形成低壓化學氣相沉積(low pressure chemical vapor deposition;LPCVD)氮化物層,使用光阻劑及遮罩在墊氧化物及氮化物層中圖案化STI開口,在STI開口中蝕刻基板中之溝槽,視需要生成熱氧化溝槽襯墊以改良溝槽介面,以氧化物填滿溝槽,使用化學機械研磨法(chemical mechanical polishing;CMP)處理以回蝕刻且平坦化,並使用氮化物剝離製程移除氮化物層。 The substrate 110 includes isolation features 120 such as local oxidation of silicon (LOCOS) and / or shallow trench isolation (STI) to separate (or isolate) the substrate 110 or the substrate Areas and / or devices within 110. For example, the isolation feature 120 isolates a pixel P from an adjacent pixel. In FIG. 1A, the isolation feature 120 is an STI. The isolation feature 120 includes silicon oxide, silicon nitride, silicon oxynitride, other insulating materials, or a combination thereof. The isolation feature 120 is formed by any suitable process. As some examples, forming an STI includes a photolithography process, etching a trench in a substrate (for example, by using dry etching, wet etching, or a combination thereof), and using one or more dielectric materials Fill the trench (for example, by using a chemical vapor deposition process). In some examples, the filled trench may have a multilayer structure, such as a thermally oxidized pad layer filled with silicon nitride or silicon oxide. In some other examples, the STI structure can be made by the following process sequence: forming a pad oxide, forming a low pressure chemical vapor deposition (LPCVD) nitride layer over the pad oxide, using a photoresist and a mask The mask is used to pattern the STI openings in the pad oxide and nitride layers. The trenches in the substrate are etched in the STI openings. If necessary, a thermally oxidized trench pad is generated to improve the trench interface. A chemical mechanical polishing (CMP) process is performed to etch back and planarize, and a nitride lift-off process is used to remove the nitride layer.
如上文所提及,形成像素P在基板110中。像素P偵測直接射向基板110之背表面114的輻射強度(亮度)。入射輻射為可見光。或者,輻射為紅外線(infrared;IR)、紫外線(ultraviolet;UV)、x射線、微波、其他適宜輻射類型,或上述之組合。像素P可經配置以與例如紅光、綠光、或藍光波長之特定光波長對應。換言之,像素P可經配置以偵測光之特定波長的強度(亮度)。在第1A圖中,像素P包含例如光電二極體之光電偵測器,此光電偵測器包含光感測區域(或光子(photo)感測區域)102。光感測區域102為具有沿著基板110之前表面112在基板110中形成之n型與/或p型摻雜物的摻雜區域,以使得光感測區域102面向前表面112。在第1A圖中,光感測區域102可為n型摻雜區域。光感測區域102藉由例如擴散與/或離子植入之方法來形成。儘管在 第1A圖中未繪示,像素P更包含各電晶體,例如與轉移閘極關聯之轉移電晶體、與重置閘極關聯之重置電晶體、源極隨耦器電晶體、選擇電晶體、其他適宜電晶體,或上述之組合。光感測區域102及各電晶體(可共同被稱作像素電路)允許像素P偵測特定光波長之強度。額外電路、輸入與/或輸出可供應給像素P以提供用於像素P之操作環境與/或支援與像素P之通訊。 As mentioned above, the pixels P are formed in the substrate 110. The pixel P detects a radiation intensity (brightness) directed toward the back surface 114 of the substrate 110. The incident radiation is visible light. Alternatively, the radiation is infrared (IR), ultraviolet (UV), x-ray, microwave, other suitable radiation types, or a combination thereof. The pixels P may be configured to correspond to specific light wavelengths such as red, green, or blue light wavelengths. In other words, the pixel P may be configured to detect the intensity (brightness) of a specific wavelength of light. In FIG. 1A, the pixel P includes a photodetector such as a photodiode. The photodetector includes a light sensing area (or a photon sensing area) 102. The light sensing region 102 is a doped region having n-type and / or p-type dopants formed in the substrate 110 along the front surface 112 of the substrate 110 so that the light sensing region 102 faces the front surface 112. In FIG. 1A, the light sensing region 102 may be an n-type doped region. The light sensing region 102 is formed by a method such as diffusion and / or ion implantation. In spite of Not shown in Figure 1A, the pixel P further includes various transistors, such as a transfer transistor associated with a transfer gate, a reset transistor associated with a reset gate, a source follower transistor, and a selection transistor , Other suitable transistors, or a combination of the above. The light-sensing area 102 and the transistors (which may be collectively referred to as a pixel circuit) allow the pixel P to detect the intensity of a specific light wavelength. Additional circuits, inputs and / or outputs may be supplied to the pixel P to provide an operating environment for the pixel P and / or support communication with the pixel P.
隨後,形成互連結構130在基板110之前表面112的上方,包含在像素P上方。互連結構130耦合至例如像素P之背照射影像感測裝置之各組件,以使得背照射影像感測裝置之各組件為可操作的適當響應照射光(影像輻射)。互連結構130可包含提供影像感測裝置之各摻雜特徵、電路與輸入/輸出之間之互連(例如,佈線)的複數個圖案化介電層及導電層。互連結構130可更包含層間介電質(interlayer dielectric;ILD)及多層互連(multilayer interconnect;MLI)結構。在第1A圖中,互連結構130包含各導電特徵,這些導電特徵可為例如通孔132之垂直互連,與/或例如線134之水平互連。各導電特徵(亦即,通孔132與線134)包含例如金屬之導電材料。在一些範例中,可使用包含鋁、鋁/矽/銅合金、鈦、氮化鈦、鎢、多晶矽、金屬矽化物或上述之組合的金屬。在一些實施方式中,各導電特徵(亦即,通孔132及線134)可被稱作鋁互連。鋁互連可藉由包含物理氣相沉積(physical vapor deposition;PVD)、化學氣相沉積(chemical vapor deposition;CVD)或上述之組合的製 程形成。用於形成各導電特徵(亦即,通孔132及線134)之其他製造技術可包含光微影處理及蝕刻以便圖案化導電材料以形成垂直連接及水平連接。仍可實施其他製造製程以形成互連結構130,其他製造製程例如熱退火以形成金屬矽化物。用於多層互連之金屬矽化物可包含矽化鎳、矽化鈷、矽化鎢、矽化鉭、矽化鈦、矽化鉑、矽化鉺、矽化鈀,或上述之組合。或者,各導電特徵(亦即,通孔132及線134)可為銅多層互連,這些銅多層互連包含銅、銅合金、鈦、氮化鈦、鉭、氮化鉭、鎢、多晶矽、金屬矽化物,或上述之組合。銅互連可藉由包含PVD、CVD或上述之組合之製程形成。應理解,圖示之導電特徵(亦即,通孔132及線134)是示範性的,且導電特徵(亦即,通孔132及線134)之實際定位及配置可取決於設計需要而相異。 Subsequently, the interconnection structure 130 is formed above the front surface 112 of the substrate 110 and is included above the pixels P. The interconnect structure 130 is coupled to each component of the back-illuminated image sensing device, such as the pixel P, so that each component of the back-illuminated image sensing device is operable to appropriately respond to irradiation light (image radiation). The interconnect structure 130 may include a plurality of patterned dielectric layers and conductive layers that provide various doped features of the image sensing device, interconnection (eg, wiring) between the circuit and the input / output. The interconnect structure 130 may further include an interlayer dielectric (ILD) and a multilayer interconnect (MLI) structure. In FIG. 1A, the interconnect structure 130 includes various conductive features, which may be, for example, vertical interconnections of the vias 132 and / or horizontal interconnections such as the lines 134. Each conductive feature (ie, the vias 132 and lines 134) includes a conductive material such as a metal. In some examples, metals including aluminum, aluminum / silicon / copper alloys, titanium, titanium nitride, tungsten, polycrystalline silicon, metal silicides, or combinations thereof may be used. In some implementations, each conductive feature (ie, vias 132 and lines 134) may be referred to as an aluminum interconnect. Aluminum interconnects can be fabricated by physical vapor deposition (PVD), chemical vapor deposition (CVD), or a combination thereof. 程 formation. Other manufacturing techniques for forming the conductive features (ie, the vias 132 and the lines 134) may include photolithography and etching to pattern the conductive material to form vertical and horizontal connections. Other manufacturing processes can still be implemented to form the interconnect structure 130, and other manufacturing processes such as thermal annealing to form metal silicide. The metal silicide used for the multilayer interconnection may include nickel silicide, cobalt silicide, tungsten silicide, tantalum silicide, titanium silicide, platinum silicide, hafnium silicide, palladium silicide, or a combination thereof. Alternatively, each conductive feature (i.e., the vias 132 and lines 134) may be a copper multilayer interconnect including copper, copper alloy, titanium, titanium nitride, tantalum, tantalum nitride, tungsten, polycrystalline silicon, Metal silicide, or a combination of the above. The copper interconnect may be formed by a process including PVD, CVD, or a combination thereof. It should be understood that the illustrated conductive features (ie, the vias 132 and lines 134) are exemplary, and the actual positioning and configuration of the conductive features (ie, the vias 132 and lines 134) may depend on the design requirements. different.
在一些實施方式中,可形成緩衝層140在互連結構130上。在第1A圖中,緩衝層140包含例如氧化矽之介電質材料。或者,緩衝層140可視需要包含氮化矽。緩衝層140係藉由CVD、PVD或其他適宜技術形成。緩衝層140可藉由CMP製程平面化以形成平滑表面。 In some embodiments, a buffer layer 140 may be formed on the interconnect structure 130. In FIG. 1A, the buffer layer 140 includes a dielectric material such as silicon oxide. Alternatively, the buffer layer 140 may include silicon nitride as required. The buffer layer 140 is formed by CVD, PVD, or other suitable techniques. The buffer layer 140 may be planarized by a CMP process to form a smooth surface.
隨後,載體晶圓150可經由緩衝層140進一步與基板110接合,藉此執行基板110之背表面114上的製程。在本實施方式中,載體晶圓150類似於基板110且包含矽材料。或者,載體晶圓150可包含玻璃基板或另一適宜材料。載體晶圓150可藉由分子力接合至基板110--此分子力被 稱為直接接合或光熔融接合之技術--或藉由例如金屬擴散或陽極接合之此項技術中已知的其他接合技術。 Subsequently, the carrier wafer 150 may be further bonded to the substrate 110 via the buffer layer 140, thereby performing a process on the back surface 114 of the substrate 110. In this embodiment, the carrier wafer 150 is similar to the substrate 110 and includes a silicon material. Alternatively, the carrier wafer 150 may include a glass substrate or another suitable material. The carrier wafer 150 can be bonded to the substrate 110 by molecular force--this molecular force is Techniques called direct bonding or photo-fusion bonding-or other bonding techniques known in the art by, for example, metal diffusion or anodic bonding.
緩衝層140提供基板110與載體晶圓150之間的電隔離。載體晶圓150提供形成在基板110之前表面112上例如像素P之各特徵的保護。載體晶圓150亦提供機械強度且如下文論述之支撐處理基板110之背表面114。在接合之後,基板110及載體晶圓150可視需要經退火以增強接合強度。 The buffer layer 140 provides electrical isolation between the substrate 110 and the carrier wafer 150. The carrier wafer 150 provides protection of features such as the pixels P formed on the front surface 112 of the substrate 110. The carrier wafer 150 also provides mechanical strength and supports the back surface 114 of the processing substrate 110 as discussed below. After bonding, the substrate 110 and the carrier wafer 150 may be annealed as needed to enhance the bonding strength.
請參照第1B圖。在完成基板110之前表面112上的CMOS製程之後,翻轉基板110自背表面114執行薄化製程以薄化基板110。薄化製程可包含機械研磨製程及化學薄化製程。在機械研磨製程期間,可自基板110首先移除大量基板材料。此後,化學薄化製程可將蝕刻化學物質應用至基板110之背表面114,以進一步將基板110薄化至所要厚度。當基板110為SOI類型時,嵌入之氧化埋層(buried oxide layer;BOX)可充當蝕刻終止層。背照射影像感測裝置之基板110的厚度大約為5-10微米。在一些實施方式中,厚度可小於大約5微米,甚至降至大約2-3微米。基板110之厚度可取決於影像感測裝置之應用類型來實施。 Please refer to Figure 1B. After the CMOS process is completed on the front surface 112 of the substrate 110, the substrate 110 is flipped from the back surface 114 to perform a thinning process to thin the substrate 110. The thinning process may include a mechanical grinding process and a chemical thinning process. During the mechanical polishing process, a large amount of substrate material may be removed from the substrate 110 first. Thereafter, the chemical thinning process may apply an etching chemical to the back surface 114 of the substrate 110 to further thin the substrate 110 to a desired thickness. When the substrate 110 is a SOI type, a buried oxide layer (BOX) can serve as an etch stop layer. The thickness of the substrate 110 of the back-illuminated image sensing device is about 5-10 microns. In some embodiments, the thickness can be less than about 5 microns, and even reduced to about 2-3 microns. The thickness of the substrate 110 may be implemented depending on the application type of the image sensing device.
隨後,形成高介電係數介電層160(參見第1E圖)於基板110之背表面114上。高介電係數介電層160可為影像感測裝置之底部抗反射塗覆(BARC)層。更詳細地說,可執行基板110之背表面114的預清洗製程以移除背表面114上之原生氧化物,以產生氫端基(OH)表面。此可使用 稀氫氟酸(diluted hydrofluoric acid;DHF)處理或蒸汽氫氟酸(vapor hydrofluoric acid;VHF)處理達適宜時間來實現。 Subsequently, a high-k dielectric layer 160 (see FIG. 1E) is formed on the back surface 114 of the substrate 110. The high-k dielectric layer 160 may be a bottom anti-reflective coating (BARC) layer of the image sensing device. In more detail, a pre-cleaning process of the back surface 114 of the substrate 110 may be performed to remove the native oxide on the back surface 114 to generate a hydrogen end group (OH) surface. This can be used Diluted hydrofluoric acid (DHF) treatment or vapor hydrofluoric acid (VHF) treatment is achieved for a suitable time.
請參照第1C圖與第1D圖。基板110之背表面114上引入氯化物前驅物210之脈衝達第一時段。在一些實施方式中,氯化物前驅物為例如氯化鑭(lanthanum chloride;LaCl3)、四氯化鉿(hafnium tetrachloride;HfCl4),或四氯化鋯(zirconium tetrachloride;ZrCl4)之金屬氯化物。第1C圖之氯化物前驅物210與OH表面(亦即,背表面114)反應,以形成如第1D圖所示之金屬氧化物接合162。氯化物前驅物210之非反應部分自背表面114移除。在一些實施方式中,取決於實際情況,第一時段為大約0.5秒至大約2秒。 Please refer to Figures 1C and 1D. The pulse of introducing the chloride precursor 210 on the back surface 114 of the substrate 110 reaches the first period. In some embodiments, the chloride precursor is a metal chloride such as lanthanum chloride (LaCl 3 ), hafnium tetrachloride (HfCl 4 ), or zirconium tetrachloride (ZrCl 4 ) Compound. The chloride precursor 210 of FIG. 1C reacts with the OH surface (ie, the back surface 114) to form a metal oxide bond 162 as shown in FIG. 1D. The non-reactive portion of the chloride precursor 210 is removed from the back surface 114. In some embodiments, the first period is from about 0.5 seconds to about 2 seconds, depending on the actual situation.
請參照第1D圖及第1E圖。隨後將氧化劑220引入至背表面114達第二時段。在一些實施方式中,氧化劑220為水(H2O)。水分子與金屬氧化物接合162反應。金屬氧化物接合162之氯化物可藉由水之OH離子替代,以形成如第1E圖所示之高介電係數介電層160。在一些實施方式中,高介電係數介電層160由氧化鑭、氧化鉿、氧化鋯或上述之組合所製成。高介電係數介電層160之介電係數高於SiO2之介電係數,亦即介電係數大於大約3.9。舉例而言,藉由引入氯化物前驅物與OH端基表面反應,製程循環可繼續。在一些實施方式中,第二時段等於或大於大約0.5秒。在一些其 他實施方式中,取決於實際情況,第二時段為大約0.5秒至大約1.5秒。 Please refer to Figures 1D and 1E. The oxidant 220 is then introduced to the back surface 114 for a second period of time. In some embodiments, the oxidant 220 is water (H 2 O). Water molecules react with the metal oxide junction 162. The chloride of the metal oxide junction 162 can be replaced by the OH ion of water to form the high-k dielectric layer 160 as shown in FIG. 1E. In some embodiments, the high-k dielectric layer 160 is made of lanthanum oxide, hafnium oxide, zirconia, or a combination thereof. The dielectric constant of the high dielectric constant dielectric layer 160 is higher than that of SiO 2 , that is, the dielectric constant is greater than about 3.9. For example, by introducing a chloride precursor to react with the surface of the OH end groups, the process cycle can continue. In some embodiments, the second period is equal to or greater than about 0.5 seconds. In some other embodiments, the second period is about 0.5 seconds to about 1.5 seconds, depending on the actual situation.
在一些實施方式中,引入氧化劑220之後,可將另一氧化劑引入至背表面114以進一步替代金屬氧化物接合162之氯化物達第二時段。氧化劑可為臭氧。由於氯化物被有效替代,進一步減少高介電係數介電層160之氯化物。在一些實施方式中,高介電係數介電層之氯濃度低於大約8原子/立方公分(atoms/cm3)。在一些其他實施方式中,高介電係數介電層之氯濃度低於大約5原子/立方公分。 In some embodiments, after the oxidant 220 is introduced, another oxidant may be introduced to the back surface 114 to further replace the chloride of the metal oxide junction 162 for a second period of time. The oxidant may be ozone. Since the chloride is effectively replaced, the chloride of the high-k dielectric layer 160 is further reduced. In some embodiments, the chlorine concentration of the high-k dielectric layer is less than about 8 atoms / cm 3 . In some other embodiments, the chlorine concentration of the high-k dielectric layer is less than about 5 atoms / cubic centimeter.
在影像感測裝置之製造製程期間,若使用水,則水會解離釋放氫離子,這些氫離子與氯化物反應以形成氫氯酸(hydrochloric acid;HCl)。氫氯酸將腐蝕高介電係數介電層160,從而減少高介電係數介電層160與基板110之間的黏著,且導致高介電係數介電層160分層。然而,在第1E圖中,由於高介電係數介電層160之氯濃度低於大約8原子/立方公分,所形成氫氯酸之濃度相對低。因此,如以下表一中所示可改良黏著及分層問題。 During the manufacturing process of the image sensing device, if water is used, the water will dissociate and release hydrogen ions, and these hydrogen ions react with chlorides to form hydrochloric acid (HCl). Hydrochloric acid will corrode the high-k dielectric layer 160, thereby reducing the adhesion between the high-k dielectric layer 160 and the substrate 110, and causing the high-k dielectric layer 160 to delaminate. However, in Fig. 1E, since the chlorine concentration of the high-dielectric-constant dielectric layer 160 is lower than about 8 atoms / cm3, the concentration of hydrochloric acid formed is relatively low. Therefore, the adhesion and delamination problems can be improved as shown in Table 1 below.
表一為高介電係數介電層與基板之間之分層缺陷密度的實驗結果。在第1表中,高介電係數介電層由氧化鉿(HfO2)製成,基板由矽製成,且氯化物前驅物為四氯化鉿(HfCl4)。表一顯示當第二時段增加時,氯(chloride;Cl)濃度減小,且當高介電係數介電層之氯濃度較低時,缺陷密度減小。舉例而言,當第二時段為大約0.5秒時,氯濃度減小至大約8原子/立方公分,且缺陷密度自大約55數目/平方 毫米(NO./mm2)下降至大約16數目/平方毫米。此外,當第二時段為大約1.5秒時,氯濃度減小至大約5原子/立方公分,且缺陷密度進一步下降至大約0數目/平方毫米。 Table 1 shows the experimental results of the layered defect density between the high-k dielectric layer and the substrate. In Table 1, the high-k dielectric layer is made of hafnium oxide (HfO 2 ), the substrate is made of silicon, and the chloride precursor is hafnium tetrachloride (HfCl 4 ). Table 1 shows that when the second period is increased, the chlorine (Cl) concentration decreases, and when the chlorine concentration of the high-k dielectric layer is low, the defect density decreases. For example, when the second period is about 0.5 seconds, the chlorine concentration is reduced to about 8 atoms / cm3, and the defect density is reduced from about 55 numbers / square millimeter (NO./mm 2 ) to about 16 numbers / square. Mm. In addition, when the second period is about 1.5 seconds, the chlorine concentration is reduced to about 5 atoms / cubic centimeter, and the defect density is further reduced to about 0 number / square millimeter.
請參照第1E圖。作為BARC層之高介電係數介電層160主要具有累積電荷(主要為負電荷但在一些情況下為正電荷)。高介電係數介電層160之電荷累積能力改良暗電流、白色像素及暗影像非一致性(DINU)品質問題,此暗電流為在影像感測裝置上缺乏入射光時流入影像感測裝置之電流,此白色像素發生於過量電流洩漏導致自像素之異常高信號。當高介電係數介電層160具有負(正)電荷累積時,其將基板110中的正(負)電荷吸引至高介電係數介電層160/基板110之介面以形成電偶極。即,負(正)電荷增加處 於介面之電洞(電子)累積且產生處於或接近於介面之空乏區域。電偶極起電荷阻障層之作用,捕集例如懸浮鍵之不完美或缺陷。 Please refer to Figure 1E. The high-dielectric constant dielectric layer 160 as a BARC layer mainly has a cumulative charge (mainly a negative charge but a positive charge in some cases). The charge accumulation ability of the high-dielectric constant dielectric layer 160 improves the dark current, white pixels, and dark image non-uniformity (DINU) quality problems. This dark current flows into the image sensing device when the image sensing device lacks incident light Current. This white pixel occurs when an excessive current leak causes an abnormally high signal from the pixel. When the high-dielectric constant dielectric layer 160 has negative (positive) charge accumulation, it attracts the positive (negative) electric charges in the substrate 110 to the high-dielectric constant dielectric layer 160 / substrate 110 interface to form an electric dipole. That is, where the negative (positive) charge increases Holes (electrons) accumulate in the interface and create empty areas at or near the interface. The electric dipole functions as a charge barrier layer, trapping imperfections or defects such as dangling bonds.
請參照第1F圖。可執行額外處理以完成影像感測裝置之製造。舉例而言,鈍化層可在影像感測裝置周圍形成用於保護(舉例而言防塵或防濕)。彩色濾光片170在高介電係數介電層160上形成且與像素P之光感測區域102對準。彩色濾光片170可經定位以使得進入光直接導向在彩色濾光片170上及穿過彩色濾光片170。彩色濾光片170可包含基於染料(或基於顏料)聚合物或樹脂,用於過濾進入光之特定波長帶,此特定波長帶與顏色光譜對應(例如,紅色、綠色及藍色)。 Please refer to Figure 1F. Additional processing may be performed to complete the manufacturing of the image sensing device. For example, a passivation layer may be formed around the image sensing device for protection (for example, dust or moisture). The color filter 170 is formed on the high-k dielectric layer 160 and is aligned with the light sensing region 102 of the pixel P. The color filter 170 may be positioned such that incoming light is directed directly onto and through the color filter 170. The color filter 170 may include a dye-based (or pigment-based) polymer or resin for filtering a specific wavelength band of incoming light, the specific wavelength band corresponding to a color spectrum (for example, red, green, and blue).
在一些實施方式中,形成微透鏡在彩色濾光片170上以便向基板110中之特定輻射感測區域引導且聚焦進入光,此特定輻射感測區域例如像素P。微透鏡可定位在各排列中且具有各形狀,取決於用於微透鏡之材料的折射率及與感測器表面的距離。亦應理解,基板110亦可在彩色濾光片170或微透鏡形成之前經歷任選的雷射退火製程。 In some embodiments, a micro-lens is formed on the color filter 170 to direct and focus incoming light toward a specific radiation-sensing area in the substrate 110, such as the pixel P. Microlenses can be positioned in various arrangements and have various shapes, depending on the refractive index of the material used for the microlenses and the distance from the sensor surface. It should also be understood that the substrate 110 may also undergo an optional laser annealing process before the color filters 170 or microlenses are formed.
第2圖係各原子濃度相對第1F圖之影像感測裝置之彩色濾光片170、高介電係數介電層160及基板110之深度的圖表。在第2圖中,彩色濾光片170由氧化物製成,高介電係數介電層160由HfO2製成,且基板110由矽製成。線段202表示氯濃度,線段204表示氟化物濃度,且線段206表示碳濃度。在第2圖中,氯濃度低於1原子/立方公分。 FIG. 2 is a graph showing the concentration of each atom with respect to the depth of the color filter 170, the high dielectric constant dielectric layer 160, and the substrate 110 of the image sensing device of FIG. 1F. In FIG. 2, the color filter 170 is made of an oxide, the high-k dielectric layer 160 is made of HfO 2 , and the substrate 110 is made of silicon. Line 202 indicates the concentration of chlorine, line 204 indicates the concentration of fluoride, and line 206 indicates the concentration of carbon. In Fig. 2, the chlorine concentration is lower than 1 atom / cm3.
根據上述之實施方式,高介電係數介電層可使用原子層沉積製程形成。氯化物前驅物用於形成高介電係數介電層。由於在實質上等於或大於大約0.5秒之原子層沉積製程期間引入氧化劑,氯化物前驅物之氯化物可藉由氧化劑之離子被有效替代,以使得所形成之高介電係數介電層之氯濃度可減少且低於大約8原子/立方公分。低氯濃度改良高介電係數介電層之分層問題,且增加高介電係數介電層與基板之間的黏著。 According to the above embodiment, the high-k dielectric layer can be formed using an atomic layer deposition process. Chloride precursors are used to form high-k dielectric layers. Since the oxidant is introduced during the atomic layer deposition process that is substantially equal to or greater than about 0.5 seconds, the chloride of the chloride precursor can be effectively replaced by the ion of the oxidant, so that the chlorine of the formed high-k dielectric layer is The concentration can be reduced to less than about 8 atoms / cm3. The low chlorine concentration improves the layering problem of the high-k dielectric layer and increases the adhesion between the high-k dielectric layer and the substrate.
根據本揭露之一些實施方式,用於在基板上形成高介電係數介電層之方法包含在基板之表面上引入氯化物前驅物。將氧化劑引入至表面以在基板上形成高介電係數介電層。高介電係數介電層之氯濃度低於大約8原子/立方公分。 According to some embodiments of the present disclosure, a method for forming a high-k dielectric layer on a substrate includes introducing a chloride precursor on a surface of the substrate. An oxidant is introduced to the surface to form a high-k dielectric layer on the substrate. The high-k dielectric layer has a chlorine concentration of less than about 8 atoms / cm3.
根據本揭露之一些實施方式,用於製造影像感測裝置之方法包含在基板中形成光感測區域。光感測區域面向基板之前表面。使用原子層沉積製程,高介電係數介電層在基板之與前表面相對的背表面上形成。原子層沉積製程之前驅物包含氯化物,且在實質上等於或大於大約0.5秒之原子層沉積製程期間引入氧化劑。 According to some embodiments of the present disclosure, a method for manufacturing an image sensing device includes forming a light sensing region in a substrate. The light sensing area faces the front surface of the substrate. Using an atomic layer deposition process, a high-k dielectric layer is formed on the back surface of the substrate opposite the front surface. The precursor of the atomic layer deposition process includes chloride, and an oxidant is introduced during the atomic layer deposition process substantially equal to or greater than about 0.5 seconds.
根據本揭露之一些實施方式,影像感測裝置包含基板及高介電係數介電層。基板具有前表面及與前表面相對之背表面。基板更具有面向前表面之光感測區域。高介電係數介電層安置在基板之背表面上。高介電係數介電層之氯濃度低於大約8原子/立方公分。 According to some embodiments of the present disclosure, the image sensing device includes a substrate and a high-k dielectric layer. The substrate has a front surface and a back surface opposite to the front surface. The substrate further has a light sensing area facing the front surface. A high-k dielectric layer is disposed on the back surface of the substrate. The high-k dielectric layer has a chlorine concentration of less than about 8 atoms / cm3.
上文概述若干實施方式之特徵,使得熟習此項技術者可更好地理解本揭露之態樣。熟習此項技術者應瞭解,可輕易使用本揭露作為設計或修改其他製程及結構的基礎,以便實施本文所介紹之實施方式的相同目的與/或實現相同優勢。熟習此項技術者亦應認識到,此類等效結構並未脫離本揭露之精神及範疇,且可在不脫離本揭露之精神及範疇的情況下產生本文的各種變化、替代及更改。 The features of the embodiments are summarized above, so that those skilled in the art can better understand the aspects of the present disclosure. Those skilled in the art should understand that the disclosure can be easily used as a basis for designing or modifying other processes and structures in order to implement the same purpose and / or achieve the same advantages of the embodiments described herein. Those skilled in the art should also realize that such equivalent structures have not deviated from the spirit and scope of this disclosure, and can have various changes, substitutions and alterations without departing from the spirit and scope of this disclosure.
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2015
- 2015-11-06 US US14/934,648 patent/US10177185B2/en active Active
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2016
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TW201041037A (en) * | 2009-03-26 | 2010-11-16 | Tokyo Electron Ltd | Method for forming a high-k gate stack with reduced effective oxide thickness |
TW201436183A (en) * | 2013-03-14 | 2014-09-16 | Taiwan Semiconductor Mfg | Image sensor device and method of fabricating the same |
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CN106129073A (en) | 2016-11-16 |
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TW201640612A (en) | 2016-11-16 |
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