TWI617219B - Maintaining output capacitance voltage in led driver systems during pulse width modulation off times - Google Patents

Abstract

Method and system for driving an LED load. The driver is configured to pass a current indicative of the level indicated by the control signal to the LED load when the PWM signal is on, and to stop transmitting the current at the level when the PWM signal is off. The output capacitive element is coupled to a differential output across the LED driver. The feedback path with the storage circuit is configured to store the information as a stored feedback reference signal just after the PWM signal transitions to off, the information indicating a first voltage level across the output capacitive element. The feedback path is such that the output capacitive component is at the first voltage level just before the PWM signal is turned on.

Description

Maintain output in the LED drive system during the pulse width modulation off time Capacitor voltage

Cross-reference to the relevant application: This application claims to apply for the US Provisional Patent Application entitled "Maintaining LED Driver Operating Point During PWM OFF Times" on May 29, 2015, in accordance with Article 28 of the Patent Law. U.S. Provisional Patent Application Serial No. 62/168,234, the entire disclosure of which is incorporated herein by reference.

The present disclosure is generally related to methods and systems for driving light emitting diodes (LEDs). More particularly, the present disclosure relates to an LED driver circuit that maintains an output voltage across an output capacitive element for an LED driver.

The LED is a PN junction diode that emits light when a suitable voltage is applied to the LED leads. In this regard, various circuits are used to power the LEDs. Such a circuit not only provides sufficient current to illuminate the LED at the desired brightness and color temperature, but also limits current to prevent damage to the LED. 1A The figure illustrates an exemplary prior art LED drive system 100 in which the LED drive system 100 is turned "ON" (ie, high (HI)) when the PWM signal at the pulse width modulation (PWM) node 105 is ON. The output current 101 of the LED 115 is adjusted to the level indicated by the control signal at the control signal input 103. When the PWM signal is OFF (ie, low (LO)), the output current 101 is zero and the LED load 115 does not emit light. Therefore, the average value of the output current 101 is controlled by the relative ON and OFF durations of the PWM signal. In other words, the intensity of the light emitted by the LED 115 can be increased by the duty cycle of the PWM signal at the higher node 105 and can be dimmed by reducing the duty cycle.

As illustrated in FIG. 1A, the LED drive system 100 can include an LED driver 119, a voltage divider network (which can include resistors 123 and 125 connected in series), an output capacitive component 117, a current sensor 121, and an electronic switch 111.

When the PWM signal 105 is off, the LED load 115 can be disconnected by the electronic switch 111, and the voltage across the output capacitive element 117 can be maintained by the output capacitive element 117 before the PWM signal 105 transitions to off.

The features of the LED drive system 100 can be better understood with reference to FIG. 1B, which illustrates an example waveform of the LED drive system 100. When the PWM is turned on, the LED load 115 is turned on (ie, the light is emitted) and the voltage level at the output V _OUT is determined by the sum of the forward voltages of the LED 115 at a current level, which is input by the control signal. 103 is set and adjusted by the i _LED feedback path via current sensor 121. Therefore, the voltage levels at the feedback node FB for a given V _OUT voltage are determined by resistors 123 and 125. When the PWM transitions to off, the LED load 115 is turned off (eg, stops emitting light), and the voltage at the output V _OUT and the feedback node FB are affected by the leakage. When the PWM is turned back on, the LED load 115 illuminates, which may not be the desired color temperature and/or intensity until the LED driver 119 causes the output V _OUT and the voltage at the feedback node FB to rise back to the appropriate level.

Ideally, capacitive element 117 should maintain output voltage _VOUT constant for a period of PWM off time. However, under realistic conditions, the output capacitive element 117 attenuates (eg, loses charge) during the off period of the PWM signal due to internal leakage and/or any circuitry connected to the output capacitive element 117 (such as the first electronic switch 111, Feedback of leakage of resistive elements (such as resistors) R1 (123) and R2 (125)). As the PWM shutdown period increases, the voltage drop will become more pronounced. After a long period of PWM off time (e.g., more than one second) across the capacitive element to the output voltage on the output is lower than 117 V _OUT may be turned over during the PWM output across the capacitive element to the output voltage of the 117 V _OUT.

Thus, when the PWM signal 105 transitions back to on after a long off period, the LED driver 119 can be affected by the recovery time until the output capacitive element 117 returns to the original output voltage. This delay is required in applications where the color temperature and/or intensity of the LED load 115 is then at a predetermined level after the LED load 115 transitions to on. Can cause problems. A conventional practice of having a longer PWM turn-on time to include additional recovery delays in addition to the required LED load turn-on time not only increases power consumption, but is also not effective because the return delay can be with the output capacitive component 117. The size, process, temperature, required LED light intensity, and duration of the PWM shutdown change.

The various methods and systems disclosed herein relate to maintaining an output capacitor voltage in an LED drive system during a PWM off time. According to one embodiment, a driver is configured to pass a current indicative of the level indicated by the control signal to the LED load when the PWM signal is on, and to stop transmitting the current at the level when the PWM signal is off. The output capacitive element is coupled to a differential output across the LED driver. The feedback path with the storage circuit is configured to store the information as a stored feedback reference signal just after the PWM signal transitions to off, the information indicating a first voltage level across the output capacitive element. The feedback path is such that the output capacitive component is at the first voltage level just before the PWM signal is turned on. In various embodiments, the storage circuit is configured to maintain the stored feedback reference signal as a digital code or analog voltage.

In accordance with a specific embodiment, a method of driving an LED load in a circuit is provided, the circuit including a driver, an output capacitive component, and a first feedback path having a feedback node and a storage circuit. The method includes the steps of: receiving, by the driver, a PWM signal, a control signal, and an LED current sensing signal. The storage circuit of the first feedback path is stored in the feedback section just after the PWM signal is turned off. The voltage level at the point is used as the stored feedback reference signal. The stored feedback reference signal indicates a first voltage level across the output capacitive element. The stored feedback reference signal and the current voltage level at the feedback node are compared by the first feedback path. Based on the result of the comparison, the voltage level across the output capacitive element is placed at the first voltage level just before the PWM signal transitions to on. In various embodiments, the storage circuit is configured to maintain the stored feedback reference signal as a digital code or analog voltage.

The various objects, features, aspects and advantages of the present invention will become apparent from the Detailed Description of Description

100‧‧‧LED drive system

101‧‧‧Output current

103‧‧‧Control signal input

105‧‧‧ nodes

111‧‧‧Electronic switch

115‧‧‧LED load

117‧‧‧ Output Capacitor

119‧‧‧LED driver

121‧‧‧ Current Sensor

123‧‧‧Resistors

125‧‧‧Resistors

200‧‧‧LED drive system

201‧‧‧current i _LED

203‧‧‧ second input

205‧‧‧first input node

211‧‧‧First electronic switch

215‧‧‧LED load

217‧‧‧ Output Capacitor

219‧‧‧LED driver

221‧‧‧ Current Sensor

223‧‧‧Responsive resistor

225‧‧‧ feedback resistor

233‧‧‧ third input

237‧‧‧Scaled output feedback signal (FB _INPUT )

241‧‧‧Storage circuit

243‧‧‧Error amplifier

300‧‧‧LED drive system

303‧‧‧Linear regulator

305‧‧‧Inverter

400‧‧‧ digital storage circuit

401‧‧‧Inverter

403‧‧‧ Analog Digital Converter (ADC)

405‧‧‧Digital Analog Converter (DAC)

407‧‧‧Storage Capacitor

409‧‧‧First electronic switch

411‧‧‧Second electronic switch

413‧‧‧Control input

415‧‧‧ first output

417‧‧‧ Output node

419‧‧‧Output node

500A‧‧‧ analog storage circuit

501‧‧‧First switch

503‧‧‧Leakage offset circuit

505‧‧‧Inverter

507‧‧Amplifier

509‧‧‧ Storage Capacitor

511‧‧‧second switch

517‧‧‧ first input

519‧‧‧ nodes

500B‧‧‧ analog storage circuit

507B‧‧Amplifier

The drawings illustrate illustrative specific embodiments. The drawings do not illustrate all of the specific embodiments. Other embodiments may be utilized as additional specific embodiments or alternative embodiments. Details that may or may not be necessary may be omitted to save space or more efficiently illustrate. Some specific embodiments may be implemented by additional components or steps, and/or without all of the components or steps illustrated. When the same symbol appears in different drawings, this symbol represents the same or similar components or steps.

FIG. 1A illustrates an example of a prior art light emitting diode (LED) drive system.

FIG. 1B illustrates an example waveform of the LED drive system of FIG. 1A.

Figure 2 illustrates an example of an LED drive system that maintains a voltage across the output capacitive element when the PWM signal is off, consistent with the exemplary embodiment.

Figure 3 illustrates an example of an LED drive system that maintains a voltage across the output capacitive element when the PWM signal is off by using a linear regulator.

Figure 4A illustrates an example of a digital storage circuit that can be used to implement the storage circuits of Figures 2 and 3.

Fig. 4B is a diagram showing an example waveform of the circuit of Fig. 4A operating in the LED driving system of Figs. 2 and 3.

5A and 5B illustrate an example of an analog storage circuit that can be used to implement the storage circuits of FIGS. 2 and 3.

Fig. 5C is a diagram showing an example waveform of the circuits of Figs. 5A and 5B operating in the LED driving system of Figs. 2 and 3.

In the following embodiments, several specific details are illustrated by way of example, in order to provide a thorough understanding of the relevant teachings. However, it should be apparent that the implementation of the teachings may not require such detail. In other instances, well-known methods, procedures, components, and/or circuitry have been described in the <Desc/Clms Page number> Some specific embodiments may be implemented by additional components or steps, and/or without all of the components or steps illustrated.

The various methods and circuits disclosed herein are generally associated with methods and circuits for maintaining an output voltage reference level for an LED driver such that the recovery time is substantially reduced or eliminated. The LED driver is configured to pass a quasi-current indicated by the control signal to the LED load when the PWM signal is on, and to stop transmitting the current at the level when the PWM signal is off. The output capacitive element coupled across the differential output of the driver is smoothed out across the voltage across the LED load. The first feedback path has a storage circuit configured to store information indicative of a voltage level across the output capacitive element when the PWM signal transitions to off (just after shutdown). The first feedback path causes the voltage across the output capacitive element to be at a voltage level during the PWM off period such that the recovery time for the LED load is substantially reduced or eliminated.

2 illustrates an example of an LED drive system 200 that maintains a voltage across the output capacitive element 217 when the PWM signal is off, consistent with the exemplary embodiment. The LED drive system 200 includes an LED driver 219 having a first input node 205 operable to receive a PWM signal, a second input 203 operable to receive the control signal CTRL, and operative to receive the LED current sensing information signal The third input. There is an input V _IN configured to receive power (eg, supply voltage) to operate the LED driver 219. Further, the drive 219 includes an input FB _INPUT 237, input FB _INPUT 237 configured to receive a scaled output of the feedback signal. The LED driver 219 has a differential output comprising a first output (e.g., V _OUT+ ) and a second output (e.g., V _OUT- ), which are sometimes referred to herein as V _OUT . There is an output capacitive element 217 coupled between the first and second outputs of the LED driver 219. Output capacitive element 217 is configured to smooth out signals across LED load 215. For example, output capacitive component 217 can filter out high frequency alternating current (AC) current and voltage and reduce current ripple through LED load 215, thereby increasing the operational lifetime of LED load 215 when PWM is on. This also helps maintain the output voltage of the LED driver 219 when the PWM is off.

The LED drive system 200 includes a voltage divider network that can include feedback resistors R1 (223) and R2 (225) connected in series. A first node of resistor R1 (223) is coupled to a first output node of driver 219, and a second node of resistor R1 (223) is coupled to a feedback (FB) node. The first node of the second resistor R2 (225) is connected to the FB node, and the second node of the second resistor R2 (225) is connected to the second output node of the driver 219. The voltage divider network of R1 (223) and R2 (225) is configured to provide a scaled value of the output voltage V _OUT to driver 219. In one embodiment, the feedback resistors R1 and R2 are external (eg, off-wafer) components.

There is an error amplifier 243 having a first input and a second input, the first input being configured to receive the stored feedback reference signal FB _REF , the second input being configured to receive a feedback signal from the feedback node FB. The error amplifier 243 has an output coupled to the FB _INPUT 237 input of the LED driver 219. The error amplifier 243 is configured to compare the stored feedback reference signal FB _REF with the feedback signal from the feedback node FB to generate an output from the difference (ie, FB _{REF -} FB) to the FB _INPUT 237 input of the driver 219.

The LED drive system 200 includes a storage circuit 241 having a first input coupled to the feedback node FB and a second input coupled to the PWM node 205. The storage circuit 241 is configured to store a scaled value across the voltage across the output capacitive element 217 (ie, the voltage level of the feedback node FB) during the PWM on-duration, thereby preserving that the PWM signal is turned off at node 205. The final value of the scaled value of the voltage across the output capacitive element 217. For example, the storage circuit 241 can store the voltage level at the feedback node FB at the falling edge of the PWM signal. By using the falling edge of the PWM signal, the storage circuit 241 can store the signal of the voltage level of the feedback node FB indicating the PWM on time.

Output capacitive element 217, feedback resistor R1 (223) operates with R2 (225), storage circuit 241, and error amplifier 243 to form a first feedback path that is configured to provide a feedback signal to LED driver 219.

There is a first electronic switch 211 coupled between the first output V _{OUT+ of the} driver 219 and the first node of the electronic load 215. When the PWM signal 205 is off, the first electronic switch 211 disconnects the LED load 215 and crosses the output capacitive element before the PWM signal at the node 205 is turned off (eg, at the falling edge of the PWM signal). The voltage at 217 is maintained by output capacitive element 217. Therefore, the electronic switch 211 is open during the PWM off time and is closed during the PWM on time.

The LED drive system 200 includes a current sensor 221 coupled to a second output of the LED driver 219. Current sensor 221 is configured to sense current i _LED 201 that is flowing through LED load 215 and provide this LED current sense information to third input 233 of LED driver 219. Although the current sensor is illustrated as being coupled to the second output of the LED driver 219, it will be appreciated that in various embodiments, the current sensor can be placed at any suitable circuit location to sense the pass LED Current of load 215.

In one embodiment, the current i _LED 201 sensed by the sensor 221 is provided to a third input of the LED driver 219 as an LED current sense voltage. In other words, the current signal sensed by the current sensor 221 is converted into a voltage signal. Current sensor 221 is part of a second feedback path that is configured to provide a feedback signal to LED driver 219 such that LED driver 219 can provide the appropriate current to LED load 215.

An LED load 215, which may include one or more LEDs, is coupled between the first and second outputs of the LED driver 219. Although the LEDs in system 200 are illustrated as being connected in series as an example, it will be appreciated that in various embodiments, there may be a single LED, LEDs may be connected in parallel, or the LEDs may be connected by any suitable series/parallel. Combine the connections to implement the desired output.

When the PWM signal 205 is on (i.e., at the "High (HI)" level), the LED driver 219 causes the output current 201 flowing through the LED load 215 to conform to the current level specified by the control signal CTRL at the control input 203. In this regard, the output current 201 is measured by the current sensor 221 to provide LED current information to the LED driver 219. Thus, based on the LED current sense signal 233, the LED driver 219 adjusts the current i _LED 201 that is passed to the LED load 215 such that the current closely follows the signal specified by the control signal at the control node CTRL 203.

As previously mentioned, the output voltage _VOUT across the output capacitive element 201 is sensed by feedback resistors R1 (223) and R2 (225). A scaled version of the output voltage V _OUT is provided at the feedback node FB. The error amplifier 243 compares the previously sensed voltage at the feedback node FB with the voltage previously stored by the storage circuit 241 (eg, at the falling edge of the PWM signal) as the feedback node of the stored feedback reference signal FB _REF and provides an error The output voltage of the amplifier 243 is to the FB _INPUT node of the LED driver 219. By using this voltage at the FB _INPUT node, the LED driver 219 can provide an output voltage across the differential outputs V _OUT+ and V _OUT- of the LED driver 219 such that it spans the output capacitive element 201 for the duration of the PWM off period. The voltage is maintained at the same level as just before the PWM signal transitions to off (for example, at the falling edge of the PWM signal).

Therefore, when the PWM signal is off (eg, at the "Low" level), the error amplifier 243 is based on the current scaled feedback voltage (FB) across the output capacitive element 217 and stored in the storage circuit 241. The difference in the feedback voltage (now as the target feedback reference (FB _REF )) is used to produce the output. During this phase (eg, when PWM signal 205 is off), electronic switch 211 disconnects LED load 215, and LED driver 219 maintains voltage across output capacitive element 217 based on FB _INPUT 237 signal.

Therefore, the LED driver 219 can adjust the output current 201 to the LED load 215 when the PWM signal 205 is on, so that the current 201 is equal to the amount specified by the control signal CTRL at the control input 203, and can be maintained across the PWM signal when the PWM signal is off. The output voltage on the output capacitive element 217.

By the first feedback path of the storage circuit having the previous state of the memory feedback voltage FB, the output capacitive element 217 is not affected by the voltage decay for a long period of time (eg, more than one second), and thus each time the PWM signal 205 transitions back to on. Both are at the desired output voltage V _OUT . Therefore, the appropriate current i _LED 201 and voltage V _LED+ and V _LED- are provided across the LED load 215 when the PWM signal is on, without a recovery delay. Thus, even after a long PWM off period, each time the PWM signal is turned back on, the LED drive system is configured to quickly return (or maintain) the desired current and voltage across the LED load 215.

In various embodiments, the output voltage across the LED load 215 (eg, the potential difference between V _{LED +} and V _{LED -} ) may be greater or less than the supply voltage V _IN . For example, when the output voltage across the LED load 115 is not greater than the supply voltage V _IN , a linear regulator can be used in place of the LED driver 219 and the error amplifier 243 to remain across the output capacitor 217 during the off period of the PWM signal. Voltage.

In this regard, FIG. 3 illustrates an example of an LED drive system 300 that maintains a voltage across the output capacitive element 217 by using an individual linear regulator 303 when the PWM signal is off. In various embodiments, the linear regulator can be active high or active low. For a high active regulator, there may be an additional inverter 305 coupled between the PWM node 205 and the linear regulator 303 enable node EN. In other words, the linear regulator 303 is turned off when the PWM signal is on, and the linear regulator 303 is turned on when the PWM signal is off. 3 is a number of components and functions of the LED drive system 300, similar to the counterparts of the components and functions of the LED drive system 200 of FIG. 2, and thus will not be discussed again for brevity. Therefore, the following discussion highlights some unique features.

The LED drive system 300 comprises an input 237 FB _INPUT LED driver 219, the input FB _INPUT 237 is configured to receive feedback from the FB node, the scaled feedback signal representative of the output voltage V _OUT. In one embodiment, the LED driver 219 does not need to adjust the voltage across the output capacitive element 217 to a level just prior to the transition of the PWM signal to off. This is because the linear regulator 303 performs this function.

The linear regulator 303 of FIG. 3 includes a first input, a second input and an output, the first input is configured to receive the FB _REF signal from the output of the storage circuit 241, the second input is coupled to the feedback node FB, and the output is coupled To the first output terminal (V _OUT+ ) of the LED driver 219.

For example, when the PWM is off, the linear regulator 303 receives the error signal, and the error signal is equal to the required feedback reference voltage (FB) stored in the storage circuit 241 just after the PWM signal is turned off (for example, at the falling edge of the PWM signal). _REF ) and the difference between the scaled versions (FB) of the voltage across the output capacitive element 217 is currently sensed. Next, the linear regulator 303 can adjust the voltage across the output capacitive element 217 until the scaled version of the voltage of the node FB is equal to the reference value (FB _REF ) stored in the storage circuit 241. Therefore, in this embodiment, the LED driver 219 does not need to regulate the voltage across the output capacitive element 217 during the off time of the PWM signal. Instead, this function is managed by linear regulator 303. Output capacitive element 217, feedback resistor R1 (223) operates with R2 (225), storage circuit 241, and linear regulator 303 to form a first feedback path that is configured to adjust across PWM when PWM is off The voltage on the capacitive element 217 is output.

By having the storage circuit that memorizes the previous state and the first feedback path of the linear regulator 303, the output capacitive element 217 is not affected by the voltage decay over a long period of time (eg, more than one second), and the second time is in each PWM The signal 205 is turned back on when it is at the desired output voltage V _OUT . Thus, the PWM signal is ON, the LED load 215 to provide cross appropriate current i _LED 201 and the voltage V _{LED +} V _LED-, without having answer delay. Thus, even after a long PWM off period, each time the PWM signal is turned back on, the LED drive system 300 is configured to quickly return (or maintain) the desired current and voltage across the LED load 215.

Example storage circuit

In various embodiments, the storage circuit 241 can be a digital circuit, an analog circuit, or a combination thereof. FIG. 4A illustrates an example circuit for maintaining voltage information of the feedback node FB by a digital code, which can be used to implement the storage circuit 241 of FIGS. 2 and 3. As illustrated in FIG. 4A, the digital storage circuit 400 can include an analog to digital converter (ADC) 403, a digital to analog converter (DAC) 405, a first electronic switch 409, and a second The electronic switch 411 and the storage capacitive element 407. In various embodiments, ADC 403 can be active low or active high. For example, for the high active ADC 403, there may be an additional inverter 401 coupled between the PWM node 205 and the ADC 403.

In the example of FIG. 4A, the ADC 403 has a first input, a second input, and a first output 415. The first input is coupled to the feedback node FB via the first electronic switch 409, and the second input is coupled to the PWM signal node. 205 (this may be via inverter 401), and the first output 415 is coupled to the input of the DAC 405. In a specific embodiment, The ADC 403 has an individual output node 417 that is operable to indicate that the analog digital conversion of the feedback signal has been completed.

The DAC 405 has an input and output node 419 that is coupled to an output node 415 of the ADC 403, and the output node 419 is configured to provide an analog representation of the digital signal at the input node of the DAC 405. In one embodiment, there may be a second electronic switch 411 coupled between the output of the DAC 405 and the input of the ADC 403 to provide the stored feedback reference signal FB _REF . The second switch 411 has a control node (eg, a "COMPLETE" signal) coupled to the second output of the ADC 403. In a specific embodiment, the second switch 411 is optional because the functionality of the second switch 411 is performed by the DAC 405, and since the second switch 411 has a built-in switch, the built-in switch is configured to pass the second input ( The 4A is not shown) receives the ADC 403 output as a control signal.

In various embodiments, the DAC 405 can continue to operate to provide better speed, or can be turned to on when the second switch 411 transitions to on (or slightly before) to save power while providing sufficient time for The DAC 405 converts the digital signal into an analog signal. For example, DAC 405 may continue to operate when there is a second switch 411 coupled to the output of DAC 405, or may operate properly when the functionality of the second switch is embedded within DAC 405.

In the example of FIG. 4A, the first electronic switch 409 is configured to turn on when the PWM signal is on at node 205 and off when the PWM signal is off at node 205. As for the second electronic switch 411. The second electronic switch 411 is configured to be turned on when the PWM signal is turned off at the node 205 and the analog digital conversion of the ADC 403 is completed. At other times the second switch 411 can be off.

Therefore, the digital storage circuit 400 in the example of FIG. 4A stores the voltage level on the storage capacitive element 407 received from the feedback node FB when the PWM signal 205 is on. When the PWM signal transitions to off at node 205, the first electronic switch 409 disconnects the storage capacitive element 407 from the feedback node FB and enables the ADC 403 via the control input 413.

During this time period, ADC 403 is signaled by the PWM off signal to convert the sensed voltage across storage capacitor element 407 to the digital value at ADC 403 output 415. This digit value can be stored in a memory that can be part of the ADC 403 or can be separated from the ADC 403. In one embodiment, the digital output of the memory holding the voltage at the feedback node FB can be connected to the input of the DAC 405. To aid in this discussion, it will be assumed that the memory holding the voltage at the feedback node FB is located in the ADC 403. The DAC 405 is configured to receive a digital signal at the DAC 405 input node 415 and to provide an analog version of the digital signal at the DAC 405 output node.

The voltage level at node FB _REF represents the stored voltage across storage capacitor element 407 before ADC 403 completes converting the analog feedback signal to a digital representation at output 415 of ADC 403. The DAC 405 can use this digital value to drive the FB _REF voltage when the ADC 405 has converted and digitally stored the voltage across the storage capacitive element 407. Because the digital stored value does not drift over time, the FB _REF value driven by DAC 405 (and therefore across the voltage on output capacitive element 217) can be maintained, even after a long PWM off period.

Therefore, the value of the stored feedback reference signal FB _REF delivered by the DAC 405 is substantially similar to the feedback voltage FB across the storage capacitive element C _STORE 407 just after the PWM signal transitions to off.

The features of Figure 4A can be more fully understood with reference to Figure 4B, which illustrates an example waveform of Circuit 400 of Figure 4A. As illustrated in FIG. 4B, after the PWM signal is turned off, the voltage at the feedback node FB is stored as a digital code. In one embodiment, when PWM is on, the LED load is on and the digital storage circuit 400 is reset. During this time period, the voltage at the feedback node FB is determined by the second feedback path. When the PWM is off, the LED load is turned off and the digital storage circuit 400 enters the initial "storage" state. The duration of the stored procedure depends on the particular embodiment. During the "storage" state, FB _REF is held by C _STORE 407. The FB _REF is held by the DAC 405 when the store is completed. Using this FB _REF signal, the voltage level at the feedback node FB is controlled by the first feedback path during the entire PWM off time.

Different types of ADCs can be used to implement the ADC 403 of the digital storage circuit 400, depending on the particular needs of the LED drive circuit. The ADC operation discussed in this article is based on the common principle of converting continuous signals into certain bit numbers N. The more bits you use, the more accurate the ADC is. good. Common ADC types include pipelined, flash, successive approximations register (SAR), sigma delta (Σ △), and integral or double slope.

As illustrated in FIG. 4A, the digital storage circuit and/or ADC may include one or more suitably configured DACs to convert the digital signals to analog domains. In this regard, in various embodiments, different DACs can be used, including but not limited to pulse width modulators, integral delta (Σ △), binary weights, resistance ladder (R-2R), step-by-step , thermometer code, and hybrid (this can be used in conjunction with the aforementioned DAC). These DACs are operable to convert finite values into physical magnitudes in the form of current or voltage.

As previously mentioned, in some embodiments, the storage circuit discussed herein can also maintain feedback voltage information as an analog voltage. Analogous embodiments may require less wafer area, consume less power, and may be easier to implement. For example, several functional blocks (such as ADCs and DACs) can be eliminated. Analogous embodiments of the storage circuit can be used in a variety of applications, including (without limitation) in applications that do not require extended PWM off time.

In this regard, FIGS. 5A and 5B illustrate an example circuit for maintaining the voltage at the feedback node FB as an analog signal, which can be used to implement the storage circuit 241 illustrated in FIGS. 2 and 3. As illustrated in FIG. 5A, the analog storage circuit 500A includes a first switch 501, a leakage cancel circuit 503, an amplifier (eg, a buffer) 507, and a storage capacitive element C _STORE 509. The local storage capacitive element 509 can be integrated on the same wafer, although it is also contemplated to use external capacitive elements. In one particular embodiment, the local storage capacitive element 509 is very smaller (eg, less than ten times or more) the output capacitive element 217.

In various embodiments, amplifier 507 itself may be turned "on" or "off" to conserve power, and/or the buffer may be held on (eg, for speed), but coupled to second switch 511 at the output of amplifier 507. . When the second switch 511 is used, there may be an inverter 505 coupled between the PWM input node 205 and the second switch 511 control node. The analog storage circuit 500B of FIG. 5B has substantially similar features except that the analog storage circuit 500B does not have the second switch 511 and the inverter 505. Conversely, amplifier 507B is directly controlled by the PWM signal at node 205 because the functionality of switch 511 is included in amplifier 507B.

The leakage cancellation circuit 503 is coupled to a first (eg, positive) input 517 of the amplifier 507. Amplifier 507 can be configured as a single gain buffer, with a second input (eg, a negative input) coupled to the output of amplifier 507 at node 519. Thus, the voltage at storage node 517 is substantially similar to the voltage at node 519 because the gain of amplifier 507 is sufficiently high. The output of amplifier 507 is coupled to feedback reference node FB _REF (eg, via switch 511). The first switch 501 has a first node coupled to the first input of the amplifier 507 and a second input coupled to the feedback node FB. The storage capacitor C _STORE 509 is also coupled to the first input of the amplifier 507.

Each of the first and second switches has a control node coupled to the PWM node 205. The first switch 501 is configured to be in a closed (ie, open) state when the PWM signal 205 is on (ie, high) and in an open (ie, off) state when the PWM signal 205 is off (ie, low). Conversely, the second switch 511 is configured to be in an off state when the PWM signal 205 is on, and in an on state when the PWM signal 205 is off. Thus, amplifiers 507 and 507B can be deactivated when PWM signal 205 is on and can be enabled when the PWM signal is off.

In circuits 500A and 500B, when the PWM signal is on at node 205, the first switch 501 is closed, allowing the path from the feedback node FB to the local storage capacitive element 509. In other words, the voltage level at the feedback node FB is stored across the local storage capacitive element 509.

When the PWM signal is off at node 205, the first switch 501 is open (e.g., closed), thereby cutting off the path between the feedback node FB and the local storage capacitive element 509 at node 517. However, because of the inverse relationship between the first switch 501 and the second switch 511, the second switch 511 is now closed (eg, turned on), allowing the path between the amplifier 507 output and the feedback reference node FB _REF . Therefore, the voltage level at the output of amplifier 507 is provided to the first input of error amplifier 243 (or linear regulator 303). A more fixed feedback reference voltage level FB _REF can be provided to the first input of error amplifier 243 (or linear regulator 303) by using local storage capacitive element 509 having a known capacitance value.

In one embodiment, the storage circuit 500A (and 500B) has a leakage cancellation circuit 503 that is configured to further maintain the node 517 across the local storage capacitive element when the PWM signal is off at node 205. The voltage on 509. In other words, when the PWM signal is off at node 205, the voltage across the local storage capacitive element 509 does not decrease over time because the leakage cancellation circuit 503 is configured to compensate for the leaked charge.

The features of FIGS. 5A and 5B can be more understood with reference to FIG. 5C, which illustrates the circuits 500A and 500B of FIGS. 5A and 5B operating in the LED driving system of FIG. 2 or FIG. Example waveform. As illustrated in FIG. 5C, the voltage at the feedback node FB after the PWM signal is off can be maintained as an analog voltage. The "Save" step can be performed when the PWM signal is on. In this time period, LED load is turned on (e.g., light emitting), and the voltage at the FB is determined by a second feedback node (e.g. i _LED) feedback path. When the PWM is off, the LED load transitions to off and the storage circuit enters a hold state in which the first feedback path containing the storage circuit 241 drives the voltage at the feedback node FB.

in conclusion

The components, steps, features, objects, benefits, and advantages discussed are merely illustrative. None of the above (or related discussions) is intended to limit the scope of protection in any way. Several other specific embodiments have also been considered. These other specific embodiments include less Specific embodiments of the components, steps, features, objects, benefits and/or advantages. These other specific embodiments also include specific embodiments in which the components and/or steps are arranged and/or ordered in different ways.

For example, any of the signals discussed herein can be scaled, buffered, scaled, and buffered, converted to another mode (eg, voltage, current, charge, time, etc.), or converted to another state (eg, from high to low and from Low to high) without significantly changing the underlying control method.

In one embodiment, a charge pump can be used in place of the LED driver 219 or linear regulator 303 discussed herein to maintain a voltage across the output capacitor _COUT 217 during the PWM off period.

In accordance with the discussion herein, the proposed technique of maintaining a voltage across the output capacitive element 217 during a system inactivity to quickly perform a recovery can be applied to other applications that can be driven by current pulses, such as a motor driver.

Another variation of the proposed technique can adjust the operating point voltage to a different level than during the PWM turn-on time during the PWM off time. Depending on the load impedance, the operating point voltage can be maintained at a higher or lower level during the PWM off time to produce the desired return response when the PWM returns to the on state.

All measurements, values, ratings, positions, magnitudes, dimensions, and other specifications described in this specification are short and not precise, unless otherwise stated. They mean a reasonable range, This range is consistent with their associated functions and is consistent with the prior art in their art.

Except as set forth above, nothing described or illustrated is intended to be (and should not be construed as) to contribute any component, step, feature, article, benefit, advantage, or equivalent to the public, regardless of Whether these contents are recorded in the scope of patent application.

All articles, patents, patent applications, and other publications cited in this disclosure are hereby incorporated by reference.

It will be appreciated that the terms and expressions used herein have the ordinary meaning and are consistent with the meaning of such terms and expressions given to the respective survey and study areas to which they correspond, unless the specific meaning is otherwise indicated herein. Relativistic terms such as "first", "second" and the like may be used alone to distinguish an individual or an action, without necessarily requiring or implying any actual relationship or order between them. The use of the terms "comprising", "comprising" and "comprising", and the meaning of the singular, and the singular of Similarly, elements prefixed by "one" do not exclude the existence of other additional elements of the same type, unless otherwise limited.

A summary of the disclosed content is provided to allow the reader to quickly confirm the nature of the technical content. This summary is provided on the premise that the abstract will not be used to interpret or limit the scope or meaning of the scope of the patent application. Moreover, in the above-described embodiments, it can be seen that various features are grouped together in various specific embodiments for the purpose of succinctly illustrating the disclosure. Such a method of disclosure should not be interpreted as reflecting an intention to require more features than are specifically recited in the particular embodiment. In contrast, as reflected in the scope of the following claims, the technical subject matter of the invention is less than all features of a particular embodiment disclosed. Accordingly, the scope of the following claims is hereby incorporated by reference in its entirety, and each of the claims are individually

Claims (20)

A light emitting diode (LED) driving system includes: a control signal input configured to receive a control signal; a pulse width modulation (PWM) input, The PWM input is configured to receive a PWM signal; the driver has a first input, a second input, a third input, a fourth input, and a differential output, the first input coupled to the PWM Input, the second input is coupled to the control signal input, the third input is configured to receive an LED current sense signal, the fourth input configured to receive a first feedback signal, wherein the driver is configured to When the PWM signal is ON, it transmits a quasi-current indicated by the control signal to a light-emitting diode (LED) load, and stops transmitting the current when the PWM signal is OFF (OFF). An output capacitive element coupled across the differential output of the driver; and a first feedback path coupled to the differential output of the driver and the driving Between the fourth input, wherein the feedback path having a first storage circuit, the storing circuit is configured After storing the PWM signal as off, storing a message as a stored feedback reference signal indicating a first voltage level across the output capacitive element; and just before the PWM signal is turned on The voltage across the output capacitive element is at the first voltage level. The LED driving system of claim 1, wherein the first feedback path comprises: a first resistive element coupled to a first end of the differential output of the driver and a feedback node a second resistive element coupled between a second end of the differential output of the driver and the feedback node; and an amplifier having a first input, a a second input and an output, the first input configured to receive the stored feedback reference signal, the second input coupled to the feedback node, the output coupled to the fourth input of the driver, wherein the storage circuit The first input of the amplifier and the feedback node are coupled. The LED drive system of claim 2, wherein the first feedback path is configured to: compare the stored feedback reference signal received from the storage circuit with a current voltage level at the feedback node; Based on the result of the comparison, the first feedback signal is provided to the LED driver. The LED drive system of claim 1, the LED drive system further comprising a second feedback circuit configured to represent a voltage of the current flowing through the LED load as a sense of current of the LED A test signal is provided to the second input of the drive. The LED driving system of claim 4, wherein the second feedback circuit comprises a current sensor, the current sensor having a node coupled to a second end of the differential output of the driver . The LED drive system of claim 1, wherein the storage circuit is configured to maintain the stored feedback reference signal as a digital code. The LED driving system of claim 2, wherein the storage circuit comprises: an analog to digital converter (ADC) configured to convert a voltage signal at the feedback node into a first digit a signal, the ADC includes: a first input; a second input coupled to the PWM input; An DAC operable to provide a first output of the first digital signal; and a second output; a digital to analog converter (DAC) configured to convert the first digital signal into a first An analog signal, the DAC includes: an input coupled to the first output of the ADC; and an output operable to provide the first analog signal; a storage capacitive element coupled to the ADC Between the first input and a ground; a first switch, the first switch includes: a first node coupled to the feedback node; a second node coupled to the first input of the ADC; a control node coupled to the PWM input; and a second switch comprising: a first node coupled to the output of the DAC; operable to provide the first analog signal as the And storing a second node of the feedback reference signal; and a control node coupled to the second output of the ADC. The LED driving system of claim 7, wherein the PWM signal is turned off and the voltage is sent to the feedback node. When the number completes the transition to the first digital signal of the ADC, the second output of the ADC transitions to on. The LED drive system of claim 1, wherein the storage circuit is configured to maintain the stored feedback reference signal at an analog voltage. The LED driving system of claim 9, wherein the storage circuit comprises: a first amplifier having a positive input, a negative input, and an output, the positive input coupled to a storage node, the output coupling Connected to the negative input of the first amplifier, wherein the first amplifier is configured to provide the stored feedback reference signal when the PWM signal is off, and store the feedback node voltage when the PWM signal is on; a capacitor element having a first node and a second node, the first node being coupled to the storage node, the second node being coupled to a ground, and a first switch coupled to the first switch Between the storage node and the feedback node, wherein the first switch is configured to provide a voltage level of the feedback node to the positive input of the amplifier when the PWM signal is on. The LED drive system of claim 10, the LED drive system further comprising a drain coupled to the storage node Leakage offset circuit. The LED drive system of claim 11, wherein the leakage cancellation circuit is configured to supplement a leakage current of the storage capacitive element of the storage circuit. The LED driving system of claim 10, wherein: the first amplifier has a third input coupled to the PWM input; and the first amplifier is turned on when the PWM signal is off, and the PWM signal is The first amplifier is off when it is turned on. The LED driving system of claim 10, the LED driving system further comprising a second switch, the second switch comprising: a first node, the first node coupled to the output of the first amplifier; a second node operable to provide the stored feedback reference signal; and a control node coupled to the PWM input. The LED driving system of claim 1, wherein the first feedback path comprises: a first resistive element coupled to a first end of the differential output of the driver and a feedback node between; a second resistive element coupled between a second end of the differential output of the driver and the feedback node; and a linear regulator having a first input, a a second input and an output, the first input configured to receive the stored feedback reference signal, the second input coupled to the feedback node, the output coupled to the first end of the differential output of the driver a point, wherein the storage circuit is coupled between the first input of the linear regulator and the feedback node. The LED drive system of claim 15 wherein the linear regulator is configured to adjust the voltage across the output capacitive element during a PWM off period until the voltage across the output capacitive element at the feedback node The scaled version is equal to the stored reference feedback signal just after the PWM signal transitions to off. The LED drive system of claim 15, wherein: the linear regulator includes another input coupled to the PWM input; and the linear regulator is turned on when the PWM signal is off; When the PWM signal is on, the linear regulator is off. A method for driving a light emitting diode (LED) load by a circuit, the circuit comprising a driver, an output capacitive component and a first feedback path, the first feedback path having a feedback node and a storage The circuit includes the steps of: receiving, receiving, by the driver, a PWM signal, a control signal, and an LED current sensing signal; and storing the step, the storage circuit of the first feedback path is exactly the PWM signal Converting to a voltage level stored at the feedback node as a stored feedback reference signal, wherein the stored feedback reference signal indicates a first voltage level across the output capacitive element; the comparing step is performed by The first feedback path compares the stored feedback reference signal with a current voltage level at the feedback node; and based on the result of the comparison, causing the output across the output capacitive element just before the PWM signal transitions to on The voltage level is at the first voltage level. The method of claim 18, the method further comprising the step of: causing the driver to provide a predetermined current to the LED load when the PWM signal is on, the level being indicated by the control signal; Prevents current from being delivered to the LED load when the PWM signal is off. The method of claim 18, the method further comprising the steps of: converting the voltage level at the feedback node to a first digital signal; storing the first digital signal at the falling edge of the PWM signal; The first digital signal is converted into an analog signal; and after the PWM signal is turned off, the analog signal is provided as the stored feedback reference signal.