TWI609508B - Miniature surface mount device with large pin pads - Google Patents

Miniature surface mount device with large pin pads Download PDF

Info

Publication number
TWI609508B
TWI609508B TW100130341A TW100130341A TWI609508B TW I609508 B TWI609508 B TW I609508B TW 100130341 A TW100130341 A TW 100130341A TW 100130341 A TW100130341 A TW 100130341A TW I609508 B TWI609508 B TW I609508B
Authority
TW
Taiwan
Prior art keywords
conductive
light emitting
emitting diode
light
emitting diodes
Prior art date
Application number
TW100130341A
Other languages
Chinese (zh)
Other versions
TW201220561A (en
Inventor
陳子強
彭澤厚
李飛鴻
劉儀光
張軍
大衛T 艾默森
Original Assignee
惠州科銳半導體照明有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/939,096 external-priority patent/US10431567B2/en
Priority claimed from US13/153,888 external-priority patent/US9685592B2/en
Application filed by 惠州科銳半導體照明有限公司 filed Critical 惠州科銳半導體照明有限公司
Publication of TW201220561A publication Critical patent/TW201220561A/en
Application granted granted Critical
Publication of TWI609508B publication Critical patent/TWI609508B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Description

具有大型接腳墊片的微型表面安裝元件Miniature surface mount component with large pin spacer 相關申請案Related application

本申請案是2009年1月14日申請之共申請美國申請案第12/321,059號及2010年11月3日申請之美國申請案第12/939,096號之部份連續申請案,且是2011年3月2日申請之國際申請案第PCT/CN2011/000335號之連續申請案,該等申請案之全部內容各在此加入作為參考。This application is a continuation-in-part application of US Application No. 12/321,059, filed on January 14, 2009, and filed on November 3, 2010, and is filed in The consecutive applications of International Application No. PCT/CN2011/000335, filed on March 2, the entire contents of each of which are hereby incorporated by reference.

發明領域Field of invention

本發明係大致有關於表面安裝元件且,更特別是有關於塑膠有引線晶片載體殼體發光二極體元件及包括這些元件之發光二極體顯示器。The present invention relates generally to surface mount components and, more particularly, to a plastic leaded wafer carrier housing light emitting diode component and a light emitting diode display including the same.

背景background

近年來,在發光二極體(LED)技術方面已有大幅進步使得具有較高亮度及顏色逼真性之發光二極體已被提出。由於這些改良之發光二極體及改良之影像處理技術,大尺寸、全彩發光二極體視訊螢幕已是可取得的且目前是常用的。大尺寸發光二極體顯示器通常包含提供影像解析度之多數獨立發光二極體面板之一組合,且該等影像解析度係由在相鄰像素之間之距離或“像素間距”決定。In recent years, significant advances have been made in the field of light-emitting diode (LED) technology, and light-emitting diodes having higher brightness and color fidelity have been proposed. Due to these improved light-emitting diodes and improved image processing techniques, large-size, full-color LED video screens are available and are currently in common use. Large-size light-emitting diode displays typically include a combination of a plurality of individual light-emitting diode panels that provide image resolution, and such image resolution is determined by the distance or "pixel pitch" between adjacent pixels.

欲用來由大較距離觀看之戶外顯示器具有比較大之像素間距且經常包含分開之多數像素陣列。在該等分開之像素陣列中,一群獨立安裝之紅、綠與藍發光二極體被驅動而形成對觀看者表現為一全彩像素者。另一方面,室內螢幕需要較短之像素間距,例如3mm,且包含承載紅、綠與藍發光二極體之面板,該等紅、綠與藍發光二極體係安裝在例如一表面封裝元件(SMD)封裝體的一單一電子封裝體上。各表面安裝元件經常界定一像素。該等比較小之表面安裝元件係附接在一控制各表面安裝元件之輸出的驅動印刷電路板(PCB)上。Outdoor displays that are intended to be viewed from a large distance have a relatively large pixel pitch and often contain a plurality of separate pixel arrays. In the separate pixel arrays, a group of independently mounted red, green, and blue light emitting diodes are driven to form a full color pixel for the viewer. On the other hand, indoor screens require shorter pixel pitches, such as 3 mm, and include panels that carry red, green, and blue light emitting diodes that are mounted, for example, on a surface mount component ( SMD) A single electronic package on the package. Each surface mount component often defines a pixel. The relatively small surface mount components are attached to a drive printed circuit board (PCB) that controls the output of each surface mount component.

雖然室內與室外顯示器都可在一相當大範圍之離軸角度內觀看,但是隨著視角增加經常有看得出之顏色失真。此外,各發光二極體封裝體之材料及/或用以安裝各發光二極體之材料可具有反射特性,這會因產生不必要之光反射及/或眩光而進一步減少顏色逼真性。While both indoor and outdoor displays can be viewed over a wide range of off-axis angles, color distortion is often seen as the viewing angle increases. In addition, the material of each of the light-emitting diode packages and/or the material for mounting the light-emitting diodes may have reflective properties, which may further reduce color fidelity due to unnecessary light reflection and/or glare.

眾所周知的是表面安裝元件及包含積體電路或者例如二極體或功率電晶體之分開多數組件的許多其他種類電子封裝體散逸足以需要熱管理之熱。此外,過多之熱亦會使發光二極體失效。設計發光二極體系統之其中一種考慮是有效之熱管理。在電子封裝體之設計方面,有效熱管理之其中一目的是維持該等發光二極體及其他主動電路組件之操作溫度在足以防止過早組件失效之一比較低的值。包括傳導熱傳送之各種冷卻方法是常用的。實施用以在一電子封裝體中散熱之傳導熱傳送的一種習知方法是容許熱沿該元件之引線傳導離開。但是,該等引線經常沒有足夠質量或暴露表面積來提供有效之散熱。例如,主要發射在電磁光譜之可見光部份的高強度發光二極體可產生難以使用這些習知技術散逸之一明顯量的熱。It is well known that surface mount components and many other types of electronic packages containing integrated circuits or separate components such as diodes or power transistors are dissipated enough to require heat management. In addition, too much heat can also cause the LED to fail. One of the considerations for designing a light-emitting diode system is effective thermal management. In the design of electronic packages, one of the purposes of effective thermal management is to maintain the operating temperatures of the light-emitting diodes and other active circuit components at a value that is low enough to prevent premature component failure. Various cooling methods including conductive heat transfer are commonly used. One conventional method of implementing conductive heat transfer for dissipating heat in an electronic package is to allow heat to be conducted away along the leads of the element. However, such leads often do not have sufficient mass or exposed surface area to provide effective heat dissipation. For example, high intensity light emitting diodes that are primarily emitted in the visible portion of the electromagnetic spectrum can produce a significant amount of heat that is difficult to dissipate using these conventional techniques.

增加視角、維持一比較低操作溫度及減少表面安裝元件封裝體之尺寸的設計目的在某種程度上是互相競爭的。發展以較低成本達成所有這些設計目的之一表面安裝元件封裝體將是合乎需要的。The design goals of increasing the viewing angle, maintaining a relatively low operating temperature, and reducing the size of the surface mount component package are somewhat competing. It would be desirable to develop a surface mount component package that achieves all of these design goals at a lower cost.

概要summary

表面安裝發光二極體封裝體之一實施例包括一引線框及一至少部份地包圍該引線框之塑膠殼體。該引線框包括多數導電晶片載體。有一發光二極體設置在該等多數導電晶片載體之各導電晶片載體上。該表面安裝發光二極體封裝體之一輪廓高度小於大約1.0mm。An embodiment of a surface mount light emitting diode package includes a lead frame and a plastic housing at least partially surrounding the lead frame. The leadframe includes a plurality of electrically conductive wafer carriers. A light emitting diode is disposed on each of the conductive wafer carriers of the plurality of conductive wafer carriers. The surface mount light emitting diode package has a profile height of less than about 1.0 mm.

另一實施例揭露一表面安裝發光二極體封裝體,其包括一殼體及一至少部份地被該殼體包圍之引線框。該殼體包括相對第一與第二主要表面,相對側表面,及相對端表面。該殼體界定一由該第一主要表面延伸入該殼體內部之空腔。該引線框包括多數導電晶片載體。在各導電晶片載體之各晶片承載墊片上有一單一發光二極體。各發光二極體具有一第一電端子及一第二電端子。各發光二極體之第一電端子與對應導電晶片載體電耦合。各發光二極體之第二電端子與該等多數導電連接部中之一對應導電連接部的連接墊片電耦合。該空腔之一深度小於大約0.6mm。在某些實施例中,該深度小於大約0.55mm。在其他實施例中,該深度小於大約0.5mm。在另外實施例中,該深度小於大約0.45mm,且在又另一些實施例中小於大約0.4mm。在某些實施例中,該輪廓高度小於1mm。在一些實施例中,該輪廓高度小於大約0.95mm。在另外實施例中,該輪廓高度小於大約0.90mm,且在又另一些實施例中,該輪廓高度小於大約0.85mm。Another embodiment discloses a surface mount LED package that includes a housing and a lead frame that is at least partially surrounded by the housing. The housing includes opposing first and second major surfaces, opposing side surfaces, and opposing end surfaces. The housing defines a cavity extending from the first major surface into the interior of the housing. The leadframe includes a plurality of electrically conductive wafer carriers. A single light emitting diode is disposed on each of the wafer carrying pads of each of the conductive wafer carriers. Each of the light emitting diodes has a first electrical terminal and a second electrical terminal. A first electrical terminal of each of the light emitting diodes is electrically coupled to a corresponding conductive wafer carrier. A second electrical terminal of each of the light emitting diodes is electrically coupled to a connection pad of the one of the plurality of electrically conductive connections. One of the cavities has a depth of less than about 0.6 mm. In certain embodiments, the depth is less than about 0.55 mm. In other embodiments, the depth is less than about 0.5 mm. In other embodiments, the depth is less than about 0.45 mm, and in still other embodiments less than about 0.4 mm. In some embodiments, the profile height is less than 1 mm. In some embodiments, the profile height is less than about 0.95 mm. In other embodiments, the profile height is less than about 0.90 mm, and in still other embodiments, the profile height is less than about 0.85 mm.

其他實施例揭露一種發光二極體顯示器,其包括一基板,該基板承載配置成多數垂直行與多數水平列之表面安裝元件(SMD)的一陣列。各表面安裝元件包括一殼體及多數發光二極體,該等發光二極體係組配成可被通電以便組合地產生實質全範圍之顏色及界定該顯示器之一像素。該發光二極體顯示器更包括電連接成使該表面安裝元件之陣列選擇性地通電以在該發光二極體顯示器上顯示影像的信號處理及發光二極體驅動電路。該顯示器之各像素具有一大約等於或小於2.8mm乘大約等於或小於2.8mm之尺寸。Other embodiments disclose a light emitting diode display that includes a substrate that carries an array of surface mount elements (SMDs) configured in a plurality of vertical rows and a plurality of horizontal rows. Each surface mount component includes a housing and a plurality of light emitting diodes that are configured to be energized to collectively produce a substantial full range of colors and define one of the pixels of the display. The LED display further includes a signal processing and LED driver circuit electrically coupled to selectively energize the array of surface mount components to display an image on the LED display. Each pixel of the display has a size that is approximately equal to or less than 2.8 mm by approximately equal to or less than 2.8 mm.

圖式簡單說明Simple illustration

第1圖是依據本發明之一實施例之一表面安裝元件的立體圖;第2圖是第1圖所示之實施例之俯視平面圖;第3圖是可使用在一表面安裝元件中之依據一實施例之一引線框的立體圖;第4圖是第1圖所示之實施例之立體仰視圖;第5圖是第3圖中之引線框的俯視圖;第6圖是沿截面線6-6所截取之第2圖之實施例的橫截面圖;第7圖是一表面安裝元件之一實施例的俯視圖;及第8圖是具有依據本發明之實施例之表面安裝元件之一發光二極體顯示器螢幕之一部份的前視平面圖。1 is a perspective view of a surface mount component according to an embodiment of the present invention; FIG. 2 is a top plan view of the embodiment shown in FIG. 1; and FIG. 3 is a basis for use in a surface mount component. FIG. 4 is a perspective view of the embodiment shown in FIG. 1; FIG. 5 is a plan view of the lead frame in FIG. 3; and FIG. 6 is a cross-sectional line 6-6. A cross-sectional view of an embodiment of the second embodiment taken; FIG. 7 is a plan view of an embodiment of a surface mount component; and FIG. 8 is a light emitting diode having a surface mount component in accordance with an embodiment of the present invention A front plan view of one part of the body monitor screen.

詳細說明Detailed description

以下說明提出代表企圖用以實施本發明之最佳模式之本發明的較佳實施例。這說明沒有限制之意味而只是為了說明本發明之一般原則,其範疇係由附加申請專利範圍界定。The following description is directed to a preferred embodiment of the present invention, which is intended to represent the best mode of the invention. This is not meant to be limiting, but merely to illustrate the general principles of the invention, the scope of which is defined by the scope of the appended claims.

以下將參照其中顯示本發明之實施例的添附圖式,更完整地說明本發明之實施例。但是,本發明可以許多不同形式實施且不應被解釋為受限於在此提出之實施例。相反地,這些實施例係提供成使得本發明將是詳細的且完整的,且將對所屬技術領域中具有通常知識者完全傳達本發明之範疇。類似數字表示全部類似元件。Embodiments of the present invention will now be described more fully hereinafter with reference to the accompanying drawings in which FIG. However, the invention may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and the scope of the invention will be fully conveyed by those of ordinary skill in the art. Like numbers indicate all similar components.

在此應了解的是,雖然該等用語第一、第二等可在此被用來說明各種不同構件,這些構件不應受限於這些用語。這些用語只是被用來區別一構件與另一構件。在不偏離本發明之範疇的情形下,例如,一第一構件可稱為一第二構件,且類似地,一第二構件可稱為一第一構件。在此所使用之用語“及/或”包括一或多個相關表列物件之任一或所有組合。It should be understood that although the terms first, second, etc. may be used herein to describe various components, these components should not be limited to these terms. These terms are only used to distinguish one component from another. Without departing from the scope of the invention, for example, a first member may be referred to as a second member, and similarly, a second member may be referred to as a first member. The term "and/or" used herein includes any and all combinations of one or more of the associated listed items.

在此應了解的是當例如一層、區域或基板之一構件被稱為是“在”或延伸“在”另一構件上時,它可直接在另一構件上或直接延伸至另一構件上或者亦可存在多數中間構件。相反地,當一構件被稱為是“直接在”或延伸“直接在”另一構件上時,不存在中間構件。亦應了解的是當與另一構件“連接”或“耦合”時,它可與另一構件直接連接或耦合或可存在多數中間構件。相反地,當與另一構件“直接連接”或“直接耦合”時,不存在中間構件。It should be understood that when a member such as a layer, region or substrate is referred to as being "on" or "extending" another member, it can be directly on the other member or directly to the other member. Or there may be a majority of intermediate components. Conversely, when a component is referred to as being "directly on" or extending "directly on" another component, there is no intermediate component. It will also be appreciated that when "coupled" or "coupled" to another member, it can be directly connected or coupled to another member or a plurality of intermediate members can be present. In contrast, when "directly connected" or "directly coupled" to another component, there is no intermediate component.

例如“以下”或“以上”或“上方”或“下方”或“水平”或“垂直”等相對用語可在此被用來說明如圖所示之一構件、層或區域與另一構件、層之關係。應了解的是這些用語係欲包含該構件之不同方位以及在圖中所示之方位。Relative terms such as "below" or "above" or "above" or "below" or "horizontal" or "vertical" may be used herein to describe one component, layer or region and another component as shown. The relationship between layers. It should be understood that these terms are intended to encompass different orientations of the components and the orientation shown in the figures.

在此使用之用語只是為了說明特定實施例且不意圖成為本發明之限制。除非本文另外清楚地指出,否則在此所使用之單數形“一”及“該”係意圖也包括複數形。更應了解的是當在此使用該等用語“包含”及/或“包括”時,係指存在所述之裝置、整體、步驟、操作、構件及/或組件,但並未排除存在或再加入一或多個其他特徵、整體、步驟、操作、構件、組件及/或其群組。The words used herein are for the purpose of illustration and description and are not intended to As used herein, the singular and " It is to be understood that the terms "comprising" and "comprising", "the" One or more other features, integers, steps, operations, components, components, and/or groups thereof are added.

除非另外定義,在此使用之所有用語(包括技術與科學用語)具有與本發明所屬技術領域中具有通常知識者一般了解之相同意義。在此更應了解的是,在此使用之用語應被解釋為具有與它們在這說明書之內容中及相關技術中的意義一致之意義,且除非在此明白地定義,否則不應以一理想化或過度形式判斷之方式解讀。Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning meaning It should be understood that the terms used herein are to be interpreted as having a meaning consistent with their meaning in the context of the specification and the related art, and should not be an ideal unless explicitly defined herein. Interpretation of the way or the excessive form of judgment.

在某些實施例中,一發光二極體封裝體具有多數發光二極體,且各發光二極體與另一輸入端子及輸出端子電耦合。因此,該發光二極體晶粒可獨立地控制且可更有效率地操作。在某些實施例中,該發光二極體封裝體包含一引線框,該引線框具有一例如塑膠之聚合物的殼體,該殼體模製該引線框四周。該聚合物殼體包含其間具有一高度距離之相對第一與第二主表面,其間具有一寬度距離之相對側表面,及其間具有一長度距離之相對端表面,其中該寬度距離與該長度距離小於大約2.6mm。在某些實施例中,該等距離係大約等於或小於2.5mm且其他實施例係大約等於或小於2.35mm。在某些實施例中,該殼體至少部份地包圍該引線框且界定一空腔,該空腔由該第一主要表面延伸入該殼體之內部,該導電晶片載體之至少一部份在該空腔之底部暴露出來。該空腔底部之面積對該主要表面之面積的比率是至少35%。在某些實施例中,它大於40%。在其他實施例中,該比率大於50%。In some embodiments, a light emitting diode package has a plurality of light emitting diodes, and each of the light emitting diodes is electrically coupled to another input terminal and an output terminal. Therefore, the light emitting diode dies can be independently controlled and can operate more efficiently. In some embodiments, the LED package includes a leadframe having a housing such as a plastic polymer that is molded around the leadframe. The polymer housing includes opposite first and second major surfaces with a height distance therebetween, with opposite side surfaces having a width distance therebetween, and an opposite end surface having a length distance therebetween, wherein the width distance and the length distance Less than about 2.6 mm. In some embodiments, the equidistant system is approximately equal to or less than 2.5 mm and the other embodiments are approximately equal to or less than 2.35 mm. In some embodiments, the housing at least partially surrounds the lead frame and defines a cavity extending from the first major surface into the interior of the housing, at least a portion of the conductive wafer carrier being The bottom of the cavity is exposed. The ratio of the area of the bottom of the cavity to the area of the major surface is at least 35%. In certain embodiments, it is greater than 40%. In other embodiments, the ratio is greater than 50%.

在某些實施例中,該發光二極體封裝體包含多數發光二極體晶粒,例如,一紅發光二極體晶粒,一綠發光二極體晶粒及一藍發光二極體晶粒,且該引線框包含一用於各發光二極體之導電晶片載體。在某些實施例中,各導電晶片載體具有延伸至少超過一空腔底部長度之1/2的一長度。該共用安裝墊片將具有較大面積以便改善散熱。In some embodiments, the LED package includes a plurality of light emitting diode crystal grains, for example, a red light emitting diode crystal grain, a green light emitting diode crystal grain, and a blue light emitting diode crystal. And the lead frame comprises a conductive wafer carrier for each of the light emitting diodes. In some embodiments, each of the electrically conductive wafer carriers has a length that extends at least 1/2 of the length of the bottom of the cavity. The shared mounting gasket will have a larger area to improve heat dissipation.

第1-4圖顯示依據供例如室內及/或室外發光二極體螢幕之發光二極體顯示器使用之特定示範實施例的一表面安裝發光二極體封裝體10及其部件。該發光二極體封裝體10包括一塑膠殼體12,該塑膠殼體12至少部份地包圍一引線框14。該引線框14包含第一、第二、及第三導電晶片載體142、143與144及與該導電晶片載體分開之第一、第二、及第三導電連接部146、147與148,如第3圖所示。該等導電晶片載體142-144具有一在由大約0.42mm至大約0.48mm之範圍內的輪廓高度。換言之,該輪廓高度是該彎曲引線框之高度。例如,在第3圖中,該輪廓高度表示在該導電晶片載體142之下表面82與該導電晶片載體142之上表面102之間的距離。在某些實施例中,該輪廓高度小於大約1.0mm。在其他實施例中,該輪廓高度小於大約0.95mm。在另外實施例中,該輪廓高度是大約0.85mm至大約0.95mm。該引線框金屬片,在彎曲之前,可具有一小於大約0.15mm之板片厚度。又,接近該表面安裝發光二極體封裝體(亦即表面安裝元件)之一中心線之該導電晶片載體可具有一大約0.47mm至0.53mm之寬度。 Figures 1-4 show a surface mount LED package 10 and components thereof in accordance with a particular exemplary embodiment for use with a light emitting diode display such as an indoor and/or outdoor light emitting diode screen. The LED package 10 includes a plastic housing 12 that at least partially surrounds a lead frame 14. The lead frame 14 includes first, second, and third conductive wafer carriers 142, 143 and 144 and first, second, and third conductive connecting portions 146, 147 and 148 separated from the conductive wafer carrier, such as Figure 3 shows. The electrically conductive wafer carriers 142-144 have a profile height in the range of from about 0.42 mm to about 0.48 mm. In other words, the profile height is the height of the curved lead frame. For example, in FIG. 3, the profile height represents the distance between the lower surface 82 of the conductive wafer carrier 142 and the upper surface 102 of the conductive wafer carrier 142. In certain embodiments, the profile height is less than about 1.0 mm. In other embodiments, the profile height is less than about 0.95 mm. In other embodiments, the profile height is from about 0.85 mm to about 0.95 mm. The leadframe metal sheet may have a sheet thickness of less than about 0.15 mm prior to bending. Further, the conductive wafer carrier adjacent to a center line of the surface mount light emitting diode package (i.e., surface mount component) may have a width of about 0.47 mm to 0.53 mm.

該等第一、第二及第三導電晶片載體各具有包括一連接墊片之一上表面。例如,該第一導電晶片載體144具有一上表面104,該上表面104包括一連接墊片124。一發光二極體44設置在該導電晶片載體144之上表面104上之該連接墊片124上。一發光二極體46設置在該上表面103之連接墊片123上。一發光二極體48設置在該上表面102之連接墊片122上。各發光二極體具有一第一電端子及一第二電端子。該第一電端子係定義為一陽極。例如,該第一發光二極體44具有一與該第一導電連接部146電耦合之陽極。該等第二與The first, second and third conductive wafer carriers each have an upper surface comprising a connection pad. For example, the first conductive wafer carrier 144 has an upper surface 104 that includes a connection pad 124. A light emitting diode 44 is disposed on the connection pad 124 on the upper surface 104 of the conductive wafer carrier 144. A light emitting diode 46 is disposed on the connection pad 123 of the upper surface 103. A light emitting diode 48 is disposed on the connection pad 122 of the upper surface 102. Each of the light emitting diodes has a first electrical terminal and a second electrical terminal. The first electrical terminal is defined as an anode. For example, the first light emitting diode 44 has an anode electrically coupled to the first conductive connection portion 146. The second and

該等第一、第二與第三導電晶片連接墊片各具有一上表面,一下表面,及一在該上表面上之連接墊片。各導電晶片載體具有一上表面,一下表面,及一在該上表面上之晶片承載墊片。各導電連接部各具有一上表面,一下表面,及一在該上表面上之連接墊片。例如,在第3圖中,該第一導電連接部146具有一上表面106,一下表面86,及一在該上表面106上之連接墊片126。該第二導電連接部147具有一上表面107,一下表面87,及一在該上表面107上之連接墊片127。該第三導電連接部148具有一上表面108,一下表面88,及一在該上表面108上之連接墊片128。該第一導電晶片載體142具有一上表面102,一下表面82,及一在該上表面102上之連接墊片122。該第二導電晶片載體143具有一上表面103,一下表面83,及一在該上表面103上之連接墊片123。該第三導電晶片載體144具有一上表面104,一下表面84,及一在該上表面104上之連接墊片124。該等導電晶片載體及連接墊片之下表面可亦被稱為接腳墊片。例如,各導電晶片載體146-148之下表面86-88及各導電晶片載體142-144之下表面82-84可各具有一大約0.4mm乘大約0.7mm之墊片面積。The first, second and third conductive wafer connection pads each have an upper surface, a lower surface, and a connection pad on the upper surface. Each of the conductive wafer carriers has an upper surface, a lower surface, and a wafer carrying spacer on the upper surface. Each of the conductive connecting portions has an upper surface, a lower surface, and a connecting spacer on the upper surface. For example, in FIG. 3, the first conductive connection portion 146 has an upper surface 106, a lower surface 86, and a connection pad 126 on the upper surface 106. The second conductive connecting portion 147 has an upper surface 107, a lower surface 87, and a connecting spacer 127 on the upper surface 107. The third conductive connection portion 148 has an upper surface 108, a lower surface 88, and a connection pad 128 on the upper surface 108. The first conductive wafer carrier 142 has an upper surface 102, a lower surface 82, and a connection pad 122 on the upper surface 102. The second conductive wafer carrier 143 has an upper surface 103, a lower surface 83, and a connecting spacer 123 on the upper surface 103. The third conductive wafer carrier 144 has an upper surface 104, a lower surface 84, and a connection pad 124 on the upper surface 104. The lower surface of the conductive wafer carrier and the connection pad may also be referred to as a pin spacer. For example, the lower surface 86-88 of each of the conductive wafer carriers 146-148 and the lower surfaces 82-84 of each of the conductive wafer carriers 142-144 can each have a gasket area of about 0.4 mm by about 0.7 mm.

該等第一與第二導電晶片載體142與143互相相鄰且該等第二與第三導電晶片載體143與144互相相鄰。該等相鄰導電晶片載體被一載體間隙分開且具有相對於在該載體間隙中之一中心線不對稱的上表面輪廓。該等第一與第二導電連接部146與147互相相鄰。該等第二與第三導電連接部147與148互相相鄰。該等相鄰導電連接部被一連接間隙分開且具有相對於在該連接間隙中之一中心線不對稱的上表面輪廓。The first and second conductive wafer carriers 142 and 143 are adjacent to each other and the second and third conductive wafer carriers 143 and 144 are adjacent to each other. The adjacent conductive wafer carriers are separated by a carrier gap and have an upper surface profile that is asymmetrical with respect to a centerline in the carrier gap. The first and second conductive connections 146 and 147 are adjacent to each other. The second and third conductive connecting portions 147 and 148 are adjacent to each other. The adjacent conductive connections are separated by a connection gap and have an upper surface profile that is asymmetrical with respect to a centerline in the connection gap.

該殼體12可大致呈矩形,包括分別地相對之第一與第二主要表面24與26,相對之各個側表面28與30,及端表面32與34。該等第一與第二表面亦可被稱為上與下表面。在一實施例中,在該等上與下表面24與26之間的距離,或該封裝體輪廓高度小於大約1.0mm。較佳地,在該等上與下主要表面24與26之間的距離h是大約0.90mm至大約1.00mm。更佳地,在該等上與下主要表面24與26之間的距離h是大約0.95mm。在該等側表面28與30之間的距離w及在該等端表面32與34之間的距離I較佳地小於大約2.6mm。較佳地,在該等側表面28與30之間的距離w是大約2.40mm至大約2.60mm,且在該等端表面32與34之間的距離I亦在大約2.40mm至大約2.60mm之間的範圍內。更佳地,在該等側表面28與30之間的距離w是大約2.50mm,且在該等端表面32與34之間的距離I是大約2.50mm。The housing 12 can be generally rectangular, including first and second major surfaces 24 and 26, opposite respective side surfaces 28 and 30, and end surfaces 32 and 34, respectively. The first and second surfaces may also be referred to as upper and lower surfaces. In one embodiment, the distance between the upper and lower surfaces 24 and 26, or the package contour height is less than about 1.0 mm. Preferably, the distance h between the upper and lower major surfaces 24 and 26 is from about 0.90 mm to about 1.00 mm. More preferably, the distance h between the upper and lower major surfaces 24 and 26 is about 0.95 mm. The distance w between the side surfaces 28 and 30 and the distance I between the end surfaces 32 and 34 are preferably less than about 2.6 mm. Preferably, the distance w between the side surfaces 28 and 30 is from about 2.40 mm to about 2.60 mm, and the distance I between the end surfaces 32 and 34 is also from about 2.40 mm to about 2.60 mm. Within the range. More preferably, the distance w between the side surfaces 28 and 30 is about 2.50 mm, and the distance I between the end surfaces 32 and 34 is about 2.50 mm.

藉由舉例而不是限制,該表面安裝發光二極體封裝體10可具有一大約2.5mm之全長L,一大約2.5mm之全寬W,及一0.95mm之高度H。By way of example and not limitation, the surface mount LED package 10 can have a full length L of approximately 2.5 mm, a full width W of approximately 2.5 mm, and a height H of 0.95 mm.

該塑膠殼體12更界定一由該上表面24延伸入該塑膠殼體12之凹部或空腔36。在某些實施例中,一反射插入物或環38可沿該空腔36之一側或壁40之至少一部份定位及固定。此外,該反射插入物或環38亦可與該塑膠殼體12一體成形且可由與該塑膠殼體12相同之材料製成。該環38之反射率的有效性可藉使承載於其中之空腔36及環38向內朝該殼體之內部漸縮來加強。該空腔36之較佳形狀是一似正方形或矩形之空腔。該似正方形產生在該等側表面28與30及端表面32與34之各側上具有一更均一壁厚度的一表面安裝發光二極體封裝體10。因此,依據本發明之一方面,相較於,例如,圓形空腔,該空腔之尺寸增加。The plastic housing 12 further defines a recess or cavity 36 extending from the upper surface 24 into the plastic housing 12. In some embodiments, a reflective insert or ring 38 can be positioned and secured along one side of the cavity 36 or at least a portion of the wall 40. Additionally, the reflective insert or ring 38 can also be integrally formed with the plastic housing 12 and can be made of the same material as the plastic housing 12. The effectiveness of the reflectivity of the ring 38 can be enhanced by tapering the cavity 36 and ring 38 carried therein inwardly toward the interior of the housing. The preferred shape of the cavity 36 is a square or rectangular cavity. The square shape produces a surface mount light emitting diode package 10 having a more uniform wall thickness on each of the side surfaces 28 and 30 and the end surfaces 32 and 34. Thus, in accordance with one aspect of the invention, the size of the cavity increases as compared to, for example, a circular cavity.

該殼體12係由電絕緣且導熱之材料製成。在一實施例中,該殼體是一熱塑性聚縮物。一特佳之熱塑性聚縮物是聚鄰苯二甲醯胺(PPA)。在一較佳實施例中,該殼體12可以由黑色聚鄰苯二甲醯胺或白色聚鄰苯二甲醯胺形成。已發現的是在例如具有用在視訊顯示器中使用之表面安裝元件的影像產生表面安裝元件中使用黑色材料可改善對比。其他殼體材料包括陶瓷,樹脂,環氧樹脂,及玻璃。The housing 12 is made of a material that is electrically insulating and thermally conductive. In an embodiment, the housing is a thermoplastic polycondensate. A particularly preferred thermoplastic polycondensate is polyphthalamide (PPA). In a preferred embodiment, the housing 12 can be formed from black polyphthalamide or white polyphthalamide. It has been discovered that the use of a black material in, for example, an image-generating surface mount component having surface mount components for use in a video display can improve contrast. Other housing materials include ceramics, resins, epoxies, and glass.

在第1與2圖之所示實施例中,在該表面安裝發光二極體封裝體10中之三個發光二極體44、46、48較佳地分別發射紅、綠、藍色,使得當適當地通電時,該等發光二極體組合地產生一實質全範圍顏色。此外,該等發光二極體中之兩個或兩個以上可發射相同顏色,包括白色。例如,該發光二極體44及該發光二極體46可都發射紅光。該等發光二極體晶片具有似正方形尺寸或矩形尺寸。例如,該似正方形發光二極體晶片具有一小於大約0.11mm,或在大約0.09mm至大約0.11mm之範圍內,或小於大約0.1mm,或在大約0.08至0.10mm之範圍內的輪廓高度。該似正方形發光二極體晶片可具有一小於大約0.32mm,或在0.265mm至0.315mm之範圍內的輪廓寬度。該似正方形發光二極體晶片可具有一小於大約0.38mm,或在0.33mm至0.38mm之範圍內的輪廓寬度。該似矩形發光二極體晶片具有一小於大約0.13mm,或在大約0.10mm至大約0.13mm之範圍內的輪廓高度。該似矩形發光二極體晶片具有一小於大約0.28mm,或在大約0.20mm至大約0.28mm之範圍內的輪廓寬度。該似矩形發光二極體晶片具有一小於大約0.36mm,或在大約0.28mm至大約0.36mm之範圍內的輪廓寬度。In the embodiment shown in FIGS. 1 and 2, the three light-emitting diodes 44, 46, 48 in the surface mount LED package 10 preferably emit red, green, and blue, respectively. The light emitting diodes in combination produce a substantially full range of colors when properly energized. In addition, two or more of the light emitting diodes may emit the same color, including white. For example, the light-emitting diode 44 and the light-emitting diode 46 may both emit red light. The light emitting diode wafers have a square-like or rectangular size. For example, the square-like light emitting diode wafer has a profile height of less than about 0.11 mm, or in the range of from about 0.09 mm to about 0.11 mm, or less than about 0.1 mm, or in the range of from about 0.08 to 0.10 mm. The square-like light emitting diode wafer can have a profile width of less than about 0.32 mm, or in the range of 0.265 mm to 0.315 mm. The square-like light emitting diode wafer can have a profile width of less than about 0.38 mm, or in the range of 0.33 mm to 0.38 mm. The rectangular-like light emitting diode wafer has a profile height of less than about 0.13 mm, or in the range of from about 0.10 mm to about 0.13 mm. The rectangular-like light emitting diode wafer has a profile width of less than about 0.28 mm, or in the range of from about 0.20 mm to about 0.28 mm. The rectangular-like light-emitting diode wafer has a profile width of less than about 0.36 mm, or in the range of from about 0.28 mm to about 0.36 mm.

在所示實施例中,該紅發光二極體44係設置在第一導電晶片載體142上。該綠發光二極體46係設置在該第二導電晶片載體143上靠近該空腔36之中心。該藍發光二極體48係設置在該第三導電晶片載體144上。為了由該等發光二極體散熱,較佳的是增加該等導電晶片載體之上表面之上表面積,使它們可以更有效地散熱。例如,各導電晶片載體之上表面積是大約對應連接部之上表面積的大約兩倍。In the illustrated embodiment, the red LEDs 44 are disposed on the first conductive wafer carrier 142. The green LED 46 is disposed on the second conductive wafer carrier 143 near the center of the cavity 36. The blue light emitting diode 48 is disposed on the third conductive wafer carrier 144. In order to dissipate heat from the light-emitting diodes, it is preferred to increase the surface area above the surface of the conductive wafer carriers so that they can dissipate heat more efficiently. For example, the surface area above each of the conductive wafer carriers is approximately twice the surface area above the corresponding connections.

該等發光二極體晶片44、46、48以沿一第一軸62的一橫交方向,即,以垂直於該等側表面28與30之一方向延伸。該等引線50、52、54、56互相平行且以沿一第二軸62a之垂直於該方向62之一方向延伸。該第一軸及該第二軸在靠近該第二發光二極體46處互相交叉。The LED chips 44, 46, 48 extend in a transverse direction along a first axis 62, i.e., in a direction perpendicular to one of the side surfaces 28 and 30. The leads 50, 52, 54, 56 are parallel to each other and extend in a direction perpendicular to the direction 62 along a second axis 62a. The first axis and the second axis intersect each other near the second LED body 46.

在這實施例中,該等導電連接部係藉提供黏合墊片、模流動、散熱及晶片定位設計,使得相較於例如其揭露在加入作為參考之共申請美國專利申請案第12/321,059號中揭露的習知揭露,由該紅發光二極體44之散熱改善。請參閱第1-4圖,較佳之散熱係藉各接腳墊片之一較大表面積來實現。例如,該等導電連接部146-148之各下表面86-88增加超過10%。該等導電晶片載體之各下表面82-84之表面積亦增加超過10%。更詳而言之,該等下表面83與87之表面積增加大約40%。In this embodiment, the conductive connections are provided by the application of the adhesive gasket, the mold flow, the heat dissipation, and the wafer positioning design, as compared to, for example, U.S. Patent Application Serial No. 12/321,059, the disclosure of which is incorporated herein by reference. The conventional disclosure disclosed therein is improved by the heat dissipation of the red light-emitting diode 44. Referring to Figures 1-4, the preferred heat dissipation is achieved by a larger surface area of each of the pin spacers. For example, each of the lower surfaces 86-88 of the electrically conductive connections 146-148 is increased by more than 10%. The surface area of each of the lower surfaces 82-84 of the electrically conductive wafer carriers also increases by more than 10%. More specifically, the surface areas of the lower surfaces 83 and 87 are increased by about 40%.

同時,為了確保在形成該殼體12時該聚鄰苯二甲醯胺流體朝各方向均勻地流動,該等上表面104與104之輪廓112與116係相對於該第二軸62a不對稱。類似地,該等第一與第二導電連接部146與147之相鄰上表面之輪廓116與117係相對於在該等連接部146與147之間的間隙不對稱。該等第二與第三導電連接部147與148之相鄰上表面之輪廓117與118係相對於在該等連接部147與148之間的間隙不對稱。類似地,相鄰晶片載體之輪廓亦相對於例如122-123與123-124之相鄰晶片載體之間的間隙不對稱。At the same time, in order to ensure that the polyphthalamide fluid flows uniformly in all directions as the housing 12 is formed, the contours 112 and 116 of the upper surfaces 104 and 104 are asymmetrical with respect to the second shaft 62a. Similarly, the contours 116 and 117 of the adjacent upper surfaces of the first and second electrically conductive connections 146 and 147 are asymmetrical with respect to the gap between the connections 146 and 147. The contours 117 and 118 of the adjacent upper surfaces of the second and third electrically conductive connections 147 and 148 are asymmetrical with respect to the gap between the connections 147 and 148. Similarly, the profile of adjacent wafer carriers is also asymmetrical with respect to the gap between adjacent wafer carriers such as 122-123 and 123-124.

該等導電連接部146、147與148分別包括電連接墊片126、127、128,該等電連接墊片126、127、128定位在該中央區域58中且與該等晶片載體之組件承載上表面102-104相鄰但是分開。在該表面安裝發光二極體封裝體10之一較佳形態中,該等引線52、54、56、58彎曲且沿該殼體之各個端表面32與34延伸至其外側,接著再彎曲使得該等引線之下表面82-84沿著該塑膠殼體12之下表面26延伸。該等引線之下表面82-84與86-88之面向外表面及一導熱體之底表面係實質齊平以便於與一下方基板連接。該等引線之下表面82-84與86-88係使用包括焊接等多種習知連接技術之任一種與在該基板上之線路或墊片電連接或接合。The electrically conductive connections 146, 147, and 148 include electrical connection pads 126, 127, 128, respectively, that are positioned in the central region 58 and carried on components of the wafer carriers. Surfaces 102-104 are adjacent but separate. In a preferred form of the surface mount LED package 10, the leads 52, 54, 56, 58 are curved and extend along the respective end surfaces 32 and 34 of the housing to the outside thereof, and then bent again The lower surface 82-84 of the lead extends along the lower surface 26 of the plastic housing 12. The outer surfaces of the lower surfaces 82-84 and 86-88 of the leads are substantially flush with the bottom surface of a heat conductor to facilitate connection to a lower substrate. The lower surface 82-84 and 86-88 of the leads are electrically connected or joined to the wires or pads on the substrate using any of a variety of conventional joining techniques including soldering.

在一較佳實施例中,焊接墊片係包括在該等端部之底部上使得在由上方觀看各個獨立表面安裝元件時看不到焊料。這是有利的,因為它有助於防止眩光及改善對比,特別是在白天觀看時。如第1與6圖所示,該空腔36延伸入該殼體一足以暴露該等連接部墊片122-124與126-128的深度。In a preferred embodiment, the solder pads are included on the bottom of the ends such that no solder is visible when viewing the individual surface mount components from above. This is advantageous because it helps prevent glare and improve contrast, especially when viewed during the day. As shown in Figures 1 and 6, the cavity 36 extends into the housing a depth sufficient to expose the connector pads 122-124 and 126-128.

由該殼體之端表面32與34向內延伸之該等引線52-54與56-88之下表面82-84與86-88之特殊尺寸可依據該表面安裝發光二極體封裝體之希望實施方式,欲使用之發光二極體,該殼體12之材料,該表面安裝元件之尺寸及/或其他此種因素及/或因素之組合來決定。在某些實施例中,該殼體外之引線50-52,54-56之各引線可藉在多數墊片之間的間隙92分開以便使該等連接部互相電絕緣。The particular dimensions of the lower surfaces 82-84 and 86-88 of the leads 52-54 and 56-88 extending inwardly from the end surfaces 32 and 34 of the housing may depend on the desired surface mount LED package. Embodiments, the light-emitting diode to be used, the material of the housing 12, the size of the surface mount component, and/or other such factors and/or combinations of factors are determined. In some embodiments, the leads of the leads 50-52, 54-56 outside the housing may be separated by a gap 92 between the plurality of pads to electrically insulate the connections from each other.

該等多數導電晶片載體142、143與144及該等多數導電連接部146、147與148可由例如銅、一銅合金一導電金屬或金屬合金製成,例如銅、一銅合金,其他適當低電阻率、耐腐蝕材料,或這些材料之組合。因為發光二極體晶片係設置該等導電晶片載體142-144上,所以該上表面102-104之大表面積可有助於散熱。The plurality of conductive wafer carriers 142, 143 and 144 and the plurality of conductive connections 146, 147 and 148 may be made of, for example, copper, a copper alloy, a conductive metal or a metal alloy, such as copper, a copper alloy, other suitable low resistance. Rate, corrosion resistant material, or a combination of these materials. Because the light emitting diode chips are disposed on the conductive wafer carriers 142-144, the large surface area of the upper surfaces 102-104 can contribute to heat dissipation.

各發光二極體44、46與48可藉由如一焊料、黏著劑、塗層、膜、包覆物、糊、油脂及/或其他適當材料之一導電且導熱介面100與不同連接墊片獨立地電耦合。在一較佳實施例中,該等發光二極體44、46與48可使用在該發光二極體底部上之一焊料墊片與該連接墊片122-124電耦合及固接,使得該焊料無法由上方看到。防止該焊料由上方被看到是有利的,以便減少反射及提供較佳對比,特別是在白天時。Each of the LEDs 44, 46, and 48 can be electrically conductive by one of a solder, an adhesive, a coating, a film, a cladding, a paste, a grease, and/or other suitable material, and the thermal interface 100 is independent of the different connection pads. Geoelectric coupling. In a preferred embodiment, the LEDs 44, 46 and 48 can be electrically coupled and fixed to the connection pads 122-124 by using a solder pad on the bottom of the LED. The solder cannot be seen from above. It is advantageous to prevent the solder from being seen from above in order to reduce reflection and provide a better contrast, especially during the day.

在依據本發明之某些製造方法中,該等發光二極體44、46與48可在將該殼體12模製及/或組裝在該等連接墊片四周之前與該等連接墊片122-124耦合。或者,該等發光二極體可在該等連接部已被部份地包圍在該殼體內之後與該等連接墊片122-124耦合。延伸入該殼體之空腔36可組配為使得該等墊片122-124與126-128之足夠部份暴露以便收納該等發光二極體及相關線結合。In some manufacturing methods in accordance with the present invention, the light emitting diodes 44, 46 and 48 may be coupled to the connecting pads 122 prior to molding and/or assembling the housing 12 around the connecting pads. -124 coupling. Alternatively, the light emitting diodes can be coupled to the connection pads 122-124 after the connections have been partially enclosed within the housing. The cavity 36 extending into the housing can be configured such that a sufficient portion of the spacers 122-124 and 126-128 are exposed to receive the light emitting diodes and associated wires.

以下請參閱第6-7圖,顯示用於發光二極體之一表面安裝元件封裝體10之各種組件的某些例子。藉由舉例而不是限制,以下結合第6-7圖中所示之實施例說明之尺寸亦可應用於在第1-5圖中之表面安裝封裝體。Referring now to Figures 6-7, certain examples of various components for a surface mount component package 10 for a light emitting diode are shown. By way of example and not limitation, the dimensions described below in connection with the embodiments illustrated in Figures 6-7 can also be applied to surface mount packages in Figures 1-5.

在第6圖所示之實施例中,該表面安裝元件封裝體10之寬度或長度小於大約2.6mm。較佳地,該表面安裝元件之寬度或長度是大約2.4mm至大約2.6mm。更佳地,該表面安裝元件之寬度或長度是大約2.5mm。該表面安裝元件封裝體10之輪廓高度小於大約1.0mm。較佳地,該表面安裝元件之輪廓高度是在大約0.9mm至大約1.0mm之範圍內。更佳地,該表面安裝元件之輪廓高度是大約0.95mm。該空腔36具有一在該上表面中大約1.86mm至大約1.96mm之開口寬度及一在該下表面中在大約1.59至大約1.69mm之範圍內的寬度。較佳地,該空腔36具有一在該上表面中大約1.91mm之開口寬度及一在該下表面中大約1.64mm之寬度。在該空腔之兩側表面之間的角度θ是在大約25.0°至大約35.00°,較佳的是在大約30.0°。在該第一主要表面24中該空腔開口36之一寬度是在大約1.4mm至大約1.55mm之範圍內。在該第一主要表面中該空腔36之開口具有一大於該第一主要表面24總面積之大約55%且小於大約61%的面積。環繞該空腔之殼體具有一在大約0.3mm至大約0.45mm之範圍內的壁厚度。詳而言之,該殼體之壁厚度在靠近該第一主要表面24處比在靠近該連接墊片60處之該殼體之壁厚度薄。In the embodiment illustrated in Figure 6, the surface mount component package 10 has a width or length of less than about 2.6 mm. Preferably, the surface mount component has a width or length of from about 2.4 mm to about 2.6 mm. More preferably, the width or length of the surface mount component is about 2.5 mm. The surface mount component package 10 has a profile height of less than about 1.0 mm. Preferably, the surface mount component has a profile height in the range of from about 0.9 mm to about 1.0 mm. More preferably, the surface mount component has a profile height of about 0.95 mm. The cavity 36 has an opening width of from about 1.86 mm to about 1.96 mm in the upper surface and a width in the range of from about 1.59 to about 1.69 mm in the lower surface. Preferably, the cavity 36 has an opening width of about 1.91 mm in the upper surface and a width of about 1.64 mm in the lower surface. The angle θ between the two side surfaces of the cavity is from about 25.0° to about 35.00°, preferably about 30.0°. One of the widths of the cavity opening 36 in the first major surface 24 is in the range of from about 1.4 mm to about 1.55 mm. The opening of the cavity 36 in the first major surface has an area greater than about 55% and less than about 61% of the total area of the first major surface 24. The housing surrounding the cavity has a wall thickness in the range of from about 0.3 mm to about 0.45 mm. In detail, the wall thickness of the housing is thinner near the first major surface 24 than the wall thickness of the housing near the attachment spacer 60.

在第7圖中,三個發光二極體46、47與48具有一大約0.3mm至大約0.4mm之間距P1或P2。各發光二極體44、46與48可具有一大約0.3mm至大約0.4mm之輪廓寬度。各發光二極體44、46與48可具有一大約0.3mm至大約0.4mm之輪廓長度。在某些實施例中,該間距小於大約0.3mm且該輪廓寬度小於大約0.3mm。該等間隙92可具有一大約0.13至大約0.17mm之寬度。該空腔底部36a之面積對該主要表面24之面積的比率是至少35%。在某些實施例中,該比率大於40%。在其他實施例中,該比率大於50%。In Fig. 7, the three light-emitting diodes 46, 47 and 48 have a distance P1 or P2 of between about 0.3 mm and about 0.4 mm. Each of the light emitting diodes 44, 46 and 48 can have a contour width of from about 0.3 mm to about 0.4 mm. Each of the light emitting diodes 44, 46 and 48 can have a contour length of from about 0.3 mm to about 0.4 mm. In some embodiments, the pitch is less than about 0.3 mm and the profile width is less than about 0.3 mm. The gaps 92 can have a width of from about 0.13 to about 0.17 mm. The ratio of the area of the bottom portion 36a of the cavity to the area of the major surface 24 is at least 35%. In certain embodiments, the ratio is greater than 40%. In other embodiments, the ratio is greater than 50%.

第8圖示意地顯示例如一室內螢幕之一發光二極體顯示器螢幕300之一部份,一般而言,該室內螢幕包含承載大量表面安裝元件304之一印刷電路板302,該等表面安裝元件304排列成多數行與列,且各表面安裝元件界定一像素。該顯示器之各像素具有一大約2.8mm乘大約2.8mm之尺寸。各發光二極體晶片可以被不同電壓位準驅動。例如,該紅發光二極體可被2.2V電源驅動,而該等藍與綠發光二極體可被一大約3.1V之電源驅動。該等表面安裝元件304可包括例如上述及在第1-7圖中所示者之元件。該等表面安裝元件304與在該印刷電路板302上之線路與墊片電連接,該等線路與墊片連接成回應適當電信號處理及驅動電路(未顯示)。Figure 8 is a schematic illustration of a portion of a light-emitting diode display screen 300, such as an indoor screen. Generally, the indoor screen includes a printed circuit board 302 carrying a plurality of surface mount components 304, such surface mount components. 304 is arranged in a plurality of rows and columns, and each surface mount component defines a pixel. Each pixel of the display has a size of about 2.8 mm by about 2.8 mm. Each of the light emitting diode chips can be driven at different voltage levels. For example, the red light emitting diode can be driven by a 2.2V power supply, and the blue and green light emitting diodes can be driven by a power supply of approximately 3.1V. The surface mount components 304 can include elements such as those described above and illustrated in Figures 1-7. The surface mount components 304 are electrically coupled to pads and pads on the printed circuit board 302 that are coupled to the pads in response to appropriate electrical signal processing and drive circuitry (not shown).

如上所述,各表面安裝元件承載紅、綠與藍發光二極體之垂直定向之一線性陣列306。已發現該等發光二極體之這種線性方位可改善在一大範圍視角內之顏色逼真度。亦可設置多數貫穿孔308以便容許該等陶瓷表面安裝元件本體與該印刷電路板之更佳及更短的接觸。貫穿孔308亦可提供較佳之散熱。As noted above, each surface mount component carries a linear array 306 of vertical orientations of red, green, and blue light emitting diodes. This linear orientation of the light-emitting diodes has been found to improve color fidelity over a wide range of viewing angles. A plurality of through holes 308 may also be provided to allow for better and shorter contact of the ceramic surface mount component bodies with the printed circuit board. The through holes 308 also provide better heat dissipation.

由前可了解這些實施例提供在被一塑膠殼體部份地包圍之一引線框上包括多數發光二極體的一迷你表面安裝發光二極體封裝體。該引線框包括多數導電晶片載體及多數導電連接部。各對相鄰導電晶片載體或相鄰連接部之上表面具有相對在該等相鄰導電晶片載體或相鄰連接部間之間隙之一中心線不對稱的輪廓。相較於習知揭露,所揭露之迷你表面安裝發光二極體封裝體具有比較大接腳墊片,較低操作溫度,及較低製造成本。It has been previously understood that these embodiments provide a mini surface mount light emitting diode package including a plurality of light emitting diodes on a lead frame partially surrounded by a plastic housing. The leadframe includes a plurality of electrically conductive wafer carriers and a plurality of electrically conductive connections. The pair of adjacent conductive wafer carriers or the upper surface of the adjacent connecting portion has an asymmetrical profile with respect to a centerline of a gap between the adjacent conductive wafer carriers or adjacent connecting portions. Compared to the conventional disclosure, the disclosed mini surface mount LED package has relatively large pin spacers, lower operating temperature, and lower manufacturing cost.

因此意圖是前述詳細說明應被視為說明性的而非限制性的,且應了解的是包括所有等效物之以下申請專利範圍意圖界定本發明之精神與範疇。It is intended that the foregoing detailed description of the invention be construed as

10...發光二極體封裝體10. . . Light-emitting diode package

12...殼體12. . . case

14...引線框14. . . Lead frame

24...第一主要表面;上主要表面twenty four. . . First major surface; upper major surface

26...第二主要表面;下主要表面26. . . Second major surface; lower major surface

28,30...側表面28,30. . . Side surface

32,34...端表面32,34. . . End surface

36...空腔36. . . Cavity

36a...空腔底部36a. . . Bottom of the cavity

38...環38. . . ring

40...壁40. . . wall

44...第一發光二極體44. . . First light emitting diode

46...第二發光二極體46. . . Second light emitting diode

48...第三發光二極體48. . . Third light emitting diode

50,52,53,54,56,57,58...引線50,52,53,54,56,57,58. . . lead

58...中央區域58. . . Central area

60...連接墊片60. . . Connection gasket

62...第一軸62. . . First axis

62a...第二軸62a. . . Second axis

82,83,84,86,87,88...下表面82,83,84,86,87,88. . . lower surface

92...間隙92. . . gap

100...介面100. . . interface

102,103,104,106,107,108...上表面102,103,104,106,107,108. . . Upper surface

112,116,117,118...輪廓112,116,117,118. . . profile

122,123,124,126,127,128...連接墊片122,123,124,126,127,128. . . Connection gasket

142...第一導電晶片載體142. . . First conductive wafer carrier

143...第二導電晶片載體143. . . Second conductive wafer carrier

144...第三導電晶片載體144. . . Third conductive wafer carrier

146...第一導電連接部146. . . First conductive connection

147...第二導電連接部147. . . Second conductive connection

148...第三導電連接部148. . . Third conductive connection

300...發光二極體顯示器螢幕300. . . LED display

302...印刷電路板302. . . A printed circuit board

304...表面安裝元件304. . . Surface mount component

306...陣列306. . . Array

308...貫穿孔308. . . Through hole

H...高度H. . . height

h...主要表面之間的距離h. . . Distance between major surfaces

I...端表面之間的距離I. . . Distance between end surfaces

L...全長L. . . full length

P1,P2...間距P1, P2. . . spacing

W...全寬W. . . Full width

w...側表面之間的距離w. . . Distance between side surfaces

θ...角度θ. . . angle

第1圖是依據本發明之一實施例之一表面安裝元件的立體圖;1 is a perspective view of a surface mount component in accordance with an embodiment of the present invention;

第2圖是第1圖所示之實施例之俯視平面圖;Figure 2 is a top plan view of the embodiment shown in Figure 1;

第3圖是可使用在一表面安裝元件中之依據一實施例之一引線框的立體圖;Figure 3 is a perspective view of a lead frame in accordance with an embodiment of a surface mount component;

第4圖是第1圖所示之實施例之立體仰視圖;Figure 4 is a perspective bottom view of the embodiment shown in Figure 1;

第5圖是第3圖中之引線框的俯視圖;Figure 5 is a plan view of the lead frame in Figure 3;

第6圖是沿截面線6-6所截取之第2圖之實施例的橫截面圖;Figure 6 is a cross-sectional view of the embodiment of Figure 2 taken along section line 6-6;

第7圖是一表面安裝元件之一實施例的俯視圖;及Figure 7 is a plan view of an embodiment of a surface mount component; and

第8圖是具有依據本發明之實施例之表面安裝元件之一發光二極體顯示器螢幕之一部份的前視平面圖。Figure 8 is a front plan view of a portion of a screen of a light-emitting diode display having a surface mount component in accordance with an embodiment of the present invention.

10...發光二極體封裝體10. . . Light-emitting diode package

12...殼體12. . . case

24...第一主要表面;上主要表面twenty four. . . First major surface; upper major surface

26...第二主要表面;下主要表面26. . . Second major surface; lower major surface

28,30...側表面28,30. . . Side surface

32,34...端表面32,34. . . End surface

36...空腔36. . . Cavity

38...環38. . . ring

40...壁40. . . wall

44...第一發光二極體44. . . First light emitting diode

46...第二發光二極體46. . . Second light emitting diode

48...第三發光二極體48. . . Third light emitting diode

52,53,54...引線52,53,54. . . lead

122,123,124,126,127,128...連接墊片122,123,124,126,127,128. . . Connection gasket

Claims (24)

一種發光二極體(LED)封裝體,包含:一引線框,係定向於一第一軸及一與該第一軸垂直的第二軸,其包含多數導電晶片載體及多數導電連接部,其中一平行於該第一軸而延伸的第一間隙係將該等多數導電晶片載體與該等多數導電連接部分開,其中各導電晶片載體係包含具有一輪廓的一上表面,其中相鄰的導電晶片載體係被一平行於該第二軸而延伸的載體間隙分開,且其中該等相鄰的導電晶片載體的輪廓相對於該載體間隙中之一中心線係為不對稱;多數發光二極體,其各自設置在該等多數導電晶片載體中之各一者上;及一塑膠殼體,其至少部份地包圍該引線框,其中該發光二極體封裝體之一輪廓高度小於大約1.0mm。 A light emitting diode (LED) package comprising: a lead frame oriented on a first axis and a second axis perpendicular to the first axis, comprising a plurality of conductive wafer carriers and a plurality of conductive connections, wherein a first gap extending parallel to the first axis is a portion of the plurality of conductive wafer carriers and the plurality of conductive connections, wherein each of the conductive wafer carriers comprises an upper surface having a contour, wherein adjacent conductive The wafer carrier is separated by a carrier gap extending parallel to the second axis, and wherein the contours of the adjacent conductive wafer carriers are asymmetric with respect to a centerline of the carrier gap; a plurality of light emitting diodes Each of the plurality of conductive wafer carriers is disposed on each of the plurality of conductive wafer carriers; and a plastic housing at least partially surrounding the lead frame, wherein a height of the outline of the light emitting diode package is less than about 1.0 mm . 如申請專利範圍第1項之發光二極體封裝體,其中該發光二極體封裝體具有一小於大約2.6mm之寬度,且其中該發光二極體封裝體具有一小於大約2.6mm之長度。 The light emitting diode package of claim 1, wherein the light emitting diode package has a width of less than about 2.6 mm, and wherein the light emitting diode package has a length of less than about 2.6 mm. 如申請專利範圍第1項之發光二極體封裝體,其中各發光二極體具有一第一電端子及一第二電端子,各發光二極體之第一電端子與對應導電晶片載體電耦合,且其中該等多數發光二極體之各發光二極體的第一與第二電端子分別包含一陰極及一陽極,其中各發光二極體之第二電端子與該等多數導電連接部中之一對應導電連接 部之一連接墊片電耦合。 The light-emitting diode package of claim 1, wherein each of the light-emitting diodes has a first electrical terminal and a second electrical terminal, and the first electrical terminal of each of the light-emitting diodes and the corresponding conductive wafer carrier Coupling, wherein the first and second electrical terminals of each of the plurality of light-emitting diodes respectively comprise a cathode and an anode, wherein the second electrical terminals of each of the light-emitting diodes are electrically connected to the plurality of conductive terminals One of the parts corresponds to a conductive connection One of the connecting pads is electrically coupled. 如申請專利範圍第1項之發光二極體封裝體,其中該塑膠殼體包含具有一大約0.5mm之深度的一似正方形或矩形空腔。 The luminescent diode package of claim 1, wherein the plastic housing comprises a square-like or rectangular cavity having a depth of about 0.5 mm. 如申請專利範圍第1項之發光二極體封裝體,其中各導電晶片載體支持一獨立地發射紅、綠或藍光之單獨發光二極體。 The light-emitting diode package of claim 1, wherein each of the conductive wafer carriers supports a single light-emitting diode that independently emits red, green or blue light. 如申請專利範圍第1項之發光二極體封裝體,其中各導電晶片載體更具有一下表面及一在該上表面上之晶片承載墊片,各導電連接部具有一上表面,一下表面,及一在該上表面上之連接墊片,其中該等多數發光二極體之各發光二極體之第二電端子與該對應導電連接部之連接墊片藉一單一線結合而電耦合。 The illuminating diode package of claim 1, wherein each of the conductive wafer carriers further has a lower surface and a wafer carrying spacer on the upper surface, each conductive connecting portion having an upper surface, a lower surface, and And a connecting pad on the upper surface, wherein the second electrical terminals of the light emitting diodes of the plurality of light emitting diodes are electrically coupled to the connecting pads of the corresponding conductive connecting portions by a single wire. 如申請專利範圍第6項之發光二極體封裝體,其中各導電連接部及導電晶片載體之下表面具有一大約0.4mm乘大約0.7mm之墊片面積。 The illuminating diode package of claim 6, wherein each of the conductive connecting portion and the lower surface of the conductive wafer carrier has a shimming area of about 0.4 mm by about 0.7 mm. 如申請專利範圍第1項之發光二極體封裝體,其中該塑膠殼體包含一熱塑性材料。 The illuminating diode package of claim 1, wherein the plastic housing comprises a thermoplastic material. 如申請專利範圍第8項之發光二極體封裝體,其中該塑膠殼體包含一白色聚鄰苯二甲醯胺或一黑色聚鄰苯二甲醯胺之其中一者。 The light-emitting diode package of claim 8, wherein the plastic case comprises one of white polyphthalamide or a black polyphthalamide. 一種表面安裝元件,包含:一殼體,其包含相對第一與第二主要表面,相對側表面,及相對端表面,該殼體界定一由該第一主要表面 延伸入該殼體內部之空腔;及一引線框,其被該殼體至少部份地包圍且定向於一第一軸及一與該第一軸垂直的第二軸,該引線框包含多數導電晶片載體及多數導電連接部,其中一平行於該第一軸而延伸的第一間隙係將該等多數導電晶片載體與該等多數導電連接部分開,其中各導電晶片載體係包含具有一輪廓的一上表面,其中相鄰的導電晶片載體係被一平行於該第二軸而延伸的載體間隙分開,且其中該等相鄰的導電晶片載體的輪廓相對於該載體間隙中之一中心線係為不對稱;一單一發光二極體,其在各導電晶片載體之各晶片承載墊片上,各發光二極體具有一第一電端子及一第二電端子,其中各發光二極體之第一電端子與對應導電晶片載體電耦合;且其中各發光二極體之第二電端子與該等多數導電連接部中之一對應導電連接部之一連接墊片電耦合,且其中該空腔之一深度小於0.6mm且該表面安裝元件之一輪廓高度小於1.00mm。 A surface mount component comprising: a housing including opposing first and second major surfaces, opposing side surfaces, and opposite end surfaces, the housing defining a first major surface a cavity extending into the interior of the housing; and a lead frame at least partially surrounded by the housing and oriented on a first axis and a second axis perpendicular to the first axis, the lead frame comprising a majority a conductive wafer carrier and a plurality of conductive connections, wherein a first gap extending parallel to the first axis is a portion of the plurality of conductive wafer carriers and the plurality of conductive connections, wherein each of the conductive wafer carriers comprises a contour An upper surface, wherein adjacent conductive wafer carriers are separated by a carrier gap extending parallel to the second axis, and wherein the contours of the adjacent conductive wafer carriers are relative to a centerline of the carrier gap Is asymmetrical; a single light-emitting diode on each of the wafer carrying pads of each of the conductive wafer carriers, each of the light-emitting diodes has a first electrical terminal and a second electrical terminal, wherein each of the light-emitting diodes The first electrical terminal is electrically coupled to the corresponding conductive wafer carrier; and wherein the second electrical terminal of each of the light emitting diodes is electrically coupled to one of the plurality of conductive connecting portions and the one of the conductive connecting portions, and In one of the cavity surface depth of less than 0.6mm and the mounting member profile height of less than one 1.00mm. 如申請專利範圍第10項之元件,其中各發光二極體之第一與第二電端子分別包含一陰極及一陽極。 The component of claim 10, wherein the first and second electrical terminals of each of the light emitting diodes comprise a cathode and an anode, respectively. 如申請專利範圍第10項之元件,其中各導電晶片載體更具有一下表面及一在該上表面上之晶片承載墊片,各導電連接部具有一上表面,一下表面,及一在該上表面上之連接墊片,其中該等導電晶片載體及該等導電連接部 包含片狀金屬。 The component of claim 10, wherein each of the conductive wafer carriers further has a lower surface and a wafer carrying spacer on the upper surface, each of the conductive connecting portions having an upper surface, a lower surface, and an upper surface a connection pad, wherein the conductive wafer carrier and the conductive connections Contains sheet metal. 如申請專利範圍第12項之元件,其中各發光二極體之第一與第二電端子分別包含一陰極及一陽極,且其中各發光二極體發射紅、綠或藍光。 The component of claim 12, wherein the first and second electrical terminals of each of the light-emitting diodes respectively comprise a cathode and an anode, and wherein each of the light-emitting diodes emits red, green or blue light. 如申請專利範圍第13項之元件,其中各發光二極體之第二電端子與該對應導電連接部之連接墊片藉一單一線結合電耦合。 The component of claim 13 , wherein the second electrical terminal of each of the light-emitting diodes and the connection pad of the corresponding conductive connection are electrically coupled by a single wire. 如申請專利範圍第12項之元件,其中各導電連接部之上表面之一表面積小於各導電晶片載體之上表面之一表面積的大約一半。 The element of claim 12, wherein a surface area of one of the upper surfaces of each of the conductive connecting portions is less than about one-half of a surface area of a surface of each of the conductive wafer carriers. 如申請專利範圍第12項之元件,其中各導電連接部及導電晶片載體之下表面具有一大約0.4mm乘大約0.7mm之墊片面積。 The component of claim 12, wherein each of the conductive connecting portion and the lower surface of the conductive wafer carrier has a gasket area of about 0.4 mm by about 0.7 mm. 如申請專利範圍第10項之元件,其中該空腔在一水平方向及一垂直方向上具有一大約30°之開口角度。 The element of claim 10, wherein the cavity has an opening angle of about 30 in a horizontal direction and a vertical direction. 如申請專利範圍第10項之元件,其中該等發光二極體以沿該表面安裝元件之一中心軸之一第一方向延伸。 The element of claim 10, wherein the light emitting diodes extend in a first direction along one of the central axes of the surface mounting component. 如申請專利範圍第10項之元件,其中接近該表面安裝元件之一中心線之該導電晶片載體具有一大約0.47mm至0.53mm之寬度。 The element of claim 10, wherein the electrically conductive wafer carrier adjacent to a centerline of the surface mount component has a width of between about 0.47 mm and 0.53 mm. 一種發光二極體顯示器,包含:一基板,其承載配置成多數垂直行與多數水平列之表面安裝元件(SMD)的一陣列,該等表面安裝元件係為如請求項10至19中之任一項所述的元件,各表面安裝元 件包含一殼體且含有多數發光二極體,該等發光二極體係組配成可被通電以便組合地產生實質全範圍之顏色及界定該顯示器之一像素;及信號處理及發光二極體驅動電路,其電連接成可使該表面安裝元件之陣列選擇性地通電以便在該發光二極體顯示器上顯示影像,其中該顯示器之各像素具有一大約等於或小於2.8mm乘大約等於或小於2.8mm之尺寸。 A light emitting diode display comprising: a substrate carrying an array of surface mount components (SMD) configured in a plurality of vertical rows and a plurality of horizontal columns, such surfaced components as claimed in claims 10-19 One of the components described, each surface mount element The device includes a housing and includes a plurality of light emitting diodes, the light emitting diode systems being configured to be energized to collectively produce a substantially full range of colors and defining one of the pixels of the display; and signal processing and light emitting diodes a drive circuit electrically coupled to selectively energize the array of surface mount components to display an image on the LED display, wherein each pixel of the display has an approximately equal to or less than 2.8 mm by approximately equal to or less than 2.8mm size. 一發光二極體(LED)封裝體,包含:一引線框,係定向於一第一軸及一與該第一軸垂直的第二軸,其包含多數導電晶片載體及多數導電連接部,其中一平行於該第一軸而延伸的第一間隙係將該等多數導電晶片載體與該等多數導電連接部分開,其中各導電晶片載體係包含具有一輪廓的一上表面,其中相鄰的導電晶片載體係被一平行於該第二軸而延伸的載體間隙分開,且其中該等相鄰的導電晶片載體的輪廓相對於該載體間隙中之一中心線係為不對稱;多數發光二極體,其各設置在該等多數導電晶片載體中之各一者上;及一聚合物殼體,其至少部份地包圍該引線框,該聚合物殼體包含其間具有一高度距離之相對第一與第二主要表面,其間具有一寬度距離之相對側表面,及其間具有一長度距離之相對端表面,其中該高度距離,該寬度距離及該長度距離小於大約2.6mm。 A light emitting diode (LED) package includes: a lead frame oriented on a first axis and a second axis perpendicular to the first axis, comprising a plurality of conductive wafer carriers and a plurality of conductive connections, wherein a first gap extending parallel to the first axis is a portion of the plurality of conductive wafer carriers and the plurality of conductive connections, wherein each of the conductive wafer carriers comprises an upper surface having a contour, wherein adjacent conductive The wafer carrier is separated by a carrier gap extending parallel to the second axis, and wherein the contours of the adjacent conductive wafer carriers are asymmetric with respect to a centerline of the carrier gap; a plurality of light emitting diodes Each of which is disposed on each of the plurality of electrically conductive wafer carriers; and a polymeric housing at least partially surrounding the lead frame, the polymeric housing having a relative distance therebetween having a height distance therebetween And a second major surface having an opposite side surface with a width distance therebetween and an opposite end surface having a length distance therebetween, wherein the height distance, the width distance and the length distance are less than 2.6mm. 如申請專利範圍第21項之發光二極體封裝體,其中該殼體至少部份地包圍該引線框且界定一空腔,該空腔係由該第一主要表面延伸入該殼體內部至該空腔之一底部,且該空腔底部之面積對該主要表面之面積的比率是至少35%。 The illuminating diode package of claim 21, wherein the housing at least partially surrounds the lead frame and defines a cavity extending from the first major surface into the interior of the housing to The bottom of one of the cavities, and the ratio of the area of the bottom of the cavity to the area of the major surface is at least 35%. 如申請專利範圍第21項之發光二極體封裝體,其包含一紅發光二極體晶粒,一綠發光二極體晶粒及一藍發光二極體晶粒。 The light emitting diode package of claim 21, comprising a red light emitting diode die, a green light emitting diode die and a blue light emitting diode die. 如申請專利範圍第21項之發光二極體封裝體,其中該殼體至少部份地包圍該引線框且界定一空腔,該空腔係由該第一主要表面延伸入該殼體內部至該空腔之一底部,且各導電晶片載體具有延伸至少超過一空腔底部長度之1/2的一長度。 The illuminating diode package of claim 21, wherein the housing at least partially surrounds the lead frame and defines a cavity extending from the first major surface into the interior of the housing to One of the bottoms of the cavity, and each of the conductive wafer carriers has a length that extends at least 1/2 of the length of the bottom of the cavity.
TW100130341A 2010-11-03 2011-08-24 Miniature surface mount device with large pin pads TWI609508B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/939,096 US10431567B2 (en) 2010-11-03 2010-11-03 White ceramic LED package
PCT/CN2011/000335 WO2012058852A1 (en) 2010-11-03 2011-03-02 Miniature surface mount device with large pin pads
US13/153,888 US9685592B2 (en) 2009-01-14 2011-06-06 Miniature surface mount device with large pin pads

Publications (2)

Publication Number Publication Date
TW201220561A TW201220561A (en) 2012-05-16
TWI609508B true TWI609508B (en) 2017-12-21

Family

ID=46553181

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100130341A TWI609508B (en) 2010-11-03 2011-08-24 Miniature surface mount device with large pin pads

Country Status (1)

Country Link
TW (1) TWI609508B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008130140A1 (en) * 2007-04-19 2008-10-30 Lg Innotek Co., Ltd Light emitting device package and light unit having the same
US20090129085A1 (en) * 2007-11-16 2009-05-21 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Optical device
CN101582419A (en) * 2008-05-16 2009-11-18 科锐香港有限公司 Device and system for mini surface-mount device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008130140A1 (en) * 2007-04-19 2008-10-30 Lg Innotek Co., Ltd Light emitting device package and light unit having the same
US20090129085A1 (en) * 2007-11-16 2009-05-21 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Optical device
CN101582419A (en) * 2008-05-16 2009-11-18 科锐香港有限公司 Device and system for mini surface-mount device

Also Published As

Publication number Publication date
TW201220561A (en) 2012-05-16

Similar Documents

Publication Publication Date Title
US9634209B2 (en) Miniature surface mount device
WO2012058852A1 (en) Miniature surface mount device with large pin pads
US20180301438A1 (en) Led surface-mount device and led display incorporating such device
US9685592B2 (en) Miniature surface mount device with large pin pads
US8049230B2 (en) Apparatus and system for miniature surface mount devices
US9564567B2 (en) Light emitting device package and method of fabricating the same
US8378360B2 (en) Light emitting package
US8338851B2 (en) Multi-layer LED array engine
US9905544B2 (en) Bonding LED die to lead frame strips
US20070290328A1 (en) Light emitting diode module
CN202871786U (en) Light emitting diode package and light emitting diode display
CN202093756U (en) LED (light-emitting diode) display
CN107980182B (en) Light emitting device and method for manufacturing the same
KR101329194B1 (en) Optical module and manufacturing method thereof
TWI609508B (en) Miniature surface mount device with large pin pads
JP2007194610A (en) Light emitting module, method for fabrication thereof, and indicator using the light emitting module
CN202282348U (en) LED package and LED display
CN202103048U (en) Surface mounting device
CN202178295U (en) Light emitting diode packaging part
JP2007173791A (en) Light-emitting module, manufacturing method thereof, and backlight device using the module