TWI600122B - Sonos device and method for fabricating the same - Google Patents

Sonos device and method for fabricating the same Download PDF

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TWI600122B
TWI600122B TW102120393A TW102120393A TWI600122B TW I600122 B TWI600122 B TW I600122B TW 102120393 A TW102120393 A TW 102120393A TW 102120393 A TW102120393 A TW 102120393A TW I600122 B TWI600122 B TW I600122B
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rich
germanium
tantalum nitride
oxide
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TW201447877A (en
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楊進盛
陳建宏
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聯華電子股份有限公司
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矽-氧化物-氮化物-氧化物-矽元件及其製作方法 矽-oxide-nitride-oxide-germanium element and manufacturing method thereof

本發明是關於一種SONOS元件及其製作方法。 The present invention relates to a SONOS element and a method of fabricating the same.

非揮發性記憶體裝置具有不因電源供應中斷而造成儲存資料遺失的特性,因此被廣泛使用。現今廣泛使用的非揮發性記憶體裝置包含有唯讀記憶體(read-only-memory,ROM)、可程式化唯讀記憶體(programmable-read-only memory,PROM)、可抹除及可程式化唯讀記憶體(erasable-programmable-read-only memory,EPROM)以及電子式可抹除可程式化唯讀記憶體(electrically-erasable-programmable-read-only memory,EEPROM)。其中,電子式可抹除可程式化唯讀記憶體相較於其他非揮發性記憶體不同之處在於他們可利用電子來進行程式化及抹除操作。 The non-volatile memory device is widely used because it has a characteristic that the stored data is not lost due to power supply interruption. Non-volatile memory devices widely used today include read-only-memory (ROM), programmable-read-only memory (PROM), erasable and programmable Erasable-programmable-read-only memory (EPROM) and electronically erasable-programmable-read-only memory (EEPROM). Among them, electronic erasable programmable read-only memory is different from other non-volatile memory in that they can use electronic to program and erase.

目前對EEPROM裝置中產品研發的方向均集中在增加程式化的速度、降低進行程式化與讀取時的電壓、延長資料保存的時間、減少記憶體單元的抹除時間以及縮小記憶體元件的尺寸。此外,現今有些快閃(Flash)記憶體陣列(array)係使用一種由雙層多晶矽堆疊所形成的閘極(Dual poly-Si gate),且在此閘極結構中多晶矽通常會以氧化物-氮化物-氧化物(oxide-nitride-oxide,ONO)所構成的介電材料作區隔,元件操作時將電子由基板注入底層的多晶矽中達到儲 存資料(data)的功能。然而,此由雙層多晶矽閘極所形成的記憶體陣列由於只能儲存單一位元的資料,故較不利於提昇記憶體容量。因此另一種衍生的快閃記憶體使用矽-氧化物-氮化物-氧化物-矽(SONOS)作為資料儲存單元即因應而生,而且可以作到一個電晶體(transistor)同時儲存二個位元的功能,如此可以達到縮小元件尺寸及提升記憶體的容量。SONOS元件的操作方式例舉如下。 At present, the direction of product development in EEPROM devices is focused on increasing the speed of stylization, reducing the voltage during programming and reading, prolonging the time for data storage, reducing the erasing time of memory cells, and reducing the size of memory components. . In addition, some flash memory arrays today use a dual poly-Si gate formed by a stack of two-layer polysilicon, and in this gate structure, polysilicon is usually oxide- A dielectric material composed of an oxide-nitride-oxide (ONO) is used as a spacer to store electrons from the substrate into the underlying polysilicon to achieve storage. The function of storing data. However, the memory array formed by the double-layer polysilicon gate is more difficult to increase the memory capacity because it can store only a single bit of data. Therefore, another derivative flash memory uses 矽-oxide-nitride-oxide-矽 (SONOS) as a data storage unit, and can be used as a transistor to store two bits at the same time. The function is to reduce the size of the component and increase the capacity of the memory. The operation of the SONOS device is exemplified as follows.

在SONOS記憶體進行程式化的時候,電荷會從一基底轉移至ONO結構中的氮化矽層。舉例來說,使用者會先施加一電壓到閘極和汲極並建立垂直電場(vertical electric field))及橫向電場(lateral electric field),然後藉由這些電場沿著通道來增加電子的運行速度。當電子沿著通道移動時,一部份的電子會獲得足夠的能量並越過底部二氧化矽層的位能障壁而被陷捕(trap)在ONO結構的氮化矽層中。由於接近汲極區的電場最強,因此電子通常會陷捕在靠近汲極的區域。反之,當操作者將施加到源極與汲極區域的電位進行反向時,電子則會沿著通道朝相反的方向前進,並被注入到靠近源極區域的氮化矽層中。由於部分氮化矽層並不導電,這些引入到氮化矽層中的電荷傾向於維持在局部區域(localized)。因此,根據所施加的電壓,電荷可儲存在單一氮化矽層中的各不同區域中。 When the SONOS memory is programmed, the charge is transferred from a substrate to the tantalum nitride layer in the ONO structure. For example, the user first applies a voltage to the gate and the drain and establishes a vertical electric field and a lateral electric field, and then increases the speed of the electron along the channel by these electric fields. . As the electron moves along the channel, a portion of the electrons will gain sufficient energy to trap trapped in the tantalum nitride layer of the ONO structure across the potential barrier of the bottom ceria layer. Since the electric field near the bungee zone is the strongest, electrons are usually trapped in areas close to the bungee. Conversely, when the operator reverses the potential applied to the source and drain regions, the electrons travel in the opposite direction along the channel and are implanted into the tantalum nitride layer near the source region. Since a portion of the tantalum nitride layer is not electrically conductive, these charges introduced into the tantalum nitride layer tend to remain localized. Thus, depending on the applied voltage, the charge can be stored in different regions of the single tantalum nitride layer.

然而,以現今SONOS記憶體架構而言,在陷補(trap)電荷以及保留(retain)電荷的效率上仍不夠完美,包括陷補電荷的位置(site)不夠多或是被陷補的的電荷容易流失等缺點。因此如何改良現有SONOS架構來提升元件的整體效率與可靠度即為現今一重要課題。 However, in today's SONOS memory architecture, the efficiency of trapping charge and retaining charge is still not perfect, including insufficient trapped sites or trapped charges. Easy to lose and other shortcomings. Therefore, how to improve the existing SONOS architecture to improve the overall efficiency and reliability of components is an important issue today.

本發明較佳實施例是揭露一種矽-氧化物-氮化物-氧化物-矽(SONOS)元件,包含一基底;一第一氧化層設於該基底上;一富矽陷補層(silicon-rich trapping layer)設於該第一氧化層上;一含氮層設於該富矽陷補層上;一富矽氧化層(silicon-rich oxide layer)設於該含氮層上;以及一多晶矽層設於該富矽氧化層上。 A preferred embodiment of the invention discloses a germanium-oxide-nitride-oxide-germanium (SONOS) device comprising a substrate; a first oxide layer disposed on the substrate; and a silicon-rich trap layer (silicon- a rich trapping layer) disposed on the first oxide layer; a nitrogen-containing layer disposed on the germanium-rich trap layer; a silicon-rich oxide layer disposed on the nitrogen-containing layer; and a polysilicon layer A layer is disposed on the cerium-rich oxide layer.

依據本發明之另一實施例,是揭露一種製作矽-氧化物-氮化物-氧化物-矽(SONOS)元件的方法。首先提供一基底,然後形成一第一氧化層於該基底上。接著形成一氮化矽層於該第一氧化層上、進行一第一矽甲烷浸泡(silane soak)製程、通入氨氣與矽甲烷以形成一富矽陷補層於該第一氧化層上、形成一含氮層於該富矽陷補層上、形成一富矽氧化層於該含氮層上以及形成一多晶矽層於該富矽氧化層上。 In accordance with another embodiment of the present invention, a method of making a bismuth-oxide-nitride-oxide-germanium (SONOS) device is disclosed. A substrate is first provided and then a first oxide layer is formed on the substrate. Forming a tantalum nitride layer on the first oxide layer, performing a first silane soak process, introducing ammonia gas and methane to form a germanium-rich trap layer on the first oxide layer. Forming a nitrogen-containing layer on the germanium-rich layer to form a germanium-rich oxide layer on the nitrogen-containing layer and forming a polysilicon layer on the germanium-rich oxide layer.

12‧‧‧基底 12‧‧‧Base

14‧‧‧氧化層 14‧‧‧Oxide layer

16‧‧‧富矽陷補層 16‧‧‧Fulfillment

18‧‧‧氮化矽層 18‧‧‧矽 nitride layer

20‧‧‧富矽層 20‧‧‧ rich layer

22‧‧‧含氮層 22‧‧‧Nitrogen-containing layer

24‧‧‧富矽氧化層 24‧‧‧rich oxide layer

26‧‧‧氧化層 26‧‧‧Oxide layer

28‧‧‧多晶矽層 28‧‧‧Polysilicon layer

第1圖為本發明較佳實施例製作一SONOS記憶體之示意圖。 1 is a schematic diagram of fabricating a SONOS memory in accordance with a preferred embodiment of the present invention.

請參照第1圖,第1圖為本發明較佳實施例製作一SONOS記憶體之示意圖。如第1圖所示,首先提供一基底12,例如一由砷化鎵、矽覆絕緣(silicon on insulator,SOI)層、磊晶層、矽鍺層或其他半導體基底材料所構成的基底。接著形成一穿遂氧化層(tunnel oxide),例如氧化層14於基底12上,然後再形成一富矽陷補層(silicon-rich trapping layer)16於氧化層14上。 Please refer to FIG. 1. FIG. 1 is a schematic diagram of fabricating a SONOS memory according to a preferred embodiment of the present invention. As shown in FIG. 1, a substrate 12 is first provided, such as a substrate composed of gallium arsenide, a silicon on insulator (SOI) layer, an epitaxial layer, a germanium layer, or other semiconductor substrate material. Then forming a passivation oxide layer (tunnel Oxide, for example, an oxide layer 14 on the substrate 12, and then a silicon-rich trapping layer 16 is formed over the oxide layer 14.

依據本發明之較佳實施例,富矽陷補層16可包含一氮化矽層18與一富矽層(silicon-rich layer)20,例如一富矽氮化矽層(silicon-rich SiN layer)或一富矽氮氧化矽層(silicon-rich SiON layer)。換句話說,富矽陷補層16可包含一由氮化矽層18與富矽氮化矽層所構成之複合層,或一氮化矽層18與富矽氮氧化矽層所構成之複合層。 In accordance with a preferred embodiment of the present invention, the germanium-rich cladding layer 16 can include a tantalum nitride layer 18 and a silicon-rich layer 20, such as a silicon-rich SiN layer. Or a silicon-rich SiON layer. In other words, the rich germanium compensation layer 16 may comprise a composite layer composed of a tantalum nitride layer 18 and a germanium-rich tantalum nitride layer, or a composite of a tantalum nitride layer 18 and a germanium-rich tantalum oxide layer. Floor.

依據本發明之較佳實施例,若欲製作氮化矽層18與富矽氮化矽層之複合層時,可先對氧化層14進行一氨氣浸泡(ammonia soak)製程,接著通入氨氣與矽甲烷(silane),並搭配進行一微波電漿輔助化學氣相沉積(microwave PECVD)製程以形成一氮化矽層18於氧化層12上。接著於電漿關閉(plasma off)狀態下對氮化矽18層進行一矽甲烷浸泡(silane soak)製程,然後於電漿開啟(plasma on)狀態下通入氨氣與矽甲烷以形成一由富矽氮化矽層所構成之富矽層20,如此即於氧化層14上形成一由氮化矽層18與富矽氮化矽層所構成的富矽陷補層16。 According to a preferred embodiment of the present invention, if a composite layer of a tantalum nitride layer 18 and a germanium-rich tantalum nitride layer is to be formed, an ammonia soak process may be performed on the oxide layer 14, followed by ammonia. Gas and silane are used in conjunction with a microwave plasma assisted chemical vapor deposition (microwave PECVD) process to form a tantalum nitride layer 18 on the oxide layer 12. Then, a silane soak process is performed on the tantalum nitride layer 18 in a plasma off state, and then ammonia gas and helium methane are introduced in a plasma on state to form a The germanium-rich layer 20 composed of the germanium-rich tantalum nitride layer forms a germanium-rich trapped layer 16 composed of a tantalum nitride layer 18 and a germanium-rich tantalum nitride layer on the oxide layer 14.

反之,若欲製作氮化矽層18與富矽氮氧化矽層之複合層時,可先同樣對氧化層14進行一氨氣浸泡製程,接著通入氨氣與矽甲烷,並搭配進行一微波電漿輔助化學氣相沉積製程以形成一氮化矽層18於氧化層14上。隨後先於電漿關閉狀態下對氮化矽層18進行一矽甲烷浸泡製程,然後於電漿開啟狀態下通入氨氣、氧氣與矽甲烷以形成一由富矽氮氧化矽層所構成的富矽層20,如此即於氧 化層14上形成一由氮化矽層18與富矽氮氧化矽層所構成的富矽陷補層16。 On the other hand, if a composite layer of the tantalum nitride layer 18 and the yttrium-rich yttria layer is to be formed, an ammonia gas immersion process may be performed on the oxide layer 14 first, followed by ammonia gas and helium methane, and a microwave is used in combination. A plasma assisted chemical vapor deposition process is performed to form a tantalum nitride layer 18 on the oxide layer 14. Subsequently, a tantalum methane immersion process is performed on the tantalum nitride layer 18 in a plasma-closed state, and then ammonia gas, oxygen gas and helium methane are introduced into the plasma-opening state to form a layer of yttrium-rich yttrium oxide. Rich layer 20, so in oxygen On the formation layer 14, a germanium-rich trapping layer 16 composed of a tantalum nitride layer 18 and a germanium-rich oxynitride layer is formed.

依據本發明之較佳實施例,氮化矽18層的厚度較佳小於10埃,富矽層20,包括富矽氮化矽層或富矽氮氧化矽層的厚度小於15埃,但不侷限於此。 According to a preferred embodiment of the present invention, the thickness of the tantalum nitride layer 18 is preferably less than 10 angstroms, and the germanium-rich layer 20, including the germanium-rich tantalum nitride layer or the germanium-rich tantalum nitride layer, has a thickness of less than 15 angstroms, but is not limited. herein.

另外依據本發明之一實施例,進行矽甲烷浸泡製程以形成富矽陷補層時可選擇性利用氦氣進行一預清洗(pre-clean),且此預清洗之溫度較佳控制高於攝氏300度。其次,矽甲烷浸泡可選擇在大氣壓力(atmospheric)或負壓(sub-atmospheric)環境下在同一反應室(same chamber tool)中完成,此皆屬本發明所涵蓋之範圍。 In addition, according to an embodiment of the present invention, a helium methane immersion process is performed to form a ruthenium-enriched trap layer, and a helium gas can be selectively used for pre-cleaning, and the temperature of the pre-cleaning is preferably controlled higher than Celsius. 300 degrees. Secondly, the methane methane immersion can be carried out in the same chamber tool in an atmospheric or sub-atmospheric environment, which is within the scope of the present invention.

接著形成一含氮層(nitrogen-containing layer)22於富矽陷補層16上,其中含氮層22可包含一氮化矽層或一氮氧化矽層。類似於前述形成富矽陷補層16的方式,若欲製作一氮化矽層為含氮層時,可通入氨氣與矽甲烷以形成氮化矽層。而若欲製作一氮氧化矽層為含氮層時,可直接通入氨氣、氧氣與矽甲烷以形成氮氧化矽層。依據本發明之較佳實施例,含氮層22的厚度較佳介於10-30埃,但不侷限於此。 A nitrogen-containing layer 22 is then formed over the germanium-rich fill layer 16, wherein the nitrogen-containing layer 22 can comprise a tantalum nitride layer or a hafnium oxynitride layer. Similar to the manner of forming the germanium-rich trap layer 16, if a tantalum nitride layer is to be formed into a nitrogen-containing layer, ammonia gas and germanium methane may be introduced to form a tantalum nitride layer. If a layer of arsenide is desired to be a nitrogen-containing layer, ammonia, oxygen and helium methane may be directly introduced to form a ruthenium oxynitride layer. In accordance with a preferred embodiment of the present invention, the thickness of the nitrogen-containing layer 22 is preferably between 10 and 30 angstroms, but is not limited thereto.

另外,本發明之富矽陷補層16中雖包含前述氮化矽層與富矽氮化矽層,以及氮化矽層與富矽氮氧化矽層等兩種實施例,且含氮層22也可包含氮化矽層與氮氧化矽層等兩種材料配置,但依據本發明之較佳作法,當富矽陷補層16由氮化矽層與富矽氮化矽層所構成時,含氮層22較佳由氮化矽層所構成。而當富矽陷補層16由 氮化矽層與富矽氮氧化矽層所構成時,含氮層22則較佳由氮氧化矽層所構成。不過需注意的是,本較佳實施例之組合雖以上述材料搭配為例,但富矽陷補層16與含氮層22的材料配置均可依據產品的需求任意組合,並不侷限於此配置方式,接著於電漿關閉狀態下對含氮層22進行一矽甲烷浸泡製程,然後於電漿開啟狀態下通入氧氣與矽甲烷以形成一富矽氧化層24於含氮層22上。 In addition, the germanium-rich germanium layer 16 of the present invention includes the foregoing tantalum nitride layer and the germanium-rich tantalum nitride layer, and the tantalum nitride layer and the germanium-rich germanium nitride layer, and the like, and the nitrogen-containing layer 22 Two material configurations, such as a tantalum nitride layer and a hafnium oxynitride layer, may also be included. However, in accordance with a preferred embodiment of the present invention, when the germanium-rich germanium layer 16 is composed of a tantalum nitride layer and a germanium-rich tantalum nitride layer, The nitrogen-containing layer 22 is preferably composed of a tantalum nitride layer. And when the rich sag layer 16 When the tantalum nitride layer and the yttrium-rich yttria layer are formed, the nitrogen-containing layer 22 is preferably composed of a ruthenium oxynitride layer. However, it should be noted that the combination of the preferred embodiment is exemplified by the above materials, but the material arrangement of the rich layer 16 and the nitrogen-containing layer 22 can be arbitrarily combined according to the requirements of the product, and is not limited thereto. According to the configuration, the nitrogen-containing layer 22 is subjected to a methane immersion process in the plasma-off state, and then oxygen and helium methane are introduced into the plasma-opening state to form a cerium-rich oxide layer 24 on the nitrogen-containing layer 22.

隨後可選擇性形成另一氧化層26於富矽氧化層24上,接著再形成一控制閘極(control gate),例如多晶矽層28於氧化層26上,至此完成本發明較佳實施例一SONOS記憶體中主體單元的製作。之後於主體單元周圍側壁形成一間隙壁(圖未示),並可依據製程或產品需求接續形成選擇電極(select gate)、源極/汲極區域、層間介電層、自對準金屬矽化物(salicide)、接觸插塞等元件,在此不另加贅述。 A further oxide layer 26 can then be selectively formed on the germanium-rich oxide layer 24, followed by a control gate, such as a polysilicon layer 28, on the oxide layer 26, thereby completing a preferred embodiment of the present invention. The production of the main unit in the memory. Then, a spacer (not shown) is formed on the sidewall of the main body unit, and a select gate, a source/drain region, an interlayer dielectric layer, and a self-aligned metal telluride may be formed according to a process or a product requirement. (salicide), contact plug and other components, no additional description here.

需注意的是,本較佳實施例所揭露的SONOS記憶體雖於含氮層22與多晶矽層28之間同時設置一富矽氧化矽層24與一氧化矽26層,但不侷限於此設計,本發明又可依據產品的需求省略氧化矽層26的設置,而僅設置一富矽氧化矽層24於含氮層22與多晶矽層28之間,或省略富矽氧化矽層24的設置,而僅設置原本氧化矽層26於含氮層22與多晶矽層28之間,而完成另一種SONOS元件的製作。 It should be noted that the SONOS memory disclosed in the preferred embodiment has a germanium-rich germanium oxide layer 24 and a germanium oxide layer 26 disposed between the nitrogen-containing layer 22 and the polysilicon layer 28, but is not limited to this design. In the present invention, the arrangement of the yttrium oxide layer 26 may be omitted according to the requirements of the product, and only one yttrium-rich yttrium oxide layer 24 is disposed between the nitrogen-containing layer 22 and the polysilicon layer 28, or the yttrium-rich yttrium oxide layer 24 is omitted. Only the original ruthenium oxide layer 26 is disposed between the nitrogen-containing layer 22 and the polysilicon layer 28 to complete the fabrication of another SONOS device.

另外,依據本發明之其他實施例,製作氮化矽層18、富 矽層20以及含氮層22等三層包含氮化物的材料層時並不侷限於上述所揭露的方法,又可選擇以離子佈植(implant)、微波電漿輔助化學氣相沉積(microwave PECVD)、脈衝雷射(pulse laser)或高能量輻射線(high energy radiation)等方式來完成。 In addition, according to other embodiments of the present invention, a tantalum nitride layer 18 is formed. The three layers of the nitride-containing material layer, such as the germanium layer 20 and the nitrogen-containing layer 22, are not limited to the above-disclosed methods, and may be selected by ion implantation or microwave plasma-assisted chemical vapor deposition (microwave PECVD). ), pulse laser or high energy radiation.

其次,上述實施例中所有含氮之材料層,例如富矽陷補層16與含氮層22,以及/或所有ONO堆疊結構,包括氧化層14、富矽陷補層16、含氮層22、富矽氧化層24以及氧化層26等均較佳於同一反應室中完成,但不侷限於此。 Next, all of the nitrogen-containing material layers in the above embodiments, such as the germanium-rich trap layer 16 and the nitrogen-containing layer 22, and/or all of the ONO stack structures, including the oxide layer 14, the germanium-rich trap layer 16, and the nitrogen-containing layer 22 The ruthenium-rich oxide layer 24 and the oxide layer 26 are preferably completed in the same reaction chamber, but are not limited thereto.

接著,本發明又可選擇以金屬或複合金屬(composite metal)等其他材料來替換多晶矽層28,而完成另一種型態的記憶體元件,此實施例也屬本發明所涵蓋的範圍。 Next, the present invention may alternatively replace the polysilicon layer 28 with other materials such as metal or composite metal to complete another type of memory device. This embodiment is also within the scope of the present invention.

另外依據上述製程,本發明另揭露一種SONOS元件結構,其主要包含一基底12、一氧化層14設於基底12上、一富矽陷補層16設於氧化層14上、一含氮層22設於富矽陷補層16上、一富矽氧化層24設於含氮層22上、一氧化層26設於富矽氧化層24上以及一多晶矽層28設於氧化層26上。 In addition, according to the above process, the present invention further discloses a SONOS device structure, which mainly comprises a substrate 12, an oxide layer 14 is disposed on the substrate 12, a germanium-rich cladding layer 16 is disposed on the oxide layer 14, and a nitrogen-containing layer 22 is provided. A rich germanium oxide layer 24 is disposed on the nitrogen-rich layer 22, an oxide layer 26 is disposed on the germanium-rich oxide layer 24, and a poly germanium layer 28 is disposed on the oxide layer 26.

依據本發明之較佳實施例,SONOS元件中的ONO堆疊結構之高度較佳介於30-60埃,其中富矽陷補層16中的氮化矽層18的厚度較佳小於10埃且富矽層20的厚度較佳小於15埃。接著,含氮層22的厚度較佳介於10-30埃,以及富矽氧化層24的厚度較佳小於15埃。 In accordance with a preferred embodiment of the present invention, the height of the ONO stack structure in the SONOS device is preferably between 30 and 60 angstroms, and wherein the thickness of the tantalum nitride layer 18 in the germanium-rich trap layer 16 is preferably less than 10 angstroms and is rich. Layer 20 preferably has a thickness of less than 15 angstroms. Next, the thickness of the nitrogen-containing layer 22 is preferably between 10 and 30 angstroms, and the thickness of the yttrium-rich oxide layer 24 is preferably less than 15 angstroms.

依據前述之製程與結構,本發明之SONOS元件主要具有以下特徵及優點:首先,本發明較佳於習知SONOS元件之ONO堆疊結構中額外增添兩個介面層,包括一富矽陷補層16以及一富矽氧化層24。其中本發明之富矽陷補層16,包括上述實施例之氮化矽層與富矽氮化矽層,以及氮化矽層與富矽氮氧化矽層等兩種實施例較佳用來提升陷補電荷的能力。舉例來說,富矽陷補層16中的第一層材料層,例如氮化矽層,較佳用來作為一道柵欄,使電荷進入富矽陷補層16時較容易被抓住,並可同時避免陷補的電荷流失(leakage)。富矽陷補層16中的第二層材料層,例如上述之富矽氮化矽層或富矽氮氧化矽層則可提供較多數量的陷補電荷位置(trapping site),並同時作為陷補電荷的主體材料層。 According to the foregoing process and structure, the SONOS device of the present invention mainly has the following features and advantages: First, the present invention preferably adds two additional interface layers in the ONO stack structure of the conventional SONOS device, including a rich germanium trapping layer 16 And a ruthenium-rich oxide layer 24. The entangled layer 16 of the present invention, including the tantalum nitride layer and the germanium-rich tantalum nitride layer of the above embodiment, and the tantalum nitride layer and the germanium-rich germanium oxynitride layer are preferably used for upgrading. The ability to trap charge. For example, the first layer of material in the germanium-rich layer 16 , such as a tantalum nitride layer, is preferably used as a barrier to make it easier to be trapped when the charge enters the rich trap layer 16 and At the same time avoid the trapped charge loss. The second layer of material in the rich trapping layer 16, such as the above-described yttrium-rich tantalum nitride layer or the yttrium-rich yttrium oxynitride layer, can provide a larger number of trapping sites and simultaneously The charge material of the host material layer.

其次,本發明之富矽氧化層24與富矽陷補層16中的富矽氮化矽層或富矽氮氧化矽層同樣具有較多陷補電荷位置,因此電荷除了容易被陷補外也容易流失。藉由富矽氧化層24的設置,本發明可使靠近含氮層22頂部的電荷較為容易流出整個元件。綜上所述,依據上述所提出之架構,本發明可利用富矽陷補層以及富矽氧化層這兩道關卡來改善現有SONOS元件在陷補(trap)電荷以及保留(retain)電荷的效率上的缺點,藉此提升整個記憶體元件的整體效能。 Secondly, the germanium-rich oxide layer 24 of the present invention has a larger trapped charge position than the germanium-rich tantalum nitride layer or the germanium-rich tantalum nitride layer in the germanium-rich trap layer 16, so that the charge is not easily trapped. Easy to lose. By virtue of the arrangement of the germanium-rich oxide layer 24, the present invention allows the charge near the top of the nitrogen-containing layer 22 to flow more easily out of the entire element. In summary, according to the above proposed architecture, the present invention can utilize the two layers of the germanium-rich trapping layer and the germanium-rich oxide layer to improve the efficiency of trapping and retaining charges of existing SONOS components. The disadvantages mentioned above, thereby improving the overall performance of the entire memory component.

12‧‧‧基底 12‧‧‧Base

14‧‧‧氧化層 14‧‧‧Oxide layer

16‧‧‧富矽陷補層 16‧‧‧Fulfillment

18‧‧‧氮化矽層 18‧‧‧矽 nitride layer

20‧‧‧富矽層 20‧‧‧ rich layer

22‧‧‧含氮層 22‧‧‧Nitrogen-containing layer

24‧‧‧富矽氧化層 24‧‧‧rich oxide layer

26‧‧‧氧化層 26‧‧‧Oxide layer

28‧‧‧多晶矽層 28‧‧‧Polysilicon layer

Claims (18)

一種矽-氧化物-氮化物-氧化物-矽(SONOS)元件,包含:一基底;一第一氧化層設於該基底上;一氮化矽層設於該第一氧化矽層上;一富矽氮化矽層設於該氮化矽層上;一含氮層設於該富矽氮化矽層上;一富矽氧化層(silicon-rich oxide layer)設於該含氮層上;以及一多晶矽層設於該富矽氧化層上。 A germanium-oxide-nitride-oxide-germanium (SONOS) device comprising: a substrate; a first oxide layer disposed on the substrate; a tantalum nitride layer disposed on the first germanium oxide layer; a germanium-rich tantalum layer is disposed on the tantalum nitride layer; a nitrogen-containing layer is disposed on the germanium-rich tantalum nitride layer; a silicon-rich oxide layer is disposed on the nitrogen-containing layer; And a polysilicon layer is disposed on the germanium-rich oxide layer. 如申請專利範圍第1項之SONOS元件,其中該含氮層包含一氮化矽層,且該氮化矽層的厚度介於10-30埃。 The SONOS device of claim 1, wherein the nitrogen-containing layer comprises a tantalum nitride layer, and the tantalum nitride layer has a thickness of 10-30 angstroms. 如申請專利範圍第1項之SONOS元件,其中該含氮層包含一氮氧化矽層,且該氮氧化矽層的厚度介於10-30埃。 The SONOS device of claim 1, wherein the nitrogen-containing layer comprises a layer of oxynitride, and the layer of ruthenium oxynitride has a thickness of from 10 to 30 angstroms. 如申請專利範圍第1項之SONOS元件,其中該富矽氧化層的厚度小於15埃。 The SONOS element of claim 1, wherein the cerium-rich oxide layer has a thickness of less than 15 angstroms. 如申請專利範圍第1項之SONOS元件,另包含一第二氧化層設於該富矽氧化層與該多晶矽層之間。 For example, the SONOS device of claim 1 further comprises a second oxide layer disposed between the germanium-rich oxide layer and the polysilicon layer. 一種製作矽-氧化物-氮化物-氧化物-矽(SONOS)元件的方法,包含:提供一基底; 形成一第一氧化層於該基底上;形成一氮化矽層於該第一氧化層上;進行一第一矽甲烷浸泡(silane soak)製程;通入氨氣與矽甲烷以形成一富矽氮化矽層設於該氮化矽層上;形成一含氮層於該富矽氮化矽層上;形成一富矽氧化層於該含氮層上;以及形成一多晶矽層於該富矽氧化層上。 A method of making a bismuth-oxide-nitride-oxide-germanium (SONOS) device, comprising: providing a substrate; Forming a first oxide layer on the substrate; forming a tantalum nitride layer on the first oxide layer; performing a first silane soak process; introducing ammonia gas and methane to form a rich lanthanum a tantalum nitride layer is disposed on the tantalum nitride layer; a nitrogen-containing layer is formed on the germanium-rich tantalum nitride layer; a germanium-rich oxide layer is formed on the nitrogen-containing layer; and a polysilicon layer is formed on the germanium-rich layer On the oxide layer. 如申請專利範圍第6項製作SONOS元件的方法,另包含:對該第一氧化層進行一氨氣浸泡製程;以及通入氨氣與矽甲烷以形成該氮化矽層。 The method for fabricating a SONOS device according to Item 6 of the patent application further includes: performing an ammonia gas immersion process on the first oxide layer; and introducing ammonia gas and methane to form the tantalum nitride layer. 如申請專利範圍第6項製作SONOS元件的方法,另包含進行一微波電漿輔助化學氣相沉積(microwave PECVD)製程以形成該氮化矽層。 The method of fabricating a SONOS device according to item 6 of the patent application further comprises performing a microwave plasma assisted chemical vapor deposition (microwave PECVD) process to form the tantalum nitride layer. 如申請專利範圍第6項製作SONOS元件的方法,另包含:於電漿關閉(plasma off)狀態下對該氮化矽層進行該第一矽甲烷浸泡製程;以及於電漿開啟(plasma on)狀態下通入氨氣與矽甲烷以形成該富矽氮化矽層。 The method for fabricating a SONOS device according to Item 6 of the patent application, further comprising: performing the first methane immersion process on the tantalum nitride layer in a plasma off state; and on plasma on (plasma on) In the state, ammonia gas and helium methane are introduced to form the germanium-rich tantalum nitride layer. 如申請專利範圍第6項製作SONOS元件的方法,其中該含氮層包含一氮化矽層。 A method of fabricating a SONOS device according to item 6 of the patent application, wherein the nitrogen-containing layer comprises a tantalum nitride layer. 如申請專利範圍第6項製作SONOS元件的方法,其中該含氮層 包含一氮氧化矽層。 A method for fabricating a SONOS device according to item 6 of the patent application, wherein the nitrogen-containing layer Contains a layer of oxynitride. 如申請專利範圍第11項製作SONOS元件的方法,另包含:於電漿關閉狀態下對該氮化矽層進行一第二矽甲烷浸泡製程;以及於電漿開啟狀態下通入氨氣、氧氣與矽甲烷以形成該氮氧化矽層。 The method for fabricating a SONOS device according to the eleventh application patent scope further includes: performing a second methane methane immersion process on the tantalum nitride layer in a plasma closed state; and introducing ammonia gas and oxygen gas in a plasma open state; And methane is formed to form the ruthenium oxynitride layer. 如申請專利範圍第6項製作SONOS元件的方法,其中形成該多晶矽層前另包含形成一第二氧化層於該富矽氧化層上。 A method of fabricating a SONOS device according to claim 6 wherein the forming of the polysilicon layer further comprises forming a second oxide layer on the germanium-rich oxide layer. 如申請專利範圍第6項製作SONOS元件的方法,其中進行該第一矽甲烷浸泡製程另包含利用氦氣進行一預清洗(pre-clean),且該預清洗之溫度高於攝氏300度。 The method for fabricating a SONOS device according to Item 6 of the patent application, wherein the first methane soaking process further comprises pre-cleaning with helium gas, and the pre-cleaning temperature is higher than 300 degrees Celsius. 如申請專利範圍第6項製作SONOS元件的方法,其中進行該第一矽甲烷浸泡製程是於大氣壓力(atmospheric)或負壓(sub-atmospheric)環境下在同一反應室(same chamber tool)中完成。 The method for fabricating a SONOS device according to claim 6 of the patent application, wherein the first methane soaking process is performed in an same chamber tool in an atmospheric or sub-atmospheric environment. . 一種製作矽-氧化物-氮化物-氧化物-矽(SONOS)元件的方法,包含:提供一基底;形成一第一氧化層於該基底上;形成一氮化矽層於該第一氧化層上;進行一第一矽甲烷浸泡(silane soak)製程;通入氨氣、氧氣與矽甲烷以形成一富矽氮氧化矽層設於該氮化矽 層上;形成一含氮層於該富矽氮氧化矽層上;形成一富矽氧化層於該含氮層上;以及形成一多晶矽層於該富矽氧化層上。 A method of fabricating a germanium-oxide-nitride-oxide-germanium (SONOS) device, comprising: providing a substrate; forming a first oxide layer on the substrate; forming a tantalum nitride layer on the first oxide layer a first silane soak process; introducing ammonia gas, oxygen and helium methane to form a ruthenium-rich ruthenium oxide layer disposed on the tantalum nitride layer Forming a nitrogen-containing layer on the cerium-rich cerium oxide layer; forming a cerium-rich oxide layer on the nitrogen-containing layer; and forming a polysilicon layer on the cerium-rich oxide layer. 如申請專利範圍第16項製作SONOS元件的方法,另包含:於電漿關閉狀態下對該氮化矽層進行該第一矽甲烷浸泡製程;以及於電漿開啟狀態下通入氨氣、氧氣與矽甲烷以形成該富矽氮氧化矽層。 The method for fabricating a SONOS device according to claim 16 of the patent application scope, further comprising: performing the first methane immersion process on the tantalum nitride layer in a plasma closed state; and introducing ammonia gas and oxygen gas in a plasma open state; And methane to form the yttrium-rich yttrium oxide layer. 一種矽-氧化物-氮化物-氧化物-矽(SONOS)元件,包含:一基底;一第一氧化層設於該基底上;一氮化矽層設於該第一氧化矽層上;一富矽氮氧化矽層設於該氮化矽層上;一含氮層設於該富矽氮氧化矽層上;一富矽氧化層(silicon-rich oxide layer)設於該含氮層上;以及一多晶矽層設於該富矽氧化層上。 A germanium-oxide-nitride-oxide-germanium (SONOS) device comprising: a substrate; a first oxide layer disposed on the substrate; a tantalum nitride layer disposed on the first germanium oxide layer; An yttrium-rich yttrium oxide layer is disposed on the tantalum nitride layer; a nitrogen-containing layer is disposed on the yttrium-rich yttrium oxide layer; a silicon-rich oxide layer is disposed on the nitrogen-containing layer; And a polysilicon layer is disposed on the germanium-rich oxide layer.
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