TWI599285B - Circuit board structure with chip embedded therein and power module - Google Patents

Description

Wafer embedded circuit board structure and power module

The invention relates to a power component, and to a wafer embedded circuit board structure and a power module.

In order to reduce the size of electronic products and improve the efficiency of power supply, most of the circuit boards used in electronic products are embedded in power chips. However, existing power chips (such as high-power chips) cannot perform the corresponding (high-power) tests by themselves, so most of the power chips are buried in the circuit board structure, and then the conductive lines through the circuit board structure are performed. Related tests for power chips. However, the existing circuit board structure has to form a plurality of through holes, and then a plurality of through holes are filled with a conductive material to form the conductive lines, and a plurality of conductive lines connected to the respective electrodes of the power chip are not provided. The heat conduction function makes the heat energy generated by the power chip difficult to be eliminated. Moreover, when the circuit board structure is tested to find that the power chip is missing, the entire circuit board structure is unusable, thereby increasing the manufacturing cost.

Accordingly, the inventors believe that the above-mentioned defects can be improved, and that the invention has been studied with great interest and with the use of scientific principles, and finally proposes a present invention which is rational in design and effective in improving the above-mentioned defects.

Embodiments of the present invention provide a wafer embedded circuit board structure and a power module, which can effectively improve the defects caused by the existing circuit board structure.

The embodiment of the invention discloses a power module, comprising: an insulating substrate, having a first surface and a second surface on opposite sides; two power units separated from each other and embedded in the insulating substrate, and each of the power units includes: an electrothermal conducting seat, integrally formed The structure includes a conductive portion and a bearing portion vertically connected to the conductive portion; and at least one power chip having a first electrode layer and a second electrode layer on opposite sides, the first electrode layer Fixedly and electrically connected to the carrying portion, and the power chip is adjacent to the conductive portion; and a circuit layer disposed on the first surface of the insulating substrate, the circuit layer is electrically connected Testing the second electrode layer of the two power planes and the two electrode layers of the two power chips to enable the power module to pass each of the circuit layers and two of the electrothermal conduction blocks to test each of the Power chip.

The embodiment of the present invention also discloses a wafer embedded circuit board structure, comprising: at least one power module, comprising: an insulating substrate having a first surface and a second surface on opposite sides; two power units, Separating from each other and embedded in the insulating substrate, and each of the power units includes: an electrothermal conductive seat, being an integrally formed structure and including a conducting portion and a bearing vertically connected to the conducting portion And at least one power chip having a first electrode layer and a second electrode layer on opposite sides, the first electrode layer being fixed and electrically connected to the carrying portion, and the power chip being adjacent to The conductive portion; and a circuit layer disposed on the first surface of the insulating substrate, the circuit layer electrically connected to the two of the electrothermal conductive pads and the two of the power chips a two-electrode layer to enable the power module to test each of the power chips through the circuit layer and two of the electrothermal conductive seats; and a multi-layer board having at least one of the power modes embedded therein group.

In summary, the embedded circuit board structure and the power module disclosed in the embodiments of the present invention have an electrothermal conduction seat for transmitting heat energy and electric energy at the same time, so that the power chip can be in contact with the electrothermal conduction seat. The heat energy and the electric energy can be transmitted between the power chip and the electric heat conduction seat relatively quickly. Furthermore, the power module embeds the power chip in the insulating substrate to isolate external interference, and performs voltage or current transmission through the circuit layer and the electric heat conduction seat to enable the power chip to be connected. Received a predetermined voltage or current. Therefore, the embedded circuit board structure can measure whether the power module is normal before the power module is buried, so as to avoid the situation that the entire buried circuit board structure cannot be used.

For a better understanding of the features and technical aspects of the present invention, reference should be made to the accompanying drawings limits.

100‧‧‧ wafer embedded circuit board structure

1‧‧‧Power Module

11‧‧‧Insulation substrate

111‧‧‧ first surface

112‧‧‧ second surface

113‧‧‧ Conductive layer

12‧‧‧Power unit

121‧‧‧Electrothermal conduction seat

1211‧‧‧Transmission Department

1212‧‧‧Loading Department

1213‧‧‧ Side wall

1214‧‧‧ bearing surface

122‧‧‧Power chip

1221‧‧‧First electrode layer

1222‧‧‧Second electrode layer

123‧‧‧Insulated heat sink

13‧‧‧Line layer

131‧‧‧Sequence line

132‧‧‧Extended lines

14‧‧‧metal layer

15‧‧‧Insulating adhesive layer

2‧‧‧Multilayer board

21‧‧‧ first board

22‧‧‧ second board

200‧‧‧Heat-conducting parts

1A is a cross-sectional view showing the structure of a wafer embedded circuit board adhered to a heat conducting member according to the present invention.

Figure 1B is a cross-sectional view of the variation of Figure 1A.

2 is a cross-sectional view of a power module of the present invention.

3 is a perspective view of the power unit of FIG. 2.

4 is another perspective view of the power unit of FIG. 2.

FIG. 5 is a cross-sectional view showing a power module of the present invention with a conductive layer disposed in an insulating substrate.

6 is a cross-sectional view showing the power module of the present invention adhered to a heat conductive member.

7 is a cross-sectional view showing another embodiment of a power module of the present invention.

8 is a perspective view of the power unit of FIG. 7.

[Example 1]

Please refer to FIG. 1A to FIG. 6 , which are the first embodiment of the present invention. It should be noted that the related embodiments of the present invention are only used to specifically describe the embodiments of the present invention. The scope of the present invention is not to be construed as limiting the scope of the present invention.

As shown in FIG. 1A, the present embodiment discloses a die-embedded circuit board structure 100, and particularly refers to a circuit board structure for a vehicle having a high-power chip, but is not limited thereto. The chip embedded circuit board structure 100 includes at least one power module 1 And a multi-layer board 2, the power module 1 is embedded in the multi-layer board 2. It should be noted that the chip embedded circuit board structure 100 may include a plurality of power modules 1 embedded in the multi-layer board 2, and the power module 1 may also be separately applied to other devices. The above multilayer board 2 is not limited. Hereinafter, the structure of the power module 1 and the multilayer board 2 of the wafer-embedded circuit board structure 100 of the present embodiment will be described first, and then the connection relationship between the power module 1 and the multilayer board 2 will be described.

As shown in FIG. 2 and FIG. 3, the power module 1 includes an insulating substrate 11, two power units 12 separated from each other and embedded in the insulating substrate 11, and two opposite insulating substrates 11. A wiring layer 13 and a metal layer 14 of the surface. In the embodiment, the insulating substrate 11 is preferably a plate-like structure made of a high heat-dissipating insulating material and has a first surface 111 on the opposite side (such as the insulating substrate 11 in FIG. 2). And a second surface 112 (such as the bottom surface of the insulating substrate 11 in FIG. 2), but is not limited thereto.

Each power unit 12 includes an electrothermal conduction seat 121 and at least one power chip 122 disposed on the electrothermal conduction block 121. The number of power chips 122 of each power unit 12 is taken as an example in this embodiment. Note, but the invention is not limited thereto. For example, as shown in FIG. 1B, each power unit 12 may also include a plurality of power chips 122, and the plurality of power chips 122 are preferably mounted in parallel on the electrothermal conduction seat 121. Since the configuration of each power unit 12 is substantially the same, in order to facilitate the understanding of the present embodiment, the following description will first introduce the construction of a single power unit 12.

The electrothermal conduction seat 121 is an integrally formed metal (eg, copper) structure and includes a conducting portion 1211 and a bearing portion 1212 vertically connected to the conducting portion 1211, and the conducting portion 1211 and the carrying portion 1212 have an L-shaped configuration. . Each of the power chips 122 is preferably a high power wafer 122 that cannot be independently tested in the present embodiment. The high power wafer 122 refers to a power chip 122 applied to more than 5 kilowatts (KW). In the case, it can be applied to power chips exceeding 100KW. 122, but the invention is not limited thereto. Furthermore, the power chip 122 has a first electrode layer 1221 (such as the bottom layer of the power chip 122 in FIG. 2) and a second electrode layer 1222 (such as the top layer of the power chip 122 in FIG. 2) on the opposite side. The first electrode layer 1221 is fixed and electrically connected to the carrying portion 1212, and the power chip 122 is adjacent to the conducting portion 1211.

Therefore, since the electrothermal conduction seat 121 is used to transmit thermal energy and electric energy at the same time in the embodiment, the power chip 122 can contact the electrothermal conduction seat 121 to make the power chip 122 and the electrothermal conduction seat 121. It can transfer heat and electricity more quickly.

Further, the surface of the bearing portion 1212 for fixing the power chip 122 is defined as a bearing surface 1214 (such as the top surface of the bearing portion 1212 in FIG. 3), and the area of the bearing surface 1214 is not less than the power chip 122. Cross-sectional area. The cross-sectional area of the power chip 122 in this embodiment refers to the area of the cross section of the power chip 122 perpendicular to the first electrode layer 1221.

Thereby, the first electrode layer 1221 of the power chip 122 is completely contacted with the bearing surface 1214 to effectively increase the amount of electrical energy and thermal energy transfer per unit time between the power chip 122 and the carrying portion 1212. Moreover, the surface of the carrying portion 1212 away from the power chip 122 (such as the bottom surface of the carrying portion 1212 in FIG. 2) is preferably disposed in a plane with the second surface 112 of the insulating substrate 11. The second electrode layer 1222 of the power chip 122 and the conductive portion 1211 are both adjacent to the first surface 111 and spaced apart from the first surface 111 by a distance.

It should be noted that the first electrode layer 1221 of the power chip 122 and the carrying portion 1212 of the electrothermal conductive seat 121 are mutually joined by a thermally conductive and conductive metal in the embodiment, for example, by silver sintering. ) or by means of diffusion soldering.

The above description is for the configuration of each power unit 12, but the present invention is not limited thereto. For example, as shown in FIG. 4, each of the electrothermal conduction seats 121 may further include a side wall vertically connected to the conducting portion 1211 and the carrying portion 1212. 1213, and the power chip 122 in each of the power units 12 is located in a space surrounded by the corresponding conductive portion 1211, the bearing portion 1212, and the side wall 1213. In addition, the specific configuration of the side wall 1213 can also be adjusted according to the actual needs of the designer, and is not limited to the one shown in FIG.

In addition, as shown in FIG. 5, at least one functional module (not shown) and at least one conductive layer 113 connected to the functional module may be disposed in the insulating substrate 11 and embedded in the insulating layer. The conductive layer 113 in the substrate 11 is not in contact with any one of the electrothermal conduction pads 121 and any of the power chips 122.

As shown in FIG. 2 and FIG. 3, the circuit layer 13 is disposed on the first surface 111 of the insulating substrate 11, and the circuit layer 13 is electrically connected to the two electrothermal conduction blocks 121 and the two power chips 122. The second electrode layer 1222 is configured to enable the power module 1 to test each of the power chips 122 through the circuit layer 13 and the two electrothermal conduction pads 121. In more detail, since the power chip 122 is susceptible to external interference such as wiring or jig when performing separate measurement, the power chip 122 cannot receive a predetermined voltage or current, and the power module 1 of the embodiment is The power chip 122 is buried in the insulating substrate 11 to isolate external interference, and voltage or current is transmitted through the wiring layer 13 and the electrothermal conduction seat 121 to enable the power chip 122 to receive a predetermined voltage or current. Moreover, the power module 1 can be tested before being placed in the multi-layer board 2 to avoid unnecessary loss of the multi-layer board 2 due to the buried power module 1 being buried.

Furthermore, the circuit layer 13 has a series of lines 131 and two extension lines 132 which are separated from each other, and the series lines 131 are connected to the conducting portions 1211 and the portions belonging to different power units 12 (and adjacent thereto). The second electrode layer 1222, and the conductive portion 1211 and the second electrode layer 1222 that are not connected to the series line 131 (and away from each other) are respectively connected to the two extension lines 132 to make two power units 12 is electrically connected in parallel via the line layer 13 . The two power cells 12 included in the embodiment are preferably operated in parallel, so that a single independently operated power chip (not shown) is not the power chip referred to in this embodiment. 122.

The serial connection line 131 and the two extension lines 132 respectively extend from the first surface 111 of the insulating substrate 11 into the insulating substrate 11 to be connected to the surface of the conductive portion 1211 away from the second surface 112 ( The top surface of the conductive portion 1211 in FIG. 2 and the second electrode layer 1222. The two extension lines 132 can be used to apply a test voltage or an input/output test current, respectively.

Further, the wiring layer 13 can be formed in the following manner, but is not limited thereto. First, a plurality of through holes (not labeled) penetrating to the second electrode layer 1222 of the power chip 122 and the conductive portion 1211 of the electrothermal conducting block 121 are formed on the first surface 111 of the insulating substrate 11 and then filled with a conductive material (eg, And plating the plurality of through holes and covering the first surface 111 portion beside the through hole, thereby forming the above-mentioned serial connection line 131 and the two extension lines 132.

The metal layer 14 is disposed on the second surface 112 of the insulating substrate 11, and the metal layer 14 includes at least two separate blocks (not labeled), and the carrying portions 1212 of the two electrothermal conductive seats 121 are respectively The two blocks of the metal layer 14 are integrally connected. In addition, as shown in FIG. 6, the power module 1 may further include an insulating adhesive layer 15 disposed on the metal layer 14 and at least a portion of the second surface 112 of the insulating substrate 11 (as shown in FIG. 6 is located at the second surface 112 between the two blocks of the metal layer 14 so that the power module 1 can be attached to a heat conducting member 200 through the insulating adhesive layer 15.

In addition, in another embodiment not shown, the conductive seat 121 can be replaced with a ceramic material, and a conductive line is formed in the ceramic material as a conduction current. Wherein, since the conductive seat 121 is changed to a ceramic material, the difference in expansion coefficient between the power wafer 122 and the surrounding material can be effectively improved, and the insulation effect between the different power chips 122 can be improved.

As shown in FIG. 1A, the multilayer board 2 has a first board surface 21 and a second board surface 22 on opposite sides, and the multi-layer board 2 in this embodiment means via pressing. A multi-layer board that has been formed and has completed the layout of the circuit. The power module 1 is embedded in the multi-layer board 2 from the second board surface 22 to form the chip-embedded circuit board structure 100 of the embodiment, and the insulating substrate 11 of the power module 1 is formed. The second surface 112 is exposed from the first board surface 21 outside the multi-layer board 2, and the wafer-embedded circuit board structure 100 can be attached to the heat conducting member 200 through the insulating adhesive layer 15.

Furthermore, the insulating substrate 11 of the power module 1 can adopt a material different from the multilayer board 2 (for example, a high heat dissipation insulating material), thereby improving the heat dissipation effect of the wafer embedded circuit board structure 100 and improving heat. Problems caused by stress (eg, multi-layer board 2 bending or power chip 122 chipping).

[Embodiment 2]

Referring to FIG. 7 and FIG. 8 , which is the second embodiment of the present invention, the embodiment is similar to the first embodiment, so the two embodiments are not described in detail, and the differences between the two embodiments are mainly in the above description. The construction of the power module 1.

Specifically, the power module 1 of the present embodiment omits the metal layer 14, each power unit 12 and further includes an insulating heat sink 123. The insulating heat sink 123 is a ceramic block in this embodiment, but Limited by this. In each of the power units 12, the bearing portion 1212 of the electrothermal conduction seat 121 is disposed on the insulating heat sink 123, and the surface of the insulating heat sink 123 away from the power wafer 122 is the same as the insulating substrate 11. The two surfaces 112 are coplanar.

Further, the surface of each insulating heat sink 123 for carrying the electrothermal conduction seat 121 is preferably larger than the bearing surface 1214 of the carrying portion 1212, and the volume of the insulating heat sink 123 in the embodiment is greater than the electric heat conduction. The volume of the seat 121 is, but is not limited to, this. Furthermore, the insulating adhesive layer 15 is disposed on the insulating heat sink 123 and at least a portion of the second surface 112 of the insulating substrate 11 , so that the power module 1 can be attached to a heat conducting layer through the insulating adhesive layer 15 . Piece 200.

The above description is only a preferred possible embodiment of the present invention, and is not intended to limit the scope of the present invention. Decorations are all within the scope of the present invention.

1‧‧‧Power Module

11‧‧‧Insulation substrate

111‧‧‧ first surface

112‧‧‧ second surface

12‧‧‧Power unit

121‧‧‧Electrothermal conduction seat

1211‧‧‧Transmission Department

1212‧‧‧Loading Department

1214‧‧‧ bearing surface

122‧‧‧Power chip

1221‧‧‧First electrode layer

1222‧‧‧Second electrode layer

13‧‧‧Line layer

131‧‧‧Sequence line

132‧‧‧Extended lines

14‧‧‧metal layer

15‧‧‧Insulating adhesive layer

Claims (10)

A power module comprising: an insulating substrate having a first surface and a second surface on opposite sides; two power units separated from each other and embedded in the insulating substrate, and each of the The power unit includes: an electrothermal conductive seat having an integrated structure and including a conducting portion and a carrying portion vertically connected to the conducting portion; and at least one power chip having a first electrode layer on the opposite side And a second electrode layer, the first electrode layer is fixed and electrically connected to the carrying portion, and the power chip is adjacent to the conductive portion; and a circuit layer is disposed on the insulating substrate The first surface, the circuit layer is electrically connected to the two electrothermal conduction blocks and the second electrode layers of the two power chips, so that the power module can pass through the circuit layer Two of the electrothermal conduction mounts test each of the power chips. The power module of claim 1, wherein the circuit layer has a series of lines and two extension lines separated from each other, the series lines being connected to the conductive parts belonging to different power units and The second electrode layer, and the conductive portion and the second electrode layer not connected to the series line are respectively connected to the two extension lines, so that two of the power units are The circuit layers are electrically connected in parallel. The power module of claim 1, wherein in each of the power units, the surface of the carrier portion remote from the power die is coplanar with the second surface of the insulating substrate And the conducting portion and the carrying portion have an L-shaped configuration. The power module of claim 1, wherein each of the electrothermal conduction blocks further comprises a side wall vertically connected to the conducting portion and the carrying portion; and in each of the power units The power chip is located in a space surrounded by the conductive portion, the carrying portion, and the side wall. The power module of claim 1, wherein each of the power units further includes an insulating heat sink; and in each of the power units, the carrying portion of the electric heat conducting seat is disposed at The insulating heat sink surface on the insulating heat sink and away from the power chip is disposed in a coplanar manner with the second surface of the insulating substrate. The power module of any one of claims 1 to 5, wherein each of the power chips is further defined as a high power wafer that cannot be independently tested, and at least one conductive layer is disposed in the insulating substrate. a layer, and at least one of the conductive layers is not in contact with any one of the electrothermal conduction pads and any of the power chips. The power module of any one of claims 1 to 5, further comprising an insulating adhesive layer disposed on at least a portion of the second surface of the insulating substrate, and the power module can Attached to a heat conducting member by the insulating adhesive layer. The power module of any one of claims 1 to 5, wherein, in each of the power units, an area of the surface of the carrier portion for fixing the power chip is not less than the power chip Cross-sectional area. A wafer embedded circuit board structure comprising: at least one power module comprising: an insulating substrate having a first surface and a second surface on opposite sides; two power units separated from each other and embedded In the insulating substrate, and each of the power units includes: an electrothermal conducting seat, having an integrally formed structure and including a conducting portion and a carrying portion vertically connected to the conducting portion; and at least one power The wafer has a first electrode layer and a second electrode layer on opposite sides, the first electrode layer is fixed and electrically connected to the carrying portion, and the power chip is adjacent to the conducting portion; a circuit layer disposed on the first surface of the insulating substrate, the circuit layer electrically connected to the two electrically conductive conductive seats and two of the power chips The second electrode layer is configured to enable the power module to test each of the power chips through the circuit layer and two of the electrothermal conductive seats; and a multilayer board having at least one embedded therein The power module. The wafer-embedded circuit board structure of claim 9, wherein the multi-layer board has a first board surface and a second board surface on opposite sides, and the insulation of at least one of the power modules The second surface of the substrate is exposed from the first board surface and exposed outside the multi-layer board; at least one of the power modules further includes at least part of the second surface disposed on the insulating substrate An insulating adhesive layer, and the wafer embedded circuit board structure can be attached to a heat conducting member through the insulating adhesive layer.