TWI586108B - To prevent multi-power system in the phase-locked circuit circuit can not afford the power supply voltage Circuit - Google Patents

Description

Preventing the voltage supply of the phase-locked loop circuit in the multi-power system from being energized Circuit

The present invention relates to a voltage supply circuit for a phase locked loop circuit, and more particularly to a voltage supply circuit for preventing power failure of a phase locked loop circuit in a multiple power supply system. The circuit mechanism of the present invention provides a lower voltage for the phase-locked loop power switch control signal voltage conversion circuit to be simultaneously turned on and off without a delay of the main power supply voltage of the system, so that the phase-locked loop circuit is not subjected to each power-on instant. The regulator circuit has a large voltage-stabilizing capacitor and the influence of the drift of the semiconductor process characteristics, and can normally start the vibration.

The technique of checking the phase-locked loop circuit has been widely used in various commercial electronic devices. In the prior patent technology, for example, the application system and method for controlling the temperature and power supply voltage drift in the digital phase-locked loop, and the CLL resonant DC having the phase-locked loop control function of the application number No. 095126842 Power converter, application number No. 094136105 power management applied to the low-jitter phase-locked loop in the portable device, application number 094124601 power converter with phase-locked loop control function, application number 093137821 in high-speed dual power supply Fast switching of charge pump switches and loop filters in phase-locked loop systems. However, these prior patented technologies are not intended to provide different voltages required in multiple power systems, and the problem to be solved is not to cause the phase-locked loop circuit to be affected by external capacitors and semiconductor process characteristics at the instant of power-on. It does not work properly.

In a phase-locked loop circuit of a multiple power system, a voltage regulator circuit is used to convert the system's external main power into a system internal power supply to provide internal system internal circuit use.

1 shows a circuit diagram of a phase-locked loop including a multi-power system, which includes a phase-locked loop circuit 1 having a phase-locked loop circuit power terminal VP11, and a phase-locked loop power switch included in the phase-locked loop circuit 1 The control circuit 11 and a phase-locked loop power switch control signal terminal PDp11. A voltage stabilizing circuit 2 is connected to a system external main power source Vmain, and the system external main power source Vmain generates a system internal power source Vint via the voltage stabilizing circuit 2 to supply the phase locked loop circuit power terminal VP11 of the phase locked loop circuit 1. A phase-locked loop power switch control signal voltage conversion circuit 3 has a low voltage source VL and a high voltage source VH.

In the conventional power supply circuit, the voltage stabilizing circuit 2 supplies the system internal power source Vint to the phase locked loop circuit 1 and the phase locked loop power switch control signal voltage converting circuit 3. In order to provide a stable system internal power supply Vint, a larger voltage stabilizing capacitor 21 must be externally connected. The capacitance value of the voltage stabilizing capacitor 21 is about several tens of uF to several hundreds uF. When the whole system is powered up, the stabilizing capacitor 21 will cause the internal power supply Vint of the system to climb up to a stable state when the system main power supply Vmain climbs up to a stable time.

In a multi-supply system, the regulator circuit provides a lower supply voltage for the phase-locked loop circuit and the phase-locked loop power switch control signal voltage conversion circuit in the system. Due to the relationship between the large voltage-stabilizing capacitor and the drift of semiconductor process characteristics, there will be a very small number of product samples in a large number of product sample spaces, and the phase-locked loop circuit will not start normally when it is powered on. To work, you must turn off the power of the phase-locked loop circuit and then turn it back on to start it. As a result, these product samples work abnormally, affecting the overall yield of the product sample space.

The function of the phase-locked loop power switch control signal voltage conversion circuit 3 is to convert the high voltage logic input signal of the high voltage source VH into a low voltage logic output signal of the low voltage source VL. In this prior art, the high voltage source VH is connected to the system external main power source Vmain, and the low voltage source VL is connected to the system internal power source Vint. When the system is powered on, the low voltage source VL will climb up to a stable time when it climbs up to a stable state. After a while. Therefore, when the system is powered on, the phase-locked loop power switch control signal PDpll rises to a stable state when it is climbed to a stable state, and the system main power switch control signal PDmain climbs to a stable state for a period of time.

In a large number of product sample space, there will be a very small number of product samples, and the phase-locked loop circuit is powered on. At the moment of power-on, the system main power switch control signal PDmain has been turned on, but a large voltage-stabilizing capacitor is externally connected to the voltage-stabilizing circuit. In relation to the drift of semiconductor process characteristics, the phase-locked loop power switch control signal PDpll is still in the state of turning off the phase-locked loop power supply, so that the phase-locked loop circuit cannot start normally, but the power supply of the phase-locked loop circuit must be turned off first. Re-opening its power supply will cause it to oscillate, causing these product samples to work abnormally, affecting the overall yield of the product sample space.

In view of the deficiencies of the prior art, it is an object of the present invention to provide a voltage supply circuit that prevents the phase-locked loop circuit from being energized in a multi-supply system. The circuit mechanism of the present invention provides a lower voltage for the phase-locked loop power switch control signal voltage conversion circuit to be simultaneously turned on and off without a delay of the main power supply voltage of the system, so that the phase-locked loop circuit is not subjected to each power-on instant. The regulator circuit has a large voltage-stabilizing capacitor and the influence of the drift of the semiconductor process characteristics, and can normally start the vibration.

The technical means adopted by the present invention to achieve the above object is to stabilize a system external main power supply by a voltage stabilizing circuit to generate a system internal power supply to a phase locked loop circuit power supply end of a phase locked loop circuit. The external main power supply of the system is further supplied with a voltage dividing circuit to a low voltage source in a phase-locked loop power switch control signal voltage conversion circuit, and the phase-locked loop power switch controls the high voltage of the signal voltage conversion circuit. The source is connected to the external mains power of the system.

In terms of efficacy, the high voltage source and the low voltage source in the voltage supply circuit of the present invention are turned on at the same time without delay. Therefore, when the system is powered on, the phase-locked loop power switch control signal is powered up and stabilized with the system main power switch control letter. When the power is climbed to a stable state, it will be turned on at the same time without delay. In the instant of power-on of the present invention, the phase-locked loop circuit can be normally oscillated without being affected by the large voltage-stabilizing capacitor and the drift of the semiconductor process characteristic, thereby improving the overall sample space of the product. rate.

The specific embodiments of the present invention will be further described by the following examples and the accompanying drawings.

100‧‧‧Voltage supply circuit

1‧‧‧ phase-locked loop circuit

11‧‧‧ phase-locked loop power switch control circuit

111‧‧‧System Bias Current Generator

112‧‧‧ phase-locked loop bias current generating circuit

12‧‧‧ phase frequency detector

13‧‧‧Low-pass filter

14‧‧‧Variable Control Oscillator

15‧‧‧divider

2‧‧‧Variable circuit

21‧‧‧Steady capacitor

3‧‧‧ phase-locked loop power switch control signal voltage conversion circuit

31, 32, 33, 34‧‧‧ transistors

35‧‧‧Inverter

4‧‧‧voltage circuit

41, 42‧‧‧voltage-dividing transistor

Fref‧‧‧ reference clock

Fout‧‧‧ output clock

PDmain‧‧‧ system main power switch control signal

PDpll‧‧‧ phase-locked loop power switch control signal terminal

VPll‧‧‧ phase-locked loop circuit power supply end

VH‧‧‧high voltage source

VL‧‧‧ low voltage source

Vmain‧‧‧ system external main power supply

Vint‧‧‧ system internal power supply

Vdiv‧‧ ‧ voltage divider

Vout‧‧‧ output voltage

Figure 1 shows a circuit diagram of a multi-supply system of a conventional phase-locked loop.

2 shows a voltage supply circuit diagram of the present invention for preventing power-up of a phase-locked loop circuit in a multi-power system.

Figure 3 shows a further control circuit diagram of the phase locked loop circuit of Figure 2.

4 is a further control circuit diagram of the phase-locked loop power switch control signal voltage conversion circuit of FIG.

Referring to FIG. 2, it is shown that the voltage supply circuit of the present invention prevents the phase-locked loop circuit from being energized in the multi-power system. As shown in the figure, a phase-locked loop circuit 1 has a phase-locked loop circuit power terminal VP11, and the phase-locked loop circuit 1 includes a phase-locked loop power switch control circuit 11 and a phase-locked loop power switch control signal terminal. PDpll.

A voltage stabilizing circuit 2 is connected to a system external main power source Vmain, and a system internal power source Vint is supplied to the phase locked loop circuit power terminal VP11 of the phase locked loop circuit 1. A voltage stabilizing capacitor 21 is connected to the output of the voltage stabilizing circuit 2.

A phase-locked loop power switch control signal voltage conversion circuit 3 has a low voltage source VL and a high voltage source VH, wherein the high voltage source VH is connected to the system external main power source Vmain. A system main power switch control signal PDmain is sent to the lock phase The loop power switch controls the signal voltage conversion circuit 3.

In the design of the present invention, the voltage supply circuit 100 includes a point Press circuit 4. The voltage dividing circuit 4 can employ any circuit having a voltage dividing function. In the embodiment of the invention shown in FIG. 2, the voltage dividing circuit 4 is composed of two voltage dividing impedance transistors 41, 42.

The external main power source Vmain of the system passes through the voltage dividing impedance in the voltage dividing circuit 4 After the crystals 41, 42 are divided, a divided voltage Vdiv is supplied to the low voltage source VL in the phase-locked loop power switch control signal voltage conversion circuit 3.

FIG. 3 shows a further control circuit diagram of the phase locked loop circuit 1 of FIG. The phase-locked loop circuit 1 includes a phase-locked loop power switch control circuit 11, a phase frequency detector 12, a low-pass filter 13, a voltage-controlled oscillator 14, and a frequency divider 15. The phase-locked loop power switch control circuit 11 further includes a system bias current generator 111 and a phase-locked loop bias current generating circuit 112. The phase locked loop power switch control signal terminal PDp11 is connected to the system bias current generator 111. The power supply of the phase-locked loop circuit is controlled by the system bias current generator 111 and the phase-locked loop bias current generating circuit 112. After the reference clock fref passes through the phase frequency detector 12 and the low-pass filter 13, An output clock fout is sent from the voltage controlled oscillator 14. The output clock fout then feeds back a divided clock to the phase frequency detector 12 via the frequency divider 15.

Figure 4 shows the phase-locked loop power switch control signal voltage conversion of Figure 2 Further control circuit diagram of way 3. In the phase-locked loop power switch control signal voltage conversion circuit 3, a voltage conversion circuit is formed by the transistors 31, 32, 33, 34 and the inverter 35 to convert the voltage of the system main power switch control signal PDmain to an output voltage Vout. The phase-locked loop power switch control signal terminal PDp11 to the phase-locked loop power switch control circuit 11.

When the system is powered on, the phase-locked loop power switch control signal voltage is converted The high voltage source VH and the low voltage source VL in the way 3 are simultaneously turned on without delay time. because Therefore, when the system is powered on, when the phase-locked loop power switch control signal (PDpll) is powered up to a stable state and the system main power switch control signal PDmain is powered up and stabilized, there is no delay at the same time.

The design of the invention enables the phase-locked loop circuit to start normally during each power-on instant, and is not affected by the large voltage-stabilizing capacitor and the drift of the semiconductor process characteristic of the voltage-stabilizing circuit, thereby improving the sample space of the product. Overall yield.

The above embodiments are merely illustrative of the structural design of the present invention and are not intended to limit the present invention. Any modifications and variations of the above-described embodiments can be made by those skilled in the art, and such changes are still within the spirit of the invention and the scope of the invention as defined below. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

100‧‧‧Voltage supply circuit

1‧‧‧ phase-locked loop circuit

11‧‧‧ phase-locked loop power switch control circuit

2‧‧‧Variable circuit

21‧‧‧Steady capacitor

3‧‧‧ phase-locked loop power switch control signal voltage conversion circuit

4‧‧‧voltage circuit

41, 42‧‧‧voltage-dividing transistor

PDmain‧‧‧ system main power switch control signal

PDpll‧‧‧ phase-locked loop power switch control signal terminal

VPll‧‧‧ phase-locked loop circuit power supply end

VH‧‧‧high voltage source

VL‧‧‧ low voltage source

Vmain‧‧‧ system external main power supply

Vint‧‧‧ system internal power supply

Vdiv‧‧ ‧ voltage divider

Vout‧‧‧ output voltage

Claims (2)

A voltage supply circuit for preventing power-on of a phase-locked loop circuit in a multi-power system, comprising: a phase-locked loop circuit having a phase-locked loop circuit power terminal, and including a lock in the phase-locked loop circuit a phase loop power switch control circuit and a phase locked loop power switch control signal end; a voltage stabilizing circuit connected to a system external main power supply, wherein the external main power supply of the system generates a system internal power supply to the lock phase a phase-locked loop circuit power supply end of the loop circuit; a phase-locked loop power switch control signal voltage conversion circuit having a low voltage source and a high voltage source; wherein the voltage supply circuit includes a voltage dividing circuit The external main power source of the system is divided by the voltage dividing circuit to supply a voltage dividing voltage to the low voltage source in the voltage conversion circuit of the phase locked loop power switch control signal, and the phase locked loop power switch control signal voltage conversion circuit This high voltage source is connected to the external mains supply of the system. The voltage supply circuit for preventing the phase-locked loop circuit in the multi-power supply system from being energized, as described in claim 1, wherein the voltage stabilizing circuit is connected to a voltage stabilizing capacitor.