TWI582945B - Pixel structure and display panel - Google Patents
Pixel structure and display panel Download PDFInfo
- Publication number
- TWI582945B TWI582945B TW105123651A TW105123651A TWI582945B TW I582945 B TWI582945 B TW I582945B TW 105123651 A TW105123651 A TW 105123651A TW 105123651 A TW105123651 A TW 105123651A TW I582945 B TWI582945 B TW I582945B
- Authority
- TW
- Taiwan
- Prior art keywords
- buffer layer
- layer
- patterned buffer
- protective layer
- disposed
- Prior art date
Links
- 239000010410 layer Substances 0.000 claims description 170
- 239000011241 protective layer Substances 0.000 claims description 61
- 239000000758 substrate Substances 0.000 claims description 41
- 239000004065 semiconductor Substances 0.000 claims description 26
- 239000000463 material Substances 0.000 claims description 12
- 230000002093 peripheral effect Effects 0.000 claims description 10
- 238000000059 patterning Methods 0.000 claims description 7
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 claims description 4
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 4
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 2
- 229910052735 hafnium Inorganic materials 0.000 claims 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims 1
- -1 hydrogen ions Chemical class 0.000 description 11
- 239000001257 hydrogen Substances 0.000 description 10
- 229910052739 hydrogen Inorganic materials 0.000 description 10
- 230000000694 effects Effects 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 238000005452 bending Methods 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- 238000005401 electroluminescence Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical group 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000011112 polyethylene naphthalate Substances 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000001568 sexual effect Effects 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
- Electroluminescent Light Sources (AREA)
Description
本發明是有關於一種畫素結構及顯示面板，尤指一種具有特殊結構設計的軟性畫素結構及顯示面板，可以在不影響其開關元件電性的情況下較容易進行彎曲。The invention relates to a pixel structure and a display panel, in particular to a soft pixel structure and a display panel with a special structural design, which can be easily bent without affecting the electrical properties of the switching elements.
因軟性基板容易吸收水氣，且在後續的高溫製程中容易散出雜質，而雜質和水氣易影響軟性基板上各類電子元件的電性而使得其無法維持原本的電性。為解決此問題，目前業界多於軟性基板上製作一層緩衝層，以避免由軟性基板散出的雜質和水氣影響軟性基板上各類電子元件的電性。一般而言，業界多選用阻水性良好的材料來作為緩衝層。然而，緩衝層的材料雖具有良好的阻水特性，但其彈性係數較大，因此在受到應力時不易延展，而使得緩衝層在軟性基板彎曲時容易斷裂，甚至影響軟性基板的撓曲特性而影響產品良率。此外，緩衝層的材料中多富含氫離子，因此當電子元件的半導體層為金屬氧化物時，半導體層將容易受到氫離子的影響而改變其原本的電性，而使得電子元件無法正常運作。The soft substrate easily absorbs moisture, and impurities are easily released in a subsequent high-temperature process, and impurities and moisture easily affect the electrical properties of various electronic components on the flexible substrate, so that the original electrical properties cannot be maintained. In order to solve this problem, a buffer layer is formed on the flexible substrate in the industry to avoid the impurities and moisture emitted by the flexible substrate from affecting the electrical properties of various electronic components on the flexible substrate. In general, the industry often uses materials with good water resistance as a buffer layer. However, although the material of the buffer layer has good water-blocking property, its elastic modulus is large, so it is difficult to stretch when subjected to stress, and the buffer layer is easily broken when the flexible substrate is bent, and even affects the flexural characteristics of the flexible substrate. Affect product yield. In addition, the material of the buffer layer is rich in hydrogen ions, so when the semiconductor layer of the electronic component is a metal oxide, the semiconductor layer will be easily affected by hydrogen ions to change its original electrical properties, and the electronic components will not function properly. .
本發明的目的之一在於提供一種畫素結構及顯示面板，其具有特殊的結構設計，藉以在不影響電子元件電性的情況下具有良好的彎曲特性。One of the objects of the present invention is to provide a pixel structure and a display panel having a special structural design so as to have good bending characteristics without affecting the electrical properties of the electronic components.
本發明的一實施例提供一種畫素結構，包括：基板、第一圖案化緩衝層、第一保護層、第二圖案化緩衝層、第二保護層以及至少一開關元件。第一圖案化緩衝層設置於基板上，其中第一圖案化緩衝層包括至少一第一開口。第一保護層設置於基板上並覆蓋第一圖案化緩衝層，其中第一保護層係填滿至少一第一開口。第二圖案化緩衝層設置於第一保護層上，其中第二圖案化緩衝層包括至少一第二開口。第二保護層設置於第一保護層上並覆蓋第二圖案化緩衝層，其中第二保護層係填滿至少一第二開口。開關元件設置於第二保護層上。其中第二開口與第一開口在垂直投影方向上不重疊，且第一圖案化緩衝層在垂直投影方向上與第二開口重疊。An embodiment of the present invention provides a pixel structure including: a substrate, a first patterned buffer layer, a first protective layer, a second patterned buffer layer, a second protective layer, and at least one switching element. The first patterned buffer layer is disposed on the substrate, wherein the first patterned buffer layer includes at least one first opening. The first protective layer is disposed on the substrate and covers the first patterned buffer layer, wherein the first protective layer fills at least one first opening. The second patterned buffer layer is disposed on the first protective layer, wherein the second patterned buffer layer includes at least one second opening. The second protective layer is disposed on the first protective layer and covers the second patterned buffer layer, wherein the second protective layer fills at least one second opening. The switching element is disposed on the second protective layer. Wherein the second opening and the first opening do not overlap in the vertical projection direction, and the first patterned buffer layer overlaps the second opening in the vertical projection direction.
本發明之另一實施例提供一種顯示面板，包括：基板、第一圖案化緩衝層、第一保護層、第二圖案化緩衝層、第二保護層以及複數個開關元件。基板包含複數個畫素區。第一圖案化緩衝層設置於基板上，其中第一圖案化緩衝層包括複數個第一開口。第一保護層設置於基板上並覆蓋第一圖案化緩衝層，其中第一保護層填滿第一開口。第二圖案化緩衝層設置於第一保護層上，第二圖案化緩衝層包括複數個第二開口。第二保護層設置於第一保護層上並覆蓋第二圖案化緩衝層，其中第二保護層係填滿第二開口。開關元件設置於第二保護層上，其中各畫素區包含至少兩個開關元件。其中，第二開口與第一開口在垂直投影方向上不重疊，且第一圖案化緩衝層在垂直投影方向上重疊第二開口。Another embodiment of the present invention provides a display panel including: a substrate, a first patterned buffer layer, a first protective layer, a second patterned buffer layer, a second protective layer, and a plurality of switching elements. The substrate includes a plurality of pixel regions. The first patterned buffer layer is disposed on the substrate, wherein the first patterned buffer layer comprises a plurality of first openings. The first protective layer is disposed on the substrate and covers the first patterned buffer layer, wherein the first protective layer fills the first opening. The second patterned buffer layer is disposed on the first protective layer, and the second patterned buffer layer includes a plurality of second openings. The second protective layer is disposed on the first protective layer and covers the second patterned buffer layer, wherein the second protective layer fills the second opening. The switching element is disposed on the second protective layer, wherein each pixel region includes at least two switching elements. Wherein, the second opening and the first opening do not overlap in a vertical projection direction, and the first patterned buffer layer overlaps the second opening in a vertical projection direction.
本發明藉由改變保護層以及緩衝層的配置關係，並搭配緩衝層的圖案化可有效降低緩衝層發生斷裂的情況，並進而得到具有良好彎曲效果的顯示面板，且仍能兼顧阻擋雜質與水氣對顯示面板元件的影響。此外，本發明包括開口大致以錯位方式設置的兩層圖案化緩衝層，其中在開關元件的垂直投影方向上，較接近開關元件的緩衝層其與開關元件錯位設置，因此可進一步減少緩衝層中的氫離子對於開關元件的影響，進而提升產品的良率。The invention can effectively reduce the fracture of the buffer layer by changing the arrangement relationship of the protective layer and the buffer layer, and the patterning of the buffer layer, and further obtain a display panel with good bending effect, and still can both block the impurity and the water. The effect of gas on the display panel components. In addition, the present invention includes two layers of patterned buffer layers having openings arranged substantially in a dislocation manner, wherein in the vertical projection direction of the switching elements, the buffer layer closer to the switching elements is disposed offset from the switching elements, thereby further reducing the buffer layer The effect of hydrogen ions on the switching elements, which in turn increases the yield of the product.
為使熟悉本發明所屬技術領域之一般技藝者能更進一步了解本發明，下文特列舉本發明之較佳實施例，並配合所附圖式，詳細說明本發明的構成內容及所欲達成之功效。The present invention will be further understood by the following detailed description of the preferred embodiments of the invention, .
請參考第1圖至第3圖，第1圖為本發明之第一實施例之顯示面板的等效電路圖，第2圖繪示本發明之第一實施例之顯示面板的上視圖，第3圖為沿第2圖中A-A’剖線所繪示之剖面示意圖，其中為了便於瞭解並簡化說明，第2圖僅繪示出金屬層ML、半導體層SE以及第二圖案化緩衝層A2。如第1圖所示，本發明第一實施例之顯示面板10包含顯示區R1與位於顯示區R1之至少一側的周邊區R2，其中顯示區R1內設有複數個畫素區K(或稱子畫素)呈陣列式排列於基板P，大體上畫素區K的範圍係由互相垂直的複數條掃描線SL和複數條資料線DL所交錯定義出。各畫素區K設置有複數個互相電性連接的電子元件，第1圖僅於四個畫素區K繪示出電子元件的等效電路圖作為示意，以表示出各電子元件之間的電性連接關係。然而，需注意的是，本發明畫素區K的電子元件之種類、數量和連接關係不以第1圖所示者為限。以本實施例為例，一個畫素區K含有兩個開關元件T1、T2、兩個電容CS1、CS2以及一個顯示元件L，其中開關元件T1、T2舉例為薄膜電晶體，開關元件T1的閘極與源極分別電性連接於掃描線SL與資料線DL，開關元件T1的汲極電性連接於電容CS1的上電極與開關元件T2的閘極，開關元件T2的源極電性連接於電源供應線(圖未示)，開關元件T2的汲極和電容CS1的下電極電性連接於顯示元件L的陽極，與電容CS2的上電極，而顯示元件L的陰極與電容CS2共電位。本發明顯示面板10之畫素區K的電子元件配置位置請參考第2圖與第3圖，顯示面板10包括基板P、第一圖案化緩衝層A1、第一保護層B1、第二圖案化緩衝層A2、第二保護層B2以及構成開關元件T的數個膜層，需注意的是，本實施例第3圖中的開關元件T表示第1圖之開關元件T2，但不以此為限，且開關元件T2的各膜層設置位置可對應於第3圖之開關元件T。基板P可包括不透光基板，例如可撓式基板或其它軟性基板，基板P之材料舉例為聚萘酸乙酯(polyethylene naphthalate，PEN)、聚對苯二甲酸乙二酯(polyethylene terephthalate，PET)或聚醯亞胺(polyimide，PI)，但本發明不以此為限。第一圖案化緩衝層A1設置於基板P上，其中第一圖案化緩衝層A1包括第一開口C1。第一保護層B1設置於基板P上並覆蓋第一圖案化緩衝層A1，其中第一保護層B1係填 滿第一開口C1。較佳地，第一保護層B1的厚度大於第一圖案化緩衝層A1的厚度，舉例而言，第一保護層B1的厚度可大於等於500埃(Å)，但不以此為限。第二圖案化緩衝層A2設置於第一保護層B1上，其中第二圖案化緩衝層A2包括第二開口C2。第二保護層B2設置於第一保護層B1上並覆蓋第二圖案化緩衝層A2，其中第二保護層B2係填滿第二開口C2。較佳地，第二保護層B2的厚度大於第二圖案化緩衝層A2的厚度，舉例而言，第二保護層B2的厚度可大於等於500埃(Å)，但不以此為限。舉例來說，第一保護層B1以及第二保護層B2的材料可分別包括氧化矽，而第一圖案化緩衝層A1以及第二圖案化緩衝層A2的材料可分別包括氮化矽、氮氧化矽、氧化鋁、氧化鈦或金屬。在本實施例中，第一圖案化緩衝層A1以及第二圖案化緩衝層A2的材料分別包括氮化矽，而第一保護層B1以及第二保護層B2的材料分別包括氧化矽。一般而言，氮化矽較氧化矽的楊氏模量大，而楊氏模量越大代表其材料越剛硬，因此受到應力時不易延展，而在彎曲時容易發生斷裂。因此本發明利用第一圖案化緩衝層A1以及第二圖案化緩衝層A2來避免上述問題，進而使得顯示面板10較易於彎曲。此外，本發明之第二開口C2與第一開口C1在垂直基板P的投影方向Q上不重疊，而第一圖案化緩衝層A1在垂直投影方向Q上重疊第二開口C2，藉此第一圖案化緩衝層A1可補償第二開口C2處的阻水效果。 Please refer to FIG. 1 to FIG. 3 . FIG. 1 is an equivalent circuit diagram of a display panel according to a first embodiment of the present invention, and FIG. 2 is a top view of the display panel according to the first embodiment of the present invention. The figure is a schematic cross-sectional view taken along line A-A' in FIG. 2, wherein for convenience of understanding and simplification of the description, FIG. 2 only shows the metal layer ML, the semiconductor layer SE, and the second patterned buffer layer A2. . As shown in FIG. 1, the display panel 10 of the first embodiment of the present invention includes a display area R1 and a peripheral area R2 located on at least one side of the display area R1, wherein a plurality of pixel areas K are disposed in the display area R1 (or The sub-pixels are arranged in an array on the substrate P, and the range of the substantially pixel region K is defined by a plurality of scanning lines SL and a plurality of data lines DL which are perpendicular to each other. Each pixel area K is provided with a plurality of electronic components electrically connected to each other. FIG. 1 is an illustration of an equivalent circuit diagram of the electronic components in only four pixel regions K to indicate the electrical connection between the electronic components. Sexual connection relationship. However, it should be noted that the type, number, and connection relationship of the electronic components of the pixel region K of the present invention are not limited to those shown in FIG. Taking the embodiment as an example, a pixel region K includes two switching elements T1 and T2, two capacitors CS1 and CS2, and a display element L. The switching elements T1 and T2 are exemplified by a thin film transistor and a gate of the switching element T1. The pole and the source are electrically connected to the scan line SL and the data line DL, respectively, and the drain of the switching element T1 is electrically connected to the upper electrode of the capacitor CS1 and the gate of the switching element T2, and the source of the switching element T2 is electrically connected to A power supply line (not shown), a drain of the switching element T2 and a lower electrode of the capacitor CS1 are electrically connected to the anode of the display element L, and an upper electrode of the capacitor CS2, and the cathode of the display element L is electrically connected to the capacitor CS2. Referring to FIG. 2 and FIG. 3, the electronic component arrangement position of the pixel region K of the display panel 10 of the present invention includes a substrate P, a first patterned buffer layer A1, a first protective layer B1, and a second patterning. The buffer layer A2, the second protective layer B2, and the plurality of film layers constituting the switching element T, it should be noted that the switching element T in the third embodiment of the present embodiment represents the switching element T2 of Fig. 1, but this is not The position of each film layer of the switching element T2 may correspond to the switching element T of FIG. The substrate P may include an opaque substrate, such as a flexible substrate or other flexible substrate. The material of the substrate P is exemplified by polyethylene naphthalate (PEN), polyethylene terephthalate (PET). Or polyimide (PI), but the invention is not limited thereto. The first patterned buffer layer A1 is disposed on the substrate P, wherein the first patterned buffer layer A1 includes a first opening C1. The first protective layer B1 is disposed on the substrate P and covers the first patterned buffer layer A1, wherein the first protective layer B1 is filled The first opening C1 is completed. Preferably, the thickness of the first protective layer B1 is greater than the thickness of the first patterned buffer layer A1. For example, the thickness of the first protective layer B1 may be greater than or equal to 500 Å (Å), but not limited thereto. The second patterned buffer layer A2 is disposed on the first protective layer B1, wherein the second patterned buffer layer A2 includes a second opening C2. The second protective layer B2 is disposed on the first protective layer B1 and covers the second patterned buffer layer A2, wherein the second protective layer B2 fills the second opening C2. Preferably, the thickness of the second protective layer B2 is greater than the thickness of the second patterned buffer layer A2. For example, the thickness of the second protective layer B2 may be greater than or equal to 500 Å (Å), but not limited thereto. For example, the materials of the first protective layer B1 and the second protective layer B2 may respectively include yttrium oxide, and the materials of the first patterned buffer layer A1 and the second patterned buffer layer A2 may include tantalum nitride and oxynitride, respectively. Niobium, aluminum oxide, titanium oxide or metal. In this embodiment, the materials of the first patterned buffer layer A1 and the second patterned buffer layer A2 respectively comprise tantalum nitride, and the materials of the first protective layer B1 and the second protective layer B2 respectively comprise yttrium oxide. In general, tantalum nitride has a larger Young's modulus than yttrium oxide, and a larger Young's modulus means that the material is harder, so that it is less likely to be stretched when subjected to stress, and is more likely to be broken when bent. Therefore, the present invention utilizes the first patterned buffer layer A1 and the second patterned buffer layer A2 to avoid the above problems, thereby making the display panel 10 easier to bend. In addition, the second opening C2 of the present invention does not overlap with the first opening C1 in the projection direction Q of the vertical substrate P, and the first patterned buffer layer A1 overlaps the second opening C2 in the vertical projection direction Q, thereby The patterned buffer layer A1 can compensate for the water blocking effect at the second opening C2.
開關元件T設置於第二保護層B2上，包括閘極G、閘極絕緣層GI、第一平坦層H1、半導體層SE、源極S與汲極D，其中閘極G係由金屬層ML(示於第2圖)所形成，半導體層SE包括主動區CH，而主動區CH係為開關元件T的電子電洞流動區域，其中半導體層SE的材料可包括金屬氧化物、多晶矽或非晶矽。此外，源極S與汲極D設於第一平坦層H1上，經由第一平坦層H1之接觸洞而電性連接於半導體層SE，源極S與汲極D舉例包含金屬材料，但不以此為限。於本實施例中， 半導體層SE與第二保護層B2接觸，而第二開口C2的寬度W1大於等於主動區CH的寬度W2，且第二開口C2與開關元件T在垂直基板P的投影方向Q上重疊，亦即，第二開口C2與主動區CH在垂直基板P的投影方向Q上重疊，藉此避免第二圖案化緩衝層A2的氫離子對主動區CH造成影響。具體來說，因半導體層SE與第二保護層B2接觸，因此即使設置於半導體層SE下方的第二圖案化緩衝層A2中可能產生氫離子而影響半導體層SE的主動區CH，但由於本發明特將第二圖案化緩衝層A2的第二開口C2對應於主動區CH，且第二開口C2的寬度略大於主動區CH的寬度，因而能減少氫離子對於主動區CH的影響，而避免開關元件T無法正常運作。再者，第1圖所示之掃描線SL可以由第2圖所示之金屬層ML所構成，而資料線DL由另一金屬層所構成，但不以此為限。 The switching element T is disposed on the second protective layer B2, and includes a gate G, a gate insulating layer GI, a first planar layer H1, a semiconductor layer SE, a source S and a drain D, wherein the gate G is composed of a metal layer ML (shown in FIG. 2), the semiconductor layer SE includes an active region CH, and the active region CH is an electron hole flow region of the switching element T, wherein the material of the semiconductor layer SE may include metal oxide, polysilicon or amorphous Hey. In addition, the source S and the drain D are disposed on the first planar layer H1, and are electrically connected to the semiconductor layer SE via the contact hole of the first planar layer H1. The source S and the drain D are exemplified by a metal material, but not This is limited to this. In this embodiment, The semiconductor layer SE is in contact with the second protective layer B2, and the width W1 of the second opening C2 is greater than or equal to the width W2 of the active region CH, and the second opening C2 overlaps with the switching element T in the projection direction Q of the vertical substrate P, that is, The second opening C2 overlaps with the active region CH in the projection direction Q of the vertical substrate P, thereby preventing the hydrogen ions of the second patterned buffer layer A2 from affecting the active region CH. Specifically, since the semiconductor layer SE is in contact with the second protective layer B2, even if hydrogen ions are generated in the second patterned buffer layer A2 disposed under the semiconductor layer SE to affect the active region CH of the semiconductor layer SE, The second opening C2 of the second patterned buffer layer A2 corresponds to the active region CH, and the width of the second opening C2 is slightly larger than the width of the active region CH, thereby reducing the influence of hydrogen ions on the active region CH, and avoiding The switching element T does not operate normally. Further, the scanning line SL shown in FIG. 1 may be composed of the metal layer ML shown in FIG. 2, and the data line DL is composed of another metal layer, but is not limited thereto.
本發明顯示面板10可以為有機電激發光顯示面板或無機電激發光顯示面板，因此上述顯示元件L包括有機電激發光元件以及無機電激發光元件，但不以此為限。於本實施例中，顯示元件L包括第一電極E1、第二電極E2以及顯示層M，其中顯示元件L係透過第一電極E1與開關元件T電性連接。另外，於顯示元件L以及開關元件T之間另設置有第一平坦層H1、第二平坦層H2以及第三平坦層H3，其中第二平坦層H2的開口可使源極S可與第一電極E1電性連接。 The display panel 10 of the present invention may be an organic electroluminescence display panel or an inorganic electroluminescence display panel. Therefore, the display element L includes an organic electroluminescence element and an inorganic electroluminescence element, but is not limited thereto. In the present embodiment, the display element L includes a first electrode E1, a second electrode E2, and a display layer M, wherein the display element L is electrically connected to the switching element T through the first electrode E1. In addition, a first flat layer H1, a second flat layer H2, and a third flat layer H3 are further disposed between the display element L and the switching element T, wherein the opening of the second flat layer H2 can make the source S and the first The electrode E1 is electrically connected.
請再次參考第2圖與第3圖，本實施例之各個畫素區K包含兩個開關元件T，但本發明不以此為限，而可視設計需要更改各個畫素區K內開關元件T的數目。詳細來說，因主動區CH係為開關元件T的電子電洞流動區域，換句話說，主動區CH為閘極G主要作用的區域，因此主動區CH在垂直基板P的投影方向Q上係大體上重疊閘極G，所以於第3圖中，閘極G與半導體層SE的重疊區域即可視為是主動區CH。詳細來說，第二圖案化緩衝層A2的各個第二開口C2係分別對應 主動區CH設置，且第二開口C2的寬度W1皆大於主動區CH的寬度W2，因此可以減少第二圖案化緩衝層A2中的氫離子對於開關元件T的影響，進而提升產品的良率。此外，因本發明第一圖案化緩衝層A1以及第二圖案化緩衝層A2為圖案化的膜層，因此可有效降低緩衝層發生斷裂的情況，並進而得到具有良好彎曲效果的顯示面板。另外，雖然第一圖案化緩衝層A1以及第二圖案化緩衝層A2為圖案化的膜層，但因第一開口C1與第二開口C2的對應關係，故可在不降低第一圖案化緩衝層A1以及第二圖案化緩衝層A2的阻水效果下，達到易於彎曲的目的。 Referring to FIG. 2 and FIG. 3 again, each pixel region K of the embodiment includes two switching elements T, but the invention is not limited thereto, and the visual design needs to change the switching elements T in each pixel region K. Number of. In detail, since the active region CH is the electron hole flow region of the switching element T, in other words, the active region CH is the region where the gate G mainly acts, the active region CH is in the projection direction Q of the vertical substrate P. The gate G is substantially overlapped, so in FIG. 3, the overlapping area of the gate G and the semiconductor layer SE can be regarded as the active region CH. In detail, each of the second openings C2 of the second patterned buffer layer A2 corresponds to each The active region CH is disposed, and the width W1 of the second opening C2 is greater than the width W2 of the active region CH, so that the influence of the hydrogen ions in the second patterned buffer layer A2 on the switching element T can be reduced, thereby improving the yield of the product. In addition, since the first patterned buffer layer A1 and the second patterned buffer layer A2 of the present invention are patterned film layers, the buffer layer can be effectively broken, and a display panel having a good bending effect can be obtained. In addition, although the first patterned buffer layer A1 and the second patterned buffer layer A2 are patterned film layers, the first patterning buffer layer A1 and the second patterning layer C2 may not reduce the first patterning buffer. Under the water blocking effect of the layer A1 and the second patterned buffer layer A2, the purpose of easy bending is achieved.
本發明之顯示面板並不以上述實施例為限。下文將依序介紹本發明之其它較佳實施例之顯示面板，且為了便於比較各實施例之相異處並簡化說明，在下文之各實施例中使用相同的符號標注相同的元件，且主要針對各實施例之相異處進行說明，而不再對重覆部分進行贅述。 The display panel of the present invention is not limited to the above embodiment. The display panels of other preferred embodiments of the present invention will be described in order below, and in order to facilitate the comparison of the different embodiments and simplify the description, the same symbols are used to denote the same components in the following embodiments, and mainly The differences between the embodiments will be described, and the repeated portions will not be described again.
請參考第4圖與第5圖，第4圖繪示本發明之第二實施例之顯示面板的上視圖，第5圖為沿第4圖中B-B’剖線所繪示之剖面示意圖，其中為了便於瞭解並簡化說明，而第4圖同樣地僅繪示出金屬層ML、半導體層SE以及第二圖案化緩衝層A2，第5圖則省略上述第3圖中的第二平坦層H2、第三平坦層H3以及顯示元件L。相較於第一實施例，於本實施例之顯示面板20中，各第二開口C2分別與兩相鄰的畫素區K中的開關元件T重疊，較佳地，第二開口C2係分別與兩相鄰的畫素區K中的至少兩個開關元件T重疊，其中各第二開口C2分別為長條形，且在垂直基板P的投影方向Q上分別與至少兩相鄰的畫素區K中的開關元件T的主動區CH重疊。詳細來說，因第二圖案化緩衝層A2的第二開口C2為長條形，因此相較於第一實施例，本實施例的顯示面板20在撓曲時，第二圖案化緩衝層A2較不容易發生斷裂，並進而得到具有良好彎曲效果的顯示面板20。Please refer to FIG. 4 and FIG. 5 , FIG. 4 is a top view of the display panel according to the second embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along line BB′ of FIG. 4 . In order to facilitate understanding and simplify the description, FIG. 4 similarly only shows the metal layer ML, the semiconductor layer SE, and the second patterned buffer layer A2, and the fifth figure omits the second flat layer in the above FIG. H2, third flat layer H3, and display element L. Compared with the first embodiment, in the display panel 20 of the embodiment, each of the second openings C2 overlaps with the switching elements T in two adjacent pixel regions K. Preferably, the second openings C2 are respectively And overlapping at least two switching elements T in two adjacent pixel regions K, wherein each of the second openings C2 is elongated, and respectively adjacent to at least two adjacent pixels in the projection direction Q of the vertical substrate P The active regions CH of the switching elements T in the region K overlap. In detail, since the second opening C2 of the second patterned buffer layer A2 is elongated, the second patterned buffer layer A2 of the display panel 20 of the present embodiment is flexed when compared to the first embodiment. It is less prone to breakage, and in turn, the display panel 20 having a good bending effect is obtained.
請參考第6圖與第7圖，第6圖繪示本發明之第三實施例之顯示面板的上視圖，第7圖為沿第6圖中C-C’剖線所繪示之剖面示意圖，其中為了便於瞭解並簡化說明，而第6圖同樣地僅繪示出金屬層ML、半導體層SE以及第二圖案化緩衝層A2，第7圖則省略上述第3圖中的第二平坦層H2、第三平坦層H3以及顯示元件L。相較於第二實施例，於本實施例之顯示面板30中，第二圖案化緩衝層A2包括網狀圖案，且各第二開口C2與各畫素區K的開關元件T重疊。詳細來說，第二圖案化緩衝層A2的各第二開口C2的大小約等於兩個畫素區K的大小，因此第二圖案化緩衝層A2實質上僅設置於兩相鄰的畫素區K之間，而並未設置於畫素區K之內。藉此，可使第二圖案化緩衝層A2中氫離子對於主動區CH的影響降到最低，此外，因畫素區K內並無設置第二圖案化緩衝層A2，因此相較於第一實施例與第二實施例，本實施例之顯示面板30的半導體層SE可更為平整，利於後續膜層的製作。Please refer to FIG. 6 and FIG. 7 , FIG. 6 is a top view of the display panel according to the third embodiment of the present invention, and FIG. 7 is a cross-sectional view taken along line C-C′ of FIG. 6 . In order to facilitate understanding and simplify the description, FIG. 6 similarly only shows the metal layer ML, the semiconductor layer SE, and the second patterned buffer layer A2, and the seventh figure omits the second flat layer in the above FIG. H2, third flat layer H3, and display element L. Compared with the second embodiment, in the display panel 30 of the present embodiment, the second patterned buffer layer A2 includes a mesh pattern, and each of the second openings C2 overlaps with the switching elements T of the respective pixel regions K. In detail, the size of each of the second openings C2 of the second patterned buffer layer A2 is approximately equal to the size of the two pixel regions K, and thus the second patterned buffer layer A2 is substantially only disposed in two adjacent pixel regions. K is not set in the pixel area K. Thereby, the influence of hydrogen ions in the second patterned buffer layer A2 on the active region CH can be minimized, and further, since the second patterned buffer layer A2 is not disposed in the pixel region K, the first layer is compared with the first In the embodiment and the second embodiment, the semiconductor layer SE of the display panel 30 of the present embodiment can be more flat, which facilitates the fabrication of the subsequent film layer.
請參考第8圖，第8圖繪示本發明之第四實施例之顯示面板的側視圖，其中為了便於瞭解並簡化說明，第8圖同樣地省略上述第3圖中的顯示元件L。相較於第一實施例，於本實施例之顯示面板40中，開關元件T係為底閘極型薄膜電晶體元件，且其包括蝕刻停止層IS，換句話說，本實施例之開關元件T的半導體層SE並未與第二保護層B2接觸。詳細來說，因開關元件T的半導體層SE遠離第二圖案化緩衝層A2設置，因此本實施例之顯示面板40的第二圖案化緩衝層A2中的氫離子較不易影響開關元件T的半導體層SE的電性，因此可進一步降低第二圖案化緩衝層A2對於主動區CH的影響。值得一提的是，本實施例之開關元件T的結構亦可應用於前述第一實施例至第三實施例的顯示面板。此外，本發明之開關元件T的結構不以第一實施例至第四實施例所介紹的開關元件T的結構為限，而可具有其他適合的開關元件結構，舉例而言，開關元件T亦可為共平面型薄膜電晶體元件、蝕刻停止型薄膜電晶體結構或其他適合的薄膜電晶體元件。 Referring to FIG. 8, FIG. 8 is a side view of the display panel according to the fourth embodiment of the present invention. In order to facilitate understanding and simplification of the description, FIG. 8 similarly omits the display element L in the third figure. Compared with the first embodiment, in the display panel 40 of the present embodiment, the switching element T is a bottom gate type thin film transistor element, and includes an etch stop layer IS, in other words, the switching element of the embodiment The semiconductor layer SE of T is not in contact with the second protective layer B2. In detail, since the semiconductor layer SE of the switching element T is disposed away from the second patterned buffer layer A2, the hydrogen ions in the second patterned buffer layer A2 of the display panel 40 of the present embodiment are less likely to affect the semiconductor of the switching element T. The electrical properties of the layer SE can thus further reduce the effect of the second patterned buffer layer A2 on the active region CH. It is to be noted that the structure of the switching element T of the present embodiment can also be applied to the display panels of the first to third embodiments described above. In addition, the structure of the switching element T of the present invention is not limited to the structure of the switching element T described in the first to fourth embodiments, but may have other suitable switching element structures. For example, the switching element T is also It may be a coplanar thin film transistor element, an etch stop type thin film transistor structure or other suitable thin film transistor element.
請參考第9圖與第10圖，第9圖繪示本發明之第五實施例之顯示面板的側視圖，第10圖為本發明之第五實施例之顯示面板的等效電路圖，其中為了便於瞭解並簡化說明，第9圖同樣地省略上述第3圖中的第二平坦層H2、第三平坦層H3以及顯示元件L。相較於第一實施例，於本實施例之顯示面板50中，基板P包括顯示區R1以及設置於顯示區R1至少一側的周邊區R2，且顯示區R1中包含複數個畫素區K。於周邊區R2內設置有複數條走線N，且各走線N在垂直基板P的投影方向Q上與第二圖案化緩衝層A2的第二開口C2至少部分重疊。顯示區R1的配置可參考上述任一實施例，於此不再贅述。而在周邊區R2的方面，因其第二開口C2與走線N部分重疊，因此可進一步提升顯示面板50周邊區R2的撓曲能力，並進而得到具有良好彎曲效果的顯示面板50。 Please refer to FIG. 9 and FIG. 10, FIG. 9 is a side view of a display panel according to a fifth embodiment of the present invention, and FIG. 10 is an equivalent circuit diagram of a display panel according to a fifth embodiment of the present invention, wherein For convenience of understanding and simplification of the description, the second flat layer H2, the third flat layer H3, and the display element L in the above-described third drawing are similarly omitted in FIG. Compared with the first embodiment, in the display panel 50 of the embodiment, the substrate P includes a display area R1 and a peripheral area R2 disposed on at least one side of the display area R1, and the display area R1 includes a plurality of pixel areas K. . A plurality of traces N are disposed in the peripheral region R2, and each trace N at least partially overlaps the second opening C2 of the second patterned buffer layer A2 in the projection direction Q of the vertical substrate P. For the configuration of the display area R1, refer to any of the above embodiments, and details are not described herein again. On the other hand, in the peripheral region R2, since the second opening C2 and the trace N are partially overlapped, the flexing ability of the peripheral region R2 of the display panel 50 can be further improved, and the display panel 50 having a good bending effect can be obtained.
綜上所述，本發明藉由改變保護層以及緩衝層的配置關係，並搭配緩衝層的圖案化可有效降低緩衝層發生斷裂的情況，並進而得到具有良好彎曲效果的顯示面板。此外，因本發明的緩衝層圖案化，因此可減少緩衝層中的氫離子對於開關元件的影響，進而提升產品的良率。 In summary, the present invention can effectively reduce the fracture of the buffer layer by changing the arrangement relationship of the protective layer and the buffer layer, and the patterning of the buffer layer, and further obtain a display panel having a good bending effect. In addition, since the buffer layer of the present invention is patterned, the influence of hydrogen ions in the buffer layer on the switching elements can be reduced, thereby improving the yield of the product.
以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.
A1‧‧‧第一圖案化緩衝層
A2‧‧‧第二圖案化緩衝層
B1‧‧‧第一保護層
B2‧‧‧第二保護層
C1‧‧‧第一開口
C2‧‧‧第二開口
CH‧‧‧主動區
CS1、CS2‧‧‧電容
D‧‧‧汲極
DL‧‧‧資料線
E1‧‧‧第一電極
E2‧‧‧第二電極
G‧‧‧閘極
GI‧‧‧閘極絕緣層
H1‧‧‧第一平坦層
H2‧‧‧第二平坦層
H3‧‧‧第三平坦層
IS‧‧‧蝕刻停止層
ML‧‧‧金屬層
K‧‧‧畫素區
L‧‧‧顯示元件
M‧‧‧顯示層
N‧‧‧走線
P‧‧‧基板
Q‧‧‧投影方向
R1‧‧‧顯示區
R2‧‧‧周邊區
S‧‧‧源極
SE‧‧‧半導體層
SL‧‧‧掃描線
T、T1、T2‧‧‧開關元件
W1、W2‧‧‧寬度
10、20、30、40、50‧‧‧顯示面板A1‧‧‧First patterned buffer layer
A2‧‧‧Second patterned buffer layer
B1‧‧‧ first protective layer
B2‧‧‧Second protective layer
C1‧‧‧ first opening
C2‧‧‧ second opening
CH‧‧‧Active Area
CS1, CS2‧‧‧ capacitor
D‧‧‧汲
DL‧‧‧ data line
E1‧‧‧first electrode
E2‧‧‧second electrode
G‧‧‧ gate
GI‧‧‧ gate insulation
H1‧‧‧First flat layer
H2‧‧‧Second flat layer
H3‧‧‧ third flat layer
IS‧‧‧etch stop layer
ML‧‧‧ metal layer
K‧‧‧画素区
L‧‧‧ display components
M‧‧‧ display layer
N‧‧‧Line
P‧‧‧Substrate
Q‧‧‧Projection direction
R1‧‧‧ display area
R2‧‧‧ surrounding area
S‧‧‧ source
SE‧‧‧Semiconductor layer
SL‧‧‧ scan line
T, T1, T2‧‧‧ switching components
W1, W2‧‧‧ width
10, 20, 30, 40, 50‧‧‧ display panels
第1圖為本發明之第一實施例之顯示面板的等效電路圖。 第2圖繪示本發明之第一實施例之顯示面板的上視圖。 第3圖為沿第2圖中A-A’剖線所繪示之剖面示意圖。 第4圖繪示本發明之第二實施例之顯示面板的上視圖。 第5圖為沿第4圖中B-B’剖線所繪示之剖面示意圖。 第6圖繪示本發明之第三實施例之顯示面板的上視圖。 第7圖為沿第6圖中C-C’剖線所繪示之剖面示意圖。 第8圖繪示本發明之第四實施例之顯示面板的側視圖。 第9圖繪示本發明之第五實施例之顯示面板的側視圖。 第10圖為本發明之第五實施例之顯示面板的等效電路圖。Fig. 1 is an equivalent circuit diagram of a display panel of a first embodiment of the present invention. Fig. 2 is a top view of the display panel of the first embodiment of the present invention. Fig. 3 is a schematic cross-sectional view taken along line A-A' in Fig. 2. Fig. 4 is a top plan view showing a display panel of a second embodiment of the present invention. Fig. 5 is a schematic cross-sectional view taken along line B-B' in Fig. 4. Fig. 6 is a top view of the display panel of the third embodiment of the present invention. Fig. 7 is a schematic cross-sectional view taken along line C-C' in Fig. 6. Fig. 8 is a side view showing the display panel of the fourth embodiment of the present invention. Fig. 9 is a side view showing the display panel of the fifth embodiment of the present invention. Fig. 10 is an equivalent circuit diagram of a display panel of a fifth embodiment of the present invention.
A1‧‧‧第一圖案化緩衝層 A1‧‧‧First patterned buffer layer
A2‧‧‧第二圖案化緩衝層 A2‧‧‧Second patterned buffer layer
B1‧‧‧第一保護層 B1‧‧‧ first protective layer
B2‧‧‧第二保護層 B2‧‧‧Second protective layer
C1‧‧‧第一開口 C1‧‧‧ first opening
C2‧‧‧第二開口 C2‧‧‧ second opening
CH‧‧‧主動區 CH‧‧‧Active Area
D‧‧‧汲極 D‧‧‧汲
E1‧‧‧第一電極 E1‧‧‧first electrode
E2‧‧‧第二電極 E2‧‧‧second electrode
G‧‧‧閘極 G‧‧‧ gate
GI‧‧‧閘極絕緣層 GI‧‧‧ gate insulation
H1‧‧‧第一平坦層 H1‧‧‧First flat layer
H2‧‧‧第二平坦層 H2‧‧‧Second flat layer
H3‧‧‧第三平坦層 H3‧‧‧ third flat layer
L‧‧‧顯示元件 L‧‧‧ display components
M‧‧‧顯示層 M‧‧‧ display layer
P‧‧‧基板 P‧‧‧Substrate
Q‧‧‧投影方向 Q‧‧‧Projection direction
S‧‧‧源極 S‧‧‧ source
SE‧‧‧半導體層 SE‧‧‧Semiconductor layer
T‧‧‧開關元件 T‧‧‧ switching components
W1、W2‧‧‧寬度 W1, W2‧‧‧ width
10‧‧‧顯示面板 10‧‧‧ display panel
Claims (15)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW105123651A TWI582945B (en) | 2016-07-27 | 2016-07-27 | Pixel structure and display panel |
| CN201610971546.0A CN106571374B (en) | 2016-07-27 | 2016-11-04 | Pixel structure and display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW105123651A TWI582945B (en) | 2016-07-27 | 2016-07-27 | Pixel structure and display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI582945B true TWI582945B (en) | 2017-05-11 |
| TW201804594A TW201804594A (en) | 2018-02-01 |
Family
ID=58539830
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW105123651A TWI582945B (en) | 2016-07-27 | 2016-07-27 | Pixel structure and display panel |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN106571374B (en) |
| TW (1) | TWI582945B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI712837B (en) * | 2018-09-11 | 2020-12-11 | 南韓商Ｌｇ顯示器股份有限公司 | Display device |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107170760B (en) * | 2017-05-31 | 2019-12-20 | 京东方科技集团股份有限公司 | Preparation method of display substrate, display substrate and display device |
| CN108417604B (en) * | 2018-02-27 | 2020-08-04 | 上海天马微电子有限公司 | Display panel and display device |
| KR20210084913A (en) * | 2019-12-30 | 2021-07-08 | 엘지디스플레이 주식회사 | Organic light emitting display device |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120098008A1 (en) * | 2010-10-22 | 2012-04-26 | Song Jung-Bae | Organic light emitting diode device and method of manufacturing the same |
| US20140183472A1 (en) * | 2012-12-27 | 2014-07-03 | Lg Display Co., Ltd. | Transparent organic light emitting display device and method for manufacturing the same |
| US20140183476A1 (en) * | 2012-12-27 | 2014-07-03 | Lg Display Co. Ltd. | Thin-film transistor, method for manufacturing the same and display device comprising the same |
| CN105097553A (en) * | 2015-08-20 | 2015-11-25 | 友达光电股份有限公司 | Manufacturing method of thin film transistor for flexible display |
| US20150379923A1 (en) * | 2014-06-25 | 2015-12-31 | Lg Display Co., Ltd. | Thin film transistor substrate, display panel including the same, and method of manufacturing the same |
| CN105448999A (en) * | 2015-09-22 | 2016-03-30 | 友达光电股份有限公司 | Polysilicon thin film transistor element and manufacturing method thereof |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012243935A (en) * | 2011-05-19 | 2012-12-10 | Sony Corp | Device and display apparatus |
| KR102271586B1 (en) * | 2013-10-15 | 2021-07-02 | 삼성디스플레이 주식회사 | Flexible organic light emitting device and method of menufacturing the same |
| CN103545320B (en) * | 2013-11-11 | 2015-11-25 | 京东方科技集团股份有限公司 | Display base plate and the flexible display apparatus containing this display base plate |
| CN104795403B (en) * | 2015-04-16 | 2016-08-31 | 京东方科技集团股份有限公司 | A kind of flexible base board and preparation method thereof, display device |
-
2016
- 2016-07-27 TW TW105123651A patent/TWI582945B/en active
- 2016-11-04 CN CN201610971546.0A patent/CN106571374B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120098008A1 (en) * | 2010-10-22 | 2012-04-26 | Song Jung-Bae | Organic light emitting diode device and method of manufacturing the same |
| US20140183472A1 (en) * | 2012-12-27 | 2014-07-03 | Lg Display Co., Ltd. | Transparent organic light emitting display device and method for manufacturing the same |
| US20140183476A1 (en) * | 2012-12-27 | 2014-07-03 | Lg Display Co. Ltd. | Thin-film transistor, method for manufacturing the same and display device comprising the same |
| US20150379923A1 (en) * | 2014-06-25 | 2015-12-31 | Lg Display Co., Ltd. | Thin film transistor substrate, display panel including the same, and method of manufacturing the same |
| CN105097553A (en) * | 2015-08-20 | 2015-11-25 | 友达光电股份有限公司 | Manufacturing method of thin film transistor for flexible display |
| CN105448999A (en) * | 2015-09-22 | 2016-03-30 | 友达光电股份有限公司 | Polysilicon thin film transistor element and manufacturing method thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI712837B (en) * | 2018-09-11 | 2020-12-11 | 南韓商Ｌｇ顯示器股份有限公司 | Display device |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201804594A (en) | 2018-02-01 |
| CN106571374A (en) | 2017-04-19 |
| CN106571374B (en) | 2019-08-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11844245B2 (en) | Display device having power line | |
| TWI602306B (en) | Array substrate structure and display device | |
| TWI582945B (en) | Pixel structure and display panel | |
| TWI549289B (en) | Organic light-emitting display panel and fabrication method thereof | |
| US8877534B2 (en) | Display device and method for manufacturing the same | |
| KR101540341B1 (en) | Panel structure, display device comprising the panel structure and manufacturing methods thereof | |
| JP2016146422A (en) | Display device | |
| US8395717B2 (en) | Liquid crystal display apparatus | |
| US11004926B2 (en) | Organic light emitting diode display device | |
| WO2019109748A1 (en) | Array substrate and manufacturing method therefor, and display apparatus | |
| JP2016127190A (en) | Display device | |
| US20190229176A1 (en) | Display device | |
| WO2020239071A1 (en) | Display substrate and manufacturing method therefor, display panel and display apparatus | |
| TWI567871B (en) | Thin film transistor and method for fabricating the same | |
| CN105824160B (en) | Display panel | |
| US11656706B2 (en) | Touch display apparatus | |
| CN111276527A (en) | Display panel and manufacturing method thereof | |
| KR20150087617A (en) | Thin film transistor for a display substrate, display substrate and method of manufacturing a display substrate | |
| WO2021081814A1 (en) | Array substrate and display device | |
| TW202002271A (en) | Flexible electronic device | |
| JP7234380B2 (en) | Array substrate and manufacturing method thereof | |
| US20190172889A1 (en) | Wiring structure and display device having the wiring structure | |
| US20150325700A1 (en) | Thin film transistor and pixel structure | |
| TWI669645B (en) | Touch display panel | |
| US20230217712A1 (en) | Display apparatus having a storage capacitor |