TWI582539B - Method and system for providing a quality metric for improved process control - Google Patents

Description

Method and system for improving quality control of program control

SUMMARY OF THE INVENTION The present invention is directed to a method and system for providing quality metrics suitable for improving program control in semiconductor wafer fabrication.

This application is related to and claims an interest in the earliest available valid application date from the applications listed below ("Related Applications") (for example, claiming the earliest available priority date or claiming a provisional patent application other than a provisional patent application) Any of the relevant applications and all parent applications, grandparents' applications, and great-grandparents' applications, etc. under 35 USC § 119(e)).

For the purposes of additional statutory requirements of the USPTO, this application constitutes the date of April 6, 2011, which named Daniel Kandel, Guy Cohen, Vladimir Levinski and Noam Sapiens as the inventor entitled "METHODS TO REDUCE SYSTEMATIC BIAS IN OVERLAY METROLOGY" An official (non-provisional) patent application for US Provisional Patent Application (Application Serial No. 61/472,545) of OR LITHOGRAPHY PROCESS CONTROL.

For the purposes of additional statutory requirements of the USPTO, this application constitutes the application of the date of April 11, 2011, named Daniel Kandel, Guy Cohen, Vladimir Levinski, Noam Sapiens, Alex Shulman and Vladimir Kamenetsky as the inventor entitled "METHODS TO" REDUCE SYSTEMATIC BIAS IN OVERLAY METROLOGY OR LITHOGRAPHY PROCESS CONTROL" is one of the official (non-provisional) patent applications of the US Provisional Patent Application (Application Serial No. 61/474,167).

For the purposes of the additional statutory requirements of the USPTO, this application constitutes the US provisional date of July 20, 2011, which named Guy Cohen, Eran Amit and Dana Klein as the inventor's title "METHODS FOR CALCULATING CORRECTABLES WITH BETTER ACCURACY" A formal (non-provisional) patent application for a patent application (application serial number 61/509, 842).

For the purposes of the additional statutory requirements of the USPTO, this application constitutes the US provisional date of February 10, 2012, which named Guy Cohen, Dana Klein and Eran Amit as the inventor's title "METHODS FOR CALCULATING CORRECTABLES WITH BETTER ACCURACY" A formal (non-provisional) patent application for a patent application (application serial number 61/597, 504).

For the purposes of additional statutory requirements of the USPTO, this application constitutes the inventor's title for the application of Daniel Kandel, Vladimir Levinski, Noam Sapiens, Guy Cohen, Dana Klein, Eran Amit and Irina Vakshtein on February 13, 2012. One of the official (non-provisional) patent applications of the US Provisional Patent Application (Application Serial No. 61/598, 140) of "METHODS FOR CALCULATING CORRECTABLES USING A QUALITY METRIC".

Fabricating semiconductor devices such as logic and memory devices typically involves processing a substrate such as a semiconductor wafer using a number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor device. For example, lithography involves transferring a pattern from a mask to a semiconductor wafer. A semiconductor fabrication process for one of the resists. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical mechanical polishing (CMP), etching, deposition, and ion implantation. Multiple semiconductor devices can be fabricated into a single configuration on a single semiconductor wafer and subsequently separated into individual semiconductor devices.

A metrology program is used at various steps during a semiconductor fabrication process to monitor and control one or more semiconductor layer programs. For example, a metrology program is used to measure one or more characteristics of a wafer, such as the size (eg, line width, thickness, etc.) of features formed on the wafer during a program step, wherein The one or more characteristics are measured to determine the quality of the program steps. One such feature includes stacking errors. A stack of measurements typically specifies the degree of accuracy with which a first patterned layer is aligned with respect to one of the second patterned layers disposed above or below it, or a first pattern relative to one of the first layers disposed on the same layer The accuracy of the alignment of the two patterns. The stacking error is typically determined by overlaying the target with one of the structures formed on one or more layers of a workpiece (e.g., a semiconductor wafer). The structures may be in the form of a grating, and such gratings may be periodic. If the two layers or patterns are formed correctly, the structure on one layer or pattern tends to be aligned relative to the structure on the other layer or pattern. If the two layers or patterns are not formed correctly, the structure on one layer or pattern tends to be offset or misaligned relative to the structure on the other layer or pattern. The overlay error is the alignment error between any of the patterns used in the different stages of semiconductor integrated circuit fabrication. In general, the understanding of variations across wafers and wafers is limited to fixed sampling and therefore the overlay error is only detected for known selected locations.

In addition, if one of the wafers has measured characteristics (such as stacking errors) Acceptance (eg, beyond a predetermined range of the characteristics), one or more characteristics of the measurement may be used to alter one or more parameters of the program such that additional wafers fabricated by the program have acceptable characteristics .

In the case of stacking errors, a stack of measurements can be used to correct a lithography procedure to maintain the overlay error within the desired range. For example, the overlay measurement can be fed to the calculation of one of the "correctables" and other statistics that can be used by the operator to better align the lithography tools used in wafer processing. In the formula.

Therefore, it is critical to measure the stacking error of a set of metrology targets as accurately as possible. The inaccuracy in a given stack-to-measure measure can be caused by a variety of factors. One such factor is the incompleteness of a given stack of targets. Target structure asymmetry represents one of the target incompleteness of most important types of stacking inaccuracies. The overlap of target asymmetry and target incompleteness with a given metrology technique can result in relatively large inaccuracies in the overlay measurement. Accordingly, it is desirable to provide a system and method suitable for mitigating the effects of stack-to-target asymmetry in one or more of a stack of targets.

A computer implementation method for providing a quality metric suitable for improving program control in the fabrication of a semiconductor wafer is disclosed. In one aspect, a method can include, but is not limited to, obtaining a plurality of stacked pairs of measurement signals from a plurality of metrology targets spanning one or more of a plurality of wafers in a batch of wafers, Each stack of metric measurement signals corresponds to one of the plurality of metrology targets, the plurality of overlay metrics measuring the signal Obtaining by using a first measurement formula; determining a plurality of overlapping pairs of each of the plurality of stacked pairs of weights and measures signals by applying a plurality of stacked pairs to each pair of metric measurement signals, Each stack pair estimate is determined using one of the equal stack algorithms; generating each of the plurality of stack metrics from the plurality of weights and targets using the plurality of stack pairs One of the plurality of pairs of estimated distributions to generate a plurality of stacked pairs of estimated distributions; and using the generated plurality of stacked pairs of estimated distributions to generate a first plurality of quality metrics, wherein each quality metric corresponds to the generated plurality of stacked pairs Estimating a stack-to-estimate distribution in the distribution, each quality metric being a function of one of a width of one of the pairwise estimated distributions produced, each quality metric further presenting in a pair from an associated metrology target A function that measures the asymmetry in a measured signal.

The method can further include identifying, in at least one direction, one of the plurality of metrology targets having a quality metric greater than a selected outlier level from the one of the plurality of quality metrics generated for the plurality of metrology targets One or more metrology targets; determining a plurality of corrected metrology targets, wherein the plurality of corrected metrology targets will have the identified one or more metrology targets excluded from a quality metric that exceeds a selected outlier level Excluding the plurality of metrology targets; and using the determined plurality of corrected metrology targets to calculate a set of correctable values.

Additionally, the method can include obtaining at least an additional plurality of overlay metric measurement signals from the plurality of metrology targets across the one or more field distributions of the wafers in the batch of wafers, the at least additional plurality of stacks Measuring, for each of the metric measurement signals, the measurement signal corresponds to the plurality of weights and measures One of the targets is a metrology target, the at least one additional plurality of overlay metric measurement signals being acquired using at least one additional measurement recipe; wherein the application of each of the at least one additional plurality of measurement signals is applied to the measurement signal The plurality of stacked pair algorithms to determine at least an additional plurality of stacked pairs of each of the at least one additional plurality of stacked pairs of measured signals, each of the at least one of the plurality of stacked pairs of estimates utilizing the plurality of overlapping pairs of estimates Determining, by one of the stacking algorithms, by using the plurality of stacked pairs to generate a stack of estimated distributions for each of the at least one additional plurality of pairs of measured signals from the plurality of weighted and measured targets Generating at least an additional plurality of stacked pairs of estimated distributions; and utilizing the generated at least one additional plurality of stacked pairs of estimated distributions to generate at least an additional plurality of quality metrics, wherein each of the at least one additional plurality of quality metrics corresponds to the Generating at least one of a plurality of overlapping pairs of estimated distributions, the at least one of the plurality of quality metrics being at least a function of one of a plurality of stacked pairs of estimated distributions corresponding to one of a width of the generated pairwise estimated distribution; wherein the distribution is associated with the one of the first plurality of quality metrics associated with the first measurement formulation One of the at least one additional plurality of quality metrics of at least one additional measurement recipe is distributed to determine a program measurement recipe.

In another aspect, a method can include, but is not limited to, obtaining a metric measurement signal from one or more of one of the plurality of wafers or one of the plurality of fields; The obtained metric measurement signal uses a plurality of overlay algorithm to determine a plurality of stacked pair estimates, and each stack pair estimate is determined by using one of the equal stack algorithms; using the complex stack pair estimate To generate a stack of estimated distributions; and to use the resulting overlap estimates And generating a quality metric of the one or more metrology targets, the quality metric being a function of one of a width of the generated overlay estimate, the quality metric being configured to be in the case of an asymmetric overlay measurement signal Non-zero, the quality measure is a function of one of the widths of the generated pairwise estimate distribution, the quality measure being further one of the asymmetry in the measure of the measure obtained from an associated metrology target function.

A method of computer implementation for providing a set of processing tool correctable values is disclosed. In another aspect, a method can include, but is not limited to: acquiring a stack of each of the plurality of metrology targets across one or more of the one of the plurality of wafers Metricing the result of the weight; obtaining a quality metric associated with each of the acquired overlapping metrics; determining the metric of each metric by using the acquired grading of the metrics and the associated quality metrics Once the overlay value is modified, wherein the modified overlay value of each metrology target varies with at least one material parameter factor; computing a plurality of material parameter factors a set of correctable values and a set corresponding to the set of correctable values Residual; determining a value of a material parameter factor suitable for at least substantially minimizing the set of residuals; and identifying a set of correctable values associated with the at least substantially minimized group residual.

A computer implemented method for identifying a variation in a process tool correctable value is disclosed. In one aspect, a method can include, but is not limited to: acquiring a stack of each of a plurality of metrology targets across one or more of a plurality of field distributions Metrics and weights; obtaining a quality metric associated with each of the acquired overlays of weights and measures; using the obtained pair of weights and measures for each of the weighted targets and a product a quality function to determine a plurality of modified overlay values of the plurality of metrology targets, the quality function varying with the acquired quality metric for each metrology target; determining the complex number by using the plurality of modified overlay values One of the plurality of randomly selected samples of the pair of weights and measures obtained by the weighting target and the plurality of randomly selected samples of the associated quality metrics can be corrected to generate a complex array processing tool correctable value, Wherein each of the random samples has the same size; and identifying one of the correctable values of the complex array processing tool.

A method of computer implementation for generating a metrology sampling plan is disclosed. In one aspect, a method can include, but is not limited to, obtaining a plurality of stacked pairs of measurement signals from a plurality of metrology targets spanning one or more of a plurality of wafers in a batch of wafers, Each stack of metric measurement signals corresponds to one of the plurality of metrology targets; and the plurality of overlay metrics are determined by applying a plurality of overlay algorithms to each stack metric measurement signal to determine the plurality of overlay metrics a plurality of stacked pair estimates for each of the plurality of pairs of estimates, each of the stacked pairs of algorithms being determined by using the plurality of stacked pairs of estimates; A plurality of stacked pairs of metrics measure one of the pair of measured signals to produce a plurality of stacked pairs of estimated distributions; using the generated plurality of stacked pairs of estimated distributions to generate a first plurality of quality metrics, each of which The quality metric corresponds to a stacked pair of estimated distributions of the plurality of stacked pairs of estimated distributions, each quality metric further being present in a measure of the overlay metric from an associated metric target The signal asymmetry one function; and a first plurality of quality metrics using the plurality of the generated metrology targets To generate one or more metrology sampling plans.

A method of computer implementation for providing a process signature map is disclosed. In one aspect, a method can include, but is not limited to, forming a plurality of proxy targets on a reticle; forming a plurality of device-related targets on a wafer; by comparing after a lithography process Acquiring one of the first set of metrology results from the plurality of proxy targets and at least one second set obtained from the plurality of proxy targets after the first etching process of the wafer prior to the first etching process of the wafer Metricizing the result to determine a first program signature that varies with the location across the wafer; correlating the first program signature with a particular program path; performing one of the plurality of device-related targets for the wafer A first set of metrics measures a device-dependent offset after the first etch process, the device-dependent bias being a bias between a metrology structure and a device of the wafer; An additional etched pattern for each additional processing layer and one of the additional non-lithographic program paths of the wafer; measuring each additional processing layer and each additional non-lithographic image of the wafer One after the program path An external device related offset; and utilizing the determined first etch signature and each of the additional etch signatures and the first measurement device related offset and the first additional device related offset to generate a Program map map database.

A system for providing a quality metric suitable for improving program control in the fabrication of a semiconductor wafer is disclosed. In one aspect, a system can include, but is not limited to: a metrology system configured to acquire a plurality of metrology targets from one or more field distributions of one of the wafers in a batch of wafers Multiple stack metrics measure the measured signal, and each stack of metrics measures the measured signal pair One or more of the plurality of metrology targets should be measured and quantified, the plurality of overlay metric measurement signals being acquired using a first measurement recipe; and a computing system configured to: by each stack Applying a plurality of stack-pair algorithms to the metric measurement signal to determine a plurality of stacked-pair estimates for each of the plurality of stacked-pair metrics, each of the pairwise estimates using the equal-pitch algorithm Determining a plurality of stacked pairs of estimated distributions by using the plurality of stacked pair estimates to generate a plurality of stacked pairs of estimated distributions of the plurality of stacked pairs of measured and measured signals from the plurality of weighted and measured targets And generating, by the plurality of stacked pairs of estimated distributions, a first plurality of quality metrics, wherein each quality metric corresponds to a stacked pair of estimated distributions of the plurality of stacked pairs of estimated distributions, each quality metric system a function corresponding to one of the widths of the generated pairwise estimated distribution, each quality metric further being present in a pair of metric measurement signals from an associated metrology target One of asymmetry function.

It is to be understood that the foregoing general descriptions The accompanying drawings, which are incorporated in FIG

Those skilled in the art can better understand the many advantages of the present invention by referring to the figures.

Reference will now be made in detail to the subject matter

Referring generally to Figures 1A through 19, a method for providing suitable A method and system for improving quality metrics in a program control in a semiconductor wafer fabrication process. Stacking inaccuracy stems from a variety of factors. One such factor includes the presence of an asymmetric target structure (eg, a bottom target layer or a top target layer) in one or more of a set of sampled overlay weights and targets. The presence of a stack-to-target asymmetry can result in geometric ambiguity in the measurement of a given stack of targets. Geometry stack ambiguity can in turn lead to systematic error enhancement via nonlinear interaction with the stack pair metrology program itself. The net effect can result in a significant overlap inaccuracy (up to 10 nm). The present invention is directed to a method and system for providing a quality metric that is configured to quantize one of the overlay inaccuracies associated with each stack of measured signals obtained from various metrology targets of a sampled semiconductor wafer. The invention further relates to utilizing the quality metric to improve program control via outlier target removal and weighting recipe improvement or optimization.

It is further recognized that after the quality metric generation and analysis, the metric measurement of the present invention can be used to calculate a correction value for correcting a processing tool associated with performing a given procedure on the semiconductor wafer. Known as "correctable value").

As used throughout this disclosure, the term "correctable value" generally refers to information that can be used to correct the alignment of a lithography tool or scanner tool to control subsequent lithographic patterning relative to the overlay performance improvement. In a general sense, the correctable value allows wafer processing to be performed within a predefined desired range by providing feedback and feedforward to improve processing tool alignment.

As used throughout this disclosure, the term "weight-measurement scenario" refers to a particular combination of a metrology tool and a metrology goal. However, in a given Within a metrology scenario, there is a wide range of possible metrics that can be performed underneath metrics.

As used throughout this disclosure, the term "wafer" generally refers to a substrate formed from a semiconductor or non-semiconductor material. For example, a semiconductor or non-semiconductor material can include, but is not limited to, single crystal germanium, gallium arsenide, and indium phosphide. A wafer can include one or more layers. For example, such layers can include, but are not limited to, a resist, a dielectric material, a conductive material, and a half conductive material. Many different types of such layers are known in the art, and the term wafer as used herein is intended to encompass a wafer on which all of these types of layers can be formed.

A typical semiconductor program includes wafer processing in batches. As used herein, a "batch" is a group of wafers that are co-processed (eg, a group of 25 wafers). Each of the wafers in the batch consists of a number of exposure fields from lithography processing tools (eg, steppers, scanners, etc.). Multiple grains may be present in each field. A die system eventually becomes a functional unit of a single wafer. On the product wafer, the overlay metrology targets are typically placed in the scribe line (for example, placed in the four corners of the field). This system typically does not have an area of circuitry located around the perimeter of the exposure field (and outside of the die). In some instances, the overlay target is placed in a deep etched region of the region between the grains rather than the perimeter of the field. It is quite rare to place the overlay target on the product wafer in the main grain region, which is due to the urgent need for the circuit. However, engineering and characterization wafers (non-product wafers) typically have many overlapping targets throughout the center of the field that do not involve such limitations.

One or more layers formed on a wafer may be patterned or unpatterned Chemical. For example, a wafer can include a plurality of dies, each having repeatable patterned features. The formation and processing of such material layers can ultimately result in a complete device. Many different types of devices can be formed on a wafer, and the term wafer as used herein is intended to encompass a wafer on which any of the types of devices known in the art are fabricated.

1A and 1B illustrate cross-sectional views of a symmetric metrology target and an asymmetric metrology target. It is recognized that the metrology target of FIGS. 1A and 1B can include a first layer (eg, a processing layer) target structure and a second layer (eg, a resist layer) target structure. For example, as shown in FIG. 1A, the overlay to metrology target 100 can include a processing layer structure 104 and a corresponding resist layer target structure 102. Moreover, due to the symmetrical nature of the metrology target 100, the overlay 106 associated with the first layer (e.g., processing layer) target 104 and a second layer (e.g., resist layer) target 102 is well defined. In this regard, there is no ambiguity in the overlay metric measurement corresponding to one of the idealized metrology targets 100. In contrast, FIG. 1B illustrates a non-ideal metrology target 110 that includes one of the target structures 112 having an asymmetry. In this sense, target 110 includes a symmetric processing layer target structure 114 and an asymmetric resist layer target structure 112. The asymmetry in the resist layer target structure 112 is due to the unequal wall angles 116a and 116b of the target structure 112 (i.e., the left wall angle 116a is 90° and the right wall angle 116b is not equal to 90°). Thus, the handle layer structure 114 of the target 110 has a well-defined symmetry center, and the resist layer structure 112 of the target 110 does not have a well-defined symmetry center. This symmetry difference between the two layers in turn forms a geometric ambiguity in the resist layer structure 112. For example, relative to the resist layer structure 112 The top pair 118a defines a stack pair that is different from the overlap defined with respect to the bottom portion 118b of the resist layer structure 112. This ambiguity associated with the asymmetric resist layer structure 112, in turn, forms a stack 116 that is not well defined. It is further noted that if a given metric measurement tool is sensitive to the asymmetry of the overlay mark, the presence of asymmetry (such as the asymmetry depicted in Figure IB) may result in an increase in the measured signal. Symmetry, resulting in stack-to-measure inaccuracy.

It is well known in the art that the metrology tool settings can affect the results of a metric measurement. In this regard, the measured overlay is not defined solely by an offset between the structures belonging to the layer in question. As a first example, when a different focus plane is selected, the measurement results can be systematically changed. As a second example, when a different illumination spectrum is utilized in the measurement, the result of the measurement can also be systematically changed (i.e., as the illumination selection changes non-randomly). These effects can be attributed to at least two sources. The first source is related to the metrology target itself. For example, as shown in FIG. 2, if the target profile is asymmetrical, one of the offsets in the focus plane of the metrology system will produce a visible side offset in one of the weights and measures. In this manner, illumination associated with a first focus length F1 can strongly interact with the top surface of the top layer target structure 202, while illumination having a focus length F2 can interact strongly with the bottom surface of the top layer target structure 202. Thus, the overlay measurement 206 between a top structure 202 and the bottom structure 204 can include a corresponding stack of ambiguities 208.

Alternately, as shown in FIG. 3, if there is a layer having a spectrally dependent absorption characteristic such as, but not limited to, a polycrystalline germanium or carbon hard mask combined with one of the asymmetric target structures in the buried layer, The stacking pair can vary with the illumination spectrum. In this manner, depending on the particular material in question and the incident illumination, the illumination associated with a first wavelength can only penetrate the layer of material to a first depth (d _λ1 ), wherein illumination of a second wavelength is transparent To another depth (d _λ2 ). Due to this variation, different illuminations will interact with the underlying target structure 304 in different ways. In this regard, the overlay measurement 306 between a top structure 302 and the bottom structure 304 can include a corresponding stack pair ambiguity 308. As discussed in further detail herein, one aspect of the present invention provides a system and method suitable for identifying a set of parameters that optimize or at least improve the overlay measurement results of a measurement formulation.

It is noted that even the metrology system is nominally perfect and does not induce a systematic offset of the weight loss results or any other form of systematic bias. One of the most important of the scatterometry metrics is the fact that the additional target correlation characteristics are associated with the fact that more than one single unit cell within the metrics target is typically metric. The weighted ambiguity associated with this unit cell and unit cell variability is also estimated by the methods described herein. Sources of illumination asymmetry may include, but are not limited to: i) sidewall angle asymmetry of both the previous layer and the current layer; ii) the height difference between the current layer and the previous layer; iii) the measured layer and The difference in height between the intermediate layers between the layers below; iv) the variation due to local defects.

The following is a theoretical explanation of the accuracy of the asymmetry-induced stacking. In the case of an imaging-based overlay pair of weights and measures, a portion of a collected image corresponding to a target layer having asymmetry can be written as: Where a ₀ , a ₊₁ , a _-1 , ... correspond to the amplitudes of different diffraction orders of the electric field used to form the signal of the image, and , , , ... corresponds to the phase of the signal used to form the image. The assumption of signal symmetry can be expressed as:

For each n ,

Since the phase of the electric field determines the geometric center of the signal, the destruction of phase symmetry corresponds to a geometric overlap. Furthermore, the destruction of the symmetry of the amplitudes a _{+ n} and a - _n results in stack inaccuracies that can exceed geometric ambiguity. For example, in the case where the majority of the measurement error is from the first diffraction level, the overlap inaccuracy Δ is expressed as: Where a varies with one or more material parameters (eg, wavelength, focus, illumination angle, and the like) associated with the metrology configuration. Each of Equation 3 represents geometric ambiguity. It is expected that for a suitable stack-to-target design, one geometric ambiguity of less than 1 nm can be achieved. In addition, the second term of Equation 3 represents the additional inaccuracy associated with the sensitivity of the given metrology technique to the target asymmetry. For some material parameters, α can take a value of 10, in which case the second term of Equation 3 produces a stack-to-inaccuracy of up to or 5 nm in size.

For the sake of simplification, the asymmetry of the given stack-to-target is set above in only one layer of the stack-to-target (eg, the handle layer or the resist layer). Further setting the target structure is actually periodic, which has one cycle of P. However, it is recognized that similar results can be achieved in the presence of asymmetry in the two target layers and the target is non-periodic.

In the case of a DBO based metrology, the overlapping pairs of marks consist of a plurality of grating-on-grating structures, one of which is symmetrical and the other of the grating structures on the gratings, according to the assumptions described above The person is asymmetrical. It is recognized that the stack pair can be self-calculated as one of the differences between the +1st diffraction order and the -1st diffraction stage. This differential signal can be expressed as: Where a _{n , m} represents the amplitude of the ( n + m )th diffraction order from the grating mark on the grating consisting of the nth diffraction order from the asymmetric grating and the mth diffraction order from the symmetric grating. As with the imaging-based stack-to-weight measurement, where the majority of the signal error is caused by the first diffraction order from the asymmetric grating, the inaccuracy is in the form: Where a is re-dependent with one or more material parameters (eg, wavelength, focus, illumination angle, and the like) associated with the metrology configuration. Here, the first term also corresponds to a geometric ambiguity of less than 1 nm expected in the case of a well-designed stack of marks. The second decision exceeded the inaccuracy of the ambiguity. In the case of DBO weights and measures, the second term can reach an amplitude of up to or greater than 10 nm. It is noted that, in a general sense, DBO weights can be more sensitive to overlay-symmetric asymmetry than imaging overlay versus metrology. It is recognized herein that this can be attributed to the fact that the measured signal is averaged over a wider range of wavelengths and angles based on the image-wise stack-to-weights. Since different wavelengths and angles drive different inaccuracies, this average works to statistically reduce the observed inaccuracies.

4A and 4B illustrate the effect of illumination wavelength and asymmetry angle on a measured pair of targets. As shown in Figure 4A, in the case of a symmetric target, the illumination wavelength has no effect on the deviation of the measured wavelength. In contrast, as shown in Figure 4B, the illumination wavelength has a large impact on the measured stacking in the case of domestic water.

FIG. 5 illustrates a system 500 for providing one of the quality metrics suitable for improving program control in a semiconductor wafer fabrication process. In one embodiment, system 500 can include a metrology system 502, such as a stack-to-weight system 504 configured to perform a stack-to-weight measurement at a identified location of semiconductor wafer 506. In another embodiment, the metrology system 502 can be configured to accept instructions from another subsystem of the system 500 to perform a specified metrology plan. For example, metrology system 502 can accept instructions from one or more computing systems 508 of system 500. Upon receiving an instruction from computing system 508, metrology system 502 can perform the overlay weights and measures at the location of semiconductor wafer 506 identified in the provided instructions. As will be discussed later, the instructions provided by computer system 508 can include a quality metric generation program algorithm 512 configured to generate one or more quality metrics associated with each stack measurement of system 502.

Figure 6 illustrates a conceptual illustration of a quality metric generation procedure in accordance with an embodiment of the present invention. The quality metric generation program 600 can include applying N number of overlay algorithms 604 to one or more of the acquired weighting signals 602 (eg, obtained using an associated metrology tool) (eg, For example, the overlay algorithm 1, the overlay algorithm 2, and the overlay algorithm 3) are used to calculate N stack estimates (eg, stack pair estimate 1, stack pair estimate 2, and stack pair estimate 3). Then, based on the calculated span and distribution of the stacked pairs, a quality metric 608 of each of the sampled metrology targets of a wafer can be generated. In this sense, the quality metric 608 obtained for each stack of metrology targets is measured or estimated as one of the variations of the results of the set of applied overlay algorithms.

It is noted herein that the quality metric of the present invention provides a quantitative assessment of the accuracy of the overlay results associated with one of a given metrology target. In this sense, each stack value of one of the weights of a wafer is accompanied by a quality metric corresponding to one of the accuracy of the particular stack-to-measurement of the target under discussion. It is further contemplated that the quality metrics of the present invention are applicable to all imaging metrology goals such as, but not limited to, BiB, AIM, Blossom, and multi-layer AIMid.

Referring again to Figure 5, in another aspect, it is noted that the results of the quality metric generation program algorithm 512 can be used for a variety of purposes. In one embodiment, system 500 can include a stack of measurement recipe optimization programs 514. The overlay pair measurement recipe optimization program 514 is an algorithm configured to calculate an optimal or modified overlay pair measurement recipe using the set of quality metrics of the present invention as an input. In this regard, the overlay pair measurement recipe optimization program 514 can utilize the plurality of sets of quality metrics obtained from the set of measured metrology targets to determine a measure of the accuracy of the overlay accuracy (eg, illumination wavelength, Filter configuration, polarization configuration, illumination angle and the like). Further recognizing that the same wafer or other in the batch of wafers can be The results of the recipe optimization algorithm algorithm 514 are implemented on subsequent overlays on the wafer. In this sense, the modified or optimized metrology recipe (calculated using the recipe optimization program 514) can be fed back to the metrology system 502. Formulation optimization using the resulting quality metrics of the present invention will be discussed in further detail herein.

In another embodiment, system 500 can include a metrology target outlier removal program 516. The metrology target outlier removal program 516 is an algorithm configured to utilize the set of generated quality metrics of the present invention as an input to identify and remove outlier metric targets. In this regard, the outlier removal program 516 can identify metrology targets having large quality metrics, and thus large overlay inaccuracies, and ignore them for subsequent processing tool correctable value calculations. It will be appreciated that the removal of outlier targets is advantageous in correctable value calculations because it focuses more on their targets with greater accuracy in correctable value calculations, thereby improving correctable value calculations. The metrics target outlier removal using the quality metrics produced by the present invention will be discussed in further detail herein.

In another embodiment, system 500 can include a sampling plan generation program 519. Sampling plan generation program 519 is an algorithm configured to generate one or more overlays of metrology sampling plans using the generated quality metrics of the present invention as an input. In this regard, the sampling plan generation program 519 forms a sampling plan, such as a sub-sampling plan, that allows for a greater weighting of the identified high quality target and a lower weighting of the low quality metrology target. In another aspect, the sampling plan generation program 519 can form one of mitigating the existence of low quality targets by increasing the sampling rate for a group of identified low quality targets. Sampling plan. The metrology sampling plan generation using the quality metrics produced by the present invention will be discussed in further detail herein.

In another embodiment, system 500 can include a correctable value generation program 518. The correctable value generation program 518 is an algorithm configured to generate one or more sets of processing tool correctable values using the generated quality metrics. It is noted that the correctable value calculated by computer system 508 can then be fed back to one of system 500 processing tools, such as a scanner tool or lithography tool. It is further noted that the correctable value generation program 518 can utilize the output of other analytical routines of the present invention to calculate a set of processing tool correctable values. For example, the correctable value generation program 518 of the present invention can utilize the output of the outlier removal algorithm 516 prior to calculating the set of processing tool correctable values. Processing tool calculations are discussed in further detail in this article.

In one embodiment, one or more computer systems 508 can be configured to receive a metrology system 502 in a sampling procedure for one or more wafers in a batch of wafers (eg, a stack-to-weight system) 504) Perform a set of measurements. The one or more computer systems 508 can be further configured to use the measurements received from the sampling program to calculate or identify a set of quality metrics, an optimized measurement recipe, a set of high value targets (ie, , Identify outliers to remove from the correctable value calculations) or a set of processing tools to correct the values. In addition, the one or more computer systems 508 can then transmit the instructions to an associated processing tool (eg, a scanner tool or a lithography tool) to adjust the processing tool. Alternatively and/or additionally, computer system 508 can be used to monitor one or more processing tools of the system. In this sense, the computer system 508 may be in the case where the residual of the remaining distribution exceeds a predetermined level. "Failed" the batch of wafers. Furthermore, it is possible to "reprocess" the batch of wafers.

It will be appreciated that the steps set forth above and throughout the remainder of the invention may be implemented by a single computer system 508 or (alternatively selected by) a plurality of computing systems 508. Moreover, different subsystems of system 500, such as metrology system 502, can include a computing system suitable for implementing at least a portion of the steps set forth above. Therefore, the above description should not be taken as limiting of the invention, but only by way of illustration.

In another embodiment, one or more computer systems 508 can transmit instructions indicative of a set of processing tool correctable values from any one of the programs set forth herein to one or more processing tools. Moreover, one or more computer systems 508 can be configured to perform any (any) other steps of any of the method embodiments set forth herein.

In another embodiment, computer system 508 can be communicatively coupled to metrology system 502 or another processing tool in any manner known in the art. For example, the one or more computer systems 508 can be coupled to a computer system of a metrology system 502 (eg, a stack of computer systems of the metrology system 504) or to a computer system of one of the processing tools. In another example, the metrology system 502 and a processing tool can be controlled by a single computing system. In this manner, computing system 508 of system 500 can be coupled to a single metrology-processing tool computer system. Moreover, the one or more computing systems 508 of the system 500 can be configured to receive and/or retrieve data or information from other systems via a transmission medium that can include one of a wired portion and/or a wireless portion (eg, from an inspection) System test results, weights and measures from another metrology system, or system calculations from one of the KLA-Tencors KT analyzers The processing tool can correct the value). In this manner, the transmission medium can act as a data link between computing system 508 and other subsystems of system 500. Additionally, computing system 508 can transmit the data to an external system via a transmission medium. For example, computer system 508 can transmit the calculated quality metrics, processing tool correctable values, optimized measurement recipes to a separate metrology system that exists independently of the system 500.

Computing system 508 can include, but is not limited to, a personal computer system, a large computer system, a workstation, an imaging computer, a parallel processor, or any other device known in the art. In general, the term "computer system" can be broadly defined to encompass any device having one or more processors that execute instructions from a memory medium.

Program instructions 510 that implement methods such as those described herein may be transmitted or stored on the carrier medium by carrier medium 520. The carrier medium can be a transmission medium such as a wire, cable or wireless transmission link. The carrier medium may also include a storage medium such as a read only memory, a random access memory, a magnetic disk or a compact disc or a magnetic tape.

The embodiment of system 500 illustrated in Figure 5 can be further configured as set forth herein. Additionally, system 500 can be configured to perform any (any) other steps of any of the method embodiments set forth herein.

7A is a flow chart illustrating one of the steps performed in a method 700 for providing one of the quality metrics suitable for improving program control in a semiconductor wafer fabrication process. In a first step 702, a first selected measurement recipe can be used to distribute one or more fields from one of the wafers across a batch of wafers. The plurality of metrology targets obtain a plurality of stacked pairs of metric measurement signals. In this sense, a metric measurement signal can be obtained for each of the plurality of metrology targets. In one embodiment, a metrology program can measure one or more characteristics (eg, stacking errors) of a plurality of targets distributed across one or more fields of one of a plurality of wafers. In another embodiment, the one or more metrology signals may be acquired using the metrology system 502 of the system 500 previously described herein (eg, the overlay to weight system 504). In this manner, the metrology signals acquired using the metrology system 502 can be transmitted to the computing system 508 via a data link (eg, a wired or wireless signal).

In one embodiment, method 700 includes performing the equal stack metric measurement on the one or more wafers at a plurality of measurement locations on one or more of the at least one batch of wafers . As shown in FIGS. 7B and 7C, the measurement locations may include one or more fields 752 on one or more wafers 506. For example, as shown in FIG. 7B, wafer 506 includes a plurality of fields 752 formed thereon. Although a particular number and configuration field 752 on wafer 506 is shown in FIG. 7B, the number and configuration of the fields on the wafer can vary depending on, for example, the device formed on the wafer. Measurements may be performed at a plurality of fields 752 formed on wafer 506 and at a plurality of fields on other wafers in at least one first batch. Measurements may be performed on the structure of the devices formed in the fields and/or the test structures formed in the fields. Additionally, measurements performed in each of the fields may include all measurements (eg, one or more different measurements) performed during the metrology procedure.

In another embodiment, all measurement locations measured in a sampling procedure A plurality of targets within each measurement field of a wafer in a given batch can be included. For example, as shown in FIG. 7C, field 752 formed on a wafer 506 can include a plurality of targets 754. Although a particular number and configuration target 754 in field 752 is shown in FIG. 7B, the number and configuration of targets 754 in field 752 may vary depending on, for example, the device formed on wafer 506. Target 754 can include device structures and/or test structures. Thus, in this embodiment, measurements can be performed on any number of targets 754 formed in each field 752. The measurements may also include all measurements performed during the metrology procedure (eg, one or more different measurements).

In another embodiment, the results of the measurements performed in the sampling step include information relating to variations in the measurement procedure. The variation of the measurements (eg, standard deviation, variation, etc.) can be determined in any manner known in the art. Since the variation of the measurement will usually indicate a deviation of the program or program deviation, the number of batches measured in one sampling step may vary depending on the deviation of the program or program. The source of variation identified or determined in this step may include any source of variation including, but not limited to, stack-to-pair variation, variations in other characteristics of the wafer, batch and batch variations, wafer and wafer variations, and field and field variations. , side and side variations, statistical sources of variation, and the like or any combination thereof.

In an additional aspect, the one or more metrology signals can be acquired from one or more metrology targets of a wafer using a first selected measurement recipe. Those skilled in the art will recognize that a metrology recipe can include a large number of parameter choices. For example, the measurement recipe can include, but is not limited to, illumination wavelength, illumination angle, focus, filter characteristics, polarization, and the like. In a further aspect of the invention as will be explained in further detail herein, it may be partially The quality metric results produced by program flow 700 are utilized to optimize or at least improve the metrology recipe implemented by system 500.

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In a second step 704, a plurality of stacked pair estimates for each of the stacked versus metric measurement signals of step 302 can be determined by applying a plurality of overlay algorithms to each of the overlay metric measurement signals.

In one aspect, a number of different algorithms can be applied to each of the metrology signals acquired from each of the selected plurality of metrology targets of the wafer 506 to determine an overlay estimate for each of the metrology signals. For example, the overlay estimation algorithms 1 through N can each be applied to each of the signals acquired from each of the set of measured and measured targets of a wafer, each algorithm calculating one of each target independently. Stacked pair estimation. In another aspect, each of the implemented algorithms can be configured to provide a precise center of symmetry for one of the symmetric signals. However, in the case of a signal system symmetry, the various algorithms in the plurality of algorithms can provide different estimates of approximate symmetry centers. In this sense, having a non-zero asymmetry measure will cause the algorithms 1...N to calculate different values for the target pairs of each of the targets measured.

In a third step 706, a set of ones can be generated by generating a stack of estimated distributions from each of the metrology measurements of each of the metrology targets using the stack pair estimate visible in step 704. The stack is estimated to be distributed. In this regard, for each of the plurality of measured targets of a wafer, the various estimates produced by Algorithm 1-N can be collected into a single stack. Estimate the distribution. In this regard, step 706 forms a stack-to-estimate distribution for each of the measured metrology targets. It is further noted herein that the geometric stack-to-ambiguity as well as the stack-to-ambiguity enhancement is expressed as one of the magnitudes or spans of the magnitude of the stack-to-estimate distribution of each of the analyzed metrology signals. In this regard, the greater the ambiguity of the stack of a given metrology signal, the greater the span or width of an associated stack pair estimate (generated by the algorithm 1-N of step 704).

In a fourth step 708, a plurality of quality metrics can be generated. In one aspect, the complex plurality of quality metric values can be generated using the overlay pair estimate distribution generated in step 706 of routine 700. In this regard, each of the generated quality metrics is associated with one of the stack of steps 706 and the estimated distribution. Each generated quality metric varies with a corresponding stack of widths or spans of the estimated distribution and represents a measure or estimate of the overlap ambiguity and inaccuracy associated with a given signal from a given metrology target acquisition. . In another aspect, the quality metric of step 708 is configured to be zero in the case of a fully symmetric signal and is proportional to the inaccuracy associated with one of a given asymmetric signal. It is noted that in order for a symmetric signal to produce a zero quality metric, each of the overlay algorithms of step 704 must be configured to produce a same stack estimate of the symmetric signal. The quality metric obtained for each stack of metrology targets is measured or estimated as a function of the set of applied overlay algorithms. In this regard, analyzing one of the one or more quality metrics associated with one or more of the weighted target acquisitions provides one of a plurality of quality metrics for analyzing asymmetry induced overlap inaccuracy. measure".

Figure 8A illustrates a stacking inaccuracy map in accordance with the present invention. Figure The 8A wafer map 800 illustrates the direction and magnitude of the inaccuracy of the associated stack of pairs of signals. In this sense, the X and Y components of the arrows in the graph 800 correspond to the inaccuracies of the X stack and the Y stack, respectively. Figure 8B illustrates a plurality of quality metrics generated in accordance with an embodiment of the present invention. It is noted that each quality metric of Figure 8B corresponds to one of the set of measured metrology targets. It is further noted that the wider the quality metric distribution or quality metric "cloud" is in the X-Y direction, the less accurate the corresponding metric measurement is. As will be discussed in further detail herein, methods and systems for reducing the size of a quality metric cloud include outlier removal and recipe optimization.

In another embodiment of the present invention, the overlay-to-weight signal obtained from each of a set of measured metrology targets may be corrected for a tool induced shift (TIS) prior to implementing the quality metric generation program 700. . This is particularly advantageous because the quality metrics of the present invention are configured to detect any asymmetry present in an acquired metrology signal, including the asymmetry formed by the optics of the metrology system. Thus, for a metrology system 502 having one of the optical components that produce a significant TIS, it is advantageous to first apply a TIS correction to the acquired metrology signal, thereby allowing a more accurate assessment of the target induced overlay inaccuracy.

FIG. 9 is a flow chart showing an additional program flow 900 in accordance with another embodiment of the present invention. Program flow 900 involves utilizing quality metrics generated in program 700 to identify outlier metric targets in a sampled metrology target sampled by one of the wafers. In step 902, one or more of the plurality of metrology targets are identified. In this regard, it is identifiable Do not display a metric target that is one of the quality metrics that deviate significantly from the distribution of one of the other metric targets in the sampled target. For example, as shown in Figure 8B, three peripheral quality metrics are identified (e.g., delimited by a circle). The outlier quality metric corresponds to a metric target having a high degree of asymmetry (compared to a non-outlier target) and thus a high stack inaccuracy among the plurality of sampled metric targets. It is recognized herein that the identification of outliers in the quality metric distribution produced in program 700 can be implemented in any manner known in the art. In this sense, any quantitative analysis suite can be used to identify the weighted target outliers. In addition, a quality metric of a metrology target can be automatically defined as an outlier by a user or via a statistical analysis suite that is programmed with a threshold definition and analysis routine. In this regard, for example, system 500 can be programmed to automatically identify outlier quality metrics based on: i) the magnitude of the quality metric of the sampled target exceeds a preferred location; or ii) the outermost quality One of the metrics is selected as a percentage (for example, a quality metric of up to 10% is defined as a peripheral). The quality metric distribution (e.g., the quality metric distribution of FIG. 8B) may be displayed on a display device (not shown) of system 500, with user selection. The user can then manually select a quality metric that is considered to be an outlier.

In a second step 904, a set of corrected metrology targets can be generated by excluding the outlier targets identified in step 902. In this regard, the set of corrected metrology targets can be formed by removing the identified outlier metric targets from the metric target removal step 902 for the correctable value calculation.

In a third step 906, the group of schools formed in step 904 is utilized. The weighting target is being calculated to calculate a set of processing tool correctable values. In this sense, the set of stack correctable values is calculated using only the overlay information of the set of quantified targets remaining in the set of corrected metrology targets. In another step, the process tool correctable values calculated via computing system 508 can be transmitted to a communicatively coupled processing tool (eg, a stepper or scanner). U.S. Patent No. 7,876,438, issued to U.S. Pat.

FIG. 10 is a flow chart showing an additional program flow 1000 in accordance with another embodiment of the present invention. Program flow 1000 involves utilizing quality metrics generated in program 700 to identify an improved overlay pair measurement recipe or an optimized overlay pair measurement recipe. In a first step 1002, at least one additional measurement recipe can be utilized to obtain an additional plurality of overlay metric measurement signals from the plurality of metrology targets. In a second step 1004, the at least one additional plurality of pairs of measurement signals may be determined by applying the plurality of overlay algorithms to each of the at least one additional plurality of measurement signals. At least an additional plurality of overlapping pairs for each of them. In a third step 1006, at least one of the at least one additional plurality of pairs of measurement signals from the plurality of metrology targets can be generated using the plurality of stacked pairs to generate an estimated distribution of at least one of the plurality of pairs of measurement signals. Additional multiple pairs of estimated distributions. In a fourth step 1008, at least a plurality of stacked pairs of estimated distributions may be utilized to generate at least a plurality of quality metrics. In a fifth step 1010, the at least amount associated with the at least one additional measurement recipe can be distributed by comparing one of the first plurality of quality metrics associated with the first measurement recipe One of a plurality of quality metrics is distributed to determine an improved or optimized procedure to measure the formulation.

In this regard, an improved or possibly optimal stack-to-measurement recipe can be found by performing the quality metric generation procedure multiple times for each quality metric generation cycle with different target measurement recipes. For example, in a first cycle, a stack measurement can be performed using a first measurement recipe to find a quality metric for the sampled metrology target. Then, in a second cycle, a stack metric can be performed using a second measurement recipe to find a quality metric for the sampled metric target, wherein the second recipe changes relative to the first recipe (eg, The wavelength changes, the focus position changes, the illumination direction changes, and so on. The plurality of distributions of quality metrics acquired in each quality metric generation loop can then be compared to each other to identify a measurement recipe that produces a minimum quality metric distribution.

Figure 11 illustrates the use of a first filter and a second filter to obtain a quality metric distribution. As illustrated by the smaller air distribution in the X-Y quality metric distribution, color filter 2 provides a smaller inaccuracy of the corresponding overlay metric measurement. Thus, when selected between filter 1 and filter 2 in subsequent metric measurements, the use of filter 2 will provide increased overlay accuracy and, in turn, improved processing tool correctable values. It is further recognized that this program can be repeated in any number of increments (eg, 1, 2, 3) for any number of recipe parameters (eg, wavelength, focus position, illumination direction, polarization configuration, filter configuration, and the like). Or up to and including N times).

Figure 12A illustrates a process for providing processing in accordance with an embodiment of the present invention. The tool can correct one of the steps of the method performed in one of the methods 1200. The process 1200 involves calculating a set of process tool correctable values based on the generated quality metrics of the program 700. In a first step 1202, one of the plurality of metrology targets across one of the plurality of wafers or one of the plurality of metrology targets is acquired. In one embodiment, the stack-to-weights results for each of the plurality of metrology targets may be obtained by performing one or more overlay metric measurements on the metrology target using the metrology system 502. In a second step 1204, one of the quality metrics associated with each of the acquired overlay weights results can be obtained. In one embodiment, the quality metric can be generated using a program consistent with the various methods and embodiments set forth throughout the present invention. In this regard, after obtaining the weights and measures results for each of the set of measurement metrics, system 500 can calculate a quality metric for each of the metric measurements.

In a third step 1206, one of each of the weighted and measured targets obtained using each of the weighted and measured targets and the associated quality measure may be determined to modify the overlay value. In one aspect, the modified overlay value for each metrology target varies with at least one material parameter factor a of the metrology scene (eg, dependent on wavelength, focus position, illumination angle, and the like). For example, the modified overlay can be written as: OVL _accurate = OVL _measured + f ( QM ) (Equation 6) where OVL is an _accurate representation of the modified overlay, OVL _measured represents the measured overlay, and f(QM) Represents a quality function that is dependent on the quality metric (QM) associated with each of the metrology targets. In one embodiment, the quality function may be represented by a linear function with respect to a material parameter factor a. In this case, the modified overlay can be written as: OVL _accurate = OVL _measured + αQM (Equation 7) where α re-represents the material parameter factor, where QM represents the calculated quality metric or the overlay measurement of the present invention Each of them. It is recognized herein that the above-described quality function of Equation 7 is not limiting and should only be considered illustrative. The expected quality function f(QM) can take a variety of mathematical forms.

In a fourth step 1208, one of a plurality of material parameter factors can be calculated as a correctable value function and a set of residuals corresponding to the correctable value function. In this regard, the parameter a can be changed and the residual associated with each correctable value function can be calculated for the alpha value. In another aspect, any type of correctable value function known in the art can be performed to fit the OVL _accurate . For example, the correctable value function can include a linear or higher order correctable value function. A series of correctable value functions (one for each alpha value) can be generated using one or more of the correctable value functions known in the art. For example, a correctable value function and corresponding residuals can be calculated for α ₁ , α ₂ , α ₃ and up to and including α _N . The function for calculating the correction value is generally described in U.S. Patent No. 7,876,438, issued Jan. 25, 2011, which is incorporated herein by reference.

In a fifth step 1210, a value of one of the material parameter factors suitable for at least substantially minimizing the set of residuals is determined. In this regard, the residual associated with each of α ₁ ... α _N can be analyzed to determine the alpha value that produces the smallest overlap residual level. For example, FIG. 12B illustrates plotting a graph 1220 of one of the set of residual values from step 1208 calculated for each of a number of alpha values along with a corresponding trend line 1222. As observed in Figure 12B, for a given set of residuals, an alpha value of approximately -3.66 produces the smallest residual value for a given metrology scenario.

In step 1212, the set of correctable values associated with the at least substantially minimized group residual can be identified. For example, to account for the residual minimization provided in step 1210, a set of correctable values can be calculated using the residual relative to alpha minimization. It is further desirable to apply the alpha identified in step 1210 during the analysis of subsequent wafers in the batch of wafers.

In another embodiment, the set of correctable values generated in step 1212 can be transmitted to one or more processing tools (eg, a stepper or scanner). In an additional aspect, a TIS correction procedure can be applied to the acquired plurality of overlay metric measurement signals prior to analysis to reduce the TIS induced asymmetry present in the signals.

Figure 13 is a flow chart illustrating one of the steps performed in a method 1300 for identifying one of the process tool correctable values. In step 1302, one of the plurality of metrology targets across one of the plurality of wafers or one of the plurality of metrology targets may be acquired. In one embodiment, the stack-to-weights results for each of the plurality of metrology targets may be obtained by performing one or more overlay metric measurements on the equals and targets using the metrology system 502.

In step 1304, a quality metric associated with each of the acquired overlay weights is obtained. In one embodiment, the program can be generated using a program consistent with the various methods and embodiments set forth throughout the present invention. Quality metrics. In this regard, after obtaining the weights and measures results for each of the set of metrology and metrology targets, system 500 can calculate a quality metric for each of the metrics.

In step 1306, a plurality of modified overlay values of the plurality of weighted and quantized targets obtained by each of the weighted and measured targets and the plurality of weighted and measured targets of a quality function are determined. In one aspect, the quality function varies with the quality metrics obtained for each metrology target. In one embodiment, the modified overlay of step 1306 can be in the form of the form observed in Equations 6 and/or 7 of program 1200. It is recognized that the quality function f(QM) can be in any number of mathematical forms.

In step 1308, each of the plurality of randomly selected samples of the plurality of metrology targets acquired and the plurality of randomly selected samples of the associated quality metrics may be determined by utilizing the plurality of modified overlay values. A set of processing tools can correct the values to produce a complex array processing tool correctable value, wherein each of the random samples has the same size. In this sense, multiple random subsamplings can be performed in which a selected number or selected percentage of available data points are generated. In this regard, each of the plurality of subsamples can include the same number of sampled data points (eg, 90%, 80%, 50%, and the like). For example, N number of random samples of the data points of 90% of the weighted and quantified results of step 1302 may be performed, wherein each random sample represents a different random sample of one of the available data points (but with the same number of Sampling data points). Each of the N number of random samples can then be used to generate a set of processing tool correctable values. It is further noted that each of the correctable values can be calculated using the same quality function f(QM) .

In step 1310, one of the correctable values of the complex array processing tool can be identified. It is recognized herein that the variation between the correctable values of the set of processing tools calculated in step 1308 indicates its quality. It is further recognized that the smaller the observed variation of the N number of correctable values, the better the quality of the correctable value.

It is further noted herein that the quality value attached to each stack of values provides an estimate of one of the non-random errors in the quantitative measure. However, it may have a random error associated with it that is higher than the error of the overlay measurement. The motivation for using it as described above is when the non-random error is higher than the random error. In the case where the non-random error is greater than the random error, it is worth correcting to increase the random error value (it should be remembered that the random error can be averaged to a small value on a large number of measurements) while reducing the overlapping of the non-random errors value.

14 is a flow chart illustrating one of the steps performed in a method 1400 for generating a metrology sampling plan, in accordance with an embodiment of the present invention. The process 1400 involves generating a metrology sampling plan based on the generated quality metrics of the program 700. In step 1402, a plurality of overlay metric measurements are obtained from a plurality of metrology targets across one or more of the field distributions of one of the wafers. In step 1404, a plurality of stacked pairs of each of the plurality of stacked pairs of measured signals are determined by applying a plurality of stacked algorithms to each of the plurality of pairs of measured metrics. In step 1406, a plurality of stacked pairs of estimated distributions are generated by using the plurality of stacked pairs to generate a plurality of overlapping pairs of estimated distributions of the plurality of pairs of measured and measured signals from the plurality of weighted and measured targets. . In step 1408, the production The first plurality of quality metrics of the plurality of stacked pairs of estimated distributions are generated.

In step 1410, the first plurality of quality metrics generated by the plurality of metrology targets can be utilized to generate one or more metrology sampling plans. In this regard, the subsampling plan or the alternate sampling plan can be selected based on the quality metrics associated with the set of metrology targets. After identifying the new sampling plan, system 500 can apply the sampling plan during the measurement of subsequent wafers of the batch of wafers.

In one embodiment, generating one or more of the first plurality of quality metrics utilized by the plurality of metrology targets to identify one or more low quality targets, wherein the one or more low Quality objectives are excluded from one or more of the metrology sampling plans produced. In this regard, the low target metrology target can be identified and excluded from the sampling plan for subsequent measurements via its corresponding quality metric (in the case of a metrology scenario).

15A-15C illustrate a series of quality metrics for illumination of three different wavelengths. Figure 15A depicts the quality metrics for three different wavelengths (white, red, and green) obtained from a stack of 215 targets. Figure 15B shows that 60 targets with the lowest quality (i.e., 60 targets with the highest quality metric value) have been removed, leaving 155 targets for sampling (i.e., N = 155 samples). Remaining quality metrics afterwards. In addition, Figure 15C depicts the remaining quality metrics after the 115 targets with the lowest quality values have been removed, leaving 100 targets for sampling (i.e., N = 100 samples). The applicant pointed out that although the above description excludes low-end products The target selection is discussed in terms of quality objectives, but a set of high quality targets are also directly selected for inclusion in the sampling plan.

16A-16D illustrate the initial overlap pair sampling of N=215 along the y direction and the residual and R ² values of subsequent adjusted samples of N=155 and N=100. It is observed directly in Figures 16A-16D that in all three wavelengths sampled, the residual magnitude decreases for N = 155 and N = 100 relative to the initial N = 215 samples. Similarly, FIGS. 16A to 16D show each wavelength at each sub-sampling plan (e.g., N = 100 and N = 155) of the R ² of the general increases. Those skilled in the art will recognize that such improved by residual characteristics and in turn generate R ² may be fed to the processing by the improvement of a processing tool may be associated with the correction value.

In one embodiment, the first plurality of quality metrics generated by the plurality of metrology targets are utilized to generate one or more metrology sampling plans to identify one or more low quality targets, wherein the one or more low The quality goal is excluded from the one or more metrology sampling plans generated and the one or more low quality targets are replaced with one or more additional metrology targets that are close to the one or more low quality target locations. In this regard, the low target metrology target can be identified and excluded from the sampling plan for subsequent measurements via its corresponding quality metric (in the case of a metrology scenario), while being close to the excluded low quality target Additional targets for positioning are inserted into the sampling plan utilized on subsequent batches of the batch.

18A-18B illustrate residuals and R ² values for the x- and y-directions of the initial overlay and subsequent adjusted samples, with low quality being replaced by targets that are close to such excluded low-quality target locations. aims. Figure 18A illustrates the reduction of the residual level in one of the x and y directions after replacing the low quality target with the target of proximity positioning. Similarly, FIG. 18B illustrates one R after the positioning close to the target to target ^{2-substituted} low quality value increases. In addition, those skilled in the art will recognize that, by such improvement of properties of the residual R ^2, and in turn fed to produce modified by the processing of a processing tool may be associated with the correction value.

The program 1400 can further include the step of identifying a plurality of quality regions of the wafer using the first plurality of quality metrics, each of the quality regions comprising a metrology target having a substantially similar quality level. For example, as shown in FIG. 19, a first quality region 1902 through 1906 can be identified such that all of the targets 1901 contained therein have substantially the same quality. In another embodiment, the sampling rate implemented during a subsequent overlay pair of weights and measures can vary with a given identified quality region. For example, the number of targets sampled in zones 1902, 1904, and 1906 may depend on the quality level of the targets contained within their zones. In another aspect, in the initial sampling plan, the metric measurement program can include measuring a full wafer map, measuring a full batch of spectra, or measuring a batch of wafers.

After defining a sampling plan for the first wafer based on its quality metric, the identified sampling plan can be applied to the next wafer while also providing a predefined constraint. For example, the constraint may consist of several sub-constraints, and each sub-constraint will trigger a need for a minor change to the sampling plan. This procedure can be cumulatively continued to subsequent batches. These constraints can be based on the quality of the measured wafer/wafer statistics (eg, standard deviation, average, range, etc.) while taking into account the sample size.

Referring now to Figures 20A-20F, a method and system for providing a program map map is set forth in accordance with an embodiment of the present invention. In this regard, a program map map solution (hereinafter referred to as "process signature mapper") can help to improve the patterning program control in semiconductor device fabrication.

Figure 20A illustrates an embodiment of a lithography program control loop. The lithography program control loop can include, but is not limited to: a reticle 2002, a scanner 2004, a program tracking module 2006 configured to track a plurality of non- lithography program paths 2008; a metrology system 2010; and an advanced program control (APC) system 2012. In a typical lithography program control loop 2000, a metric of a lithography process (and other processes such as etching and polishing on a previous layer) of a wafer that has been exposed to both the previously processed layer and the current processing layer The target execution is intended to be fed back to the metric measurement 2010 in the control loop of the lithography program. Although the purpose of the lithography program 2010 is to enable correction of lithography deviation, the actual measurement overlay can be biased by the effects associated with the non-lithographic procedure 2008 and will depend on the horizontal path of the particular wafer. It is recognized herein that the bias is considered to be a measure of ambiguity, as previously described herein. At the current state of the art, the metrology data collected from wafers from an arbitrary prior program path is used by the APC system 2012 to calculate historical average corrections that can then be fed into the lithography exposure process (ie, scanner 2004). value. One object of the present invention is to quantify the dependence of a measured stack on a particular program path of a wafer. This program is called a program graph map.

Figure 20B illustrates a program flow for a program map map in accordance with an embodiment of the present invention. In step 2012, after a lithography procedure, A plurality of pairs of metrology programs (eg, imaging metrology or scatterometry) are used to measure a plurality of masks (eg, test reticle or product reticle) formed prior to an etch process and after an etch process Agent goal. In this regard, as shown in FIG. 20C, one of the first set of metrology results 2022 and the wafer can be obtained from a plurality of proxy targets by comparing after a lithography process and prior to the first etching process of the wafer. The first etch process is followed by at least one second set of metrology results 2024 obtained from the plurality of proxy targets (eg, determining the difference therebetween) to determine a first program signature that varies with the position across the wafer. 2026.

Additionally, the first program icon can be associated with a particular program path, as shown in Figure 20C. In this regard, the two metrics that vary with the position across the wafer can be calibrated to measure the variation between 2021 and 2023 (previously referred to as DI-FI bias) to specify a specific program path, including (but not Limited to program sequences, identification codes for specific processing tools, time stamps, and the like.

In step 2014, a device related offset can be measured after the first etch process. In this regard, the device-related offset can be measured by performing a first set of metric measurements on the plurality of device-related targets of the wafer after the first etch process. It is noted herein that the device-related offset of the present invention represents an offset between a metrology structure and a device of the wafer, wherein the metrology feature typically has a different size than (substantially greater than) device features. In another embodiment, as shown in FIG. 20D, a metric measurement 2034 (eg, CD-SEM or AFM amount) may be performed by a device-related target that is characteristic of both the wafer-containing device and the metrology-like size. Measure) to measure the device related offset. Furthermore, this weighting step is performed after etching. Device related quantity An example of the measurement is described in "Improved Overlay Metrology Device Correlation on 90-nm Logic Processes" by Ueno et. al, Metrology, Inspection, and Process Control for Microlithography XVIII, edited by Silver, Richard M. SPIE, Volume 5375, pp. In 222-231 (2004), the entire disclosure of this article is incorporated herein by reference.

Additionally, a program map map can be generated using each of the determined first etch signature and the additional etch signature and the first gauge relative offset and each additional device related offset. In this regard, the results of step 2012 and/or step 2014 can be stored in the memory of the system and used to form a library of program map maps.

In step 2016, steps 2012 and 2014 may be repeated for each layer and for each non-lithographic program path of the control loop. In this regard, step 2016 can include determining an additional etched pattern for each additional processing layer that varies with the location of the wafer and one of the additional non-lithographic program paths of the wafer. Additionally, step 2016 can include measuring an additional device-related offset after each additional processing layer and each additional non-lithographic program path of the wafer. Since the list of possible permutations of program paths may be large, the set of program paths selected for characterization is defined based on matching and inherent variability within a family of processing tools. If the processing tool exhibits a good match, it may not be necessary to measure the independent program path of each matched tool. In another step, the program can be periodically updated to keep the program's graphical database up-to-date, allowing for performance monitoring of program deviations.

20E illustrates a lithography program in accordance with an embodiment of the present invention. One implementation of the program map map library in the control loop. The program control loop 2040 can include, but is not limited to: a stacking information and design rules module 2042; a computing metrology module 2044; a mask 2046 configured to receive proxy target design and device related target design Information; a scanner 2048; a tracking module 2050 configured to track a plurality of non-lithographic programs 2056; a metrology system 2052; a program map mapner 2054 configured to receive from the proxy target 2058 and The weighting result of the device related target 2060; and an APC 2062.

Once the program mapper data set has been obtained, it can be used in the APC control loop 2062. As shown in Figure 20E, the metrology data is delivered to a program map mapr 2054 that implements program-specific calibration for each batch or per wafer path. This corrected data is then transmitted to an APC loop 2062 that produces historical average correctable values, which are generated using methods known in the art. In this manner, the program map mapper module 2054 should be compatible with the existing APC infrastructure of currently existing production equipment. In a general sense, one of the program offset forms, or, more specifically, the standard correctable value associated with the degree of freedom of correction of the processing tool, may be stored by the program map map 2054 as a function of field and wafer position. The path is dependent on the program sign.

Figure 20F illustrates one embodiment of a program signature mapper in accordance with an embodiment of the present invention. All correction terms are known, based on the calibration data OVLpp _n (x, y) generated from the measurement of the proxy target of the post-measurement processing for each of the n program paths (step 2052) and The measurement of the device-related target after etching on the CD-SEM or AFM writes an equation representing a given device at any point (x, y) on the wafer. In the simplest case, device-dependent corrections are constantly offset independently of one of the wafer or field position or program path due to the feature size dependence of the processing characteristics. However, in more general cases, wafer and field locations and lithography program paths need to be considered. By way of example, if the offset between the feature of the device size and the size of the metrology is due to scanner aberration induced pattern placement errors, then the offset will likely vary across the slot of the scanner. Therefore, for each of the m lithography paths, the device related material OVLlp _m (x, y) needs to be collected (step 2054). In an alternate embodiment, the device related material may even be measured for each of the non-lithographic program paths. In all cases, the next step in the system by the conventional art practice of generating a set of criteria and the correction value Cpp _n Clp _m (step 2056 with an exposure tool correction value from each model of the concentration of such specific data And step 2058). Correctable value modeling is generally described in "Fundamental Principles of Optical Lithography" by Chris Mack, Wiley & sons, 2007, which is herein incorporated by reference in its entirety. In step 2060, a program graph map corrector for each program/lithographic path arrangement represented by the following equation is generated: Cpsm _{n , m} = Cpp _m + Cpp _n (Equation 8)

This data is then stored in the program map map library 2062 as shown in FIG. 20F. It should be noted that the correctable value generating program set forth above may include several different possible modeling scenarios. For example, the correctable values may include only the standard set of linear wafer and field correctable values for translation in x and y, and wafer and field level rotation and wafer and field level selection may be based on Exposure tools and their degree of freedom of correction, which may include higher order terms such as trapezoids and other higher order wafer and field terms. For program correctable values, regardless of the lithography correctable value, it may be appropriate to generate a particular correctable value that most effectively describes the associated program offset.

A typical production metrology and program control scenario will now be described. At this stage, weights and measures are performed on a product wafer. Depending on the correctable value model and the APC method, sampling can be performed according to different sampling plans. The product wafer data OVLpw _m,n can then be modeled by the standard methods set forth above to produce product wafer correctable values from the lithography path m and the program path n and then sent to the program map mapper. Cpw _m,n . The program map extractor subtracts the program map spectrometer correctable value Cpsm _n,m from the current product wafer correctable value to generate a corrected product wafer correctable value C`pw <sub>n,m</sub> represented by the following equation : C ` pw _n,m = Cpw _n,m - Cpsm _n,m (Equation 9)

The corrected product wafer correctable value is then transmitted to the APC system and the program control continues in a conventional manner, such as by an exponential window moving average method or any other suitable technique known in the art.

All of the methods set forth herein can include storing the results of one or more of the method embodiments in a storage medium. Such results can include any of the results set forth herein and can be stored in any manner known in the art. The storage medium can include any of the storage media set forth herein or any other suitable storage medium known in the art. After the results have been stored, the results can be accessed in the storage medium and used by any of the methods or system embodiments set forth herein, formatted For display to a user, used by any software module, method or system. For example, after the method generates a sub-sampling plan, the method can include storing the sub-sampling plan in one of the weighting recipes in a storage medium. Additionally, the results or outputs of the embodiments set forth herein may be stored and accessed by a metrology system, such as a CD SEM, such that a metrology system may use the subsampling plan for metrology, assuming that the metrology system understands the output file . In addition, the results may be stored "permanently", "semi-permanently", temporarily or at a certain time period. For example, the storage medium may be a random access memory (RAM), and the results may not necessarily remain in the storage medium indefinitely.

It is further contemplated that each of the embodiments of the methods set forth above can include any other steps of any of the other methods set forth herein. Additionally, each of the embodiments of the methods set forth above can be performed by any of the systems set forth herein.

Those skilled in the art will appreciate that there are various vehicles (e.g., hardware, software, and/or firmware) to which the procedures and/or systems and/or other techniques described herein can be affected, and preferably It will vary depending on the context in which such programs and/or systems and/or other technologies are deployed. For example, if an implementer determines that speed and accuracy are extremely important, the implementer may select a primary hardware and/or firmware carrier; another option is that if flexibility is extremely important, then The implementer may select a primary software implementation; or, alternatively, the implementer may select a combination of hardware, software, and/or firmware. Accordingly, there are several possible vehicles to which the procedures and/or devices and/or other techniques set forth herein may be affected, None of them is inherently superior to the other, as any vehicle to be utilized is based on the context in which the vehicle will be deployed and the specific concerns of the implementer (eg speed, flexibility or predictability) ) (either of which can vary) one of the choices. Those skilled in the art will recognize that the optical aspects of the embodiments will typically employ optically oriented hardware, software and/or firmware.

Those skilled in the art will recognize that the devices and/or procedures are set forth in the art as set forth herein, and thereafter the use of engineering practice to integrate such illustrated devices and/or procedures into a data processing system is common. . That is, at least a portion of the devices and/or procedures set forth herein can be integrated into a data processing system via a reasonable amount of experimentation. Those skilled in the art will recognize that a typical data processing system typically includes one or more of the following: a system unit housing; a video display device; a memory such as volatile and non-volatile memory; , such as a microprocessor and digital signal processor; computing entities, such as operating systems, drivers, graphical user interfaces, and applications; one or more interactive devices, such as a trackpad or screen; and/or control system, A feedback loop and control motor are included (eg, feedback for sensing position and/or rate; control motor for moving and/or adjusting components and/or quantities). A typical data processing system can be implemented using any suitable commercially available component, such as those typically found in data computing/communication and/or network computing/communication systems.

The subject matter described herein often illustrates different components that are included in or connected to different other components. It should be understood that the depicted architectures are merely illustrative and that many other architectures that achieve the same functionality can be implemented. In a conceptual sense, any group that achieves the same functionality The configuration is effectively "associated" to achieve the desired functionality. Thus, regardless of the architecture or the intermediate components, any two components herein combined to achieve a particular functionality are considered to be "associated" with each other such that the desired functionality is achieved. Similarly, any two components so associated are also considered to be "connected" or "coupled" to each other to achieve the desired functionality, and any two components that are so associated are also considered to be "coupled" to each other. The desired functionality. Specific examples of coupling may include, but are not limited to, components that may be physically and/or physically interacting and/or components that may interact wirelessly and/or wirelessly and/or interact logically and/or may be logically The component of interaction.

Although specific aspects of the subject matter described herein have been shown and described, it will be apparent to those skilled in the art that the subject matter disclosed herein may be In the case of such changes and modifications, and therefore, the scope of the patent application is intended to cover all such changes and modifications as such changes and modifications as the true spirit of the subject matter described herein Generally within the scope.

In addition, it is to be understood that the invention is defined by the scope of the accompanying claims.

While the invention has been described with respect to the specific embodiments of the present invention, it is understood that the various modifications and embodiments of the invention may be made without departing from the scope and spirit of the invention. Accordingly, the scope of the invention should be limited only by the scope of the accompanying claims.

It is believed that the present invention and its various advantages are understood by the foregoing description, and it will be understood that various aspects of the form, configuration and configuration of the components can be made without departing from the disclosed subject matter or the advantages of all materials. change change. The form described is merely illustrative, and the scope of the following claims is intended to cover and include such modifications.

100‧‧‧Overlap of weights and measures

102‧‧‧ Corresponding resist layer target structure

104‧‧‧Processing layer structure

106‧‧‧Stacked

110‧‧‧ Non-ideal weights and measures target

112‧‧‧Target structure

114‧‧‧Processing layer structure

116a‧‧‧ Corner

116‧‧‧ stacked pairs

116b‧‧‧ Corner

118a‧‧‧Top of the resist layer structure

118b‧‧‧The bottom of the resist layer structure

202‧‧‧Top structure

204‧‧‧Bottom structure

206‧‧‧Stack measurement

208‧‧‧Overlap of ambiguity

302‧‧‧Top structure

304‧‧‧Bottom structure

306‧‧‧Stack measurement

308‧‧‧Overlap of ambiguity

500‧‧‧ system

502‧‧‧Metrics and Weights System

504‧‧‧Stacked Weights and Measures System

506‧‧‧Semiconductor wafer

506‧‧‧Semiconductor wafer

508‧‧‧ Computing System

510‧‧‧Program Instructions

512‧‧‧Quality metric generation program algorithm

514‧‧‧Stacked Measurement Formula Optimization Program

516‧‧‧Metrics and Targets Outliers Removal Program

518‧‧‧correctable value generator

519‧‧‧Sampling plan generation program

520‧‧‧ Carrier Media

600‧‧‧Quality metric generation program

602‧‧‧Measurement signal

604‧‧‧Stack algorithm

608‧‧‧Quality metrics

752‧‧‧

754‧‧‧ Target

1220‧‧‧Graph

1222‧‧‧ Trend Line

1901‧‧‧ Target

1902‧‧‧First Quality Zone

1904‧‧‧First Quality Zone

1906‧‧‧First Quality Zone

2000‧‧‧Typical lithography control loop

2002‧‧‧Photomask

2004‧‧‧Scanner

2006‧‧‧Program Tracking Module

2008‧‧‧Non-transparent program

2010‧‧‧ lithography program

2012‧‧‧Advanced Program Control (APC) System

2021‧‧‧Metrics and targets

2022‧‧‧First set of weights and measures results

2023‧‧‧Metrics and targets

2024‧‧‧Second Group of Weights and Measures Results

2026‧‧‧ First procedure sign

2034‧‧‧Metrics and targets

2040‧‧‧Program Control Loop

2042‧‧‧Stacking Information and Design Rule Module

2044‧‧‧Computational Weights and Measures Module

2046‧‧‧Photomask

2048‧‧‧Scanner

2050‧‧‧Tracking module

2052‧‧‧Metrics and Weights System

2054‧‧‧Program Map Graph/Program Graph Graph Program Module

2056‧‧‧ Non-microfilm program

2058‧‧‧Agent target

2060‧‧‧Device related goals

2062‧‧‧Advanced program control

d _λ1 ‧‧‧first depth

d _λ2 ‧‧‧ another depth

F1‧‧‧First focus length

F2‧‧‧Focus length

1A illustrates a cross-sectional view of a metrology target having a symmetric target structure in accordance with an embodiment of the present invention.

1B illustrates a cross-sectional view of a metrology target having an asymmetric target structure in accordance with an embodiment of the present invention.

2 illustrates a cross-sectional view of the effect of a metrology target having one asymmetric target structure and illumination having more than one focus, in accordance with an embodiment of the present invention.

3 illustrates a cross-sectional view of the effect of a metrology target having one asymmetric target structure and illumination having more than one wavelength, in accordance with an embodiment of the present invention.

4A illustrates modeled data obtained from a symmetric target structure at multiple wavelengths in accordance with an embodiment of the present invention.

4B illustrates modeled data obtained from an asymmetric target structure at multiple wavelengths in accordance with an embodiment of the present invention.

Figure 5 illustrates a block diagram of one system suitable for providing one of the quality metrics suitable for improving program control in the fabrication of a semiconductor wafer in accordance with an embodiment of the present invention.

6 illustrates a conceptual diagram of a method suitable for providing a quality metric suitable for improving program control in a semiconductor wafer fabrication in accordance with an embodiment of the present invention.

Figure 7A illustrates a suitable fit to provide a fit in accordance with an embodiment of the present invention. A flow chart for improving one of the quality metrics of program control in semiconductor wafer fabrication.

7B illustrates a top plan view of one of a plurality of semiconductor wafers having a plurality of fields in accordance with an embodiment of the present invention.

7C illustrates a top plan view of one of a plurality of metrology wafers having a plurality of metrology targets and each of the plurality of fields of the wafer, in accordance with an embodiment of the present invention.

Figure 8A illustrates a set of modeled overlay inaccuracies data as a function of position on the surface of the wafer, in accordance with an embodiment of the present invention.

8B illustrates a set of modeled quality metrics obtained from a plurality of metrology targets in accordance with an embodiment of the present invention.

9 illustrates a flow diagram of one method for metrology target outlier removal in accordance with an alternate embodiment of the present invention.

Figure 10 illustrates a flow diagram of one method for stacking a measurement recipe enhancement in accordance with an alternate embodiment of the present invention.

11 illustrates a set of modeled quality metrics obtained from a plurality of metrology targets at two different wavelengths in accordance with an embodiment of the present invention.

Figure 12A illustrates a flow chart of one method for processing tool correctable value calculations in accordance with an alternate embodiment of the present invention.

Figure 12B graphically illustrates one of a set of residuals that vary with a parameter factor a in accordance with an alternate embodiment of the present invention.

Figure 13 illustrates a flow diagram of one of the methods for identifying variations in the correctable values of sets of processing tools in accordance with an alternate embodiment of the present invention.

14 illustrates a flow chart of one method for generating one or more metrology sampling plans in accordance with an alternate embodiment of the present invention.

15A-15C illustrate a plurality of sets of data representing quality metric cloud data at different low quality target removal levels in accordance with an alternate embodiment of the present invention.

16A to 16D illustrate an alternative embodiment shown in residual information and different from R under the lower quality level ² to remove certain information in accordance with one set of data as much as the present invention.

17A-17B graphically illustrate sets of data for quality metric cloud data with and without low quality target replacement in accordance with an alternate embodiment of the present invention.

18A-18B illustrate an alternative embodiment shown in accordance with one embodiment of the present invention with and without residual information, and in the case where R alternative low quality data as much as the target set of data ^2.

Figure 19 illustrates a top view of a plurality of target quality zones in accordance with an alternate embodiment of the present invention.

Figure 20A illustrates a block diagram of one of the lithography control loops in accordance with an alternate embodiment of the present invention.

Figure 20B illustrates a flow diagram of one method for providing a program signature map in accordance with an alternate embodiment of the present invention.

Figure 20C illustrates a conceptual diagram of a lithography/post etch bias after a change in position on a wafer in accordance with an alternate embodiment of the present invention.

20D illustrates one of the device-related metrics performed to quantize the offset between the metrology structure and a device in accordance with an alternate embodiment of the present invention. Concept map.

Figure 20E illustrates a block diagram of one of the lithography control loops equipped with a program map mapper in accordance with an alternate embodiment of the present invention.

Figure 20F illustrates a flow diagram of one method for generating a program map spectrometer correctable value in accordance with an alternate embodiment of the present invention.

Claims (41)

A computer implemented method for providing a quality metric suitable for improving program control in a semiconductor wafer fabrication process, comprising: multiplicating one or more field distributions from one of a plurality of wafers in a set of wafers The metrology target acquires a plurality of overlay metric measurement signals, each of the overlay metric measurement signals corresponding to one of the plurality of metrology targets, the plurality of overlay metrics measuring the signal using a first measurement Recipe acquisition; determining a plurality of stacked pairs of each of the plurality of stacked pairs of measured signals by applying a plurality of stacked pairs to each of the plurality of pairs of measured metrics, each stacked pair estimate Determining by using one of the equal-pitch algorithms; generating a stack of each of the plurality of stacked-pair metrics from the plurality of metrology targets by using the plurality of stack-pair estimates Estimating a distribution to generate a plurality of stacked pairs of estimated distributions; and utilizing the generated plurality of stacked pairs of estimated distributions to generate a first plurality of quality metrics, wherein each quality metric corresponds to the Generating a stack pair estimate distribution of the plurality of stacked pairs of estimated distributions, each quality measure being a function of one of a span of the generated pairwise estimated distribution, wherein each of the quality measures is at a particular weight One of the target acquisitions is zero in the case of a symmetric overlap pair of weights and measures signals, wherein each of the quality metrics and one of the pair of weighted metric signals obtained from an asymmetric metric target achieves an asymmetry-induced stacking inaccuracy. proportion. The method of claim 1, wherein the self-span one of the wafers in a group of wafers Or a plurality of field-distributed plurality of metrology targets to obtain a plurality of stack-to-measure metrics including: performing a stack of metrics on a plurality of metrology targets across one or more field distributions of one of the wafers Measurement. The method of claim 1, further comprising: performing a systematic offset (TIS) correction on at least some of the plurality of stacked metric metric signals obtained. The method of claim 1, wherein each of the plurality of generated quality metrics is configured to identify a stack of deviations from a metrology target having a substantially symmetric target structure. The method of claim 1, further comprising: identifying, in at least one direction, one of the plurality of metrology targets having greater than a selected outlier value from the one of the plurality of quality metrics generated for the plurality of metrology targets One or more of the metrology targets; a plurality of corrected metrology targets are determined, wherein the plurality of corrected metrology targets will have the identified ones deviating from a quality measure that is greater than a selected outlier level A plurality of metrology targets are excluded from the plurality of metrology targets; and a set of correctable values is calculated using the determined plurality of corrected metrology targets. The method of claim 5, further comprising: transmitting the set of correctable values to one or more processing tools. The method of claim 1, further comprising: Acquiring at least an additional plurality of overlay metric measurement signals from the plurality of metrology targets across the one or more field distributions of the wafers in the set of wafers, the at least one additional plurality of overlay metrics measuring the signal Each stack of metric measurement signals corresponds to one of the plurality of metrology targets, the at least one additional plurality of metric measurement signals being acquired using at least one additional measurement formula; by at least the additional plural Applying the plurality of overlay algorithms to each of the plurality of measurement signals to determine at least an additional plurality of overlay estimates for each of the at least one additional plurality of overlay signals, the at least extra Each of the plurality of stacked pairs of estimates is determined using one of the equal stacking algorithms; the at least one additional plurality of stacked pairs from the plurality of weighted and measured targets are generated by using the plurality of stacked pairs of estimates And superimposing one of the measured signals on the estimated distribution to generate at least an additional plurality of stacked pairs of estimated distributions; generating at least the additional plurality of stacked pairs of estimated distributions to generate at least And a plurality of quality metrics, wherein each of the at least one additional plurality of quality metrics corresponds to one of the at least one additional plurality of stacked pairs of estimated distributions, the at least one of the plurality of quality metrics Each quality metric is a function of one of a width of one of the at least one additional plurality of stacked pair estimated distributions corresponding to one of the generated stacked pair estimated distributions; and by comparing the first plurality of associated ones of the first measurement recipes One of the quality metrics is distributed with one of the at least one additional plurality of quality metrics associated with the at least one additional measurement recipe to determine a program size distribution square. The method of claim 7, wherein the at least one additional plurality of quality metrics associated with the at least one additional measurement recipe are distributed by comparing one of the first plurality of quality metrics associated with the first measurement recipe Determining, by a distribution, a program measurement recipe includes: distributing at least one additional plurality of qualities associated with the at least one additional measurement recipe by comparing one of the first plurality of quality metrics associated with the first measurement recipe Measure one of the distributions to determine an optimal measurement recipe associated with the plurality of quality metrics of the first plurality of metrics and the at least one additional plurality of metrics having a substantially minimum distribution along at least one of the directions . The method of claim 7, wherein at least one of the first measurement recipe and the at least one additional measurement recipe comprises: an illumination wavelength, a filter configuration, an illumination direction, a focus position, or a polarization group At least one of the states. A computer implemented method for determining a quality metric suitable for improving program control in a semiconductor wafer fabrication, comprising: one or more of one or more fields from one of a plurality of wafers The metrology target acquires a metric measurement signal; and the plurality of superposition pairs are determined by applying a plurality of superposition algorithms to the obtained metric measurement signal, and each stack estimation algorithm utilizes the equalization pair algorithm Determining, using the plurality of stacked pair estimates to generate a stack of estimated distributions; and utilizing the generated stacked pair estimated distribution to generate the one or more weights and measures a quality metric that is a function of one of the spans of the generated overlay estimates, the quality metric being configured to be non-zero in the case of an asymmetric overlay measurement signal, wherein the quality metric is One of the symmetrically paired weights and measures signals obtained from a particular metrology target is zero, wherein the quality metric is proportional to one of the asymmetry-induced stacking inaccuracies in the one of the pair of weights and measures. A computer implemented method for providing a set of process tool correctable values, comprising: acquiring each of a plurality of metrology targets across one or more field distributions of one of a plurality of wafers a stack of weights and measures results; obtaining a quality metric associated with each of the acquired overlays of the weights and weights; determining the plurality of quality metrics obtained by each of the weighted targets and the associated quality metrics a plurality of modified overlay values of the metrology target, wherein the modified overlay function is a function of at least one material parameter factor; generating one of a plurality of material parameter factors processing tool correctable value function and corresponding to the processing tool correctable value a set of residuals of the function; determining a value of the material parameter factor suitable for at least substantially minimizing the set of residuals; and determining a set of process correctable values associated with the set of at least substantially minimized residuals. The method of claim 11, wherein the obtaining is overlapped with each acquired One of the quality metrics associated with the weighting result includes utilizing a quality metric generation program to generate a quality metric for each of the acquired overlay metrics results. The method of claim 11, wherein the obtaining of one of the plurality of metrology targets across one or more of the plurality of wafers in one of the plurality of wafers is a pair of weights and measures. Each of the plurality of metrology targets of one or more of the field distributions in the wafer performs a stack of measurements. The method of claim 11, further comprising transmitting the set of processing tool correctable values associated with the set of at least substantially minimized residuals to one or more processing tools. The method of claim 11, further comprising: performing a systematic offset (TIS) correction procedure on the at least some of the plurality of overlay metric measurement signals obtained. The method of claim 11, wherein the modified overlay function is a linear function of at least one material parameter factor. The method of claim 11, wherein the modified overlay function is a function of at least one of an illumination wavelength, a focus position, an illumination direction, a polarization configuration, or a filter configuration. A computer implemented method for identifying a variation in a process tool correctable value, comprising: acquiring each of a plurality of metrology targets across one or more field distributions of one of a plurality of wafers One of the stacking and weighing results; Obtaining one of the quality metrics associated with each of the acquired overlay-weighted results; determining the plurality of modified overlays of the plurality of metrology targets using the acquired overlay-weighted results and a quality function for each of the weighted targets a quality function is a function of the acquired quality metric for each metric target; determining, by using the plurality of modified overlay values, the stacked metrics obtained for the plurality of metric targets and A group processing tool of each of the plurality of randomly selected samples of the associated quality metrics may correct the value to generate a complex array processing tool correctable value, wherein each of the random samples has the same size; And identifying one of the complex array processing tools to correct the variation. The method of claim 18, wherein the obtaining one of the quality metrics associated with each of the acquired overlay-weighted results comprises utilizing a quality metric generation program to generate a quality metric for each of the acquired overlay-weighted results. The method of claim 18, wherein the obtaining one of the plurality of metrology targets across one or more of the plurality of wafers in one of the plurality of wafers is a pair of weights and measures. Each of the plurality of metrology targets of one or more of the field distributions in the wafer performs a stack of measurements. A computer implemented method for generating a metrology sampling plan comprising: a plurality of one or more field distributions across one of a set of wafers The metrology target acquires a plurality of stacked pairs of metric measurement signals, each of the pair of metric measurement signals corresponding to one of the plurality of weights and measures targets; and applying a plurality of stacked pairs calculus by measuring each of the plurality of pairs of metrics Determining, by the plurality of stacked pairs of metrics, a plurality of stacked pairs of each of the measured signals, each stacked pair of estimates being determined using one of the equal-pitch algorithms; by utilizing the plurality of The stack pair estimation produces a plurality of stacked pairs of estimated distributions from each of the plurality of stacked pairs of measured and measured signals from the plurality of weighting and measuring targets to generate a plurality of stacked pairs of estimated distributions; using the generated plurality of stacked pairs to estimate the distribution Generating a first plurality of quality metrics, wherein each quality metric corresponds to a stacked pair of estimated distributions of the plurality of stacked pairs of estimated distributions, wherein each of the quality metrics is obtained from a particular metrology target A symmetric stack is zero in the case of a metrology signal, wherein each of the quality metrics is asymmetrically induced by one of the stacks of weights and measures Accuracy proportional; and a first plurality of quality metrics using the plurality of the generated metrology targets to generate one or more metrology sampling plan. The method of claim 21, wherein the generating the one or more metrology sampling plans using the first plurality of quality metrics generated by the plurality of metrology targets comprises: utilizing the first plurality of the plurality of metrology targets Quality metrics to generate one or more metrology sampling plans to identify one or more lows A quality goal in which the one or more low quality goals are excluded from the one or more metrology sampling plans generated. The method of claim 21, wherein the generating the one or more metrology sampling plans using the first plurality of quality metrics generated by the plurality of metrology targets comprises: utilizing the first plurality of the plurality of metrology targets a quality metric to generate one or more metrology sampling plans to identify one or more low quality targets for the wafer, wherein the one or more low quality targets are excluded from the one or more metrology sampling plans generated and The one or more low quality targets are replaced with one or more additional metrology targets that are close to the one or more low quality target locations. The method of claim 21, further comprising: utilizing the first plurality of quality metrics to identify a plurality of quality regions of the wafer, each of the quality regions comprising a plurality of metrology targets having substantially similar quality levels . The method of claim 24, wherein the metrological sampling rate across one or more locations of the wafer is defined by each of the plurality of quality regions. The method of claim 21, further comprising: performing one or more metric measurements on a subsequent wafer using the generated sampling plan. A computer implemented method for providing a program map map, comprising: forming a plurality of proxy targets on a reticle; forming a plurality of device related targets on a wafer; Obtaining a first set of metrology results from the plurality of proxy targets after comparing a lithography procedure and prior to a first etch process of the wafer from the first etch process of the wafer from the plurality At least one second set of metrology results obtained by the proxy target to determine a first program signature that varies with the location across the wafer; correlating the first program signature with a particular program path; A plurality of device-related targets of the circle perform a first set of metric measurements to measure a device-related offset after the first etch process, the device-related bias is a metrology structure and a device of the wafer An offset between each additional processing layer that varies across the location of the wafer and one of the additional non-lithographic program paths of the wafer; the measurement is performed at each additional processing layer and An additional device-dependent offset after each additional non-lithographic program path of the wafer; and utilizing the determined first etch signature and each of the additional etch signatures and the first measurement Device related offset and A bias related to additional devices to generate a sequence diagram levy map database. The method of claim 27, wherein the comparing obtains one of the first set of metrology results from the plurality of proxy targets and the first of the wafers after a lithography process and prior to the first etching process of the wafer At least one second set of metrology results obtained from the plurality of proxy targets after an etch process includes determining that one of the plurality of proxy targets is acquired after a lithography process and before the first etch process of the wafer a set of weights and measures A difference between at least one second set of metrology results obtained from the plurality of proxy targets after the first etch process of the wafer. The method of claim 27, wherein the first set of weights and measures from the plurality of proxy targets is obtained after a lithography procedure by performing a first set of metric measurements on the plurality of proxy targets after a lithography procedure result. The method of claim 27, wherein obtaining at least one second set of metric measurements for the plurality of proxy targets after the first etch process of the wafer is obtained after the first etch process of the wafer The at least one second set of weighting results of the plurality of proxy targets. The method of claim 27, wherein the one or more overlays are used to obtain the first set of metrology results from the plurality of proxy targets and the at least one second set of metrology results from the plurality of proxy targets At least one. The method of claim 27, wherein the measuring a device-related offset after the first etching process by performing a first set of metric measurements on the plurality of device-related targets of the wafer comprises: Performing a first set of metric measurements on the plurality of device-related targets of the wafer to measure a device-related offset after the first etch process, the first set of metrics measuring a system utilizing a CD-SEM based Performed by at least one of a metrology system or an AFM based metrology system. The method of claim 27, wherein the reticle is at least one of a test reticle or a product reticle. The method of claim 27, further comprising: utilizing the generated program symbol database to operate an advanced program control loop. The method of claim 27, further comprising: generating a set of program signature map correctable values. A system for providing a quality metric suitable for improving program control in a semiconductor wafer fabrication process, comprising: a metrology system configured to self-span one or more of a wafer in a set of wafers The plurality of metrology targets of the field distribution obtain a plurality of overlay metric measurement signals, and each stack metric measurement signal corresponds to one of the plurality of metrology targets, and the plurality of overlay metrics measure the signal system utilization a first measurement recipe is obtained; and a computing system is configured to: determine each of the plurality of overlay metric measurement signals by applying a plurality of overlay algorithms to each of the overlay metric measurement signals a plurality of stack pair estimates, each stack pair estimate being determined using one of the equal stack algorithms; generating the plurality of stacks from the plurality of weights and targets by using the plurality of stack pairs Metricing a stack of each of the measured signals to produce a plurality of stacked pairs of estimated distributions; and utilizing the generated plurality of stacked pairs of estimated distributions to produce a first plurality of qualities Amount, wherein each of the quality metrics corresponding to the plurality of the generated overlay of the estimated distribution of the estimated distribution of a stack, each of the quality metrics corresponding to one of a stack based on the estimated distribution function produced by one of Span a number, wherein each of the quality metrics is zero in the case of obtaining a symmetric stack of weights and measures signals from a particular metrology target, wherein each of the quality metrics is not one of a stack of weights and measures Symmetry-induced stacking is proportional to inaccuracy. The system of claim 36, wherein the computing system is further configured to utilize the generated first plurality of quality metrics to identify one or more outlier metric targets. The system of claim 36, wherein the computing system is further configured to utilize the generated first plurality of quality metrics to determine an optimal overlay recipe. The system of claim 36, wherein the computing system is further configured to utilize the generated first plurality of quality metrics to generate one or more processing tool correctable values. The system of claim 36, wherein the computing system is further configured to utilize the generated first plurality of quality metrics to generate one or more sampling plans. The system of claim 36, wherein the computing system is further configured to generate a program map map library.