TW201245906A - Method and system for providing a quality metric for improved process control - Google Patents

Method and system for providing a quality metric for improved process control Download PDF

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TW201245906A
TW201245906A TW101112355A TW101112355A TW201245906A TW 201245906 A TW201245906 A TW 201245906A TW 101112355 A TW101112355 A TW 101112355A TW 101112355 A TW101112355 A TW 101112355A TW 201245906 A TW201245906 A TW 201245906A
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targets
quality
metrology
metric
metrics
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TW101112355A
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TWI582539B (en
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Daniel Kandel
Guy Cohen
Vladimir Levinski
Noam Sapiens
Dana Klein
Alex Shulman
Vladimir Kamenetsky
Eran Amit
Irina Vakshtein
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Kla Tencor Corp
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Priority claimed from PCT/US2012/032169 external-priority patent/WO2012138758A1/en
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Abstract

The present invention may include acquiring a plurality of overlay metrology measurement signals from a plurality of metrology targets distributed across one or more fields of a wafer of a lot of wafers, determining a plurality of overlay estimates for each of the plurality of overlay metrology measurement signals using a plurality of overlay algorithms, generating a plurality of overlay estimate distributions, and generating a first plurality of quality metrics utilizing the generated plurality of overlay estimate distributions, wherein each quality metric corresponds with one overlay estimate distribution of the generated plurality of overlay estimate distributions, each quality metric a function of a width of a corresponding generated overlay estimate distribution, each quality metric further being a function of asymmetry present in an overlay metrology measurement signal from an associated metrology target.

Description

201245906 六、發明說明: 【發明所屬之技術領域】 ' 本發明概言之係關於一種用於提供適合於改良半導體晶 圓製作中之程序控制之品質度量的方法及系統》 本申請案係關於且主張來自以下所列申請案(「相關申 請案j )之最早可用有效申請日期之權益(例如,主張除臨 時專利申請案以外之最早可用優先權曰期或主張臨時專利 申請案、相關申請案之任一及所有父代申請案、祖父代申 請案、曾祖父代申請案等在35 USC § 119(e)下之權益)。201245906 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a method and system for providing quality metrics suitable for improving program control in semiconductor wafer fabrication. Claims for the earliest available valid application date from the applications listed below ("Related Application j") (for example, claiming the earliest available priority period other than the provisional patent application or claiming a provisional patent application, related application Any and all parent applications, grandparents' applications, and great-grandparents' applications, etc. under 35 USC § 119(e)).

出於USPTO額外法定要求之目的,本申請案構成2011年 4月 6 日提出申請之將 Daniel Kandel、Guy Cohen、Vladimir Levinski及Noam Sapiens命名為發明人之題為「METHODS TO REDUCE SYSTEMATIC BIAS IN OVERLAY METROLOGY OR LITHOGRAPHY PROCESS CONTROL」 之美國臨時專利申請案(申請序列號61/472,545)之一正式 (非臨時)專利申請案。 出於USPTO額外法定要求之目的,本申請案構成2011年 4 月 11 日提出申請之將 Daniel Kandel、Guy Cohen、 Vladimir Levinski、Noam Sapiens、Alex Shulman 及 Vladimir Kamenetsky 命名為發明人之題為「METHODS TO REDUCE SYSTEMATIC BIAS IN OVERLAY METROLOGY OR LITHOGRAPHY PROCESS CONTROL」之美國臨時專 利申請案(申請序列號61/474,167)之一正式(非臨時)專利申 請案。 163677.doc 201245906 出於USPTO額外法定要求之目的,本申請案構成2011年 7月 7 日提出申請之將 Guy Cohen、Eran Amit 及 Dana Klein 命名為發明人之題為「METHODS FOR CALCULATING CORRECTABLES WITH BETTER ACCURACY」之美國臨 時專利申請案(申請序列號61/509,842)之一正式(非臨時)專 利申請案。 出於USPTO額外法定要求之目的,本申請案構成2012年 2 月 10 日提出申請之將 Guy Cohen、Dana Klein及 Eran Amit 命名為發明人之題為「METHODS FOR CALCULATING CORRECTABLES WITH BETTER ACCURACY」之美國臨 時專利申請案(申請序列號61/597,504)之一正式(非臨時)專 利申請案。 出於USPTO額外法定要求之目的,本申請案構成2012年 2月 13 曰提出申請之將Daniel Kandel、Vladimir Levinski、 Noam Sapiens、Guy Cohen、Dana Klein、Eran Amit及 Irina Vakshtein命名為發明人之題為「METHODS FOR CALCULATING CORRECTABLES USING A QUALITY METRIC」之美國臨時專利申請案(申請序歹ij號61/598,140) 之一正式(非臨時)專利申請案。 【先前技術】 製作諸如邏輯及記憶體裝置之半導體裝置通常包含使用 大量半導體製作程序以形成半導體裝置之各種特徵及多個 層級來處理諸如一半導體晶圓之一基板《舉例而言,微影 係涉及將一圖案自一光罩轉印至配置於一半導體晶圓上之 163677.doc 201245906 一抗蝕劑之一半導體製作程序。半導體製作程序之額外實 例包含(但不限於)化學機械拋光(CMp)、蝕刻、沈積及離 子植入》可將多個半導體裝置在一單個半導體晶圓上製作 成一配置並隨後將其分離成個別半導體裝置。 在一半導體製造程序期間之各種步驟處使用度量衡程序 來監視並控制一或多個半導體層程序。舉例而言,使用度 量衡程序來量測一晶圓之一或多個特性,諸如在一程序步 驟期間形成於該晶圓上之特徵之尺寸(例如,線寬度、厚 度等)’其中可藉由量測該一或多個特性來判定該程序步 郵之質。一種此類特性包含疊對誤差。一疊對量測通常 指定一第一經圖案化層相對於安置於其上面或下面之一第 二經圓案化層對準的準確程度或一第一圖案相對於安置於 相同層上之一第二圖案對準的準確程度。疊對誤差通常係 藉助具有形成於一工件(例如,半導體晶圓)之一或多個層 上之結構之一 #對目標來判定。料結構可呈光柵之形 式,且此等光柵可係週期性的。若正確地形成該兩個層或 圖案’則一㈣或圖案上之結構往往相對於另一個層或圖 案上之結構對準。若未正確地形成該兩個層或圖案,則— 個層或圖案上之結構往往相對於另一個層或圖案上之結構 偏移或未對準。疊對誤差係在半導體積體電路製造之㈣ · 階段所使用之圖案中之任何圖案之間的對準誤差。通常, . 對跨晶片及晶圓之變異之理解限於固定取樣且因此僅針對 已知選定地點偵測疊對誤差。 此外,若晶圓之一經量測特性(諸如,疊對誤差)係不可 163677.doc • 6 · 201245906 接受(例如’超出該特性之一預定範圍),則可使用一或多 個特性之量測來變更該程序之—或多個參數以使得藉由該 程序製造之額外晶圓具有可接受之特性。 在疊對誤差之情形下’可使用—疊對量測來校正一微影 程序以使疊對誤差保持在所期望範圍内。舉例”,可將 疊對量測饋送至計算可由操作者用來更好地對準晶圓處理 中所使用之微影工具之「可校正值(e_etaMes)」及其他 統計資料之一分析常式中。 因此,至為關鍵的是,盡可能準確地量測—組度量衡目 標之疊對誤差。-給定組#對度量衡量測中之不準確度可 由各種各㈣因素而引起…個此類因素係存在於一給定 f對目標中之不完整性。目標結構不對稱性表示導致疊對 量測不準確度之大多數重要類型之目標不完整性中之一 者。疊對目標不對稱性以及目標不完整性與給定度量衡技 術之互動可導致㈣量财之相對大料準確度。因此, 期望提供-種適合於減輕—晶圓之—或多個㈣目標中之 疊對目標不對稱性之影響的系統及方法。 【發明内容】 揭示-種用於提供適合於改良一I導體晶圓冑作中之程 序控制之一品質度量之電腦實施之方法。在一項態樣中, 一方法可包含(但不限於):自跨一批晶圓中之一晶圓之— f多個場分佈之複數個度量衡目標獲取複數個疊對度量衡 1測信號,每一疊對度量衡量測信號對應於該複數個度量 衡目禚中之一度量衡目標,該複數個疊對度量衡量測信號 163677.doc 201245906 係利用—第—量測配方來獲取;#由對每_疊對度量衡量 測信號應用複數個疊對演算法來判㈣複數個疊對度量衡 ㈣料計’每-疊對估計係利用 該等疊對演算法中之-者來判定;藉由利用該複數個疊對 估計產生來自該複數個度量衡目標之該複數個疊對度量衡 量測信號中之每-者之-疊對估計分佈來產生複數個疊對 估計分佈;及利用該所產生複數個疊對估計分佈來產生第 -複數個品質度量,其中每一品質度量對應於該所產生複 數個疊對估計分佈中之一個疊對估計分佈,每一品質度量 係一對應之所產生疊對估計分佈之一寬度之—函數,每一 品質度量進一步係存在於來自一相關聯之度量衡目標之一 疊對度量衡量測信號中之不對稱性之一函數。 該方法可進一步包含:自針對該複數個度量衡目標所產 生之該複數個品質度量之一分佈沿著至少一個方向識別該 複數個度量衡目標中之具有大於一選定離群值位準之一品 質度量之一或多個度量衡目標;判定複數個經校正度量衡 目標’其中該複數個經校正度量衡目標將具有偏離超出一 選定離群值位準之一品質度量之該經識別一或多個度量衡 目標排除於該複數個度量衡目標之外;及利用該所判定複 數個經校正度量衡目標來計算一組可校正值。 另外,該方法可包含:自跨該批晶圓中之該晶圓之該一 或多個場分佈之該複數個度量衡目標獲取至少額外複數個 疊對度量衡量測信號,該至少額外複數個疊對度量衡量測 信號中之每一疊對度量衡量測信號對應於該複數個度量衡 163677.doc 201245906 目標中之-度量衡目標,該至少額外複數個疊對度量衡量 測信號係利用至少-額外量測配方來獲取;藉由對該至少 額外複數個量測彳§號中之每__疊對量測信號應用該複數個 疊對演算法來判定該至少額外複數個疊對量測信號中之每 者之至 >、額外複數個疊對估計,該至少額外複數個疊對 估計中之每—者係利用該等疊對演算法巾之-者來判定; 藉由利用該複數個疊對估計產生來自該複數個度量衡目標 之該至少額外複數個疊對量測信號中之每一者之一疊對估 。十刀佈來產生至少額外複數個疊對估計分佈;及利用該所 產生至少額外複數個疊對估計分佈來產生至少額外複數個 品質度量,其中該至少額外複數個品質度量中之每一品質 度量對應於該所產生至少額外複數個疊對估計分佈中之一 個疊對估計分佈,該至少額外複數個品質度量中之每一品 質度量係該至少額外複數個疊對估計分佈中之一對應之所 產生疊對估計分佈之一寬度之一函數;藉由比較關聯於該 第一量測配方之該第一複數個品質度量之一分佈與關聯於 該至少一個額外量測配方之該至少額外複數個品質度量之 一分佈來判定一程序量測配方。 在另一態樣中,一方法可包含(但不限於):自一批晶圓 中之一晶圓之一或多個場之一或多個度量衡目標獲取一度 量衡量測信號;藉由對該所獲取之度量衡量測信號應用複 數個疊對演算法來判定複數個疊對估計,每一疊對估計係 利用該等疊對演算法中之一者來判定;利用該複數個疊對 估計來產生一疊對估計分佈;及利用該所產生重疊估計分 163677.doc 201245906 佈來產生該一或多個度量衡目標之一品質度量,該品質度 量係該所產生疊肖估計分佈之一寬度之一函數,該品質度 量經組態而在不對稱疊對量測信號情況下為非零,該品質 度量係該所產生疊對估計分佈之一寬度之一函數’該品質 度量進-步係存在於自一相關聯之度量衡目標獲取之該度 量衡量測信號中之不對稱性之一函數。 揭不一種用於提供一組處理工具可校正值之電腦實施之 方法。在另一態樣中,一方法可包含(但不限於广獲取跨 一批晶圓中之一晶圓之一或多個場分佈之複數個度量衡目 標中之每一度量衡目標之一疊對度量衡結果;獲取與每一 所獲取之疊對度量衡結果相關聯之一品質度量;利用每一 度量衡目標之該所獲取之疊對度量衡結果及該相關聯之品 質度量結果來判定每一度量衡目標之一經修改疊對值其 中每度量衡目標之該經修改疊對值隨至少一個材料參數 因數而變化;計算複數個材料參數因數之一組可校正值及 對應於該組可校正值之一組殘差;判定適合於使該組殘差 至少實質最小化之材料參數因數之一值;及識別與該至少 實質最小化組殘差相關聯之一組可校正值。 揭示一種用於識別一處理工具可校正值之一變異之電腦 實&之方法。在一項態樣中,—方法可包含(但不限於): 獲取跨-批晶圓中之-晶圓之—或多個場分佈之複數個度 量衡目標中之每一度量衡目標之一叠對度量衡結果;獲 取與每一所獲取之疊對度量衡結果相關聯之一品質度量; 利用每一度量衡目標之該所獲取之疊對度量衡結果及一7 163677.doc 201245906 質函數來判定該複數個度量衡目標之複數個經修改疊對 值’該品質函數隨每一度量衡目標之該所獲取之品質度量 而變化;藉由利用該複數個經修改疊對值判定該複數個度 量衡目標之該等所獲取之疊對度量衡結果及該等相關聯之 質度量之複數個隨機選定取樣中之每一者之一組處理工 具可校正值來產生複數組處理工具可校正值,其中該等隨 機取樣中之每一者具有相同大小;及識別該複數組處理工 具可校正值之一變異。 揭不一種用於產生一度量衡取樣計劃之電腦實施之方 法。在一項態樣中,一方法可包含(但不限於):自跨一批 晶圓中之一晶圓之一或多個場分佈之複數個度量衡目標獲 取複數個疊對度量衡量測信號,每一疊對度量衡量測信號 對應於該複數個度量衡目標中之一度量衡目標;藉由對每 一疊對度量衡量測信號應用複數個疊對演算法來判定該複 數個疊對度讀量測信號中之每—者之複數個疊對估計, 每一疊對估計係利用該等曼對演算法中之-者來判定;藉 由利用該複數個疊對估計產生來自該複數個度量衡目標: 該複數個疊對度量衡量測信號中之每—者卜㈣㈣> 佈來產生複數個疊對估計分佈;利用該所產生複數個疊對 估計分佈來產生第—複數個品質度量,其中每-品質度量 對應於該所產生複數個疊對估計分佈中之一個 佈,每一品質度量進一步俜存在於央ό 4 係存在於來自一相關聯之度量衡 目標之一疊對度量衛詈、卫丨丨h I«占山 重衡中之不對稱性之-函數;及 利用該複數個度量衡目標之嗲 <该所產生第一複數個品質度量 163677.doc 201245906 來產生一或多個度量衡取樣計劃。 signature map) 揭示一種用於提供程序圖徵圖譜(process —方法可包含(但不 目標;在一晶圓上形 之電腦實施之方法。在一項態樣中 限於):在一光罩上形成複數個代理 成複數個裝置相關目標;藉由比較在一微影程序之後及在 該晶圓之一第一蝕刻程序之前自該複數個代理目標獲取之 一第一組度量衡結果與在該晶圓之該第一蝕刻程序之後自 該複數個代理目標獲取之至少一第二組度量衡結果來判定 隨跨該晶圓之位置而變化之一第一程序圖徵;使該第一程 序圖徵與一特定程序路徑相關;藉由對該晶圓之該複數個 裝置相關目標執行一第一組度量衡量測來量測在該第一蝕 刻程序之後的一裝置相關偏置.,該裝置相關偏置係一度量 衡結構與該晶圓之一裝置之間的偏置;判定隨跨該晶圓之 位置而變化之每一額外處理層及該晶圓之每一額外非微影 程序路徑之一額外餘刻圖徵;量測在每一額外處理層及該 晶圓之每一額外非微影程序路徑之後的一額外裝置相關偏 置’及利用所判定之第一钮刻圖徵及該等額外敍刻圖徵中 之每一者以及該第一所量測裝置相關偏置及第一額外裝置 相關偏置來產生一程序圖徵圖譜資料庫。 揭不一種用於提供適合於改良一半導體晶圓製作中之程 序控制之一品質度量之系統。在一項態樣中,一系統可包 含(但不限於):一度量衡系統,其經組態以自跨一批晶圓 中之一晶圓之一個或多個場分佈之複數個度量衡目標獲取 複數個疊對度量衡量測信號,每一叠對度量衡量測信號對 163677.doc •12· 201245906 應於該複數個度量衡目標中之一度量衡目標,該複數個疊 對度量衡量測信號係利用—第一量測配方來獲取;及一計 算系統,其經組態以:藉由對每一疊對度量衡量測信號應 用複數個疊對演算法來判定該複數個疊錢量衡量測信號 中之每一者之複數個疊對估計,每一疊對估計係利用該等 疊對演算法巾之-者來判定;藉由利用該複數個疊對估計 產生來自該複數個度量衡目標之該複數個疊對度量衡量測 ㈣中之每-者之-疊對估計分佈來產生複數個疊對估計 分佈;並利用該所產生複數個疊對估計分佈來產生第一複 數個品質度量’其中每—品f度量對應於該所產生複數個 叠對估計分佈中之-個疊對估計分佈,每—品質度量係一 對應之所產生疊對估計分佈之一寬度之一函數’每一品質 度量進-步係存在於來自—相關聯之度量衡目標之一叠對 度量衡量測信號中之不對稱性之一函數。 應理解,前述大體闡述及以下詳細闡述兩者皆僅為例示 性及解釋性且不必限制所請求之本發明。併人本說明書令 並構成本說明書之-部㈣附圖圖解說明本發明之實施 例,並與該大體闡述一起用於解釋本發明之原理。 【實施方式】 熟習此項技術者可藉由參物圖來更好地理解本發 眾多優點。 現在將詳細參考圖解說明於隨附圖式中之所揭示之標的 物。 大體參照ϋΙΑ至圖19 ’根據本發明闡述—種用於提供適 163677.doc •13- 201245906 合於改良一半導體晶圓製作程序中之程序控制之一品質度 量的方法及系統。叠對不準確度起源於各種各樣的因數。 一種此類因數包含不對稱目標結構(例如,底部目標層或 頂部目標層)於一組所取樣疊對度量衡目標中之一或多者 上之存在。疊對目標不對稱性之存在可導致所給定疊對目 標之一量測中之幾何歧義。幾何疊對歧義進而可導致經由 與疊對度量衡程序本身之非線性互動之系統誤差增強。淨 效果可導致一顯著疊對不準確度(達10 nm)。本發明涉及 一種用於提供經組態以量化與自一所取樣半導體晶圓之各 種度量衡目標獲得之每一疊對量測信號相關聯之疊對不準 確度之一品質度量的方法及系統。本發明進一步涉及利用 該品質度量以經由離群值目標移除及度量衡配方改良或最 佳化來改良程序控制。 進一步認識到’在品質度量產生及分析之後,則可使用 本發明之度量衡量測來計算用於校正用於對該半導體晶圓 執行一給定程序之一相關聯之處理工具之校正值(習知為 「可校正值」)。 如貫穿於本發明所使用,術語「可校正值」通常係指可 用於校正一微影工具或掃描機工具之對準以相對於叠對效 能改良對後續微影圖案化之控制之資料。在一般的意義 上’可校正值藉由提供回饋及前饋以改良處理工具對準來 允許晶圓處理在預定義期望範圍内進行。 如貫穿於本發明所使用,術語「度量衡場景」係指—度 量衡工具與一度量衡目標之一特定組合。然而,在一给定 163677.doc •14· 201245906 度量衡场景内,存在可在其下執行度量衡量測之—廣泛之 可能度量衡設置範圍。 如貝穿於本發明所使用’術語「晶圓」通常係指由一半 導體或非半導體材料形成之一基板。舉例而言,一半導體 或非半導體材料可包含(但不限於)單晶碎、珅化鎵及碟化 銦。-晶圓可包含一或多個層。舉例而言,此等層可包含 (但不限於)一抗蝕劑、一電介材料、一導電材料及一半導 電材料。諸多不同類型之此等層係此項技術中所習知的, 且本文中所使用之術語晶圓意欲囊括可在其上形成所有類 型之此等層之一晶圓。 典型半導體程序包含按批進行之晶圓處理。如本文中 所使用,一「批」係共同處理之晶圓之一群組(例如25個 晶圓之群組)。該批中之每一晶圓係由來自微影處理工具 (例如’步進機、掃描機等)之諸多曝光場組成。在每一場 内可存在多晶粒晶粒係最終變成一單晶片之功能單 元。在產品晶圓上’疊對度量衡目標通常置於劃線區中 (舉例而言,置於該場之4個拐角中)。此係通常沒有位於該 曝光場之周界周圍(及位於該晶粒外部)之電路之一區域。 在某些例項中’將疊對目標置於係該晶粒間而非該場之周 界處之區域之深蝕道中β將疊對目標置於主要晶粒區内之 產品晶圓上係相當罕見的’此乃因電路迫切需要此區。然 而’工程及特性化晶圓(非產品晶圓)通常貫穿於不涉及此 等限制之該場之中心具有諸多疊對目標。 形成於一晶圓上之一或多個層可經圖案化或未經圖案 163677.doc •15· 201245906 化《舉例而言,一晶圓可包含複數個晶粒,每一晶粒具有 可重複經圖案化特徵。此等材料層之形成及處理可最終產 生完整裝置。諸多不同類型之裝置可形成於一晶圓上,且 如本文中所使用之術語晶圓意欲囊括在其上製作此項技術 中所習知之任一類型之裝置之一晶圓。 圖1A及圖1B圖解說明一對稱度量衡目標及一不對稱度 量衡目標之剖視圖。認識到,圖1A及圖1B之度量衡目標 可包含一第一層(例如,處理層)目標結構及一第二層(例 如抗姓劑層)目標結構。舉例而言,如圖1 a中所示,疊 對度量衡目標1〇〇可包含一處理層結構1〇4及一對應之抗敍 劑層目標結構1 02。此外,由於度量衡目標1 〇〇之對稱性 質’因而與第一層(例如,處理層)目標1 04及一第二層(例 如’抗蝕劑層)目標相關聯之疊對1〇6係良適定義的1〇2。 就此方面,不存在理想化度量衡目標1〇〇之一對應之叠對 度量衡量測中之歧義。相比之下,圖1B圖解說明包含具有 一不對稱度之一目標結構112之一非理想度量衡目標11〇。 在這個意義上,目標11〇包含一對稱處理層目標結構114及 不對稱抗蝕劑層目標結構112。抗蝕劑層目標結構丨丨2中 之不對稱性係因目標結構112之壁角116&及116]3不相等(亦 即,左壁角116a為90。且右壁角116b不等於90。)而形成。因 此,目標110之處理層結構n4具有一良適定義之對稱中 心,而目標110之抗蝕劑層結構112沒有一良適定義之對稱 中心。該兩個層之間的此對稱差進而形成抗蝕劑層結構 112中之一幾何歧義。舉例而言,相對於抗蝕劑層結構ιΐ2 163677.doc • 16 - 201245906 之頂部118a定義之疊對不同於相對於抗蝕劑層結構之 底部118b定義之疊對。與不對稱抗蝕劑層結構112相關聯 之此歧義進而形成並非係良適定義之一疊對116。進一步 注意到,若給定度量衡量測工具對疊對標記不對稱性敏 感,則不對稱性(諸如圖1B中所繪示之不對稱性)之存在可 導致所量測信號中之增強之不對稱性,從而產生疊對量測 不準確度。 此項技術中習知,度量衡工具設置可影響一度量衡量測 之結果。就此方面,所量測疊對並非僅由屬於討論中之層 之結構之間的一偏移定義。作為第一實例,當選擇一不同 之焦點平面時,量測結果可系統地改變。作為一第二實 例,當在量測中利用一不同照明光譜時,量測之結果亦可 系統地改變(亦即’隨著照明選擇非隨機地改變)。此等效 果可歸因於至少兩個來源。第一來源與度量衡目標本身有 關。舉例而言,如圖2中所示,若目標輪廓係不對稱的, 則度量衡系統之焦點平面中之一偏移將產生度量衡結果中 之一顯見側面偏移。以此方式,與一第一焦點長度F1相關 聯之照明可與頂層目標結構2〇2之頂表面強互動,而具有 一焦點長度F2之照明可與頂層目標結構2〇2之底表面強互 動。因此,一頂部結構202與底部結構204之間的疊對量測 206可包含一對應之疊對歧義2〇8。 交替地’如圖3中所示’若存在具有光譜相依吸收特性 之一層(諸如(但不限於)與隱埋層中之一不對稱目標結構組 合之多晶矽或碳硬質光罩)’則所量測疊對可隨照明光譜 163677.doc 201245906 而變化。以此方式’依據討論中之特定材料及入射照明, 與一第一波長相關聯之照明可只穿透該材料層至一第一深 度(〜)n第二波長之照明可穿透至另_深度㈣。 由於此變異,因而不同照明將以不同方式與底層之目標結 構304互動。就此方面,一頂部結構3〇2與底部結構3〇4之 間的疊對量測306可包含一對應之疊對歧義3〇8。如本文中 進一步更詳細論述,本發明之一項態樣係提供一種適合於 識別一量測配方之最佳化或至少改良疊對量測結果之該組 參數的系統及方法。 注意到,即使度量衡系、,统係名完美的且不誘發度量 衡結果之系統偏移或任一其他形式之系統性偏置。散射量 測度量衡中特別重要之一額外目標相關特性與通常對度量 衡目標内之多於-單個晶胞執行度量衡之事實相關。亦藉 由本文中所述之方法來估計與&晶胞與晶月包變異性相關聯 之度量衡歧義。照明不對稱性之來源可包含(但不限於): 0先前層及當前層中之兩者之側壁角不對稱性;⑴當前層 與先前層之高度差·,iii)所量測層與其下面之層之間的中 間層之間的高度差;iv)因局部缺陷而引起之變異。 以下說明係對不對稱性誘發之疊對準確度之一理論解 釋。在基於成像之疊對度量衡之情況下,一所收集影像之 對應於具有不對稱性之目標層之部分可寫為: 影像 2m, 2m (χ~ΟΡΖ) (方程式1) 其中~α+Ι,α+1,…對應於用於形成影像之信號之電場之不同繞 163677.doc -18- 201245906 射級之振幅,且九,九也,…對應於用於形成影像之信號之相 位。信號對稱性之假設可表示為: 對於每一個n、a+n=amn 由於電場之相位判定信號之幾何中心 (方程式2) 因而對相位對稱 性之破壞對應於一幾何疊對歧義。此外,對振幅&及^ 之對稱性之破壞導致可顯示超過幾何歧義之疊對不準確 度。舉例而言’在其中量測誤差之大部分來自第一繞射級 之情況下’疊對不準確度△表示為:For the purposes of the additional statutory requirements of the USPTO, this application constitutes the application of Daniel Kandel, Guy Cohen, Vladimir Levinski and Noam Sapiens as the inventor's title "METHODS TO REDUCE SYSTEMATIC BIAS IN OVERLAY METROLOGY", filed on April 6, 2011. ORLITHOGRAPHY PROCESS CONTROL is one of the official (non-provisional) patent applications of the US Provisional Patent Application (Application Serial No. 61/472,545). For the purposes of additional statutory requirements of the USPTO, this application constitutes the application of the date of April 11, 2011, named Daniel Kandel, Guy Cohen, Vladimir Levinski, Noam Sapiens, Alex Shulman and Vladimir Kamenetsky as the inventor entitled "METHODS TO" REDUCE SYSTEMATIC BIAS IN OVERLAY METROLOGY OR LITHOGRAPHY PROCESS CONTROL" is one of the official (non-provisional) patent applications of the US Provisional Patent Application (Application Serial No. 61/474,167). 163677.doc 201245906 For the purposes of additional statutory requirements of the USPTO, this application constitutes the date of July 7, 2011, and the names of Guy Cohen, Eran Amit and Dana Klein as inventors are entitled "METHODS FOR CALCULATING CORRECTABLES WITH BETTER ACCURACY" One of the official (non-provisional) patent applications of the US Provisional Patent Application (Application Serial No. 61/509,842). For the purposes of the additional statutory requirements of the USPTO, this application constitutes the US provisional date of February 10, 2012, which named Guy Cohen, Dana Klein and Eran Amit as the inventor's title "METHODS FOR CALCULATING CORRECTABLES WITH BETTER ACCURACY" A formal (non-provisional) patent application for a patent application (application serial number 61/597, 504). For the purposes of additional statutory requirements of the USPTO, this application constitutes February 13, 2012. The applications were named Daniel Kandel, Vladimir Levinski, Noam Sapiens, Guy Cohen, Dana Klein, Eran Amit and Irina Vakshtein as inventors. One of the official (non-provisional) patent applications of the US Provisional Patent Application (Application Serial No. ij No. 61/598, 140) of "METHODS FOR CALCULATING CORRECTABLES USING A QUALITY METRIC". [Prior Art] Fabricating semiconductor devices such as logic and memory devices typically involves processing a substrate such as a semiconductor wafer using a number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor device. For example, lithography A semiconductor fabrication process involving transferring a pattern from a mask to a 163677.doc 201245906-resistor disposed on a semiconductor wafer. Additional examples of semiconductor fabrication processes including, but not limited to, chemical mechanical polishing (CMp), etching, deposition, and ion implantation can fabricate multiple semiconductor devices into a single configuration on a single semiconductor wafer and then separate them into individual Semiconductor device. A metrology program is used at various steps during a semiconductor fabrication process to monitor and control one or more semiconductor layer programs. For example, a metrology program is used to measure one or more characteristics of a wafer, such as the size (eg, line width, thickness, etc.) of features formed on the wafer during a program step. The one or more characteristics are measured to determine the quality of the program step. One such feature includes stacking errors. A stack of measurements typically specifies the accuracy of alignment of a first patterned layer relative to a second rounded layer disposed above or below it, or a first pattern relative to one of the same layer disposed on the same layer The accuracy of the alignment of the second pattern. The stacking error is typically determined by one of the structures having one or more layers formed on a workpiece (e.g., a semiconductor wafer). The material structure can be in the form of a grating, and such gratings can be periodic. If the two layers or patterns are formed correctly, the structure of one (four) or pattern tends to be aligned with respect to the structure of the other layer or pattern. If the two layers or patterns are not formed correctly, then the structure on one layer or pattern tends to be offset or misaligned relative to the structure on the other layer or pattern. The overlay error is the alignment error between any of the patterns used in the (4) phase of the semiconductor integrated circuit fabrication. In general, the understanding of variations across wafers and wafers is limited to fixed sampling and therefore the overlay error is only detected for known selected locations. In addition, if one of the measured characteristics of the wafer (such as the overlap error) is not acceptable (eg, 'out of a predetermined range of the characteristic'), then one or more characteristics can be measured. The program's - or multiple parameters are changed such that the additional wafers fabricated by the program have acceptable characteristics. In the case of overlay error, a lithography procedure can be used to adjust the tiling process to maintain the overlay error within the desired range. For example, the stacking measurement can be fed to the calculation of one of the "correctable values (e_etaMes)" and other statistical data that can be used by the operator to better align the lithography tools used in wafer processing. in. Therefore, it is critical to measure the stack-to-error error of the set of metrics as accurately as possible. - Given group # Inaccuracies in the measurement of metrics can be caused by various (four) factors... One such factor exists in the incompleteness of a given f to the target. The target structure asymmetry represents one of the target incompleteness of most important types of stacking inaccuracies. The overlap of target asymmetry and target incompleteness with a given metrology technique can result in (iv) the relative bulk accuracy of the wealth. Accordingly, it is desirable to provide systems and methods suitable for mitigating the effects of stacking on a wafer or a plurality of (four) targets on target asymmetry. SUMMARY OF THE INVENTION A computer-implemented method for providing a quality metric suitable for improving program control in an I-conductor wafer fabrication is disclosed. In one aspect, a method can include, but is not limited to, obtaining a plurality of stacked pairs of metrology 1 signals from a plurality of metrology targets across a plurality of wafers in a batch of wafers, Each stack of metric measurement signals corresponds to one of the plurality of metrics, the measurement 163677.doc 201245906 is obtained by using the first-measurement formula; _ stacked pair metric measurement signal is applied by a plurality of stacked pairs algorithm to determine (4) a plurality of stacked pairs of weights and measures (four) metering 'every-stack pair estimation is determined by using the same in the stacking algorithm; by using the A plurality of stacked pair estimates yielding a plurality of stacked-pair estimated distributions from the plurality of stacked-pair metric-measured signals from the plurality of metrology targets to generate a plurality of stacked-pair estimated distributions; and utilizing the generated plurality of stacked Estimating the distribution to generate a first-plural quality metric, wherein each quality metric corresponds to one of the plurality of stacked pairs of estimated distributions, and each quality metric is produced correspondingly Stacked one on the estimated distribution width - function, for each quality metric is further based on the presence of the target from an associated one of the metrology stacked one function asymmetry of metrology measurement signal. The method can further include identifying, in at least one direction, one of the plurality of metrology targets having a quality metric greater than a selected outlier level from the one of the plurality of quality metrics generated for the plurality of metrology targets One or more metrology targets; determining a plurality of corrected metrology targets 'where the plurality of corrected metrology targets will have the identified one or more metrology targets excluded from a quality metric that exceeds a selected outlier level Excluding the plurality of metrology targets; and using the determined plurality of corrected metrology targets to calculate a set of correctable values. Additionally, the method can include obtaining at least an additional plurality of overlay metric measurement signals from the plurality of metrology targets across the one or more field distributions of the wafers in the batch of wafers, the at least additional plurality of stacks Each of the pair of metrics measured in the metric measurement signal corresponds to the plurality of weights and measures 163,677.doc 201245906 target-measured target, the at least one additional plurality of pairs of measured metrics using at least-additional measurements Recognizing the plurality of pairs of measurement signals by applying the plurality of overlay algorithms to each of the at least one additional plurality of measurements 彳 § Up to >, an additional plurality of stacked pair estimates, each of the at least one additional plurality of stacked pairs estimates is determined by using the equal stack algorithm; by using the plurality of stacked pairs A stacking estimate of each of the at least one additional plurality of stacked pairs of measured signals from the plurality of metrology targets is generated. Solving at least an additional plurality of stacked pairs of estimated distributions; and utilizing the generated at least one additional plurality of stacked pairs of estimated distributions to generate at least an additional plurality of quality metrics, wherein each of the at least one of the plurality of quality metrics Corresponding to one of the at least one additional plurality of stacked pairs of estimated distributions generated, the at least one of the plurality of quality metrics is corresponding to one of the at least one of the plurality of stacked pairs of estimated distributions Generating a function of one of a width of the stacking estimate; by comparing one of the first plurality of quality metrics associated with the first measurement recipe with the at least one additional plurality associated with the at least one additional measurement recipe One of the quality measures is distributed to determine a program measurement recipe. In another aspect, a method can include, but is not limited to, obtaining a metric measurement signal from one or more of one of the plurality of wafers or one of the plurality of fields; The obtained metric measurement signal uses a plurality of overlay algorithm to determine a plurality of stacked pair estimates, and each stack pair estimate is determined by using one of the equal stack algorithms; using the complex stack pair estimate Generating a stack of estimated distributions; and utilizing the generated overlap estimate 163677.doc 201245906 to generate a quality metric of the one or more metrology targets, the quality metric being one of the widths of the generated distribution estimates a function that is configured to be non-zero in the case of an asymmetric stack-to-measurement signal, the quality measure being a function of one of the widths of the generated stack-to-estimate distribution 'the quality metric step-step exists The measure obtained from an associated metrology target measures a function of the asymmetry in the measured signal. A method of computer implementation for providing a set of processing tool correctable values is not disclosed. In another aspect, a method can include, but is not limited to, widely acquiring one of a plurality of metrology targets across one or more of a plurality of wafers in a batch of wafers. a result; obtaining a quality metric associated with each of the acquired overlay metrics; using the acquired overlay metric result of each metric target and the associated quality metric result to determine one of each metric target Modifying the overlay value, wherein the modified overlay value for each metrology target varies with at least one material parameter factor; computing a plurality of material parameter factors a set of correctable values and a set of residuals corresponding to the set of correctable values; Determining a value of a material parameter factor suitable for at least substantially minimizing the set of residuals; and identifying a set of correctable values associated with the at least substantially minimized group residual. Revealing a method for identifying a processing tool that is correctable a method of computer variability in one of the values. In one aspect, the method may include (but is not limited to): obtaining a wafer across the wafer - or One of a plurality of metrology targets of each of the plurality of metrology targets is a pair of weights and weights; a quality metric associated with each of the acquired overlays of the weights; and the acquired stack of each of the weights Determining a plurality of modified overlay values for the plurality of metrology targets by the weighting and weighting result and the quality function of the plurality of metrology targets; the quality function varies with the quality metric obtained for each of the weighting targets; A plurality of modified overlay values determine the set of processing calibratable values of the plurality of randomly selected samples obtained by the plurality of weighted and measured targets and the plurality of randomly selected samples of the associated quality metrics Generating a complex array processing tool to correct values, wherein each of the random samples has the same size; and identifying one of the correctable values of the complex array processing tool. A computer for generating a metrology sampling plan is not disclosed. Method of implementation. In one aspect, a method can include, but is not limited to, self-crossing a wafer in a batch of wafers The plurality of metrology targets of the one or more field distributions acquire a plurality of stacked pairs of metric measurement signals, each of the pair of metric measurement signals corresponding to one of the plurality of metrology targets; by each pair The metric measurement signal is applied to a plurality of stacked pairs to determine a plurality of stacked pairs of each of the plurality of stacked read reading signals, each of the pairwise estimates using the Manned Pair algorithm Determining from the plurality of weights and measures targets by using the plurality of stacked pairs of estimates: the plurality of stacked pairs of metrics measuring each of the measured signals (four) (four) > fabric to generate a plurality of stacked pairs of estimated distributions; The plurality of stacked pairs of estimated distributions are generated to generate a plurality of quality metrics, wherein each quality metric corresponds to one of the plurality of stacked pairs of estimated distributions, and each quality metric further exists in the central ό 4 a function that exists from one of the associated metrology targets, the asymmetry of the defending 詈, the defending h I« 占山重衡; and the use of the metric The target whine < produced by the first plurality of quality metrics 163677.doc 201245906 to generate one or more metrology sampling plan. Signature map) reveals a technique for providing a program map (process - method can include (but not target; computer-implemented method on a wafer. Limited in one aspect): formed on a mask a plurality of agents into a plurality of device-related objects; obtaining a first set of weights and measures results from the plurality of proxy targets after comparing a lithography process and before the first etching process of the wafer Determining, by the first plurality of proxy targets, at least one second set of metrology results from the plurality of proxy targets to determine a first program signature that varies with a location across the wafer; causing the first program signature to Specific program path correlation; measuring a device-related offset after the first etch process by performing a first set of metric measurements on the plurality of device-related targets of the wafer. An offset between a metrology structure and a device of the wafer; determining each additional processing layer that varies with the location of the wafer and one of each additional non-lithographic program path of the wafer An extra-envelope symbol; an additional device-related offset after each additional processing layer and each additional non-lithographic program path of the wafer and the use of the determined first button pattern and such Each of the additional characterization signatures and the first measurement device related offset and the first additional device related offset to generate a program map data library. A method for providing a semiconductor suitable for improvement A system of quality metrics in wafer fabrication. In one aspect, a system can include (but is not limited to) a metrology system configured to self-span one wafer of wafers A plurality of metrology targets of one or more field distributions of the circle obtain a plurality of pairs of metric measurement signals, and each stack of metrics measures the signal pair 163677.doc • 12· 201245906 should measure one of the plurality of weights and measures targets The target, the plurality of overlay metric measurement signals are obtained using a first measurement recipe; and a computing system configured to: apply a plurality of stack calculus calculations for each stack metric measurement signal a method for determining a plurality of stacked pairs of each of the plurality of stacked signals to measure the measured signal, each stacked pair of estimates being determined by using the equalized pair of algorithms; by using the plurality of The stackwise estimate produces a multiplicity of the plurality of pairs of metrics from the plurality of weights and measures (4) to produce a plurality of stacked pairs of estimated distributions; and using the generated plurality of stacked pairs to estimate The distribution is to generate a first plurality of quality metrics, wherein each of the product f metrics corresponds to the one of the plurality of stacked pairs of estimated distributions, and each of the quality metrics corresponds to the generated pairwise estimated distribution One of the width functions 'each quality metric step-step system exists in one of the asymmetry functions from one of the associated metrology targets to the metric measurement signal. It should be understood that the foregoing general description and the following details The present invention is to be construed as illustrative only and not restrictive. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are incorporated in the claims [Embodiment] Those skilled in the art can better understand the many advantages of the present invention by using the reference map. Reference will now be made in detail to the claims herein Referring generally to Figure 19, a method and system for providing quality control of a program control in a semiconductor wafer fabrication process is provided in accordance with the present invention. Stacking inaccuracy stems from a variety of factors. One such factor includes the presence of an asymmetric target structure (e.g., a bottom target layer or a top target layer) on one or more of a set of sampled overlay weights and targets. The presence of a stack-to-target asymmetry can result in geometric ambiguity in one of the given stack-to-target measurements. Geometry stack ambiguity can in turn lead to systematic error enhancement via nonlinear interaction with the stack pair metrology program itself. The net effect can result in a significant stacking inaccuracy (up to 10 nm). The present invention is directed to a method and system for providing a quality metric that is configured to quantize a stack misalignment associated with each stack of measured signals obtained from various metrology targets of a sampled semiconductor wafer. The invention further relates to utilizing the quality metric to improve program control via outlier selection and weighting recipe improvement or optimization. Further recognizing that after the quality metric generation and analysis, the metric measurement of the present invention can be used to calculate a correction value for correcting a processing tool associated with performing a given procedure on the semiconductor wafer. Known as "correctable value"). As used throughout this disclosure, the term "correctable value" generally refers to information that can be used to correct the alignment of a lithography tool or scanner tool to improve control of subsequent lithographic patterning relative to the overlay effect. In a general sense, the correctable value allows wafer processing to be performed within a predefined desired range by providing feedback and feedforward to improve processing tool alignment. As used throughout this disclosure, the term "weight measurement scenario" refers to a particular combination of a measure tool and a measure object. However, within a given 163677.doc •14·201245906 weights and measures scenario, there are a wide range of possible weights and measures that can be performed under the measurement measurement. The term "wafer" as used in the context of the present invention generally refers to a substrate formed from one-half of a conductor or a non-semiconductor material. For example, a semiconductor or non-semiconductor material can include, but is not limited to, single crystal, gallium antimonide, and indium distorted. The wafer may comprise one or more layers. For example, such layers can include, but are not limited to, a resist, a dielectric material, a conductive material, and a half conductive material. Many different types of such layers are known in the art, and the term wafer as used herein is intended to encompass one of the layers on which all types of layers can be formed. Typical semiconductor programs include wafer processing in batches. As used herein, a "batch" is a group of wafers that are co-processed (e.g., a group of 25 wafers). Each of the wafers in the batch consists of a number of exposure fields from lithography processing tools (e.g., 'stepper, scanner, etc.). Within each field there may be a functional unit in which the multi-grain grain system eventually becomes a single wafer. On the product wafer, the overlay pair of metrology targets are typically placed in the scribe line (for example, placed in the four corners of the field). This system typically does not have an area of circuitry around the perimeter of the exposure field (and outside the die). In some instances, 'putting the overlay target in the deep etched region of the region between the dies rather than the perimeter of the field, β placing the stack on the product wafer in the main grain region Quite rare 'this is because the circuit urgently needs this area. However, 'engineered and characterized wafers (non-product wafers) typically have many overlapping targets throughout the center of the field that do not involve such limitations. One or more layers formed on a wafer may be patterned or unpatterned. For example, a wafer may comprise a plurality of grains, each of which has repeatability Patterned features. The formation and processing of such material layers can ultimately result in a complete device. Many different types of devices can be formed on a wafer, and the term wafer as used herein is intended to encompass a wafer on which any of the types of devices known in the art are fabricated. 1A and 1B illustrate cross-sectional views of a symmetric metrology target and an asymmetry weighing target. It is recognized that the metrology target of Figures 1A and 1B can include a first layer (e.g., processing layer) target structure and a second layer (e.g., anti-surname layer) target structure. For example, as shown in FIG. 1a, the overlay metrology target 1〇〇 may include a processing layer structure 1〇4 and a corresponding anti-reagent layer target structure 102. In addition, due to the symmetrical nature of the metrology target 1 ' 'and thus the first layer (eg, processing layer) target 104 and a second layer (eg, 'resist layer) target associated with the stack of 1 〇 6 good A well-defined 1〇2. In this respect, there is no ambiguity in the measure of the pairwise measure corresponding to one of the idealized weights and measures targets. In contrast, Figure 1B illustrates a non-ideal metrology target 11 that includes one of the target structures 112 having an asymmetry. In this sense, target 11A includes a symmetric processing layer target structure 114 and an asymmetric resist layer target structure 112. The asymmetry in the resist layer target structure 丨丨 2 is due to the unequal corner angles 116 & and 116] 3 of the target structure 112 (ie, the left wall angle 116a is 90. and the right wall angle 116b is not equal to 90. ) formed. Therefore, the treatment layer structure n4 of the target 110 has a well-defined symmetry center, and the resist layer structure 112 of the target 110 does not have a well-defined symmetry center. This symmetry difference between the two layers in turn forms one of the geometric ambiguities in the resist layer structure 112. For example, the stacked pairs defined with respect to the top 118a of the resist layer structure ι ΐ 2 163 677.doc • 16 - 201245906 are different from the overlapping pairs defined with respect to the bottom portion 118b of the resist layer structure. This ambiguity associated with the asymmetric resist layer structure 112, in turn, forms a stack 116 that is not well defined. It is further noted that if a given metric measurement tool is sensitive to the asymmetry of the overlay mark, the presence of asymmetry (such as the asymmetry depicted in Figure IB) may result in an increase in the measured signal. Symmetry, resulting in stack-to-measure inaccuracy. It is well known in the art that the metrology tool settings can affect the outcome of a metric measurement. In this regard, the measured overlay is not defined solely by an offset between the structures belonging to the layer in question. As a first example, when a different focus plane is selected, the measurement results can be systematically changed. As a second example, when a different illumination spectrum is utilized in the measurement, the measurement results can also be systematically changed (i.e., 'the illumination selection changes non-randomly). This equivalence can be attributed to at least two sources. The first source is related to the weighting target itself. For example, as shown in Figure 2, if the target profile is asymmetrical, one of the offsets in the focus plane of the metrology system will produce a visible side offset in one of the weights and measures. In this way, the illumination associated with a first focus length F1 can strongly interact with the top surface of the top layer target structure 2〇2, while the illumination with a focus length F2 can interact strongly with the bottom surface of the top layer target structure 2〇2. . Thus, the overlay measurement 206 between a top structure 202 and the bottom structure 204 can include a corresponding stack of ambiguities 2〇8. Alternately 'as shown in Figure 3' if there is a layer with spectrally dependent absorption characteristics (such as, but not limited to, a polycrystalline germanium or carbon hard mask combined with one of the asymmetric target structures in the buried layer) The stacking pair can vary with the illumination spectrum 163677.doc 201245906. In this way 'according to the particular material in question and the incident illumination, the illumination associated with a first wavelength can only penetrate the layer of material to a first depth (~) n the illumination of the second wavelength can penetrate to another_ Depth (four). Due to this variation, different illuminations will interact with the underlying target structure 304 in different ways. In this regard, the overlay measurement 306 between a top structure 3〇2 and the bottom structure 3〇4 can include a corresponding stack of ambiguities 3〇8. As discussed in further detail herein, one aspect of the present invention provides a system and method suitable for identifying a set of parameters that optimize or at least improve the overlay measurement results of a measurement formulation. It is noted that even if the metrics are systematic, the system name is perfect and does not induce a system offset of the metric result or any other form of systematic bias. One of the most important additional target-related properties in the scatterometry is related to the fact that more than one single cell is performing a metric on the metric target. The weighted ambiguity associated with & cell and crystal stagnation variability is also estimated by the methods described herein. Sources of illumination asymmetry may include, but are not limited to: 0 sidewall asymmetry of the previous layer and the current layer; (1) the height difference between the current layer and the previous layer, iii) the measured layer below The difference in height between the intermediate layers between the layers; iv) the variation due to local defects. The following is a theoretical explanation of the accuracy of the asymmetry-induced stacking. In the case of imaging-based stack-to-weight measurement, the portion of a collected image corresponding to the target layer with asymmetry can be written as: image 2m, 2m (χ~ΟΡΖ) (Equation 1) where ~α+Ι, +1+1,... corresponds to the amplitude of the difference of the electric field of the signal used to form the image 163677.doc -18- 201245906, and nine, nine, ... correspond to the phase of the signal used to form the image. The assumption of signal symmetry can be expressed as: For each n, a + n = amn Due to the geometric center of the phase determination signal of the electric field (Equation 2), the destruction of phase symmetry corresponds to a geometric overlap pair ambiguity. In addition, the destruction of the symmetry of the amplitudes & and ^ results in an overlay inaccuracy that exceeds the geometric ambiguity. For example, where the majority of the measurement error is from the first diffraction order, the overlap inaccuracy Δ is expressed as:

Φ*\ ~Φ~\ -Λ- CC · a+i ~a-i a+] + Λ-1 (方程式3) 其中α隨與度量衡組態相關聯之一或多個材料參數(例如, 波長、焦點、照明角度及諸如此類)而變化。方程式3中之 母項表示幾何歧義。預期對於適合之疊對目標設計,可 達成小於1 nm之一幾何歧義。另外,方程式3之第二項表 示與所給定度量衡技術對疊對目標不對稱性之敏感度相關 聯之額外不準確度。對於某些材料參數,a可取達1〇之 值,在此情況下方程式3之第二項產生達或大小5 nm之疊 對不準確度。 出於簡化之目的,上文設定在疊對目標之僅一個層(例 如,處理層或抗蝕劑層)中存在所給定疊對目標之不對稱 性。進一步設定目標結構實際上係週期性的,其具有p之 一週期。然而,認識到,可在其中在這兩個目標層中存在 不對稱性且該目標係非週期性之情況下達成類似結果。 在基於繞射之疊對(DBO)度量衡之情況下,疊對標記由 163677.doc -19- 201245906 若干光柵上光柵結構組成,根據上文所述之假設,該等光 栅上光栅結構中之一者係對稱的且另一者係不對稱的。認 識到,該疊對可自計算為第+1個繞射級與第_丨個繞射級之 間的差之一信號擷取。此差動信號可表示為: 2λι· 信號l〇c 丨切+1.〇,〜7(⑽+。伽)+ (方程式4) -+ W吣。伽)+...2 其中%表示來自由來自不對稱光柵之第„個繞射級及來自 對稱光柵之第m個繞射級組成之光柵上光柵標記之第(rt + w) 個繞射級之振幅。如同基於成像之疊對度量衡一樣,在其 中信號誤差之大部分由來自不對稱光柵之第一繞射級而引 起之情況下’不準確度呈以下形式: P ( Φ*\.〇 ~Φ-\Λ 2^\ 2Φ*\ ~Φ~\ -Λ- CC · a+i ~ai a+] + Λ-1 (Equation 3) where α is associated with one or more material parameters associated with the metrology configuration (eg, wavelength, focus, The angle of illumination and the like vary. The parent term in Equation 3 represents geometric ambiguity. It is expected that for a suitable stack-to-target design, one geometric ambiguity of less than 1 nm can be achieved. In addition, the second term of Equation 3 represents the additional inaccuracy associated with the sensitivity of the given metrology technique to the target asymmetry. For some material parameters, a can take a value of 1〇, in which case the second term of Equation 3 produces a stacking inaccuracy of 5 nm or 5 mm in size. For the sake of simplicity, the above set asymmetry of a given stack pair target in only one layer of the overlay target (e. g., the handle layer or the resist layer). Further setting the target structure is actually periodic, which has a period of p. However, it is recognized that similar results can be achieved in the case where there is asymmetry in the two target layers and the target is non-periodic. In the case of a DBO based metrology, the overlay pair consists of a number of grating-on-grid structures, according to the assumptions described above, one of the grating structures on the gratings. The ones are symmetrical and the other are asymmetric. It is recognized that the stack can be self-calculated as one of the differences between the +1st diffraction order and the _th diffraction stage. This differential signal can be expressed as: 2λι· signal l〇c 丨切+1.〇,~7((10)+. 伽)+ (Equation 4) -+ W吣.伽)+...2 where % represents the (rt + w) diffraction from the grating mark on the grating consisting of the πth diffraction order from the asymmetric grating and the mth diffraction stage from the symmetrical grating The amplitude of the stage. As with the imaging-based stack-to-weight measurement, where the majority of the signal error is caused by the first diffraction order from the asymmetric grating, the inaccuracy is in the form: P ( Φ*\. 〇~Φ-\Λ 2^\ 2

(方程式5) 其中α重新相依於與度量衡組態相關聯之一或多個材料參 數(例如,波長、焦點、照明角度及諸如此類)。此處,第 一項亦對應於預期在一精心設計之疊對標記情況下小於i nm之幾何歧義》第二項決定超過該歧義之不準確度。在 DBO度量衡之情況下’第二項可達到達或大於1〇 nm之振 幅*注意到,在一般意義上,與成像疊對度量衡相比較, DBO度量衡可對疊對標記不對稱性更敏感。本文中認識 到,此可歸因於在基於成像之疊對度量衡之情況下在一更 廣泛之波長及角度範圍上平均所量測信號之事實。由於不 163677.doc •20· 201245906 同之波長及角度驅策不同之不準確度,因而該平均起作用 以在統計上降低所觀察到之不準確度。 圖4A及圖4B圖解說明照明波長及不對稱角度對一目標 之所量測疊對之影響。如圖4A中所示,在對稱目標之情況 下,照明波長對所量測波長之偏差沒有影響。相比之下, 如圖4B中所示,照明波長在家庭用水之情況下對所量測疊 對有巨大影響* 圖5圖解說明用於提供適合於改良一半導體晶圓製作程 序中之程序控制之一品質度量之一系統500。在一項實施 例中,系統500可包含一度量衡系統5〇2,諸如經組態以在 半導體晶圓506之經識別位置處執行疊對度量衡之一疊對 度量衡系統504。在另一實施例中,度量衡系統5〇2可經組 態以接受來自系統5 0 0之另一子系統之指令以便執行一指 定度量衡計劃。舉例而言,度量衡系統502可接受來自系 統500之一或多個計算系統5〇8之指令。在接收到來自計算 系統508之指令之後’度量衡系統502可在所提供指令中所 識別出之半導體晶圓506之位置處執行疊對度量衡。如稱 後將論述’由電腦系統508提供之指令可包含經組態以產 生與系統502之每一疊對量測相關聯之一或多個品質度量 之一品質度量產生程式演算法512。 圖6圖解說明根據本發明之一項實施例之品質度量產生 程序之一概念性圖解。品質度量產生程序600可包含對一 或多個所獲取之(例如,使用一相關聯之度量衡工具所獲 取之)之度量衡信號602應用N數目個疊對演算法604(例 163677.doc 201245906 如疊對廣算法1、疊對演算法2及疊對演算法3)以便計算 N個疊對估計(例如1對估計t、疊對估計2及疊對估計 3)。然後,基於此等所計算出之疊對估計之跨度及分佈, 可產生一晶圓之每一所取樣度量衡目標之一品質度量 6〇8 »在這個意義上,針對每一疊對度量衡目標所獲得之 。口質度量608係隨該組所應用疊對演算法而變化之疊對結 果之變異之一量度或估計。 本文中注意到,本發明之品質度量提供對一給定度量衡 目標之一相關聯之疊對結果之準確度之一定量評估。在這 個意義上,一晶圓之一度量衡目標之每一疊對值伴隨著與 討論中之目標之特定疊對量測之準確度有關之一對應之品 質度量。進一步預期,本發明之品質度量可適用於所有成 像度量衡目標,諸如(但不限於)BiB、AIM、BI〇ss〇m及多 層 AIMid。 重新參照圖5,在另一態樣中,注意到,品質度量產生 程式演算法512之結果可用於各種各樣的目的。在一項實 施例中,系統500可包含一疊對量測配方最佳化程式514。 疊對量測配方最佳化程式514係一演算法,其經組態以利 用本發明之該組所產生品質度量作為一輸入來計算一最佳 或經改良疊對量測配方。就此而言,疊對量測配方最佳化 程式514可利用自該組所量測度量衡目標獲取之多組品質 度量來判定最佳化疊對準確度之度量衡量測配方(例如, 照明波長、濾光組態、偏振組態、照明角度及諸如此 類)。進一步認識到,可對該批晶圓中之同一晶圓或其他 163677.doc •22· 201245906 晶圓上之後續疊對量測實施配方最佳化程式演算法514之 結果。在這個意義上,可將經改良或經最佳化度量衡配方 (使用配方最佳化程式5 14計算出)回饋至度量衡系統5〇2。 本文中將進一步更詳細論述使用本發明之所產生品質度量 之配方最佳化。 在另一實施例中,系統500可包含一度量衡目標離群值 移除程式516 »度量衡目標離群值移除程式516係一演算 法,其經組態以利用本發明之該組所產生品質度量作為一 輸入來識別並移除離群值度量衡目標。就此而言,離群值 移除程式516可識別具有大的品質度量值之度量衡目標, 且因此大的疊對不準確度,並出於後續處理工具可校正值 計算之目的而將其忽略。應認識到,在可校正值計算中對 離群值目標之移除係有利的,因為其在可校正值計算中更 著重於具有更大準確度之彼等目標,從而改良可校正值計 算。本文中將進一步更詳細論述使用本發明之所產生品質 度量之度量衡目標離群值移除。 在另一實施例中,系統5〇〇可包含一取樣計劃產生程式 519。取樣計劃產生程式519係—演算法,其經组態以利用 本發明之所產生品質度量作為一輸入來產生一或多個疊對 度量衡取樣計劃。就此而言,取樣計劃產生程式519形成 允許賦予經識別高品質目標較大加權且賦予低品質度量衡 目標較小加權之取樣計劃,諸如二次取樣計劃。在另一態 樣中,取樣計劃產生程式5 19可形成藉由增大對一群組之 經識別低品質目標之取樣率來減輕低品質目標之存在之一 163677.doc -23· 201245906 取樣計劃。本文中將進一步更詳細論述使用本發明之所產 生品質度量之度量衡取樣計劃產生。 在另一實施例中’系統500可包含一可校正值產生程式 518。可校正值產生程式518係一演算法,其經組態以使用 所產生品質度量來產生一或多組處理工具可校正值。注竞 到’由電腦系統5 0 8計算出之可校正值隨後可回饋至系統 500之一處理工具,諸如一掃描機工具或微影工具。進一 步注意到,可校正值產生程式518可利用本發明之其他分 析常式之輸出來計算一組處理工具可校正值。舉例而言, 本發明之可校正值產生程式518可在計算該組處理工具可 校正值之前利用離群值移除演算法516之輸出。本文中將 進一步更詳細論述處理工具計算。 攻夕個電腦系統508可經 在一項霄施例中 -----w V從观艰从仿 收在對-批晶圓中之一或多個晶圓之一取樣程序中由度量 衡系統502(例如,辱斜许县&amp;么“ 登對度量衡系統504)執行之一組量浪 值H多個電腦系統_可進-步經組態以使用自讀 取樣程序接收到之量測值來計算或識別品質度量、一 =最t化量測配方、一組高值目標(亦即,識別離群值目 ::了=值計算移除)或-組處理工具可校正值。, 之處 個電腦系統508隨後可將指令傳輸至一㈣ :理具(例如,掃描機工具或微影以調 理工具。另一選擇為及/ 該系統之-或多個處理::電腦系統508可用於監, 佈之殘差超過-預定㈣。在這個意義上’在-福 準之情況下’電腦系統508可食j 163677.doc -24- 201245906 「未通過」該批晶圓。進而,可能「再加工」該批晶圓。 應認識到,上文及貫穿於本發明之其餘部分所闡述之步 驟可由一單個電腦系統508或(另一選擇為)多個計算系統 5〇8實施。此外,系統5〇〇之不同子系統(諸如度量衡系統 5〇2)可包含適合於實施上文所闡述之步驟之至少一部分之 一計算系統。因此,上文說明不應視為對本發明之一限制 而僅為一舉例說明。 在另一實施例中,一或多個電腦系統5〇8可將指示來自 於本文中所闡述之程序中之任何一者之一組處理工具可校 正值之指令傳輸至一或多個處理工具。此外,一或多個電 腦系統508可經組態以執行本文中所闡述之方法實施例中 之任一者之任一(任何)其他步驟。 在另貫施例中,電腦系統5 0 8可以此項技術中所習知 之任一方式通信地耦合至度量衡系統502或另一處理工 具。舉例而言,該一或多個電腦系統5〇8可耦合至一度量 衡系統502之一電腦系統(例如,一疊對度量衡系統5〇4之 電腦系統)或耦合至一處理工具之一電腦系統。在另一實 例中,度量衡系統502及一處理工具可由一單個計算系統 控制。以此方式,系統5〇〇之計算系統5〇8可耦合至一單個 度量衡-處理工具電腦系統。此外,系統5〇〇之該一或多個 計算系統508可經組態以藉由可包含有線部分及/或無線部 分之一傳輸媒體自其他系統接收及/或獲取資料或資訊(例 如,來自一檢驗系統之檢驗結果、來自另一度量衡系統之 度量衡結果或自諸如KLA-Tencors ΚΤ分析器之一系統計算 163677.doc •25- 201245906 出之處理工具可校正值以此方式,該傳輸媒體可充當 計算系統508與系統500之其他子系統之間的一資料鏈路。 此外’計算系統5 〇 8可經由一傳輸媒體將資料發送至外部 系統。例如,電腦系統508可將所計算出之品質度量、處 理工具可校正值、經最佳化量測配方發送至獨立於所述系 統500之外存在之一單獨的度量衡系統。 計算系統508可包含(但不限於)一個人電腦系統、大型 電腦系統、工作站、影像計算機、平行處理器或此項技術 中所習知之任一其他裝置。一般而言,術語「電腦系統」 可廣義疋義為囊括具有執行來自一記憶體媒體之指令之一 或多個處理器之任一裝置。 實施諸如本文中所闡述之彼等方法之方法之程式指令 5 10可藉由載體媒體520傳輸或儲存於載體媒體上。該載體 媒體可係一傳輸媒體,諸如一導線、纜線或無線傳輸鏈 路。該載體媒體亦可包含諸如一唯讀記憶體、一隨機存取 記憶體、一磁碟或光碟或一磁帶之一儲存媒體。 圖5中所圖解說明之系統5〇〇之實施例可如本文中所閣述 進一步經組態。另外,系統500可經組態以執行本文中所 闡述之該(該等)方法實施例中之任一者之任一(任何)其他 步驟。 圖7 Α係圖解說明在用於提供適合於改良一半導體晶圓製 作程序中之程序控制之一品質度量之一方法7〇〇中所執行 之步驟之一流程圖。在一第一步驟702中,可使用一第一 選定量測配方自跨一批晶圓中之一晶圓之一或多個場分佈 163677.doc -26- 201245906 之複數個度量衡目標獲取複數個疊對度量衡量測信號。在 這個意義上’可針對該複數個度量衡目標中之每一度量衡 目標獲取一度量衡量測信號。在-項實施例中’一度量衡 程序可量測跨一批晶圄ώ ^ 圓中之一晶圓之一或多個場分佈之複 數個目標之一或多個胜^ 1固特性(例如,疊對誤差)。在另一實施 例中,可利用本文中先前所閱述之系統5〇〇之度量衡系統 502(例如,疊對度量㈣統綱)來獲取該—個或多個度量 衡信號。以此方式,开c丄 ^ ,, σ、-i由一資料鏈路(例如,有線或盔 線信號)將使用度量銜έ ^ ^ ·”' 衡系統502獲取之度量衡信號傳輸至外 算系統508 » 在一項實施例中,方法 石去700包含在至少一個批次之 中之一或多個晶圓卜+夕,&amp; 圓上之夕個量測地點處對該一或多 執行該等疊對度量沲县… 日日圓 度量衡量測。如圖7B及圖7C中所示,談黧 量測地點可包含—赤之加n m °〆寸 戍多個明圓506上之一或多個場752。 例而言,如圖7Β Φ 。r-· 國β中所不,晶圓506包含形成於其上 個場752。儘營圖7PllbH 歿數 僅管圖7B中展示晶圓5〇6上之特定數目及 場752,Y日曰《 -昍圓上之場之數目及配置可依據(舉例而言 於晶圓上之裝晉1 752虚及/ 而變化。可在形成於晶圓506上之多個場 至少一第一批中之其他晶圓上之多個場處執行 浪可對形成於該等場中之裝置結構及/或形 射之料結構執行量測。另外,在該等場中之每1 = 之t測可包含在該度量衡程序期間執行之所有量測 列,一或多個不同量測)。 、 另實施例中,在一取樣程序中量測之所有量測地點 163677.doc •27. 201245906 可匕3 疋批中之晶圓之每一所量測場内之多個目標。 舉例而5,如圖7C中所示,形成於一晶圓506上之場752可 包含複數個目標754。儘管圖78中展示場752中之特定數目 及配置之目標754,但場752中之目標754之數目及配置可 依據(舉例而言)形成於晶圓506上之裝置而變化。目標754 可包含裝置結構及/或測試結構。因此,在此實施例中, 可對形成於每一場752中之任意數目個目標754執行量測。 量測亦可包含在度量衡程序期間執行之所有量測(例如, 一或多個不同量測)。 在另一實施例中,該取樣步驟中所執行之量測之結果包 含涉及量測程序之變異之資訊。可以此項技術中所習知之 任一方式來判定量測之變異(例如,標準偏差、變異量等 等)由於量測之變異通常將指示程序或程序偏離之變 異,因而在一取樣步驟中所量測之批數目可依據程序或程 序偏離而變化。在此步驟中識別或判定之變異來源可包含 任何變異來源,包括(但不限於)疊對變異、晶圓之其他特 性之變異 '批與批變異、晶圓與晶圓變異、場與場變異、 側與側變異、變異之統計來源及諸如此類或其任一組合。 在一額外態樣中,可利用一第一選定量測配方自一晶圓 之一或多個度量衡目標獲取該一或多個度量衡信號。熟習 此項技術者將認識到,一度量衡配方可包含大量的參數選 擇。舉例而言,量測配方可包含(但不限於)照明波長、照 明角度、焦點、濾光片特性、偏振及諸如此類。在如本文 中將進一步更詳細闡述之本發明之進一步態樣中,可部分 163677.doc -28- 201245906 地利用由程序流程700所產生之品質度量結果來最佳化或 至少改良由系統500實施之度量衡配方。 適合於在本發明中實施之度量衡程序及系統大體闡述於 2008年4月22日提出申請之第12/1〇7,346號美國專利申請案 中’該申請案以引用方式併入本文中。 在一第二步驟7〇4中,可藉由對每一疊對度量衡量測信 號應用複數個疊對演算法來判定步驟3〇2之疊對度量衡量 測信號中之每一者之複數個疊對估計。 在一項態樣中,可對自晶圓5〇6之該選定複數個度量衡 目標中之每一者獲取之每一度量衡信號應用若干不同之演 算法以便判定每一度量衡信號之一疊對估計。舉例而言, 疊對估計演算法㈣可各自應用於自一晶圓之該組所量測 度量衡目標中之每-者獲取之每—信號,每—演算法計算 每一目標之-獨立疊對估計H態樣中,所實施演算 法中之每一者可經組態以提供一對稱信號之一精確對稱中 ^…、'而,在—信號係對稱之情況下,該複數個演算法中 之各種/寅算法可提供近似對稱中心之不同估計。在這個意 義上’具有—非零不對稱度之-度量衡目標將致使演算i L斯算所量測之每—目標之目標疊對之不同值。 組疊對估計產生來自每一度量衡目 之每一者之—疊對估計分佈來產生 就此而言,對於一晶圓之該所量測 在一第三步驟706中,可藉由利用在步驟704中可見之該 一度量衡目標之度量衡量測信號中(Equation 5) where α re-depends on one or more material parameters associated with the metrology configuration (eg, wavelength, focus, illumination angle, and the like). Here, the first term also corresponds to the geometric ambiguity that is expected to be less than i nm in the case of a well-designed overlay pair. The second item determines the inaccuracy of the ambiguity. In the case of DBO weights and measures, the second term can reach amplitudes greater than or equal to 1 〇. * Note that, in a general sense, DBO metrics can be more sensitive to overlay-symmetric asymmetry than imaging overlay metrics. It is recognized herein that this can be attributed to the fact that the measured signals are averaged over a wider range of wavelengths and angles based on the image-wise stack-to-weights. Since 163677.doc •20· 201245906 is not as accurate as the wavelength and angle drive, the average works to statistically reduce the observed inaccuracies. 4A and 4B illustrate the effect of illumination wavelength and asymmetry angle on a measured pair of targets. As shown in Figure 4A, in the case of a symmetric target, the illumination wavelength has no effect on the deviation of the measured wavelength. In contrast, as shown in Figure 4B, the illumination wavelength has a large impact on the measured stacking in the case of domestic water. Figure 5 illustrates the application of a program control suitable for improving a semiconductor wafer fabrication process. One of the quality metrics is one of the systems 500. In one embodiment, system 500 can include a metrology system 5〇2, such as a stack-to-weight system 504 configured to perform a stack-to-weight measurement at a identified location of semiconductor wafer 506. In another embodiment, the metrology system 5〇2 can be configured to accept instructions from another subsystem of the system 500 to perform a specified metrology plan. For example, metrology system 502 can accept instructions from one or more computing systems 5〇8 of system 500. Upon receiving an instruction from computing system 508, metrology system 502 can perform the overlay weights and measures at the location of semiconductor wafer 506 identified in the provided instructions. As will be discussed later, the instructions provided by computer system 508 can include a quality metric generation program algorithm 512 configured to generate one or more quality metrics associated with each stack measurement of system 502. Figure 6 illustrates a conceptual illustration of a quality metric generation procedure in accordance with an embodiment of the present invention. The quality metric generation program 600 can include applying N number of overlay algorithms 604 to one or more of the acquired metric signals 602 (e.g., obtained using an associated metrology tool) (eg, 163677.doc 201245906 as a pair) Wide algorithm 1, overlay pair algorithm 2 and overlay pair algorithm 3) to calculate N pairs of estimates (eg 1 pair estimate t, stack pair estimate 2 and stack pair estimate 3). Then, based on the calculated span and distribution of the stacked pairs, a quality metric of each of the sampled metrology targets of a wafer can be generated. 6 〇 8 » In this sense, for each stack of metrics Get it. The smear metric 608 is a measure or estimate of the variation of the result of the overlay as a function of the set of applied overlay algorithms. It is noted herein that the quality metric of the present invention provides a quantitative assessment of the accuracy of the overlay results associated with one of a given metrology target. In this sense, each stack value of one of the weights of a wafer is accompanied by a quality metric corresponding to one of the accuracy of the particular stack-to-measurement of the target under discussion. It is further contemplated that the quality metrics of the present invention are applicable to all imaging metrology targets such as, but not limited to, BiB, AIM, BI 〇ss 〇 m, and multi-layer AIMid. Referring again to Figure 5, in another aspect, it is noted that the results of the quality metric generation program algorithm 512 can be used for a variety of purposes. In one embodiment, system 500 can include a stack of measurement recipe optimization programs 514. The overlay pair measurement recipe optimization program 514 is an algorithm configured to calculate an optimal or modified overlay measurement recipe using the set of quality metrics of the present invention as an input. In this regard, the overlay pair measurement recipe optimization program 514 can utilize a plurality of sets of quality metrics obtained from the set of measured metrology targets to determine a measure of the accuracy of the overlay accuracy (eg, illumination wavelength, Filter configuration, polarization configuration, illumination angle and the like). It is further recognized that the results of the recipe optimization algorithm algorithm 514 can be implemented for subsequent stacking measurements on the same wafer or other 163677.doc • 22·201245906 wafers in the batch of wafers. In this sense, the modified or optimized metrology recipe (calculated using the recipe optimization program 5 14) can be fed back to the metrology system 5〇2. Formulation optimization using the resulting quality metrics of the present invention will be discussed in further detail herein. In another embodiment, system 500 can include a metrology target outlier removal program 516 » a metrology target outlier removal program 516 is an algorithm configured to utilize the quality of the set of the present invention. The metric acts as an input to identify and remove outliers. In this regard, the outlier removal program 516 can identify metrology targets having large quality metrics, and thus large overlay inaccuracies, and ignore them for subsequent processing tool correctable value calculation purposes. It will be appreciated that the removal of the outlier target in the correction of the correctable value is advantageous because it focuses more on the target with greater accuracy in the correction of the correctable value, thereby improving the correctable value calculation. The weighted target outlier removal using the quality metrics produced by the present invention will be discussed in further detail herein. In another embodiment, system 5A can include a sampling plan generation program 519. The sampling plan generation program 519 is an algorithm configured to generate one or more stacked versus metrology sampling plans using the generated quality metrics of the present invention as an input. In this regard, the sampling plan generation program 519 forms a sampling plan, such as a sub-sampling plan, that allows for a greater weighting of the identified high quality targets and a lower weighting of the low quality weighting targets. In another aspect, the sampling plan generation program 5 19 can form one of the reduced low quality targets by increasing the sampling rate for a group of identified low quality targets. 163677.doc -23· 201245906 Sampling Plan . The metrology sampling plan generation using the quality metrics produced by the present invention will be discussed in further detail herein. In another embodiment, system 500 can include a correctable value generating program 518. The correctable value generation program 518 is an algorithm configured to generate one or more sets of processing tool correctable values using the generated quality metrics. It is noted that the correctable value calculated by computer system 508 can then be fed back to one of system 500 processing tools, such as a scanner tool or lithography tool. It is further noted that the correctable value generation program 518 can utilize the output of other analytical routines of the present invention to calculate a set of processing tool correctable values. For example, the correctable value generation program 518 of the present invention can utilize the output of the outlier removal algorithm 516 prior to calculating the set of processing tool correctable values. Processing tool calculations are discussed in further detail in this article. The computer system 508 can be implemented in an embodiment - wV from the distressed version of the sample system in one or more of the wafers in the counter-batch wafer by the metrology system 502 (for example, humiliation Xu County &amp; "Distance Weights and Measures System 504" performs a set of volatility values H multiple computer systems _ can be step-by-step configured to receive measurements using the self-reading sample program Value to calculate or identify quality metrics, one = most tatometric formula, a set of high value targets (ie, identify outliers:: = value calculation removed) or - group processing tool to correct values. Whereas a computer system 508 can then transmit instructions to one (four): a tool (eg, a scanner tool or lithography to condition the tool. Another option is and / or the system - or multiple processes:: computer system 508 is available In the case of the supervisor, the residual of the cloth exceeds the predetermined (four). In this sense, 'in the case of - Fu Zhuan' computer system 508 edible j 163677.doc -24- 201245906 "failed" the batch of wafers. Further, may "Reprocessing" the batch of wafers. It will be appreciated that the steps set forth above and throughout the remainder of the invention may be by a single The brain system 508 or (alternatively selected) a plurality of computing systems 5〇8. Further, different subsystems of the system 5, such as the metrology system 5〇2, may comprise at least the steps suitable for implementing the steps set forth above. One of the parts is a computing system. Therefore, the above description should not be taken as limiting of one of the inventions but merely by way of example. In another embodiment, one or more computer systems 5〇8 may indicate from this document One of the set of procedures described is a set of processing tool readable values transmitted to one or more processing tools. Additionally, one or more computer systems 508 can be configured to perform the method implementations set forth herein. Any (any) other step of any of the examples. In other embodiments, computer system 508 can be communicatively coupled to metrology system 502 or another processing tool in any manner known in the art. For example, the one or more computer systems 5〇8 can be coupled to one of the computer systems of a metrology system 502 (eg, a stack of computer systems of the metrology system 5〇4) or coupled to one of the processing tools Brain system. In another example, the metrology system 502 and a processing tool can be controlled by a single computing system. In this manner, the computing system 5〇8 of the system can be coupled to a single metrology-processing tool computer system. The one or more computing systems 508 of the system 5 can be configured to receive and/or retrieve data or information from other systems via a transmission medium that can include one of a wired portion and/or a wireless portion (eg, from a Test results from inspection systems, weights and measures from another metrology system, or from one of the systems such as KLA-Tencors® analyzer 163677.doc • 25- 201245906 Process tool correctable values in this way, the transmission medium can act as A data link between computing system 508 and other subsystems of system 500. In addition, the computing system 5 〇 8 can transmit data to an external system via a transmission medium. For example, computer system 508 can transmit the calculated quality metrics, processing tool correctable values, optimized measurement recipes to a separate metrology system that is independent of the system 500. Computing system 508 can include, but is not limited to, a personal computer system, a large computer system, a workstation, an imaging computer, a parallel processor, or any other device known in the art. In general, the term "computer system" can be used broadly to encompass any device having one or more processors that execute instructions from a memory medium. Program instructions 5 10 that implement methods such as those described herein may be transmitted or stored on the carrier medium by carrier medium 520. The carrier medium can be a transmission medium such as a wire, cable or wireless transmission link. The carrier medium may also include a storage medium such as a read only memory, a random access memory, a magnetic or optical disk, or a magnetic tape. The embodiment of the system 5 illustrated in Figure 5 can be further configured as described herein. Additionally, system 500 can be configured to perform any (any) other steps of any of the method embodiments set forth herein. Figure 7 is a flow chart illustrating one of the steps performed in a method 7 for providing one of the quality metrics suitable for improving program control in a semiconductor wafer fabrication process. In a first step 702, a first selected measurement recipe can be used to obtain a plurality of weights and targets from one of a plurality of wafers or a plurality of field distributions of 163677.doc -26-201245906. The overlay metric measures the measured signal. In this sense, a metric measurement signal can be obtained for each of the plurality of metrology targets. In an embodiment, a metrology program can measure one or more of a plurality of targets across one or more of a plurality of wafers in a batch of wafers (eg, Stacking error). In another embodiment, the weighting system 502 (e.g., overlay metric (4)) of the system 5 previously described herein may be utilized to obtain the one or more metric signals. In this way, the open c丄^, σ, -i are transmitted by a data link (for example, a wired or helmet line signal) to the external computing system using the metrology signal obtained by the metric system 502. 508: In one embodiment, the method stone 700 is included in the one or more of the at least one batch, and the one or more measurements are performed on the measurement point of the circle The equal-to-measure pair metrics... The daily metric measurement measures. As shown in FIG. 7B and FIG. 7C, the measurement location may include one or more of a plurality of bright circles 506. Field 752. For example, as shown in Fig. 7Β Φ.r-·National β, the wafer 506 is formed on the upper field 752. The graph 7PllbH is only shown in Fig. 7B. The specific number and field 752, Y 曰 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍 昍The plurality of fields in the plurality of fields are at least one of the plurality of fields on the other of the first batch of execution waves capable of forming a device structure and/or a shaped material structure formed in the fields In addition, every 1 = t test in the fields may include all of the measurement columns performed during the metrology procedure, one or more different measurements.) In another embodiment, one sample All measurement locations measured in the program 163677.doc •27.201245906 can be used to select multiple targets within each measurement field of the wafer in the batch. For example, 5, as shown in Figure 7C, is formed in Field 752 on a wafer 506 can include a plurality of targets 754. Although a particular number and configuration target 754 in field 752 is shown in Figure 78, the number and configuration of targets 754 in field 752 can depend on, for example, The device formed on wafer 506 varies. Target 754 can include device structures and/or test structures. Thus, in this embodiment, measurements can be performed on any number of targets 754 formed in each field 752. The measurements may also include all measurements performed during the metrology procedure (eg, one or more different measurements). In another embodiment, the results of the measurements performed in the sampling step include variations involving the measurement procedure Information. Can be used in this technology. Knowing any way to determine the variation of the measurement (eg, standard deviation, variation, etc.) because the variation in the measurement will usually indicate the deviation of the program or program deviation, so the number of batches measured in a sampling step can be based on The program or program varies from one to the other. The source of variation identified or determined in this step may include any source of variation, including (but not limited to) overlay variation, variation of other characteristics of the wafer 'batch and batch variation, wafer and crystal Circular variation, field-to-field variation, side-to-side variation, statistical sources of variation, and the like, or any combination thereof. In an additional aspect, a first selected measurement recipe can be utilized from one or more of a wafer The metrology target acquires the one or more metrology signals. Those skilled in the art will recognize that a metrology recipe can include a large number of parameter choices. For example, the measurement recipe can include, but is not limited to, illumination wavelength, illumination angle, focus, filter characteristics, polarization, and the like. In a further aspect of the invention as will be described in further detail herein, portion 163677.doc -28-201245906 may be utilized to optimize or at least improve implementation by system 500 using quality metric results generated by program flow 700. The weighting formula. </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; In a second step 7〇4, a plurality of stacked pairs of metrics can be determined by applying a plurality of overlapping pairs to each of the stacked metric measurement signals to determine a plurality of each of the stacked metric measurement signals of step 3〇2. Stacked pair estimation. In one aspect, a plurality of different algorithms can be applied to each of the weights and signals obtained from each of the selected plurality of metrology targets of the wafer 5〇6 to determine a stack-by-estimation estimate for each of the weights and signals. . For example, the overlay estimation algorithm (4) can each be applied to each of the signals acquired by the set of measured and measured targets from a wafer, and each algorithm calculates an independent stack of each target. In the estimated H-mode, each of the implemented algorithms can be configured to provide one of the symmetric signals in a precise symmetry [...], and in the case of a signal system symmetry, in the plurality of algorithms The various /寅 algorithms provide different estimates of approximate symmetric centers. In this sense, a metric with a non-zero asymmetry will result in a different value for each target of the target measured by the calculus. The stacking pair estimates are generated from each of the metric scales - a stack of estimated distributions to produce, for that matter, the measurement for a wafer in a third step 706 can be utilized by step 704 The measure of the weighted target measured in the measurement signal

163677.doc -29- 201245906 對估計分佈。就此方面,步驟706形成每一所量測度量衡 目標之一疊對估計分佈。本文中進一步注意到,幾何疊對 歧義連同疊對歧義增強表示為每一所分析度量衡信號之疊 對估計分佈之量值中之一擴展函數或跨度。就此方面,一 給定度量衡信號之疊對歧義越大則一相關聯之組疊對估計 (藉助步驟704之演算法1-N產生)之跨度或寬度就越大。 在一第四步驟708中,可產生複數個品質度量。在一項 態樣中,可利用程序700之步驟706中所產生之疊對估計分 佈來產生該複數複數個品質度量值。就此而言,使該等所 產生品質度量中之每一者與步驟7〇6之疊對估計分佈中之 一者相關聯。每一所產生品質度量隨一對應之疊對估計分 佈之寬度或跨度而變化且表示與自一給定度量衡目標獲取 之一給定信號相關聯之疊對歧義及不準確度之一量度戋估 計。在另一態樣中,步驟708之品質度量經組態以在一完 全對稱信號情況下為零,且與關聯於一給定不對稱信號之 -疊對不準確度成比例。注意到,為了使一對稱信號產生 零之一品質度量值,步驟704之疊對演算法令之每一者必 須經組態以產生彼㈣信號之同—叠對估計對每一叠 對度量衡目標所獲取之品質度量係隨該組所應用疊對演算 法而變化之叠對結果之不對稱性誘發變異之—量度或估 計。就此方面,對與自—或多個度量衡目標獲取之一组疊 對量測值相關聯之一或多個品質 *少〇口貞厪1值之一分析提供用於 力析不對稱性誘發疊對不準確唐「 圖 8A圖解說明根據本發明 之一疊對不準確度圖譜 圖 163677.doc 201245906 8Λ之晶圓圖譜800圖解說明相關聯之疊對信號之疊對不準 確度之方向及量值。在這個意義上,圖譜8〇〇中之箭頭之X 分量及Y分量分別對應於X疊對及γ疊對之不準確度。圖 圖解說明根據本發明之一實施例之所產生複數個品質度 量。注意到,圖8B之每一品質度量對應於該組所取樣度量 衡目標中之一度量衡目標。進一步注意到,品質度量分佈 或品質度量「雲端」在χ_γ方向上越廣闊,對應之疊對度 量衡量測就越不準確。如本文將進一步更詳細論述,用於 減小品質度量雲端之大小的方法及系統包含離群值移除及 配方最佳化。 在本發明之另一實施例中,可在實施品質度量產生程序 700之前針對系統偏移(t〇〇i induced shift ; TIS)校正自一組 所量測度量衡目標中之每一者獲取之疊對度量衡信號。此 係特別有利的,乃因本發明之品質度量經組態以偵測存在 於一所獲取之度量衡信號中之任何不對稱性,包括由度量 衡系統之光學件形成之不對稱性。因此,對於具有產生顯 著TIS之光學組件之一度量衡系統502,有利地首先對所獲 取之度量衡信號應用一 TIS校正,從而允許對目標誘發疊 對不準確度進行更準確評估。 圖9圖解說明繪示根據本發明之另一實施例之一額外程 序流程900之流程圖。程序流程9〇〇涉及利用程序7〇〇中所 產生之品質度量來識別一晶圓之一所取樣組度量衡目標中 之離群值度量衡目標。在步驟9〇2中,識別該複數個度量 衡目標中之一或多個離群值度量衡目標。就此而言,可識 163677.doc •31 · 201245906 別顯示顯著偏離所取樣目標中之其他度量衡目標之一分佈 之品質度量值之一品質度量之度量衡目標。例如,如圖8B 中所示,識別三個外圍品質度量值(如以圓圈分界)。此等 離群值品質度量值對應於該複數個所取樣度量衡目標中之 具有一高不對稱度(與非離群值目標相比)且因此一高疊對 不準確度之度量衡目標。本文中認識到,可以此項技術中 所習知之任一方式來實施對程序7〇〇中所產生之品質度量 分佈中之離群值之識別。在這個意義上,可使用任一定量 分析套件來識別度量衡目標離群值。此外,一度量衡目標 之一品質度量可由一使用者或經由以臨限值定義及分析常 式程式化之一統計分析套件自動地定義為一離群值。就此 而言,舉例而言,系統5〇〇可經程式化以基於如下自動地 識別離群值品質度量值:i)所取樣目標之品質度量之量值 超過一選定位準;或Π)最外圍品質度量值之一選定百分比 (例如,將最大10%的品質度量定義為外圍的)。在使用者 選擇之If況下,可將品質度量分佈(例如,圖犯之品質度 量分佈)顯示於系統500之一顯示裝置(未展示)上。然後, 使用者可手動選擇被認為是離群值之品質度量值。 在一第二步驟904中,可藉由排除步驟9〇2中所識別出之 離群值目標來產生-組經校正度量衡目標。就此而言,可 藉由自用於可校正值計算之度量衡目標移除步驟902之所 識別出之離群值度量衡目標來形成該組經校正度量衡目 標。 在一第三步驟906中 利用步驟904中所形成之該組經校 163677.doc •32· 201245906 正度量衡目標來計算-組處理工具可校正值。在這個意義 上,僅使用該組經校正度量衡目標中剩下之度量衡目標之 疊對資訊來計算該組疊對可校正值。在另一步驟中,可將 經由計算系統508所計算出之處理工具可校正值傳輸至一 以通彳s方式耦合之處理工具(例如,步進機或掃描機卜使 用疊對度量衡結果來計算處理工具(例如,步進機或掃描 機)可校正值大體闡述於2011年1月25日頒予且以引用方式 併入本文中之第7,876,438號美國專利中。 圖10圖解說明繪示根據本發明之另一實施例之一額外程 序流程1000之流程圖。程序流程1〇〇〇涉及利用程序7〇〇中 所產生之品質度量來識別一經改良疊對量測配方或一經最 佳化疊對量測配方》在一第一步驟丨〇〇2中,可利用至少一 額外量測配方來獲取來自該複數個度量衡目標之額外複數 個疊對度量衡量測信號。在一第二步驟丨〇〇4中,可藉由對 該至少額外複數個量測信號中之每一疊對量測信號應用該 複數個疊對演算法來判定該至少額外複數個疊對量測信號 中之每一者之至少額外複數個疊對估計。在一第三步驟 1006中,可藉由利用該複數個疊對估計產生來自該複數個 度量衡目標之該至少額外複數個疊對量測信號中之每一者 之一疊對估計分佈來產生至少額外複數個疊對估計分佈。 在一第四步驟1008中,可利用所產生之至少複數個疊對估 計分佈來產生至少複數個品質度量。在一第五步驟1〇1〇 中’可藉由比較關聯於第一量測配方之第一複數個品質度 量之一分佈與關聯於該至少一個額外量測配方之該至少額 163677.doc -33- 201245906 外複數個品質度量之-分佈來判定—經改良或經最佳化程 序量測配方。 就此而言,可藉由針對每一品質度量產生循環藉助不同 之目標量測配方多次執行該品質度量產生程序來找出一經 改良或可能最佳之疊對量測配方。舉例而言,在一第一循 環中,可使用使用一第一量測配方執行之一組疊對量測來 找出所取樣度量衡目標之品質度量。然後,在一第二德環 中’可使用使用一第二量測配方執行之一組疊對量測來找 出所取樣度量衡目標之品質度量,其中第二配方相對於第 一配方發生變化(例如’波長發生變化,焦點位置發生變 化’照明方向發生變化,及諸如此類)。然後,可將在每 一品質度量產生循環中所獲取之品質度量之多個分佈相互 比較以使識別產生最小品質度量分佈之量測配方。 圖11圖解說明使用一第一濾光片及一第二濾光片獲得之 一品質度量分佈。如由X-Y品質度量分佈中之較小空中分 佈所圖解說明,彩色濾光片2提供對應之疊對度量衡量測 之較小不準確度。因此,當在後續度量衡量測中在濾光片 1與濾光片2之間選擇時,使用濾光片2將提供增大之疊對 準確度及進而經改良處理工具可校正值。進一步認識到, 此程序可針對任意數目個配方參數(例如’波長、焦點位 置、照明方向、偏振組態、濾光片組態及諸如此類)以遞 增方式重複任意次數(例如,1、2、3或直至且包含N次反 覆)。 圖12A係圖解說明根據本發明之一實施例用於提供處理 163677.doc -34- 201245906 工具可校正值之一方法1200中所執行之步驟之一流程圖。 程序1200涉及基於程序7〇〇之所產生品質度量來計算一組 處理工具可校正值。在一第一步驟12〇2中,獲取跨一批晶 圓中之一晶圓之一或多個場分佈之複數個度量衡目標中之 每一度量衡目標之一疊對度量衡結果。在一項實施例中, 可藉由利用度量衡系統5〇2對度量衡目標執行一或多個疊 對度量衡量測來獲取複數個度量衡目標中之每一度量衡目 標之疊對度量衡結果。在一第二步驟12〇4中,可獲取與每 一所獲取之疊對度量衡結果相關聯之一品質度量。在一項 實施例中,可利用與貫穿於本發明所闡述之各種方法及實 施例相一致之一程序來產生該品質度量。就此方面,在獲 取該組量測度量衡量測中之每一者之度量衡結果之後,系 統500可s十算該專度量衡量測中之每一者之一品質度量。 在一第三步驟1206中,可判定利用每一度量衡目標之所 獲取之疊對度量衡結果及相關聯之品質度量結果之每—度 量衡目標之一經修改疊對值。在一項態樣中,每一度量衡 目標之經修改疊對值隨度量衡場景之至少一個材料參數因 數α(例如,相依於波長、焦點位置、照明角度及諸如此 類)而變化。舉例而言,該經修改疊對可寫為: (方程式6) 表示所量測疊 〇 以 accurate = 〇 打 meowed +/02 W) 其中OVLaccurate表示經修改疊對,〇vLmeasured 對’且/⑷从」表示相依於與該等度量衡目標中之每—者相 關聯之品質度量(QM)之品質函數。在一項實施例中,該品 163677.doc -35- 201245906 質函數可由相對於一材料參數因數α呈線性之一函數表 示。在此情況下,該經修改疊對可寫為:163677.doc -29- 201245906 The estimated distribution. In this regard, step 706 forms a stack-to-estimate distribution for each of the measured metrology targets. It is further noted herein that the geometric stack pair ambiguity, along with the stack ambiguity enhancement, is expressed as one of the magnitudes or spans of the magnitude of the estimated distribution of each of the analyzed metrology signals. In this regard, the greater the ambiguity of the stack of a given metrology signal, the greater the span or width of an associated stack pair estimate (generated by the algorithm 1-N of step 704). In a fourth step 708, a plurality of quality metrics can be generated. In one aspect, the complex plurality of quality metric values can be generated using the overlay pair estimate distribution generated in step 706 of routine 700. In this regard, each of the generated quality metrics is associated with one of the stacks of steps 7〇6 for an estimated distribution. Each generated quality metric varies with a corresponding stack of widths or spans of the estimated distribution and represents a measure of ambiguity and inaccuracy associated with a given signal from a given metrology target acquisition 戋 estimate . In another aspect, the quality metric of step 708 is configured to be zero in the case of a fully symmetric signal and is proportional to the overlap inaccuracy associated with a given asymmetric signal. It is noted that in order for a symmetry signal to produce a quality metric of zero, each of the overlay algorithms of step 704 must be configured to produce the same-to-multiply pair estimate of each of the pairs of weights and measures. The quality metric obtained is a measure or estimate of the asymmetry-induced variation of the results as a function of the stack-to-application algorithm applied by the set. In this regard, one of the one or more quality *minimum 贞厪1 values associated with one or more of the weighted target acquisitions is provided for analysis of the asymmetry induced stack FIG. 8A illustrates a wafer map 800 of a stacked pair inaccuracy map 163677.doc 201245906 according to the present invention, illustrating the direction and magnitude of the inaccuracy of the associated stack of pairs of signals. In this sense, the X and Y components of the arrow in the map 8〇〇 correspond to the inaccuracy of the X stack and the γ stack, respectively. The graph illustrates the multiple qualities produced in accordance with an embodiment of the present invention. Measure. Note that each quality metric of Figure 8B corresponds to one of the set of measured metric targets. It is further noted that the quality metric distribution or quality metric "cloud" is wider in the χ γ direction, corresponding to the pair of weights and measures The less accurate the measurement is. As will be discussed in further detail herein, methods and systems for reducing the size of a quality metric cloud include outlier removal and recipe optimization. In another embodiment of the present invention, a stack obtained from each of a set of measured metrology targets may be corrected for a system offset (TISi induced shift; TIS) prior to implementing the quality metric generation program 700. For weights and measures signals. This is particularly advantageous because the quality metric of the present invention is configured to detect any asymmetry present in an acquired metrology signal, including the asymmetry formed by the optics of the metrology system. Thus, for a metrology system 502 having one of the optical components that produce a significant TIS, it is advantageous to first apply a TIS correction to the acquired metrology signal, thereby allowing a more accurate assessment of the target induced overlay inaccuracy. FIG. 9 is a flow chart showing an additional program flow 900 in accordance with another embodiment of the present invention. The program flow 9 involves utilizing the quality metrics generated in the program 7 to identify outliers in the sampled metrology target of one of the wafers. In step 〇2, one or more outlier metric targets of the plurality of metric targets are identified. In this regard, it is known that 163677.doc •31 · 201245906 does not show a measure of the quality metric of one of the quality metrics that deviate significantly from the distribution of one of the other metrics in the sampled target. For example, as shown in Figure 8B, three peripheral quality metrics are identified (e.g., delimited by a circle). The eigenvalue quality metric corresponds to a metric target having a high degree of asymmetry (compared to a non-outlier target) and thus a high stack inaccuracy among the plurality of sampled metric targets. It is recognized herein that the identification of outliers in the quality metric distribution produced in the program 7 can be implemented in any manner known in the art. In this sense, any quantitative analysis suite can be used to identify the weighted target outliers. In addition, a quality metric of a metrology target can be automatically defined as an outlier by a user or via a statistical analysis suite programmed with a threshold definition and analysis routine. In this regard, for example, system 5〇〇 can be programmed to automatically identify outlier quality metrics based on: i) the quality metric of the sampled target exceeds a selected location; or Π) One of the peripheral quality metrics is selected as a percentage (for example, a quality metric of up to 10% is defined as a peripheral). The quality metric distribution (e.g., the quality metric distribution of the avatar) may be displayed on a display device (not shown) of system 500 in the case of the user selected. The user can then manually select a quality metric that is considered to be an outlier. In a second step 904, the set of corrected metrology targets can be generated by excluding the outlier target identified in step 9〇2. In this regard, the set of corrected metrology targets can be formed by the outlier value weighting target identified by the metrology target removal step 902 for the correctable value calculation. In a third step 906, the set of 163677.doc • 32· 201245906 positive metrology targets formed in step 904 is used to calculate the -group processing tool correctable value. In this sense, the set of stack-correctable values is calculated using only the stack-pair information of the set of quantified targets remaining in the set of corrected metrology targets. In another step, the process tool calibratable values calculated via computing system 508 can be transmitted to a processing tool coupled in a s mode (eg, a stepper or scanner using a stack of weights and measures results) The calibratable values of the processing tool (e.g., stepper or scanner) are generally set forth in U.S. Patent No. 7,876,438, issued on Jan. 25, 2011, which is hereby incorporated by reference. A flow chart of an additional program flow 1000 in accordance with another embodiment of the invention. The program flow 1 involves identifying a modified overlay pair measurement recipe or an optimized overlay using the quality metrics generated in the program 7〇〇 Measurement Formulation In a first step 丨〇〇2, at least one additional measurement recipe can be utilized to obtain an additional plurality of overlay metric measurement signals from the plurality of metrology targets. In a second step 丨〇〇 4, wherein the at least one additional plurality of pairs of measurement signals are determined by applying the plurality of overlay algorithms to each of the at least one additional plurality of measurement signals At least an additional plurality of stacked pairs of estimates for each of the at least one additional plurality of pairs of measurement signals from the plurality of metrology targets by using the plurality of stacked pairs of estimates Each of the stacked pairs of estimated distributions produces at least an additional plurality of stacked pairs of estimated distributions. In a fourth step 1008, at least a plurality of stacked pairs of estimated distributions may be utilized to generate at least a plurality of quality metrics. The fifth step 1 〇 1 ' can be distributed by comparing one of the first plurality of quality metrics associated with the first measurement recipe with the at least amount 163677.doc -33 associated with the at least one additional measurement recipe 201245906 Outer multiple quality metrics - distribution to determine - modified or optimized procedure to measure the formula. In this regard, the quality can be performed multiple times with different target measurement recipes by generating cycles for each quality metric The metric generation program finds an improved or possibly optimal stack-to-measurement recipe. For example, in a first cycle, a set can be performed using a first measurement recipe. The measurement is used to find the quality metric of the sampled and measured target. Then, in a second German ring, a stack measurement can be performed using a second measurement formula to find the quality of the sampled measurement target. a metric in which the second formulation changes relative to the first formulation (eg, 'wavelength changes, focus position changes' illumination direction changes, and the like). Then, the quality acquired in each quality metric loop can be generated The plurality of distributions of the metrics are compared to each other to identify a measurement recipe that produces a minimum quality metric distribution. Figure 11 illustrates the use of a first filter and a second filter to obtain a quality metric distribution, as measured by XY quality. The smaller air distribution in the distribution illustrates that the color filter 2 provides a smaller inaccuracy of the corresponding overlay metric measurement. Thus, when selected between filter 1 and filter 2 in subsequent metric measurements, the use of filter 2 will provide increased stacking accuracy and, in turn, improved processing tool correctable values. It is further recognized that this program can be repeated in any number of increments (eg, 1, 2, 3) for any number of recipe parameters (eg, 'wavelength, focus position, illumination direction, polarization configuration, filter configuration, and the like). Or up to and including N times). Figure 12A is a flow diagram illustrating one of the steps performed in method 1200 for providing a process 163677.doc -34 - 201245906 tool correctable value in accordance with an embodiment of the present invention. Program 1200 involves calculating a set of process tool correctable values based on the generated quality metrics of program 7. In a first step 12〇2, one of the plurality of metrology targets across one of the plurality of wafers or one of the plurality of field distributions is acquired for a stack-to-weight measurement result. In one embodiment, the stack-to-weight measurement results for each of the plurality of metrology targets can be obtained by performing one or more overlay metric measurements on the metrology target using the metrology system 5〇2. In a second step 12〇4, one of the quality metrics associated with each of the acquired overlay weights is obtained. In one embodiment, the quality metric can be generated using a program consistent with the various methods and embodiments set forth throughout the present invention. In this regard, after obtaining the weightedness results for each of the set of measurement metrics, the system 500 can calculate a quality metric for each of the specialized metrics. In a third step 1206, it may be determined that one of the scale-to-weights results obtained using each of the weights and measures and the associated quality-measurement result of the associated quality-measurement result is modified by the overlay value. In one aspect, the modified overlay value for each metrology target varies with at least one material parameter factor α of the metrology scene (e.g., dependent on wavelength, focus position, illumination angle, and the like). For example, the modified overlay can be written as: (Equation 6) indicates that the measured stack is accurate = beat meowed +/02 W) where OVLaccurate represents the modified overlay, 〇 vLmeasured for 'and / (4) from Represents a quality function that is dependent on the quality metric (QM) associated with each of the weighting targets. In one embodiment, the product 163677.doc -35 - 201245906 prime function may be represented by a linear function with respect to a material parameter factor a. In this case, the modified overlay can be written as:

^accurate = ^measured ^QM (方程式7) 其中(X重新表示材料參數因數,其中QM表示所計算出之品 質度量或本發明之疊對量測中之每一者β本文中認識到, 方程式7之上述品質函數並非係限制性的且僅應視為說明 性的。預期品質函數/〈ρΜ)可呈各種各樣的數學形式。 在一第四步驟1208中,可計算複數個材料參數因數之一 可校正值函數及對應於該可校正值函數之一組殘差。就此 而言,可改變參數α且可針對α值計算與每一可校正值函數 相關聯之殘差。在另一態樣中’可執行此項技術中所習知 之任一類型之可校正值函數以便擬合OVLaecurate。例如, 該可校正值函數可包含一線性或更高階可校正值函數。利 用此項技術中所習知之可校正值函數中之一或多者,可羞 生系列可校正值函數(每_ α值一個)。舉例而言,可針 對α!、Α、h及直至且包含αΝ計算一可校正值函數及對應 之殘差。用於計算校正值之函數大體闡述於2011年1月25 曰頒予之第7,876,438號美國專利中,該專利以引用方式全 文併入本文中。 在第五步驟1210中,判定適合於使該組殘差至少實質 最小化之材料參數因數之一值。就此而言,可分析與 α丨…αΝ中之每一者相關聯之殘差以判定產生最小疊對殘差 位準之。舉例而言,圖11圖解說明繪製針對若干α值中 163677.doc -36- 201245906 之每一者計算出之來自步驟1208之一組殘差值之一曲線圖 1220連同對應之趨勢線1222。如在圖11中所觀察到,對於 該組給疋殘差’近似-3.66之一 α值產生給定度量衡場景之 最小殘差值》 在步驟1212中,可識別與該至少實質最小化組殘差相關 聯之該組可校正值。舉例而言,為說明步驟121〇中所提供 之殘差最小化’可使用相對於α最小化之殘差來計算一組 可校正值。進一步期望可在分析該批晶圓中之後續晶圓期 間應用步驟1210中所識別出之α。 在另一實施例中,可將步驟1212中所產生之該組可校正 值傳輸至一或多個處理工具(例如,步進機或掃描機)。在 一額外態樣中,可在分析之前對該所獲取複數個疊對度量 衡量測信號應用一 TIS校正程序以做便減小存在於該等信 號中之TIS誘發不對稱性。 圖13係圖解說明在用於識別處理工具可校正值之一變異 之一方法1300中所執行之步驟之一流程圖。在步驟13〇2 中,可獲取跨-批晶圓中之一晶圓之一或多個場分佈之複 數個度量衡目標中之每-度量衡目標之—疊對度量衡結 果。在一項實施例中,可藉由利用度量衡系統502對該等 度量衡目標執行一或多個疊對度量衡量測來獲取複數個度 量衡目標中之每一度量衡目標之疊對度量衡結果。 在步驟1304中,獲取與每-所獲取之疊對度量衡結果相 關聯之一品質度量。在一項實施例中,可利用與貫穿於本 發明所闡述之各種方法及實施例相一致之—程序來產生該 163677.doc -37- 201245906 品質度量。就此方面,在獲取該組量測度量衡目標中之每 一者之度量衡結果之後,系統500可計算該等度量衡量測 中之每一者之一品質度量。 在步驟1306中,判定利用每一度量衡目標之所獲取之疊 對度量衡結果及一品質函數之該複數個度量衡目標之複數 個經修改疊對值。在一項態樣中,該品質函數隨每一度量 衡目標之所獲取之品質度量而變化。在一項實施例甲,步 驟1306之經修改疊對可呈程序12〇〇之方程式6及/或7中所 觀察到之形式之形式。認識到,品質度函數/(^Mj可呈任 意數目個數學形式β 在步驟1308中,可藉由利用該複數個經修改疊對值判定 對該複數個度量衡目標之所獲取之疊對度量衡結果及相關 聯之品質度量之複數個隨機選定取樣中之每一者之一組處 理工具可校正值來產生複數組處理工具可校正值,其中該 等隨機取樣中之每一者具有相同大小》在這個意義上,可 執行多個隨機二次取樣,其中產生選定數目個或選定百分 比的可用資料點。就此而言,該多個二次取樣中之每一者 可包含相同數目個所取樣資料點(例如,90%、80%、50% 及諸如此類)。舉例而言,可執行對步驟1302之疊對度量 衡結果之90°/。的資料點之ν數目個隨機取樣,其中每一隨 機取樣表示對該等可用資料點之一不同隨機取樣(但具有 相同數目個所取樣資料點)^然後,可使用該Ν數目個隨機 取樣中之每一者來產生一組處理工具可校正值。進一步注 意到,可使用同一品質函數介來計算該等可校正值中 163677.doc -38 · 201245906 之每一者。 在步驟1310中,可識別該複數組處理工具可校正值之一 變異。本文中認識到,步驟1308中所計算出之該等组處理 工具可校正值之間的變異指示其品質。進一步認識到,該 N數目個可校正值之所觀察到之變異越小,可校 就越好。 本文令進-步注意到’附屬於每一疊對值之品質值提供 給定量測中之非隨機誤差之一估計。然而,其可具有與其 相關聯之高於疊對量測之誤差之—隨機誤差。如上文所閣 述使用其之動機係在非隨機誤差高於該隨機誤差時。在其 中非隨機誤差大於隨機誤差之情形下,值得校正增大其隨 機誤差值(應記住,可在大量量測上將該隨機誤差平均至 一小值)同時減小該非隨機誤差之疊對值。 圖Μ係圖解說明根據本發明之一實施例在用於產生一度 量衡取樣計狀-方法剛巾所執行之步驟之—流程圖。 程序1400涉及基於程序7〇〇之所產生品質度量來產生一度 量衡取樣計劃。在步驟14〇2中,獲取來自跨一批晶圓中之 一晶圓之一或多個場分佈之複數個度量衡目標之複數個疊 對度量衡量測信號。在步驟14〇4中,藉由對每一疊對度量 衡量測信號應用複數個疊對演算法來判定該複數個疊對度 罝衡量測k號中之每-者之複數個疊對估計。在步驟14〇6 中’藉由利用該複數個疊對估計產生來自該複數個度量衡 目標之該子复數個疊對度量衡量測信冑中之每一者之一疊對 估计勿佈來產生複數個疊對估計分佈。在步驟14〇8中產 163677.doc •39· 201245906 生利用該所產生複數個疊對估計分佈之第一複數個品質度 量。 在步驟141 0中,可利用該複數個度量衡目標之該所產生 第一複數個品質度量來產生一或多個度量衡取樣計劃。就 此而言’可基於與該組所量測度量衡目標相關聯之品質度 量來選擇二次取樣計劃或替代取樣計劃。在識別該新的取 樣計劃之後’系統500可在該批晶圓之後續晶圓之度量衡 量測期間應用該取樣計劃。 在一項實施例中’產生利用該複數個度量衡目標之該所 產生第一複數個品質度量之一或多個度量衡取樣計劃以識 別一或多個低品質目標,其中將該一或多個低品質目標排 除於該所產生一或多個度量衡取樣計劃之外。就此而言, 可經由其對應之品質度量(在度量衡場景情況下)來識別低 目標度量衡目標並將其排除於用於後續量測之取樣計劃之 外。 圖1 5A至圖1 5C圖解說明三個不同波長之照明之一系列 品質度量資料。圖1 5A繪示自215個目標之一組疊對度量衡 量測獲取之三個不同波長(白色、紅色及綠色)之品質度 量。圖15B繪示在已移除具有最低品質之6〇個目標(亦即, 具有最大品質度量量值之60個目標),從而留下用於取樣 之155個目標(亦即’ N= 155取樣)之後的剩餘品質度量值。 此外,圖15C繪示在已移除具有最低品質值之115個目標, 從而留下用於取樣之100個目標(亦即,N= 100取樣)之後的 剩餘品質度量值。申請人指出,雖然以上說明從排除低品 I63677.doc •40· 201245906 質目標方面論述目標選擇,但亦直接選擇一組高品質目標 以包含於該取樣計劃中。 圖16A至圖16D圖解說明沿y方向之n=2 15之初始疊對取 樣以及N=155及N=l〇〇之後續經調整之取樣之殘差及R2 值。直接在圖16A至圖16D中觀察到,在所取樣之所有三 個波長中’相對於初始N=215取樣,殘差量值對於\=155 及N=100減小。同樣地,圖16A至圖16D顯示在每一波長下 每一二次取樣計劃(例如,N=100及N=155)之R2之普遍增 大。熟習此項技術者將認識到,此等經改良殘差及R2特性 進而將產生可饋送至一相關聯之處理工具之經改良處理工 具可校正值。 在一項實施例中’利用該複數個度量衡目標之該所產生 第一複數個品質度量來產生一或多個度量衡取樣計劃以識 別一或多個低品質目標,其中將該一或多個低品質目標排 除於該所產生一或多個度量衡取樣計劃之外且利用接近於 該一或多個低品質目標定位之一或多個額外度量衡目標來 替換該一或多個低品質目標。就此而言,可經由其對應之 品質度量(在度量衡場景情況下)來識別低目標度量衡目標 並將其排除於用於後續量測之取樣計劃之外,同時可將靠 近該所排除低品質目標定位之額外目標插入至該批後續晶 圓上所利用之取樣計劃中。 圖18A至圖18B圖解說明初始疊對取樣及後續經調整之 取樣之X方向及y方向之殘差及R2值’其中以接近於該等所 排除之低品質目標定位之目標來取代低品質目標。圖8 A圖 163677.doc 201245906 解說明在以接近定位之目標取代低品質目標之後沿χ方向 及y方向兩者之一減小殘差位準。同樣地,圖叩圖解說明 在以接近定位之目標來取代低品質目標之後R2值之一增 大。此外’熟習此項技術者將認識到,此等經改良之殘差 及R特性進而將產生可饋送至一相關聯之處理工具之經改 良處理工具可校正值》 程序1400可進一步包含利用第一複數個品質度量來識別 晶圓之複數個品質區之步驟,該等品質區中之每一者包含 具有實質類似品質等級之度量衡目標。舉例而言,如圖19 中所示,可識別一第一品質區19〇2至1906以使得其中所包 含之所有目標1901皆具有一實質相同品質。在另一實施例 中,在一後續疊對度量衡程序期間實施之取樣速度可隨給 疋經識別品質區而變化。例如,區丨9〇2、丨904及1 906内所 取樣之目標之數目可相依於含於彼等區内之目標之品質等 級。在另一態樣中,在該初始取樣計劃中,該度量衡量測 程序可包含量測一全晶圓圖譜、量測一全批圖譜或量測一 子批之晶圓。 .在基於其品質度量定義第一晶圓之取樣計劃之後,該經 識別取樣計劃可應用於下一晶圓,同時亦提供一預定義約 束°舉例而言’該約束可由幾個子約束構成,且每一子約 束將引發對該取樣計劃之一微小改變之需要。此程序可累 積地繼續至後續批。該等約束可基於所量測晶圓/晶圓統 計資料(例如,標準偏差、平均、範圍等)之品質度量同時 考慮到取樣量。 163677.doc -42· 201245906 現在參照圖20A至圖20F,根據本發明實施例闡述用於 提供程序圖徵圖譜之一方法及系統。就此而言,一程序圖 徵圖譜解決方案(下文稱為「程序圓徵圖譜器((pr〇cess signature mapper))」)可有助於改良半導體裝置製作中之圖 案化程序控制》 圖20A圖解說明一微影程序控制環路之一項實施例。該 微影程序控制環路可包含(但不限於):一光罩2〇〇2、一掃 描機2004、一程序追蹤模組2〇〇6,其經組態以追蹤多個非 微影程序路徑2008 ; —度量衡系統2〇 1〇;及一進階型程序 控制(APC)系統2012。在一典型微影程序控制環路2〇〇〇 中,對一晶圓之已曝露於先前處理層及當前處理層兩者上 之微影程序(以及諸如先前層上之蝕刻及拋光之其他程序) 之度量衡目標執行意欲回饋至該微影程序之控制環路中之 度量衡量測2010。儘管微影程序2〇 1〇之目的係啟用對微影 偏離之校正,但實際量測疊對可因與非微影程序2〇〇8有關 之效應而偏置,且將相依於特定晶圓之水平路徑。本文中 ⑽識到,將偏置視為度量衡歧義,如本文中先前所述。在 當别技術水平下,自來自一任意先前程序路徑之晶圓所收 集之度量衡資料由APC系統2012用來計算隨後可饋送至微 影曝光程序(亦即,掃描機2〇〇4)中之歷史平均可校正值。 本發明之一個目的係量化晶圓之特定程序路徑上之所量測 疊對之相依性。此程序稱作程序圖徵圖譜。 圖20B圖解說明根據本發明之一項實施例用於程序圖徵 圖譜之一程序流程。在步驟2〇12中,在一微影程序之後, 163677.doc -43- 201245906 在麵刻程序之前及在一钮刻程序之後使用一疊對度量衡 程序(例如’成像度量衡或散射量測)來量測形成於一光罩 ( 測试光罩或產品光罩)上之複數個代理目標。就此 而&quot;如圖20C中所示,可藉由比較在一微影程序之後及 在曰a圓之一第一蝕刻程序之前自複數個代理目標獲取之一 第組度量衡結果2022與在晶圓之該第一蝕刻程序之後自 該複數個代理目標獲取之至少一第二組度量衡結果 2024(例如,判定其之間的差)來判定隨跨晶圓之位置而變 化之一第一程序圖徵2026。 此外,可使該第一程序圓徵與一特定程序路徑相關,如 圖20C中所示。就此而言,可加標籤於隨跨晶圓之位置而 變化之該兩個度量衡量測2021與2〇23之間的變異(先前稱 作DI-FI偏置)以指定具體程序路徑,包括(但不限於)程序 序列、特定處理工具之識別碼、時間戳記及諸如此類。 在步驟2014中,可在該第一蝕刻程序之後量測一裝置相 關偏置。就此而言,可在該第一蝕刻程序之後藉由對晶圓 之該複數個裝置相關目標執行一第一組度量衡量測來量測 該裝置相關偏置。本文中注意到,本發明之裝置相關偏置 表示一度量衡結構與晶圓之一裝置之間的偏置,其中度量 衡特徵通常具有不同於(實質大於)裝置特徵之尺寸。在另 一實施例中,如圖20D中所示,可藉由對晶圓之含有類裝 置及類度量衡尺寸兩者之特徵之裝置相關目標執行度量衡 量測2034(例如,CD-SEM或AFM量測)來量測該裝置相關 偏置。此外’在蝕刻之後執行此度量衡步驟。裝置相關量 163677.doc • 44· 201245906 測之實例大體闡述於「Improved Overlay Metrology Device Correlation on 90-nm Logic Processes j by Ueno et. al,^accurate = ^measured ^QM (Equation 7) where (X re-presents the material parameter factor, where QM represents the calculated quality metric or each of the stacked-pair measurements of the present invention. β is recognized herein, Equation 7 The above quality function is not limiting and should only be considered as illustrative. The expected quality function / <ρΜ) can take a variety of mathematical forms. In a fourth step 1208, one of a plurality of material parameter factors can be calculated as a correctable value function and a set of residuals corresponding to the correctable value function. In this regard, the parameter a can be changed and the residual associated with each correctable value function can be calculated for the alpha value. In another aspect, any type of correctable value function known in the art can be performed to fit OVLaecurate. For example, the correctable value function can include a linear or higher order correctable value function. Using one or more of the correctable value functions known in the art, a series of correctable value functions (one per _α value) can be shoddy. For example, a correctable value function and corresponding residuals can be calculated for α!, Α, h, and up to and including αΝ. The function for calculating the correction value is generally described in U.S. Patent No. 7,876,438, issued Jan. 25, 2011, which is incorporated herein by reference. In a fifth step 1210, a value of one of the material parameter factors suitable for at least substantially minimizing the set of residuals is determined. In this regard, the residual associated with each of α丨...αΝ can be analyzed to determine the minimum overlap residual level. For example, Figure 11 illustrates plotting a graph 1220 of one of the set of residual values from step 1208 calculated for each of a number of alpha values 163677.doc - 36 - 201245906 along with a corresponding trend line 1222. As observed in FIG. 11, for the set of given residuals 'approximate - 3.66 one alpha value produces a minimum residual value for a given metrology scenario", in step 1212, the at least substantially minimized group of identities can be identified The set of correctable values associated with the difference. For example, to account for the residual minimization provided in step 121A, a set of correctable values can be calculated using the residual relative to the alpha minimization. It is further contemplated that the alpha identified in step 1210 can be applied during subsequent wafer analysis in the batch of wafers. In another embodiment, the set of correctable values generated in step 1212 can be transmitted to one or more processing tools (e.g., steppers or scanners). In an additional aspect, a TIS correction procedure can be applied to the acquired plurality of overlay metric measurement signals prior to analysis to reduce the TIS induced asymmetry present in the signals. Figure 13 is a flow chart illustrating one of the steps performed in a method 1300 for identifying one of the process tool correctable values. In step 13〇2, a stack-to-weight measurement result for each of the plurality of metrology targets of one or more field distributions of one of the wafers may be acquired. In one embodiment, the stack-to-weights results for each of the plurality of scale targets may be obtained by performing one or more overlay metric measurements on the equals and targets using the metrology system 502. In step 1304, a quality metric associated with each of the acquired overlay weights is obtained. In one embodiment, the 163677.doc -37-201245906 quality metric can be generated using a program consistent with the various methods and embodiments set forth throughout the present invention. In this regard, after obtaining the weights and measures results for each of the set of metrology and metrology targets, system 500 can calculate a quality metric for each of the metrics. In step 1306, a plurality of modified overlay values of the plurality of weighted and quantized targets obtained by each of the weighted and measured targets and the plurality of weighted and measured targets of a quality function are determined. In one aspect, the quality function varies with the quality metrics obtained for each metric target. In an embodiment A, the modified overlay of step 1306 can take the form of the form observed in Equations 6 and/or 7 of the program 12〇〇. It is recognized that the quality function /(^Mj can be in any number of mathematical forms β. In step 1308, the stacked pair of weights and measures obtained for the plurality of weights and targets can be determined by using the plurality of modified pairs of values. And one of a plurality of randomly selected samples of the associated quality metrics, the set of processing tool correctable values to generate a complex array processing tool correctable value, wherein each of the random samples has the same size In this sense, a plurality of random subsamplings can be performed in which a selected number or selected percentage of available data points are generated. In this regard, each of the plurality of subsamples can include the same number of sampled data points ( For example, 90%, 80%, 50%, and the like. For example, a random sample of ν number of data points of 90°/. of the overlay-to-weight measurement result of step 1302 may be performed, wherein each random sample represents a pair One of the available data points is randomly sampled (but with the same number of sampled data points). Then, each of the number of random samples can be used to generate The group processing tool can correct the values. It is further noted that each of the correctable values can be calculated using the same quality function to calculate each of 163677.doc -38 · 201245906. In step 1310, the complex array processing tool can be identified. One of the correction values varies. It is recognized herein that the variation between the correctable values of the set of processing tools calculated in step 1308 indicates its quality. Further recognizing that the N number of correctable values are observed The smaller the variation, the better it can be corrected. This paper notes that the quality value attached to each pair of values is provided to estimate one of the non-random errors in the quantitative test. However, it may have associated with it. It is higher than the error of the stack-to-measurement error. As explained above, the motivation for using it is when the non-random error is higher than the random error. In the case where the non-random error is greater than the random error, it is worthwhile to correct Large random error value (should be remembered that the random error can be averaged to a small value over a large number of measurements) while reducing the overlap value of the non-random error. Figure Illustrated according to the invention An embodiment is directed to a flow chart for generating a metrology sample-method-like method. The program 1400 involves generating a metrology sampling plan based on the generated quality metrics of the program 7. In step 14 And obtaining a plurality of stacked metric measurement signals from a plurality of metrology targets distributed across one or more of the one of the plurality of wafers. In step 14〇4, by each pair The metric measurement signal is applied to a plurality of stacked pairs to determine the plurality of overlapping 罝 罝 罝 罝 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 A plurality of stacked pairs of estimated distributions are generated for estimating one of the plurality of stacked pairs of measured metrics from the plurality of metrology targets. In step 14〇8, 163677.doc •39·201245906 uses the first plurality of quality metrics of the plurality of stacked pairs to estimate the distribution. In step 141 0, the first plurality of quality metrics generated by the plurality of metrology targets can be utilized to generate one or more metrology sampling plans. In this regard, the subsampling plan or the alternative sampling plan can be selected based on the quality metric associated with the set of metrology targets. After identifying the new sampling plan, system 500 can apply the sampling plan during the metrology measurement of subsequent wafers of the batch of wafers. In one embodiment, 'generating one or more of the first plurality of quality metrics generated using the plurality of metrology targets to identify one or more low quality targets, wherein the one or more low Quality objectives are excluded from one or more of the metrology sampling plans produced. In this regard, the low target metrology target can be identified via its corresponding quality metric (in the case of a metrology scenario) and excluded from the sampling plan for subsequent measurements. Figures 1 5A through 1C illustrate one of a series of quality metrics for three different wavelengths of illumination. Figure 1 5A shows the quality of three different wavelengths (white, red, and green) obtained from a stack of 215 targets. Figure 15B shows that 6 targets with the lowest quality have been removed (i.e., 60 targets with the highest quality metric value), leaving 155 targets for sampling (i.e., 'N= 155 samples) The remaining quality metrics after that. In addition, Figure 15C depicts the remaining quality metric values after the 115 targets with the lowest quality values have been removed, leaving 100 targets for sampling (i.e., N = 100 samples). The applicant pointed out that although the above description discusses the target selection from the exclusion of the low-quality I63677.doc •40· 201245906 quality objectives, it also directly selects a set of high-quality targets to be included in the sampling plan. Figures 16A through 16D illustrate the initial overlap of n = 2 15 in the y direction and the residual and R2 values of subsequent adjusted samples of N = 155 and N = l. It is observed directly in Figures 16A through 16D that the residual magnitude is reduced for \= 155 and N = 100 for all of the three wavelengths sampled with respect to the initial N = 215 samples. Similarly, Figures 16A through 16D show a general increase in R2 for each subsampling plan (e.g., N = 100 and N = 155) at each wavelength. Those skilled in the art will recognize that such improved residuals and R2 characteristics will in turn result in improved process tool correctable values that can be fed to an associated processing tool. In one embodiment 'using the first plurality of quality metrics generated by the plurality of metrology targets to generate one or more metrology sampling plans to identify one or more low quality targets, wherein the one or more lows are The quality goal is excluded from the one or more metrology sampling plans generated and the one or more low quality targets are replaced with one or more additional metrology targets that are close to the one or more low quality target locations. In this regard, the low target metrology target can be identified and excluded from the sampling plan for subsequent measurements via its corresponding quality metric (in the case of a metrology scenario), while being close to the excluded low quality target Additional targets for positioning are inserted into the sampling plan utilized on subsequent batches of the batch. 18A-18B illustrate the residual and R2 values of the initial and the adjusted samples in the X and y directions, which replace the low quality target with a target close to the excluded low quality target. . Figure 8 A Figure 163677.doc 201245906 illustrates the reduction of the residual level in either the χ direction and the y direction after replacing the low quality target with the target of proximity positioning. Similarly, the graph illustrates that one of the R2 values increases after replacing the low quality target with a near-targeting goal. In addition, those skilled in the art will recognize that such improved residuals and R characteristics, in turn, will result in improved process tool correctable values that can be fed to an associated processing tool. Program 1400 can further include utilizing the first A plurality of quality metrics for identifying a plurality of quality regions of the wafer, each of the quality regions comprising a metrology target having substantially similar quality levels. For example, as shown in Fig. 19, a first quality zone 19〇2 to 1906 can be identified such that all of the targets 1901 contained therein have substantially the same quality. In another embodiment, the sampling rate implemented during a subsequent stack-to-weight program may vary with the identified quality region. For example, the number of targets sampled in Zones 〇2, 丨904 and 1 906 may depend on the quality level of the targets contained in their zones. In another aspect, in the initial sampling plan, the metric measurement program can include measuring a full wafer map, measuring a full batch of spectra, or measuring a batch of wafers. After defining a sampling plan for the first wafer based on its quality metric, the identified sampling plan can be applied to the next wafer while also providing a predefined constraint. For example, the constraint can be composed of several sub-constraints, and Each sub-constraint will trigger a need for a minor change to the sampling plan. This program can continue to accumulate to subsequent batches. These constraints can be based on the quality metric of the measured wafer/wafer statistics (eg, standard deviation, average, range, etc.) while taking into account the sample size. 163677.doc -42· 201245906 Referring now to Figures 20A-20F, a method and system for providing a program map map is set forth in accordance with an embodiment of the present invention. In this regard, a program map map solution (hereinafter referred to as "the pr〇cess signature mapper") can help to improve the patterning program control in the fabrication of semiconductor devices. Figure 20A illustrates An embodiment of a lithography program control loop is illustrated. The lithography program control loop can include, but is not limited to: a reticle 2, a scanner 2004, and a program tracking module 〇〇6 configured to track a plurality of non-lithographic programs Path 2008; - metrology system 2〇1〇; and an advanced program control (APC) system 2012. In a typical lithography control loop 2, a lithography process on a wafer that has been exposed to both the previously processed layer and the current processing layer (as well as other processes such as etching and polishing on previous layers) The metrology target execution is intended to be fed back to the metric measurement 2010 in the control loop of the lithography program. Although the purpose of the lithography program is to enable correction of lithography deviation, the actual measurement overlay can be biased by the effects associated with the non-lithographic program 2〇〇8 and will depend on the particular wafer. The horizontal path. (10) herein recognizes that the bias is considered a measure of ambiguity, as previously described herein. At other skill levels, the metrology data collected from wafers from an arbitrary prior program path is used by the APC system 2012 for calculation and then fed to the lithography exposure program (ie, scanner 2〇〇4). Historical average correctable value. One object of the present invention is to quantify the dependence of a measured stack on a particular program path of a wafer. This program is called a program graph map. Figure 20B illustrates a program flow for a program map map in accordance with an embodiment of the present invention. In step 2〇12, after a lithography procedure, 163677.doc -43- 201245906 uses a stack of weights and measures (such as 'imaging weights or scatterometry') before the faceting procedure and after a buttoning procedure. A plurality of proxy targets formed on a reticle (test reticle or product reticle) are measured. In this regard, as shown in FIG. 20C, one of the first set of metrology results 2022 and the wafer can be obtained from a plurality of proxy targets by comparing one lithography procedure and one of the first etching processes of the 曰a circle. The first etch process is followed by at least one second set of metrology results 2024 obtained from the plurality of proxy targets (eg, determining the difference therebetween) to determine a first program signature that varies with the position across the wafer. 2026. Additionally, the first program round can be correlated to a particular program path, as shown in Figure 20C. In this regard, the two metrics that vary with the position across the wafer can be calibrated to measure the variation between 2021 and 2〇23 (formerly known as DI-FI bias) to specify a specific program path, including ( But not limited to, program sequences, identification codes for specific processing tools, time stamps, and the like. In step 2014, a device related offset can be measured after the first etch process. In this regard, the device-related offset can be measured by performing a first set of metric measurements on the plurality of device-related targets of the wafer after the first etch process. It is noted herein that the device-dependent offset of the present invention represents an offset between a metrology structure and a device of the wafer, wherein the metrology feature typically has a different (substantially greater than) device feature size. In another embodiment, as shown in FIG. 20D, a metric measurement 2034 (eg, CD-SEM or AFM amount) may be performed by a device-related target that is characteristic of both the wafer-containing device and the metrology-like size. Measure) to measure the device related offset. Furthermore, this weighting step is performed after etching. Device-related quantities 163677.doc • 44· 201245906 The example of the test is generally described in “Improved Overlay Metrology Device Correlation on 90-nm Logic Processes j by Ueno et. al,

Metrology, Inspection, and Process Control for Microlithography XVIII, edited by Silver, Richard M. SPIE, Volume 53 75,pp. 222-231 (2004)中,該文章全文以引用方 式併入本文中。 此外’可利用所判定之第一蝕刻圖徵及額外蝕刻圖徵中 之每一者以及第一所量測裝置相關偏置及每一額外裝置相 關偏置來產生一程序圖徵圖譜。就此而言,步驟2012及/ 或步驟2014之結果可儲存至該系統之記憶體中且用於形成 程序圖徵圖譜資料庫。 在步驟2016中,可針對每一層且針對該控制環路之每一 非微影程序路徑重複步驟2012及2014。就此而言,步驟 2〇16T包含判疋隨跨晶圓之位置而變化之每一額外處理層 及該aa圓之母一額外非微影程序路徑之一額外钮刻圖徵。 此外,步驟2016可包含在每一額外處理層及晶圓之每一額 外非微影程序路徑之後量測一額外裝置相關偏置。由於程 序路徑之可能排列之清單可能很大,因而基於一族處理工 具内之匹配及固有變異性來定義針對特性化而選取之該組 程序路徑。若處理工具表現出良好的匹配,則可能不需要 對每-經匹配工具之獨立程序路徑進行量測。在另一步驟 中可週期性地更新該程序以便使該程序圖徵資料庫保持 最新,從而允許對程序偏離進行效果監視。 圖20E圖解說明根據本發明 之一項實施例之一微影程序 163677.doc •45- 201245906 控制環路中之程序圖徵圖譜器資料庫之一實施方案。程序 控制環路2040可包含(但不限於):一堆叠資訊與設計規則 模組2042,計算度量衡模組2〇44 ; 一光罩2〇46,其經組態 以用於接收代理目標設計與裝置相關目標設計資訊;1 描機2048; —追蹤模組205〇,其經組態以追蹤多個非微影 程序2056,度量衡系統2〇52 ;程序圖徵圖譜器2〇54,其 經組態以接收來自代理目標2058及裝置相關目標2〇6〇之度 量衡結果;及一 APC 2062。 一旦已獲得程序圖徵圖譜器資料集,則可將其用於ApC 控制環路2062中。如圖20E中所示,將度量衡資料遞送至 實施每批或每晶圓路徑特定之程序校正之程序圓徵圖譜器 2054。然後,將此經校正資料傳輸至產生歷史平均可校正 值之APC—環路2062,其中該等歷史平均可校正值係使用 此項技術中所習知之方法來產生。以此方式,程序圖徵圖 譜器模組2054應與當前現有製作設備之現有Apc基礎架構 相容。在一般意義上,可以隨場及晶圓位置而變化之一程 序偏置形式或更特定而言以與處理工具之校正自由度相關 聯之標準可校正值形式儲存由程序圖徵圖譜器2〇54計算出 之路徑相依程序圖徵。 圖20F圖解說明根據本發明之一實施例之程序圖徵圖譜 器之實施方案。已知所有校正項,可基於自對係針對n 個程序路徑中之每一者之所量測後處理之代理目標之量測 產生之校準資料〇VLppn(x,y)(步驟2052)及在CD-SEM或 AFM上之蝕刻之後對裝置相關目標之量測寫出表示晶圓上 I63677.doc -46- 201245906 之任一點(x,y)處之疊對之給定裝置之一方程式。在最簡單 之情況下,裝置相關校正係因處理特性之特徵大小相依性 而獨立於晶圓或場位置或程序路徑之一恆定偏移。然而, 在更一般情況下’需要考慮到晶圓與場位置以及微影程序 路徑。以實例方式,若裝置大小之特徵及度量衡大小之特 徵之間的偏置歸因於掃描機像差誘發之圖案佈局誤差,則 此偏置將有可能跨該掃描機之狹縫有所不同。因此,對於 該m個微影路徑中之每一者,需要收集裝置相關資料 〇VLlpm(x,y)(步驟2054)。在一替代實施例中,甚至可針對 該等非微影程序路徑中之每一者量測該裝置相關資料◎在 所有情況下,下一步驟係藉由此項技術中所習知之習用曝 光工具校正值模型化自該等特定資料集中之每一者產生一 標準組可校正值CPPn&amp;ClPin(步驟2056及步驟2〇58卜可校 正值模型化大體闡述於「Fundamental pHneiples QfMetrology, Inspection, and Process Control for Microlithography XVIII, edited by Silver, Richard M. SPIE, Volume 53 75, pp. 222-231 (2004), which is incorporated herein in its entirety by reference. Further, a program map map can be generated using each of the determined first etch signature and the additional etch signature and the first gauge relative offset and each additional device offset. In this regard, the results of step 2012 and/or step 2014 can be stored in the memory of the system and used to form a library of program signature maps. In step 2016, steps 2012 and 2014 may be repeated for each layer and for each non-lithographic program path of the control loop. In this regard, step 2〇16T includes an additional button pattern for each additional processing layer that varies with the position of the wafer and an additional non-lithographic program path of the mother of the aa circle. In addition, step 2016 can include measuring an additional device-related offset after each additional processing layer and each additional non-lithographic program path of the wafer. Since the list of possible permutations of the program paths may be large, the set of program paths selected for characterization is defined based on the matching and inherent variability within the family of processing tools. If the processing tool exhibits a good match, it may not be necessary to measure the independent program path for each-matched tool. In another step, the program can be periodically updated to keep the program's symbol database up-to-date, allowing for performance monitoring of program deviations. Figure 20E illustrates one embodiment of a program map map library in a control loop in a lithography program 163677.doc • 45- 201245906, in accordance with an embodiment of the present invention. The program control loop 2040 can include, but is not limited to: a stacking information and design rules module 2042 that computes the metrology module 2〇44; a mask 2〇46 that is configured to receive the proxy target design and Device related target design information; 1 tracing machine 2048; - tracking module 205〇 configured to track a plurality of non-diagram programs 2056, metrology system 2〇52; program image map device 2〇54, group State to receive the weighting result from agent target 2058 and device related target 2〇6〇; and an APC 2062. Once the program mapper data set has been obtained, it can be used in the ApC control loop 2062. As shown in Figure 20E, the metrology data is delivered to a program circular locator 2054 that implements program-specific calibration for each batch or per wafer path. This corrected data is then transmitted to an APC-loop 2062 that produces a historical average correctable value, which is generated using methods known in the art. In this manner, the program map map module 2054 should be compatible with the existing Apc infrastructure of currently existing production equipment. In a general sense, one of the program offset forms may be varied with field and wafer position or, more specifically, in the form of a standard correctable value associated with the degree of freedom of correction of the processing tool. 54 calculated path dependent program signs. Figure 20F illustrates an embodiment of a program signature map in accordance with an embodiment of the present invention. All correction terms are known, based on the calibration data 〇 VLppn(x, y) generated from the measurement of the proxy target of the post-measurement processing for each of the n program paths (step 2052) and The measurement of the device-related target after etching on the CD-SEM or AFM writes an equation representing a given pair of devices at any point (x, y) at I63677.doc -46 - 201245906 on the wafer. In the simplest case, the device-dependent correction is constantly offset from one of the wafer or field position or program path due to the feature size dependence of the processing characteristics. However, in more general cases, wafer and field locations and lithography procedures need to be considered. By way of example, if the offset between the characteristics of the device size and the size of the weights is due to scanner aberration induced pattern placement errors, then the offset will likely vary across the slit of the scanner. Therefore, for each of the m lithography paths, device related data 〇VLlpm(x, y) needs to be collected (step 2054). In an alternate embodiment, the device-related data may even be measured for each of the non-lithographic program paths. In all cases, the next step is by conventional exposure tools as is known in the art. The correction value model generates a standard set of correctable values CPPn &amp; ClPin from each of the specific data sets (step 2056 and step 2〇58) the correctable value modeling is generally described in "Fundamental pHneiples Qf"

Optical Lithography, by Chris Mack, Wiley &amp; sons, 2007 中該文早全文以引用方式併入本文中。在步驟2〇6〇中, 產生由以下方程式表示之每一程序/微影路徑排列之程序 圖徵圖譜器可校正值: 时然後,如圖2GF_所示,將此資料儲存於程序圖徵圖拿 :資料庫2062中。應指出,上文所闞述之可校正值產生* 值:包含若干不同之可能模型化場景。例如,該等可校卫 可僅包含Uy中之平移之該標準組線性晶 值,晶圓與場位準旋轉及晶圓與場位準另一 163677.doc 47- 201245906 曝光工具及其校正自由度,其可包含諸如梯形之更高階項 及其他更高階晶圓與場項。對於程序可校正值,不管微影 可校正值如何,產生最有效地描述相關聯之程序偏置之特 定可校正值也許係合適的。 現在將闡述-典型生產度量衡與程序控制場景。在此階 段,對一產品晶圓執行度量衡。依據可校正值模型及Apc 方法,取樣可按照不同之取樣計劃。然後,可藉由上文所 聞述之標準方法來模型化產品晶圓資料〇VLpWm n以產生來 自微影路徑m及程序路徑n且隨後發送至程序圖徵圖譜器之 產。〇明圓可校正值CpWm,n。該程序圖徵圖譜器自當前產品 晶圓可校正值中減去程序圖徵圖譜器可校正值 產生由以下方程式表示之經校正產品晶圓可校正值 c'pwn&gt;m : C Pwn,m = Cpw„,m-Cpsrn„,m (方程式 9) 然後’將經校正產品晶圓可校正值傳輸至APC系統且該 程序控制a f用方式(諸如藉助—指數窗移動平均法或 此項技術中所習知之任_其他適合技術)繼續進行。 本文中所闡述之所有方法可包含將方法實施例之一或多 個步驟之結果館存於—鍺存媒體中。該等結果可包含本文 斤闡述之、.'。果中之任—者且可以此項技術中所習知之任 一方式儲存。該儲存媒體可包含本文t所料之任-儲存 媒體或此項技術中所f知之任—其他適合儲相體。在已 儲存結果之後,該等結果可在該儲存媒體中存取且由本文 _所闞述之方法或系統實施例中之任—者使用,經格式化 163677.doc •48· 201245906 以用於向一使用者顯示,由任一軟體模組、方法或系統等 使用《'舉例而言,在該方法產生二次取樣計劃之後,該方 法可包含將該二次取樣計劃儲存於一儲存媒體中之一度量 衡配方中。另外,本文中所闡述之實施例之結果或輸出可 由一度量衡系統(諸如一CD SEM)儲存及存取以使得一度 量衡系統可將該次取樣計劃用於度量衡,假定該度量衡系 統可理解輸出檔案。此外,可「永久性地」、「半永久性 地」、臨時性地或在某一時間週期時儲存該等結果。舉例 而言,該儲存媒體可係隨機存取記憶體(RAM),且該等結 果可不必無限期地存留於該儲存媒體中。 進一步預期,上文所闡述之方法之實施例中之每一者可 包含本文中所閱述之任何其他方法之任何其他步驟。另 外,上文所闡述之方法之實施例中之每一者可由本文中所 闡述之系統中之任一者執行。 熟習此項技術者將瞭解,存在本文中所閣述之程序及/ 或系統及/或其他技術可受其影響之各種載具(例如,硬 體、軟體及/或勒體),且較佳載具將隨纟中該等程序及/或 系統及/或其他技術部署於其中之上下文而變化。舉例而 言,若一實施者判定速度及準確度係極為重要的,則該實 施者可選擇-主要硬體及/或勒體載具;另一選擇為,若 靈活性係極為重要的,則該實施者可選擇—主要軟體實施 方案’或者’再另一選擇為,該實施者可選擇硬體'軟體 及/或勃體之某-組合。因此,存在本文中所闡述之程序 及/或裝置及/或其他技術可受其影響之數種可能载具,其 163677.doc -49- 201245906 中沒有一者係天生優於另一者,此乃因欲利用之任一载具 係依據其中將部署該載具之上下文及實施者之具體關注問 題(例如,速度、靈活性或可預測性)(其中任一者可變化) 之一選擇。熟習此項技術者將認識到,實施方案之光學雄 樣通常將採用經光學定向之硬體、軟體及/或勒體。 熟習此項技術者將認識到’在此項技術中以本文閣明之 方式闡述裝置及/或程序,且此後使用工程實踐將此等所 闡述裝置及/或程序整合至資料處理系統中係常見的。亦 即’本文中所闡述之裝置及/或程序之至少一部分可經由 一合理量之實驗而整合至一資料處理系統中。熟習此項技 術者將認識到,一典型資料處理系統通常包含以下裝置中 之一或多者:一系統單元外殼;一視訊顯示裝置;一記憶 體,諸如揮發性及非揮發性記憶體;處理器,諸如微處理 器及數位信號處理器;計算實體,諸如作業系統、驅動 器、圖形使用者介面及應用程式;一或多個互動裝置,諸 如一觸控板或螢幕;及/或控制系統,包含回饋環路及控 制馬達(例如,用於感測位置及/或速率之回饋;用於移動 及/或調整分量及/或數量之控制馬達)。可利用任一適合市 售組件(諸如通常發現於資料計算/通信及/或網路計算/通 信系統中之彼等組件)來實施一典型資料處理系統。 本文所闡述之標的物往往圖解說明含於不同其他組件内 或與不同其他組件連接之不同組件。應理解,此等所繪示 架構僅係例示性的,且實際上可實施達成相同功能性之諸 多其他架構。在一概念意義上,達成相同功能性之任一組 163677.doc -50· 201245906 件配置係有效地「相關聯」以使得達成所期望之功能性。 因此,不管架構或中間組件如何,可將本文中經組合以達 成一特定功能性之任何兩個組件視為彼此「相關聯」以使 付達成所期望之功能性。同樣地,如此相關聯之任何兩個 組件亦可視為彼此「連接」或「耦合」以達成所期望之功 能性’且能夠如此相關聯之任何兩個組件亦可視為彼此 「可輕合」以達成所期望之功能性。可耦合之特定實例包 含(但不限於)可實體配合及/或實體互動之組件及/或可以 無線方式互動及/或以無線方式互動之組件及/或以邏輯方 式互動及/或可以邏輯方式互動之組件。 雖然已展示並闡述了本文中所闡述之本標的物之特定態 樣’但熟習此項技術者將基於本文中之教示明瞭:可在不 背離本文中所闡述之標的物及其更廣泛之態樣之情況下作 出改變及修改’且因此,隨附申請專利範圍欲將所有此等 改變及修改囊括於其範疇内,如同此等改變及修改歸屬於 本文中所闡述之標的物之真正精神及範缚内一般。 此外’應理解,本發明係由隨附申請專利範圍定義。 儘管已圖解說明本發明之特定實施例,但應明瞭,熟習 此項技術者可在不背離前述揭示内容之範疇及精神之情況 下作出本發明之各種修改及實施例。因此,本發明之範疇 應僅受隨附申請專利範圍限制。 據信,藉由上述說明將理解本發明及諸多其隨附優點, 且將明瞭可在不背離所揭示標的物或不犧牲所有其材料優 點之情況下在組件之形式、構造及配置方面作出各種改 I63677.doc •51 · 201245906 且以下申請專利範圍之意 變。所闞述形式僅係解釋性的 圖係囊括並包含此等改變。 【圖式簡單說明】 對稱目標 不對稱目 圖1A圖解說明根據本發明之一項實施例具有一 結構之一度量衡目標之一剖視圖。 圖1B圖解說明根據本發明之一項實施例具有一 標結構之一度量衡目標之一剖視圖。 圖2圖解說明根據本發明之一項實施例具有一不對稱目 標結構之一度量衡目標及具有多於一個焦點之照明之影響 之一剖視圖。 圖3圖解說明根據本發明之一項實施例具有一不對稱目 標結構之一度量衡目仏及具有多於一個波長之照明之影響 之一剖視圖。 圖4A圖解說明根據本發明之一項實施例自處於多個波長 下之對稱目標結構獲得之模型化資料。 圖4B圖解說明根據本發明之一項實施例自處於多個波長 下之不對稱目標結構獲得之模型化資料。 圖5圖解說明根據本發明之一項實施例適合於提供適合 於改良一半導體晶圓製作中之程序控制之一品質度量之_ 系統之一方塊圖。 圖6圖解說明根據本發明之一項實施例適合於提供適合 於改良一半導體晶圓製作中之程序控制之一品質度量之方 法之一概念圖。 圖7A圖解說明根據本發明之一項實施例適合於提供適合 163677.doc -52· 201245906 於改良一半導體晶圓製作中之程序控制之一品質度量之一 方法之一流程圖。 圖7B圖解說明根據本發明之一項實施例具有多個場之一 半導體晶圓之一俯視平面圖。 圖7C圖解說明根據本發明之一項實施例具有多個度量衡 目標之一半導體晶圓以及該晶圓之該多個場中之每一者之 一俯視平面圖。 圖8A圖解說明根據本發明之一項實施例隨該晶圓之表面 上之位置而變化之一組模型化疊對不準確度資料。 圖8B圖解說明根據本發明之一項實施例自複數個度量衡 目標獲得之一組模型化品質度量資料。 圖9圖解說明根據本發明之一替代實施例用於度量衡目 標離群值移除之一方法之一流程圖。 圖10圖解說明根據本發明之一替代實施例用於疊對量測 配方增強之一方法之一流程圖。 圖11圖解說明根據本發明之一項實施例自處於兩個不同 波長下之複數個度量衡目標獲得之一組模型化品質度量資 料。 圖12A圖解說明根據本發明之—替代實施例用於處理工Optical Lithography, by Chris Mack, Wiley &amp; sons, 2007 is hereby incorporated by reference in its entirety. In step 2〇6〇, a program graph mapper for each program/lithographic path arrangement represented by the following equation is generated to correct the value: Then, as shown in FIG. 2GF_, the data is stored in the program graph. Tina: In the database 2062. It should be noted that the correctable values recited above produce * values: contain several different possible modelling scenarios. For example, the calibratable can include only the standard set of linear crystal values of the translation in Uy, wafer and field level rotation, and wafer and field level. Another 163677.doc 47- 201245906 exposure tool and its freedom of correction Degrees, which may include higher order terms such as trapezoids and other higher order wafer and field terms. For program correctable values, regardless of the lithography correctable value, it may be appropriate to produce a particular correctable value that most effectively describes the associated program offset. It will now be explained - typical production weights and measures and program control scenarios. At this stage, weights and measures are performed on a product wafer. Depending on the correctable value model and the Apc method, sampling can be based on different sampling plans. The product wafer data 〇VLpWm n can then be modeled by the standard methods described above to produce the production from the lithography path m and the program path n and subsequently to the program map map. The circle can be corrected to the value CpWm,n. The program map extractor subtracts the program map spectrometer correctable value from the current product wafer correctable value to generate a corrected product wafer correctable value c'pwn&gt;m represented by the following equation: C Pwn,m = Cpw„,m-Cpsrn„,m (Equation 9) then 'transfer the corrected product wafer correctable value to the APC system and the program controls the af usage (such as by means of an exponential window moving average method or in the art) The responsibilities of the _ _ other suitable technology) continue. All of the methods set forth herein may include depositing the results of one or more of the method embodiments in a storage medium. These results may include the . It can be stored in any of the ways known in the art. The storage medium may comprise any of the storage media or materials known in the art as described herein. After the results have been stored, the results can be accessed in the storage medium and used by any of the methods or system embodiments described herein, formatted 163677.doc • 48· 201245906 for use in one The user displays that by any software module, method or system, etc., "for example, after the method generates a subsampling plan, the method may include storing the subsampling plan in one of the storage media. In the weight loss formula. Additionally, the results or outputs of the embodiments set forth herein may be stored and accessed by a metrology system, such as a CD SEM, such that a metrology system may use the subsampling plan for metrology, assuming that the metrology system understands the output file . In addition, the results may be stored "permanently", "semi-permanently", temporarily or at a certain time period. For example, the storage medium can be a random access memory (RAM) and the results do not have to persist in the storage medium indefinitely. It is further contemplated that each of the embodiments of the methods set forth above may include any other steps of any other method described herein. Additionally, each of the embodiments of the methods set forth above can be performed by any of the systems set forth herein. Those skilled in the art will appreciate that there are various vehicles (e.g., hardware, software, and/or levitons) to which the procedures and/or systems and/or other techniques described herein may be affected, and preferably. The vehicle will vary depending on the context in which the programs and/or systems and/or other technologies are deployed. For example, if an implementer determines that speed and accuracy are extremely important, the implementer may select - the primary hardware and / or the striker carrier; the other option is that if flexibility is extremely important, then The implementer may select - the primary software implementation 'or ' or another option is that the implementer may select a hardware-software and/or a certain combination of the body. Accordingly, there are several possible vehicles to which the procedures and/or devices and/or other techniques set forth herein may be affected, none of which is inherently superior to the other, 163677.doc -49-201245906, Any vehicle to be utilized is selected based on one of the context in which the vehicle will be deployed and the specific concerns of the implementer (eg, speed, flexibility, or predictability), either of which may vary. Those skilled in the art will recognize that optical stereotypes of embodiments will typically employ optically oriented hardware, software, and/or a lept. Those skilled in the art will recognize that the devices and/or procedures described herein are described in the context of this disclosure, and that the use of engineering practices to integrate such illustrated devices and/or procedures into a data processing system is common. . That is, at least a portion of the devices and/or procedures set forth herein may be integrated into a data processing system via a reasonable amount of experimentation. Those skilled in the art will recognize that a typical data processing system typically includes one or more of the following: a system unit housing; a video display device; a memory such as volatile and non-volatile memory; , such as a microprocessor and digital signal processor; computing entities, such as operating systems, drivers, graphical user interfaces, and applications; one or more interactive devices, such as a trackpad or screen; and/or control system, A feedback loop and control motor are included (eg, feedback for sensing position and/or rate; control motor for moving and/or adjusting components and/or quantities). A typical data processing system can be implemented using any suitable commercially available component, such as those typically found in data computing/communication and/or network computing/communication systems. The subject matter described herein often illustrates different components that are included in or connected to different other components. It should be understood that the architectures depicted are merely illustrative and that many other architectures that achieve the same functionality can be implemented. In a conceptual sense, any group that achieves the same functionality is effectively "associated" to achieve the desired functionality. Thus, regardless of the architecture or the intermediate components, any two components herein combined to achieve a particular functionality are considered to be "associated" with each other to achieve the desired functionality. Similarly, any two components so associated can be considered as "connected" or "coupled" to each other to achieve the desired functionality. Achieve the desired functionality. Specific examples of coupling may include, but are not limited to, components that may be physically and/or physically interacting and/or components that may interact wirelessly and/or wirelessly and/or interact logically and/or may be logically The component of interaction. Although specific aspects of the subject matter described herein have been shown and described, it will be apparent to those skilled in the art that the subject matter of the disclosure herein In the case of a change and modification, and therefore, the scope of the patent application is intended to cover all such changes and modifications as such changes and modifications as the true spirit of the subject matter described herein Within the bounds of the general. Further, it is to be understood that the invention is defined by the scope of the accompanying claims. While the invention has been described with respect to the specific embodiments of the present invention, it is understood that various modifications and embodiments of the invention may be made without departing from the scope and spirit of the invention. Therefore, the scope of the invention should be limited only by the scope of the accompanying claims. It is believed that the present invention and its various advantages are understood by the foregoing description of the invention and the invention may be Change I63677.doc •51 · 201245906 and the meaning of the following patent application scope. The recitations are merely illustrative and encompass such changes. BRIEF DESCRIPTION OF THE DRAWINGS Symmetrical Target Asymmetry Objective FIG. 1A illustrates a cross-sectional view of a metrology target having a structure in accordance with an embodiment of the present invention. Figure 1B illustrates a cross-sectional view of a metrology target having a standard structure in accordance with an embodiment of the present invention. 2 illustrates a cross-sectional view of the effect of a metrology target having one asymmetric target structure and illumination having more than one focus, in accordance with an embodiment of the present invention. Figure 3 illustrates a cross-sectional view of the effect of one of the asymmetric target structures and the illumination having more than one wavelength, in accordance with an embodiment of the present invention. 4A illustrates modeled data obtained from a symmetric target structure at multiple wavelengths in accordance with an embodiment of the present invention. Figure 4B illustrates modeled data obtained from an asymmetric target structure at multiple wavelengths in accordance with an embodiment of the present invention. Figure 5 illustrates a block diagram of a system suitable for providing a quality metric suitable for improving program control in a semiconductor wafer fabrication in accordance with an embodiment of the present invention. Figure 6 illustrates a conceptual diagram of a method suitable for providing a quality metric suitable for improving program control in the fabrication of a semiconductor wafer in accordance with an embodiment of the present invention. Figure 7A illustrates a flow chart of one of the methods suitable for providing one of the quality metrics of program control suitable for improved semiconductor wafer fabrication in accordance with an embodiment of the present invention. Figure 7B illustrates a top plan view of a semiconductor wafer having one of a plurality of fields in accordance with an embodiment of the present invention. Figure 7C illustrates a top plan view of a semiconductor wafer having a plurality of metrology targets and each of the plurality of fields of the wafer, in accordance with an embodiment of the present invention. Figure 8A illustrates a set of modeled overlay inaccuracies data as a function of position on the surface of the wafer in accordance with an embodiment of the present invention. Figure 8B illustrates a set of modeled quality metrics obtained from a plurality of metrology targets in accordance with an embodiment of the present invention. Figure 9 illustrates a flow diagram of one method for metrology outlier removal based on an alternate embodiment of the present invention. Figure 10 illustrates a flow diagram of one of the methods for stacking measurement recipe enhancements in accordance with an alternate embodiment of the present invention. Figure 11 illustrates a set of modeled quality metrics obtained from a plurality of metrology targets at two different wavelengths in accordance with an embodiment of the present invention. Figure 12A illustrates an alternative embodiment for processing a worker in accordance with the present invention.

替代實施例隨參數 —組資料。 一替代實施例用於識別多組 方法之一流程圖。 圖13圖解說明根據本發明之一 處理工具可校正值之變異之一 163677.doc •53· 201245906 圖Μ圖解說明根據本發明之一替代實施例用於產生一或 多個度量衡取樣計劃之一方法之一流程圖。 圖15Α至圖15C圖解說明繪示根據本發明之一替代實施 例處於不同之低品質目標移除位準下之品質度量雲端資料 之多組資料。 圖16Α至圖16D圖解說明繪示根據本發明之一替代實施 例處於不同之低品質目標移除位準下之殘差資料及&amp;2資料 之多組資料。 圖ΠΑ至圖17B圖解說明繪示根據本發明之一替代實施 例在具有及不具有低品質目標替換之情況下的品質度量雲 端資料之多組資料。 圖18A至圖18B圖解說明繪示根據本發明之一替代實施 例在具有及不具有低品質目標替換之情況下的殘差資料及 R2資料之多組資料。 圖19圖解說明根據本發明之一替代實施例之多個目標品 質區之一俯視圖。 圖20A圖解說明根據本發明之一替代實施例之一微影控 制環路之一方塊圖。 圖20B圖解說明根據本發明之一替代實施例用於提供程 序圖徵圖譜之一方法之一流程圖。 圖20C圖解說明根據本發明之一替代實施例隨一晶圓上 之位置而變化之後微影/後蝕刻偏置之一概念圖。 圖20D圖解說明根據本發明之一替代實施例經執行以量 化度量衡結構與一裝置之間的偏置之裝置相關度量衡之一 163677.doc •54· 201245906 概念圖。 圖20E圖解說明根據本發明之—替代實施例配備有一程 序圖徵圖譜器之一微影控制環路之一方塊圖。 【主要元件符號說明】 圖20F圖解說明根據本發明之一替代實施例用於產生程 序圖徵圖譜器可校正值之一方法之一流程圖。 100 疊對度量衡目標 102 對應抗钱劑層目標結構 104 處理層結構 106 疊對 110 非理想度量衡目標 112 目標結構 114 處理層結構 116a 壁角 116 疊對 116b 壁角 118a 抗姓劑層結構之頂部 118b 抗姓劑層結構之底部 202 頂部結構 204 底部結構 206 疊對量測 208 疊對歧義 302 頂部結構 304 底部結構 163677.doc 201245906 306 308 500 502 504 506 506 508 510 512 514 516 518 519 520 600 602 604 608 752 754 1220 1222 1901 疊對量測 疊對歧義 系統 度量衡系統 疊對度量衡系統 半導體晶圓 半導體晶圓 計算系統 程式指令 品質度量產生程式演算法 疊對量測配方最佳化程式 度量衡目標離群值移除程式 可校正值產生程式 取樣計劃產生程式 載體媒體 品質度量產生程序 度量衡信號 疊對演算法 品質度量 場 目標 曲線圖 趨勢線 目標 163677.doc -56- 201245906 1902 第·一品質區 1904 第一品質區 1906 第一品質區 2000 典型微影程序控制環路 2002 光罩 2004 掃描機 2006 程序追蹤模組 2008 非微影程序 2010 微影程序 2012 進階型程序控制(APC)系統 2021 度量衡目標 2022 第一組度量衡結果 2023 度量衡目標 2024 第二組度量衡結果 2026 第一程序圖徵 2034 度量衡目標 2040 程序控制環路 2042 堆疊資訊與設計規則模組 2044 計算度量衡模組 2046 光罩 2048 掃描機 2050 追蹤模組 2052 度量衡系統 2054 程序圖徵圖譜器/程序圖徵圖譜程式模組 163677.doc -57- 201245906 2056 非微影程序 2058 代理目標 2060 裝置相關目標 2062 進階程序控制 ύλΐ 第一深度 &lt;1λ2 另一深度 FI 第一焦點長度 F2 焦點長度 163677.doc -58-Alternative embodiments follow the parameter - group data. An alternate embodiment is for identifying a flow chart of one of a plurality of sets of methods. Figure 13 illustrates one of the variations of the process tool correctable values in accordance with the present invention. 163677.doc • 53· 201245906 illustrates a method for generating one or more metrology sampling plans in accordance with an alternate embodiment of the present invention. One of the flowcharts. 15A through 15C illustrate a plurality of sets of data representing quality metric cloud data at different low quality target removal levels in accordance with an alternate embodiment of the present invention. Figures 16A through 16D illustrate a plurality of sets of data for residual data and &amp; 2 data at different low quality target removal levels in accordance with an alternate embodiment of the present invention. Figure 17B illustrates a plurality of sets of data for quality metric cloud data with and without low quality target replacement in accordance with an alternate embodiment of the present invention. Figures 18A-18B graphically illustrate sets of data for residual data and R2 data with and without low quality target replacement in accordance with an alternate embodiment of the present invention. Figure 19 illustrates a top view of a plurality of target quality regions in accordance with an alternate embodiment of the present invention. Figure 20A illustrates a block diagram of a lithography control loop in accordance with an alternate embodiment of the present invention. Figure 20B illustrates a flow diagram of one of the methods for providing a program map map in accordance with an alternate embodiment of the present invention. Figure 20C illustrates a conceptual diagram of a lithography/post etch bias after a change in position on a wafer in accordance with an alternate embodiment of the present invention. Figure 20D illustrates one of the device related metrics performed to quantify the offset between the metrology structure and a device in accordance with an alternate embodiment of the present invention. 163677.doc • 54· 201245906 Conceptual diagram. Figure 20E illustrates a block diagram of one of the lithography control loops equipped with a program map maper in accordance with an alternate embodiment of the present invention. [Main Element Symbol Description] Fig. 20F illustrates a flow chart of one of the methods for generating a program map map correctable value in accordance with an alternative embodiment of the present invention. 100 stacks of metrology targets 102 Corresponding to the anti-money layer target structure 104 Processing layer structure 106 Stacked pairs 110 Non-ideal metrology targets 112 Target structures 114 Processing layer structures 116a Corners 116 Stacks 116b Corners 118a Anti-surname layer structure top 118b Bottom structure of anti-surname layer structure 202 top structure 204 bottom structure 206 stack pair measurement 208 stack pair ambiguity 302 top structure 304 bottom structure 163677.doc 201245906 306 308 500 502 504 506 506 508 510 512 514 516 518 519 520 600 602 604 608 752 754 1220 1222 1901 Stack-to-measurement stack-to-ambiguity system metrology system stack-to-weight system semiconductor wafer semiconductor wafer computing system program instruction quality metric generation program algorithm stack-to-measurement formula optimization program metrology target off-group value Remove program correctable value generator program sampling plan generation program carrier media quality metric generation program metrics balance signal pair algorithm quality metric field target curve trend line target 163677.doc -56- 201245906 1902 first quality zone 1904 first quality District 1906 First Quality Zone 200 0 Typical lithography program control loop 2002 reticle 2004 scanner 2006 program tracking module 2008 non-lithography program 2010 lithography program 2012 advanced program control (APC) system 2021 metrology target 2022 first set of metrics results 2023 metrics target 2024 Second Group Weights and Measures Results 2026 First Program Diagram 2034 Weights and Measures Targets 2040 Program Control Loops 2042 Stacking Information and Design Rules Module 2044 Calculation Weights and Measures Module 2046 Mask 2048 Scanner 2050 Tracking Module 2052 Weights and Measures System 2054 Program Signs Mapper/Program Graph Program Module 163677.doc -57- 201245906 2056 Non-lithography program 2058 Agent target 2060 Device related target 2062 Advanced program control ύλΐ First depth &lt;1λ2 Another depth FI First focus length F2 Focus length 163677.doc -58-

Claims (1)

201245906 七、申請專利範圍: ι_ 一種用於提供適合於改良一半導體晶圓製作中之程序控 制之一品質度量之電腦實施之方法,其包括以下程序: 自跨一批晶圓中之一晶圓之一個或多個場分佈之複數 個度量衡目標獲取複數個疊對度量衡量測信號,每一疊 對度量衡量測信號對應於該複數個度量衡目標中之一度 量衡目標’該複數個疊對度量衡量測信號係利用一第一 量測配方來獲取; 藉由對每一疊對度量衡量測信號應用複數個疊對演算 法來判定該複數個疊對度量衡量測信號中之每一者之複 數個疊對估計,每一疊對估計係利用該等疊對演算法中 之一者來判定; 藉由利用該複數個疊對估計產生來自該複數個度量衡 目標之該複數個疊對度量衡量測信號中之每一者之一疊 對估計分佈而產生複數個疊對估計分佈;及 利用該所產生複數個疊對估計分佈來產纟第一複數個 品質度量,其中每一品質度量對應於該所產生複數個疊 對估計分佈中之-個疊對估計分佈,每_品質度量係一 對應之所產生疊對估計分佈之一寬度之—函數,每一 質度量進一步係存在於來自-相關聯之度量衡目標之 疊對度量衡量測信號中之不對稱性之一函數。 品 2. 抵晶圓中之一晶圓之一 標獲取複數個疊對度量 如請求項1之方法,其中自跨— 或多個場分佈之複數個度量衡目 衡量測信號包括: 163677.doc 201245906 對跨一批晶圓中之一晶圓之一或多個場分佈之複數個 度量衡目標執行一疊對度量衡量測。 3.如請求項1之方法,其進一步包括: 對該所獲取複數個疊對度量衡量測信號中之至少一些 疊對度量衡量測信號執行一系統偏移(TIS)校正程序。 4·如請求項1之方法,其中該複數個所產生品質度量中之 每一者經組態以自具有實質對稱目標結構之一度量衡目 標識別一疊對偏差。 5·如請求項1之方法,其進一步包括: 自針對該複數個度量衡目標所產生之該複數個品質度 量之刀佈/0著至少一個方向識別該複數個度量衡目標 中之具有大於-選定離群值位準之—品質度量之一或多 個度量衡目標; 判定複數個經校正度量衡目標,其中該複數個經校正 度量衡目標將具有偏離超過―選定離群值位準之一品質 度量之該經識別—或多個度量衡目標排除於該複數個度 量衡目標之外;及 利用該所判定複數個經校正度量衡目標來計算一組可 校正值。 6. 如請求項1之方法,其進一步包括: 將該組可校正值傳輸至-或多個處理工具。 7. 如請求項1之方法,其進一步包括: 自跨該批晶圓中之該晶圓之該—或多個場分佈之該複 數個度量衡目標獲取至少額外複數個疊對度量衡量測信 163677.doc -2- 201245906 號,該至少額外複數個疊對度量衡量測信號中之每—叠 對度量衡量測信號對應於該複數個度量衡目標中之—度 量衡目標,該至少額外複數個疊對度量衡量測信號係利 用至少一額外量測配方來獲取; 藉由對該至少額外複數個量測信號中之每一疊對量測 信號應用該複數個疊對演算法來判定該至少額外複數個 疊對量測信號中之每一者之至少額外複數個疊對估計, 該至少额外複數個疊對估計中之每一者係利用該等疊對 凟异法中之一者來判定; 藉由利用該複數個疊對估計產生來自該複數個度量衡 目標之該至少額外複數個疊對量測信號中之每一者之一 疊對估計分佈而產生至少額外複數個疊對估計分佈;及 利用該所產生至少額外複數個疊對估計分佈來產生至 少額外複數個品質度量,其中該至少額外複數個品質度 量中之母一品質度量對應於該所產生至少額外複數個疊 對估计分佈中之一個疊對估計分佈,該至少額外複數個 品質度量中之每一品質度量係該至少額外複數個疊對估 计分佈中之一對應之所產生疊對估計分佈之一寬度之一 函數; 藉由比較關聯於該第一量測配方之該第一複數個品質 度量之分佈與關聯於該至少一個額外量測配方之該至 &gt;、額外複數個品質度量之一分佈來判定一程序量測配 方。 8.如請求項7之方法,其中該藉由比較關聯於該第一量測 163677.doc 201245906 配方之該第一複數個品質度量之一分佈與關聯於該至少 一個額外量測配方之該至少額外複數個品質度量之一分 佈來判定一程序量測配方包括: 藉由比較關聯於該第一量測配方之該第一複數個品質 度量之一分佈與關聯於該至少一個額外量測配方之該至 少額外複數個品質度量之一分佈來判定一最佳量測配 方’該最佳量測配方與該第一複數個度量之複數個品質 度量相關聯且該至少額外複數個度量具有沿至少一個方 向之一實質最小分佈。 9. 如請求項7之方法,其中該第一量測配方及該至少一個 額外量測配方中之至少一者包括: 一照明波長、一濾光片組態、一照明方向、一焦點位 置或偏振組態中之至少一者。 10. —種用於判定適合於改良一半導體晶圓製作中之程序控 制之一品質度量之電腦實施之方法: 自一批晶圓中之一晶圓之一或多個場之一或多個度量 衡目標獲取一度量衡量測信號; 藉由對該所獲取之度量衡量測信號應用複數個疊對演 算法來判定複數個疊對估計,每一疊對估計係利用該等 疊對决算法中之一者來判定; 利用該複數個疊對估計來產生一疊對估計分佈;及 利用該所產生疊對估計分佈來產生該一或多個度量衡 目標之一品質度量,該品質度量係該所產生疊對估計分 佈之一寬度之一函數,該品質度量經組態以在不對稱疊 163677.doc 201245906 對量測信號情況下為非零,爲 估計 ,該品質度量係該所產生疊對201245906 VII. Scope of Application: ι_ A computer-implemented method for providing a quality metric suitable for improving program control in a semiconductor wafer fabrication, comprising the following procedures: Self-crossing a wafer in a batch of wafers The plurality of metrology targets of the one or more field distributions obtain a plurality of stacked pairs of metric measurement signals, and each of the plurality of pairs of metric measurement signals corresponds to one of the plurality of metrology targets; the plurality of pairs of metrics The measurement signal is obtained by using a first measurement formula; determining a plurality of each of the plurality of overlay measurement metrics by applying a plurality of overlay algorithms to each of the overlay metric measurement signals a stack pair estimate, each stack pair estimate is determined using one of the equal stack algorithms; generating the plurality of overlay metrics from the plurality of weights and targets by using the plurality of stack pairs to estimate One of each of the stacks estimates the distribution to produce a plurality of stacked pairs of estimated distributions; and utilizes the resulting plurality of stacked pairs to estimate the distribution纟 a first plurality of quality metrics, wherein each quality metric corresponds to one of the plurality of stacked pairs of estimated distributions, and each of the _ quality metrics corresponds to a width of the generated pairwise estimated distribution The function, each quality metric is further a function of the asymmetry in the overlay metric measurement signal from the associated metric target. Product 2. A method of obtaining a plurality of stacked pairs of one of the wafers in the wafer, such as the method of claim 1, wherein the plurality of metrological measurements of the self-crossing or the plurality of field distributions include: 163677.doc 201245906 A stack of metric measurements is performed on a plurality of metrology targets across one or more of the field distributions of one of the wafers. 3. The method of claim 1, further comprising: performing a systematic offset (TIS) correction procedure on at least some of the plurality of stacked metric metric signals obtained. 4. The method of claim 1, wherein each of the plurality of generated quality metrics is configured to identify a stack of deviations from a metric target having a substantially symmetrical target structure. 5. The method of claim 1, further comprising: identifying, by the at least one direction from the plurality of quality metrics generated for the plurality of metrology targets, having a greater than - selected distance Group value level - one or more weighting metrics of the quality metric; determining a plurality of corrected metric targets, wherein the plurality of corrected metric targets will have a quality metric that deviates from one of the selected outlier levels Identifying—or multiple metrology targets are excluded from the plurality of metrology targets; and utilizing the determined plurality of corrected metrology targets to calculate a set of correctable values. 6. The method of claim 1, further comprising: transmitting the set of correctable values to - or a plurality of processing tools. 7. The method of claim 1, further comprising: obtaining at least an additional plurality of overlay metrics from the plurality of metrology targets of the one or more field distributions of the wafer in the batch of wafers 163677 .doc -2- 201245906, the at least one additional plurality of pairs of metrics measuring the signal-to-stack metric measurement signal corresponding to the plurality of metrology targets, the at least one additional plurality of pairs of weights and measures The measurement signal is obtained using at least one additional measurement recipe; the at least one additional plurality of stacks is determined by applying the plurality of overlay algorithms to each of the at least one additional plurality of measurement signals At least an additional plurality of stacked pairs of each of the measured signals, each of the at least one additional plurality of stacked pairs being determined using one of the equalized pairs of different methods; The plurality of stacked pair estimates yields at least one additional complex of the one of the at least one additional plurality of pairs of measured signals from the plurality of metrology targets a stack of estimated distributions; and utilizing the generated at least one additional plurality of pairs of estimated distributions to generate at least an additional plurality of quality metrics, wherein the at least one of the plurality of quality metrics has a maternal quality metric corresponding to the at least one additional complex number generated a stackwise estimated distribution of the plurality of stacked pairs of estimated metrics, each of the at least one additional plurality of quality metrics being one of the at least one additional plurality of stacked pairs of estimated distributions corresponding to a width of the generated pairwise estimated distribution a function; by comparing the distribution of the first plurality of quality metrics associated with the first measurement recipe with the distribution of the at least one additional measurement recipe &gt; one of an additional plurality of quality metrics Determine a program measurement recipe. 8. The method of claim 7, wherein the at least one of the first plurality of quality metrics associated with the first measurement 163677.doc 201245906 formula is associated with the at least one additional measurement recipe. Determining, by one of the plurality of quality metrics, a program measurement recipe includes: distributing and correlating to the at least one additional measurement recipe by comparing one of the first plurality of quality metrics associated with the first measurement recipe The at least one additional plurality of quality metrics are distributed to determine an optimal measurement formula 'the optimal measurement recipe is associated with the plurality of quality metrics of the first plurality of metrics and the at least one additional plurality of metrics have along at least one One of the directions is substantially minimally distributed. 9. The method of claim 7, wherein at least one of the first measurement recipe and the at least one additional measurement recipe comprises: an illumination wavelength, a filter configuration, an illumination direction, a focus position, or At least one of the polarization configurations. 10. A computer implemented method for determining a quality metric suitable for improving program control in a semiconductor wafer fabrication: one or more of one or more of the wafers in a batch of wafers The metrology target acquires a metric measurement signal; and applies a plurality of superposition pairs to determine a plurality of superposition pairs by using the obtained metric measurement signal, and each stack estimation algorithm utilizes the equalization algorithm Determining; using the plurality of stacked pair estimates to generate a stack of estimated distributions; and utilizing the generated stacked pair of estimated distributions to generate a quality metric of the one or more metrology targets, the quality metric being generated A function of one of the widths of the stack of estimated distributions, the quality metric being configured to be non-zero in the case of an asymmetric stack 163677.doc 201245906 for the measurement signal, which is an estimate of the quality pair 之不對稱性之一函數。 於自One of the functions of asymmetry. Yu Zi 法,其包括:Law, which includes: 獲取與每一所獲取之疊對度量衡結果相關聯之一品質 度量; 利用每一度量衡目標之該所獲取之疊對度量衡結果及 該相關聯之品質度量來判定該複數個度量衡目標之複數 個經修改疊對值’其中經修改疊對函數係至少一個材料 參數因數之一函數; 產生複數個材料參數因數之一處理工具可校正值函數 及對應於該處理工具可校正值函數之一組殘差; 判定適合於使該組殘差至少實質最小化之該材料參數 因數之一值;及 判定與該組至少實質最小化殘差相關聯之一組過程可 校正值。 12.如請求項11之方法,其中該獲取與每一所獲取之疊對度 量衡結果相關聯之一品質度量包括: 利用一品質度量產生程序來產生每一所獲取之疊對度 163677.doc 201245906 量衡結果之一品質度量。 13·如請求項11之方法’其中該獲取跨一批晶圓中之一晶圓 之-或多個場分佈之複數個度量衡目標中之每一度量衡 目標之一疊對度量衡結果包括: 對跨-批晶圓中之一晶圓之一或多個場分佈之複數個 度量衡目標中之每-度量衡目標執行-疊對量測。 14. 如請求項π之方法,其進一步包括: 將與該組至少實質最小化殘差相關聯之該組處理工具 可校正值傳輸至一或多個處理工具。 15. 如請求項11之方法,其進一步包括: 對該所獲取之複數個疊對度量衡量測信號中之至少一 二叠對度量衡量測信號執行—系統偏移(Tis)校正程序。 16. 如請求項11之方法,其中該經修改疊對函數係至少-個 材料參數因數之一線性函數。 17. 如請求項U之方法,其中該經修改疊對函數係一照明波 長、—焦點位置、-照明方向、—偏振 組態中之至少一者之一函數。 飞慮先片 „於識別處理工具可校正值之一變異之電腦實施之 方法’其包括: 個=一批晶圓中之一晶圓之-或多個場分佈之複數 果;量衡目標中之每-度量衡目標之一叠對度量衡結 :取與每一所獲取之疊對度量衡結果相關聯之一品質 展·量, I63677.doc 201245906 利用每度量衡目標之該所獾^ ^ σ #^ Λ所獲取之疊對度量衡結果及 # 度量衡目標之複數個經修改 晳许县夕 .^ 度量衡目標之該所獲取之品 質度量之一函數; 藉由利用該複數個經修 ^ 斗咕 瑩對值判定對該複數個度量 衡^之該等所獲取之疊對度量衡結果及該等相關聯之 品質度量之複數個隨機選定取樣中之每一者之一組處理 工具可校正值而產生複數組虛 、丑堤理工具可校正值,其中該 等隨機取樣中之每一者具有相同大小;及 識別該複數組處理工具可校正值之一變異。 19. 如請求項18之方法,其中該獲取與每—所獲取之疊對度 量衡結果相關聯之一品質度量包括: 利用一品質度量產生程序來產生每一所獲取之疊對度 量衡結果之一品質度量。 20. 如請求項18之方法,其中該獲取跨一批晶圓中之一晶圓 之一或多個場分佈之複數個度量衡目標中之每一度量衡 目標之一疊對度量衡結果包括: 對跨一批晶圓中之一晶圓之一或多個場分佈之複數個 度量衡目標中之每一度量衡目標執行一曼對量測。 21. —種用於產生一度量衡取樣計劃之電腦實施之方法,其 包括: 自跨一批晶圓中之一晶圓之一或多個場分佈之複數個 度量衡目標獲取複數個疊對度量衡量測信號,每一疊對 度量衡量測信號對應於該複數個度量衡目標中之一度量 163677.doc 201245906 衡目標; 藉由對每一疊對度量衡量測信號應用複數個疊對演算 法來判定該複數個疊對度量衡量測信號中之每一者之複 數個叠對估計,每-疊對估計係利用該等疊對演算法中 之一者來判定; 藉由利用該複數個叠對估計產生來自該複數個度量衡 目標之該複數個疊對度量衡量測信號中之每一者之一疊 對估計分佈而產生複數個疊對估計分佈; 利用該所產生複數個疊對估計分佈來產生第一複數個 品質度量,其中每一品質度量對應於該所產生複數個疊 對估計分佈中之一個疊對估計分佈,每一品質度量進一 步係存在於來自一相關聯之度量衡目標之一疊對度量衡 量測信號中之不對稱性之一函數;及 利用該複數個度量衡目標之該所產生第一複數個品質 度量來產生一或多個度量衡取樣計劃。 22. 如請求項21之方法,其中該利用該複數個度量衡目標之 該所產生第一複數個品質度量來產生一或多個度量衡取 樣計劃包括: 利用該複數個度量衡目標之該所產生第一複數個品質 度量來產生一或多個度量衡取樣計劃以識別一或多個低 品質目標’其中將該一或多個低品質目標排除於該所產 生一或多個度量衡取樣計劃之外。 23. 如請求項21之方法,其中該利用該複數個度量衡目標之 該所產生第一複數個品質度量來產生一或多個度量衡取 163677.doc 201245906 樣计劃包括: 利用該複數個度量衡目標之該所產生第一複數個品質 度量來產生一或多個度量衡取樣計劃以識別該晶圓之一 或多個低品質目標,其中將該一或多個低品質目標排除 於該所產生一或多個度量衡取樣計劃之外且利用接近於 »玄或多個低品質目標定位之一或多個額外度量衡目標 來替換該一或多個低品質目標。 24. 如請求項21之方法,其進一步包括: 利用該第一複數個品質度量來識別該晶圓之複數個品 質區,該等品質區中之每一者包含具有實質類似品質等 級之複數個度量衡目標。 25. 如請求項24之方法,其中跨該晶圓之一或多個位置處之 一度量衡取樣率係由該複數個品質區中之每一者定義。 26. 如請求項21之方法.,其進一步包括: 利用該所產生取樣計劃來對一後續晶圓執行一或多個 度量衡量測。 27_ —種用於提供程序圖徵圖譜之電腦實施之方法,其包 括: 在一光罩上形成複數個代理目標; 在一晶圓上形成複數個裝置相關目標; 藉由比較在一微影程序之後及在該晶圓之一第一姓刻 程序之前自該複數個代理目標獲取之一第—組度量衡結 果與在該晶圓之該第一蝕刻程序之後自該複數個代理目 標獲取之至少一第二組度量衡結果來判定隨跨該晶圓之 163677.doc 201245906 位置而變化之一第—程序圖徵; 使該第一程序圖徵與一特定程序路徑相關; 藉由對該晶圓之該複數個裝置相關目標執行一第一组 度量衡量測來量測在該第,程序之後的一裝置相關 偏置1¾裝置相關偏置係一度量衡結構與該晶圓之一裝 置之間的偏置; 判定隨跨該晶圓之位置而變化之每一額外處理層及該 日日圓之母冑外非微影程序路徑之一額外姓刻圖徵; 量測在每-額外處理層及該晶圓之每一額外非微影程 序路徑之後的一額外裝置相關偏置;及 利用該所判定第一姓刻圖徵及該等額外姓刻圖徵中之 每一者以及該第—所量測裝置相_偏置及每一額外裝置 相關偏置來產生一程序圖徵圖譜資料庫。 28.如請求項27之方法,其中該比較在一微影程序之後及在 該晶圓之一第一蝕刻程序之前自該複數個代理目標獲取 之一第一組度量衡結果與在該晶圓之該第一蝕刻程序之 後自該複數個代理目標獲取之至少一第二組度量衡結果 包括: ° 判疋在一微影_ τ〜攸久隹錄曲圓之一第一蝕刻程序 之前自該複數個代理目標獲取之一第一組度量衡結果與 在該晶圓之該第-钱刻程序之後自該複數個代理目標獲 取之至少一第二組度量衡結果之間的—差。 29.如請求項27之方法,其中藉由在一微影程序之後對該複 數個代理目標執行一第一組度量衡量測而在一微影程序 163677.doc 201245906 之後獲取來自該複數個代理目標之該第一組度量衡結 果0 30. 31. 32. 33 34 35 如清求項27之方法,其中藉由在該晶圓之該第一蝕刻程 序之後對該複數個代理目標執行至少一第二組度量衡量 測而在該晶圓之該第一蝕刻程序之後獲取來自該複數個 代理目標之該至少一第二組度量衡結果。 如叫求項27之方法,其中利用一或多個疊對度量衡程序 來獲取來自該複數個代理目標之該第一組度量衡結果及 來自-亥複數個代理目標之該至少一第二組度量衡結果中 之至少一者。 如請求項27之方法,其中該藉由對該晶圓之該複數個裝 置相關目标執行一第一組度量衡量測來量測在該第一蝕 刻程序之後的一裝置相關偏置包括: 藉由對該晶圓之該福意全個肚 通複數個農置相關目標執行一第一組 度量衡量測來量測在号链 值番㈠ 刻裎序之後的-裝置相關 偏置’該第一組度量衡量測 、 衡罝測係利用—基於CD-SEM之度 量衡系統或一基於AFM之度|你么 重衡糸統中之至少一者來執 订。 如請求項27之方法,其中該光 光罩中之至少一者。 ’、一測試光罩或一產品 如請求項27之方法,其進—步包括. 利用該所產生程序圖徵資料 制環路。 斗來知作一進階型程序控 .如請求項27之方法,其進一步包括. 163677.doc 201245906 產生一組程序圖徵圖譜可校正值。 36.種用於提供適合於改良一半導體晶圓製作中之程序控 制之οσ質度量之系統,其包括以下程序: 一度量衡系統經組態以自跨一批晶圓中之一晶圓之一 或多個場分佈之複數個度量衡目標獲取複數個疊對度量 衡量測信號,每一疊對度量衡量測信號對應於該複數個 度量衡目標中之一度量衡目標,該複數個疊對度量衡量 測k號係利用一第一量測配方來獲取;及 一計算系統經組態以: 藉由對每一疊對度量衡量測信號應用複數個疊對演 算法來判定該複數個疊對度量衡量測信號中之每一者 之複數個疊對估計’每一疊對估計係利用該等疊對演 算法中之一者來判定; 藉由利用該複數個疊對估計產生來自該複數個度量 衡目彳示之該複數個疊對度量衡量測信號中之每一者之 一疊對估計分佈而產生複數個疊對估計分佈;及 利用該所產生複數個疊對估計分佈來產生第一複數 個品質度量’其中每一品質度量對應於該所產生複數 個疊對估計分佈中之一個疊對估計分佈,每一品質度 量係一對應之所產生疊對估計分佈之一寬度之一函 數,每一品質度量進一步係存在於來自一相關聯之度 量衡目標之一疊對度量衡量測信號中之不對稱性之一 函數。 3 7.如„青求項3 6之系統’其中該計算系統進一步經組態以利 163677.doc 201245906 用該所產生第一複數個品質度量來 度量衡目標。 38·如請求項36之系統’其中該計算系紙進 用該所產生第一複數個品質度量來列定 配方。 39. 如請求項36之系統,其中該計算系統進 用該所產生第-複數個品質度量來產生 具可校正值。 40. 如請求们6之系統,其中該計算系統進 用該所產生第一複數個品質度量來產生 劃。 41·如請求項36之系統,其中該計算系統進 生程序圖徵圖譜資料庫。 163677.doc 或多個離群值 步經組態以利 最佳疊對量測 步經組態以利 或多個處理工 步經組態以利 或多個取樣計 步經組態以產 J3Obtaining one of the quality metrics associated with each of the acquired overlay metrics; determining the plurality of metrics of the plurality of metrology targets using the acquired overlay metrics and the associated quality metrics for each metric target Modifying the overlay value 'where the modified overlay function is a function of at least one material parameter factor; generating one of a plurality of material parameter factors processing tool correctable value function and a set of residuals corresponding to the processing tool correctable value function Determining a value of the material parameter factor suitable for at least substantially minimizing the set of residuals; and determining a set of process correctable values associated with the set of at least substantially minimized residuals. 12. The method of claim 11, wherein the obtaining one of the quality metrics associated with each of the acquired overlay weights and measures comprises: utilizing a quality metric generation program to generate each acquired overlay 163677.doc 201245906 A quality measure that measures one of the results. 13. The method of claim 11 wherein the obtaining of one of the plurality of metrology targets across one of the plurality of wafers or the plurality of field distribution targets is a pair of weights and measures. - Each of the plurality of metrology targets of one or more field distributions in one of the wafers - the metrology target execution-stacking measurement. 14. The method of claim π, further comprising: transmitting the set of processing tool correctable values associated with the set of at least substantially minimized residuals to one or more processing tools. 15. The method of claim 11, further comprising: performing a system offset (Tis) correction procedure on the at least one of the plurality of pairs of metric measurement signals obtained. 16. The method of claim 11, wherein the modified overlay function is a linear function of at least one material parameter factor. 17. The method of claim U, wherein the modified overlay function is a function of at least one of an illumination wavelength, a focus position, an illumination direction, and a polarization configuration. A computer-implemented method for identifying a variation of one of the correction values of a processing tool, which includes: one = one of a plurality of wafers - or a plurality of field distributions; One of each of the weights and measures targets is a pair of weights: a quantity of quality exhibited by each of the acquired pairs of weights and measures, I63677.doc 201245906 Using each of the weights and measures of the target ^ ^ σ #^ Λ The obtained pair of weights and measures results and the number of the weighted and measured targets are modified by the stipulations of the metrics. One of the quality metrics obtained by the weighting and measuring target; by using the plurality of repaired 咕 咕 对 对Generating a complex array of virtual and ugly values for each of the plurality of randomly selected samples of the plurality of weighted weights and the plurality of randomly selected samples of the associated quality metrics The levee tool can correct the value, wherein each of the random samples has the same size; and identify one of the correctable values of the complex array processing tool. 19. The method of claim 18, The obtaining of one of the quality metrics associated with each of the acquired overlay weights and measures comprises: utilizing a quality metric generation program to generate a quality metric for each of the acquired overlay metrics results. The method, wherein the obtaining of one of a plurality of metrology targets across one or more of the plurality of wafers in one of the plurality of wafers is a stacking of the weights and measures, including: one of the plurality of wafers across the wafer Each of the plurality of metrology targets of the one or more field distributions performs a man-pair measurement for each of the metrology targets. 21. A computer implemented method for generating a metrology sampling plan, comprising: A plurality of metrology targets of one or more field distributions of one of the wafers acquires a plurality of overlay metric measurement signals, and each stack metric measurement signal corresponds to one of the plurality of metrology targets 163677 .doc 201245906 balance target; determining the complex number of pairs of metrics in the measured signal by applying a plurality of stacked pairs to each pair of metric measurement signals a plurality of stacked pair estimates, each of which is determined by one of the equal stack algorithms; the plurality of stacks from the plurality of weights and targets are generated by using the plurality of stacked pairs Generating a plurality of stacked pairs of estimated distributions for each of the metrics of the measured signals; generating a first plurality of quality metrics using the plurality of stacked pairs of estimated distributions, wherein each quality metric corresponds to And estimating a distribution of the plurality of stacked pairs of estimated distributions, each quality metric further being a function of asymmetry in a pair of metric measurement signals from an associated metrology target; And generating the one or more metrology sampling plans using the first plurality of quality metrics generated by the plurality of metrology targets. 22. The method of claim 21, wherein the generating the one or more metrology sampling plans using the first plurality of quality metrics generated by the plurality of metrology targets comprises: utilizing the plurality of metrology targets to generate the first A plurality of quality metrics are generated to generate one or more metrology sampling plans to identify one or more low quality targets 'excluding the one or more low quality targets from the one or more metrology sampling plans generated. 23. The method of claim 21, wherein the utilizing the first plurality of quality metrics generated by the plurality of metrology targets to generate one or more metrics 163677.doc 201245906-like plan includes: utilizing the plurality of metrology targets Generating a first plurality of quality metrics to generate one or more metrology sampling plans to identify one or more low quality targets of the wafer, wherein the one or more low quality targets are excluded from the generated one or The one or more low quality targets are replaced by a plurality of metrology sampling plans and with one or more additional metrology targets that are close to one or more low quality target locations. 24. The method of claim 21, further comprising: utilizing the first plurality of quality metrics to identify a plurality of quality regions of the wafer, each of the quality regions comprising a plurality of substantially similar quality levels Weights and measures targets. 25. The method of claim 24, wherein a metrology sampling rate at one or more locations across the wafer is defined by each of the plurality of quality regions. 26. The method of claim 21, further comprising: performing one or more metric measurements on a subsequent wafer using the generated sampling plan. 27_ - A computer implemented method for providing a program map map, comprising: forming a plurality of proxy targets on a reticle; forming a plurality of device-related targets on a wafer; by comparing a lithography program And obtaining at least one of the first set of metrology results from the plurality of proxy targets and the at least one obtained from the plurality of proxy targets after the first etching process of the wafer, before the first surname program of the wafer a second set of metrology results to determine a change in the position of the 163677.doc 201245906 across the wafer - the program flag is associated with a particular program path; A plurality of device-related targets perform a first set of metric measurements to measure a device-dependent offset after the program, the device-related offset is a bias between a weight-loss structure and a device of the wafer; Determining each additional processing layer that varies with the location of the wafer and one of the outer non-lithographic process paths of the day of the Japanese yen; additional measurements are performed at each additional processing layer An additional device-related offset after each additional non-lithographic program path of the wafer; and utilizing the determined first surname signature and each of the additional surname signatures and the first The measurement device phase offset and each additional device related offset are used to generate a program map map library. 28. The method of claim 27, wherein the comparing obtains one of the first set of metrology results from the plurality of proxy targets after a lithography procedure and prior to the first etch process of the wafer with the wafer The at least one second set of weights and measures obtained from the plurality of proxy targets after the first etching process comprises: determining the number of the first etching process from one of the lithography _ τ 攸 隹 隹 录The proxy target obtains a difference between the first set of weighted results and the at least one second set of weighted results obtained from the plurality of proxy targets after the first-money program of the wafer. 29. The method of claim 27, wherein obtaining a plurality of proxy targets from a lithography program 163677.doc 201245906 by performing a first set of metric measurements on the plurality of proxy targets after a lithography program The method of claim 27, wherein the method of claim 27, wherein at least one second is performed on the plurality of proxy targets after the first etching process of the wafer The group metric measures the at least one second set of metrology results from the plurality of proxy targets after the first etch process of the wafer. The method of claim 27, wherein the one or more overlays are used to obtain the first set of metrology results from the plurality of proxy targets and the at least one second set of metrology results from the plurality of proxy targets At least one of them. The method of claim 27, wherein the measuring a device-related offset after the first etching process by performing a first set of metric measurements on the plurality of device-related targets of the wafer comprises: Performing a first set of metrics on the target of the wafer for the benefit of the wafer, the first set of metrics is measured to measure the value of the number in the chain (a) after the sequence - the device-related offset 'the first group Metric measurement, balance measurement system utilization - CD-SEM based measurement and measurement system or a degree based on AFM | You pay attention to at least one of the system to order. The method of claim 27, wherein at least one of the light shields. A test reticle or a product, such as the method of claim 27, further comprising: utilizing the generated program pattern data to make a loop. It is known as an advanced program control. The method of claim 27, which further includes. 163677.doc 201245906 Generates a set of program map map correctable values. 36. A system for providing a quality metric suitable for improving program control in a semiconductor wafer fabrication, the method comprising the steps of: a metrology system configured to self-span one of a plurality of wafers Or a plurality of metrology targets of the plurality of field distributions to obtain a plurality of pairs of metric measurement signals, each of the pair of metric measurement signals corresponding to one of the plurality of metrology targets, the plurality of overlay metrics The number is obtained using a first measurement recipe; and a computing system is configured to: determine the plurality of overlay metric measurement signals by applying a plurality of overlay algorithms to each of the overlay metric measurement signals a plurality of stacked pairs of estimates for each of the 'overlap pairs' estimates are determined using one of the equal stacking algorithms; by using the plurality of stacked pairs of estimates to generate a plurality of scales from the plurality of scales And the plurality of stacked pairs of metrics measure one of each of the measured signals to produce a plurality of stacked pairs of estimated distributions; and using the generated plurality of stacked pairs to estimate the distribution Generating a first plurality of quality metrics, wherein each of the quality metrics corresponds to one of the plurality of stacked pairs of estimated distributions, and each of the quality metrics corresponds to a width of the generated pairwise estimated distribution A function, each quality metric is further a function of one of the asymmetry in the overlay metric measurement signal from one of the associated metrology targets. 3 7. The system of the claim 36, wherein the computing system is further configured to benefit 163677.doc 201245906 to measure the target using the first plurality of quality metrics generated. 38. The system of claim 36 Wherein the computing system uses the first plurality of quality metrics generated to formulate the formula. 39. The system of claim 36, wherein the computing system uses the generated first-plural quality metrics to produce a correctable 40. The system of claim 6, wherein the computing system uses the generated first plurality of quality metrics to generate a stroke. 41. The system of claim 36, wherein the computing system enters a program map data Library 163677.doc or multiple outliers are configured to facilitate the optimal stacking step configuration to facilitate or multiple processing steps configured to facilitate or multiple sampling steps configured J3
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