TWI565100B - An electronic component bracket with a roughened surface - Google Patents

An electronic component bracket with a roughened surface Download PDF

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Publication number
TWI565100B
TWI565100B TW103103099A TW103103099A TWI565100B TW I565100 B TWI565100 B TW I565100B TW 103103099 A TW103103099 A TW 103103099A TW 103103099 A TW103103099 A TW 103103099A TW I565100 B TWI565100 B TW I565100B
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Taiwan
Prior art keywords
electronic component
wafer
layer
plating
bracket
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TW103103099A
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Chinese (zh)
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TW201530821A (en
Inventor
Jun-Ming Lin
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Jun-Ming Lin
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Priority to TW103103099A priority Critical patent/TWI565100B/en
Priority to CN201410296414.3A priority patent/CN104157626A/en
Publication of TW201530821A publication Critical patent/TW201530821A/en
Application granted granted Critical
Publication of TWI565100B publication Critical patent/TWI565100B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Description

具有粗化表面的電子元件支架 Electronic component holder with roughened surface

本發明係為一種電子元件支架,尤指一種應用在封裝型電子元件中,且具有粗化表面的電子元件支架,能夠提高晶片或焊線與支架之間的良導性,並增加封裝體在支架上的附著力及結合強度,以增進產品結構的信賴度。 The invention relates to an electronic component bracket, in particular to an electronic component bracket applied in a package type electronic component and having a roughened surface, which can improve the goodness between the wafer or the bonding wire and the bracket, and increase the package body in Adhesion and bonding strength on the bracket to enhance the reliability of the product structure.

封裝型電子元件應用在各種技術中,例如半導體、二極體、積體電路元件(IC)等,一般封裝型電子元件至少包含一晶片承載部、一架設晶片承載部上的晶片、複數導電接腳,以及一包覆在晶片承載部及晶片外圍的封裝體,封裝體主要是保護晶片避免受到化學腐蝕及物理損壞(如碰撞和劃傷),且複數導電接腳裸露在封裝體外側,以便將電子元件安裝(焊接)在電路板上,與電路系統電連接。 The packaged electronic component is used in various technologies, such as a semiconductor, a diode, an integrated circuit component (IC), etc., and a general packaged electronic component includes at least one wafer carrying portion, a wafer on the wafer carrying portion, and a plurality of conductive connections. a foot, and a package covering the wafer carrier and the periphery of the wafer, the package mainly protecting the wafer from chemical corrosion and physical damage (such as collision and scratch), and the plurality of conductive pins are exposed on the outside of the package, so that The electronic components are mounted (welded) on the circuit board and electrically connected to the circuitry.

一般封裝型電子元件支架的製造過程,以表面黏著型發光二極體(SMD Type LED)為例,是先將金屬鈑片沖壓後形成複數整齊排列的金屬本體,再將金屬本體進行表面電鍍完成支架,每一支架具有一晶片承載部和複數導電接腳,其中晶片承載部位置另以塑膠射出製程設置有碗狀基座,以下簡述包含支架之後續製程: In the manufacturing process of a general packaged electronic component holder, a surface-mounted LED (SMD Type LED) is taken as an example. The metal sheet is stamped to form a plurality of metal bodies arranged in a neat manner, and then the metal body is surface-plated. Each of the brackets has a wafer carrying portion and a plurality of conductive pins, wherein the wafer carrying portion is further provided with a bowl-shaped base by a plastic injection process, and the following is a brief description of the subsequent processes including the bracket:

(A)線架成型:在支架的晶片承載部及導電接腳的頂面射出成型一碗狀基座(亦有部分插件式(DIP Type)電子元件是直接將晶片承載部製成碗狀,無需額外射出成型)。 (A) Wireframe forming: a bowl-shaped base is formed on the top surface of the wafer carrying portion of the bracket and the conductive pin (some DIP Type electronic components are directly formed into a bowl shape, No additional injection molding is required).

(B)固晶:將晶片設置於晶片承載部上。 (B) Solid crystal: The wafer is placed on the wafer carrier.

(C)打線:將焊線連接於晶片與導電接腳之間。 (C) Wire bonding: The wire is connected between the wafer and the conductive pin.

(D)封裝:在碗狀基座內填充矽膠(silicon)或環氧樹脂(ePoxy)作為封裝體, 以包覆、固定及保護晶片與焊線,最後再將支架外緣從金屬鈑片上切斷,即可獲得表面黏著型發光二極體的完成品。 (D) Package: Fill the bowl base with silicone or epoxy (ePoxy) as the package. In order to cover, fix and protect the wafer and the bonding wire, and finally cut off the outer edge of the bracket from the metal cymbal, the finished product of the surface-adhesive light-emitting diode can be obtained.

在製造過程中,上述碗狀基座和晶片都是固定在支架上,但支架的表面平滑,無法有效地提高碗狀基座在支架上的附著力以及晶片對支架的良導性,加上電子元件運作時會產生高熱,不同材質的部件本身又具有不同的膨脹係數,導致各部件間結合的可靠度無法增加。其他如插件式發光二極體、覆晶式電子元件也是直接在支架上設置封裝體包覆晶片,該封裝體與支架間同樣有結合強度不足的問題,影響產品的市場競爭力。 In the manufacturing process, the bowl base and the wafer are fixed on the bracket, but the surface of the bracket is smooth, and the adhesion of the bowl base on the bracket and the good guiding property of the wafer to the bracket can not be effectively improved. When the electronic components operate, high heat is generated, and the components of different materials have different expansion coefficients, so that the reliability of the bonding between the components cannot be increased. Others, such as plug-in light-emitting diodes and flip-chip electronic components, are also provided with a package-coated wafer directly on the support. This package also has a problem of insufficient bonding strength between the package and the support, which affects the market competitiveness of the product.

或許製造過程中,封裝體是呈現與支架穩固結合的狀態,但在長時間使用下,還是可能因為材質膨脹收縮讓封裝體從支架上脫離。為了解決上述缺失,習知技術專利公開第201316557號,便在線架成型後於碗狀基座內側噴砂,使碗狀基座內側與支架之晶片承載部為粗糙面,增加晶片對封裝體對碗狀基座的附著力,以期能改善晶片與支架的固定強度。 Perhaps during the manufacturing process, the package is in a state of being firmly bonded to the bracket, but under long-term use, the package may be detached from the bracket due to expansion and contraction of the material. In order to solve the above-mentioned defects, the prior art patent publication No. 201316557, after the wire frame is formed, sandblasts the inside of the bowl base, so that the inner side of the bowl base and the wafer bearing portion of the bracket are rough, and the wafer is added to the package to the bowl. The adhesion of the pedestal to improve the fixing strength of the wafer and the support.

然而,經本發明人以多年從事相同技術領域之經驗得知,由於支架係由一金屬本體、一被覆於金屬本體上的底鍍層以及一被覆於底鍍層上的表層所組成,而前揭公開專利案在碗狀基座成型後,方於碗狀基座內側噴砂,但碗狀基座、封裝體還是固定在光滑的支架表層上,與支架間的結合的強度未能有效地改善,影響產品的使用壽命。 However, the inventors have learned from the experience of the same technical field for many years that the stent is composed of a metal body, a bottom plating layer coated on the metal body, and a surface layer coated on the bottom plating layer. After the bowl-shaped base is formed, sandblasting is performed on the inside of the bowl-shaped base, but the bowl-shaped base and the package are fixed on the surface of the smooth bracket, and the strength of the joint with the bracket is not effectively improved, affecting the product. The service life.

此外,若支架使用在發光二極體時,其後續製程中需要「打線」以完成晶片與支架中另一接腳的電連接,然而該先前技術的噴砂製程,並未針對「打線」製程改善焊線和支架之間的附著力及良導性加以改善,因此在實務上仍有改良的必要。 In addition, if the bracket is used in a light-emitting diode, it needs to be "wired" in the subsequent process to complete the electrical connection between the wafer and another pin in the bracket. However, the prior art sandblasting process is not improved for the "wire" process. The adhesion and good conductance between the wire and the bracket are improved, so there is still a need for improvement in practice.

事實上,支架的底鍍層和表層都是使用電鍍工法,若能改變電鍍工法使整個支架都有附著力,便能省略後續噴砂的步驟,又可以增進支架與其他部件的結合強度,有效節省製造成本。 In fact, the bottom plating and surface layer of the bracket are all made by electroplating. If the plating method can be changed to make the whole bracket have adhesion, the subsequent sand blasting step can be omitted, and the bonding strength between the bracket and other components can be enhanced, thereby effectively saving manufacturing. cost.

有鑑於此,本發明人乃累積多年相關領域的研究以及實務經驗,特發明出一種具有粗化表面的電子元件支架,以解決習知支架與其他部件之間結合強度不足的缺失。 In view of this, the inventors have accumulated years of research and practical experience in related fields, and have invented an electronic component holder having a roughened surface to solve the lack of bonding strength between the conventional stent and other components.

本發明之目的在於提供一種具有粗化表面的電子元件支架,該支架可供各種具有晶片的封裝型電子元件使用,例如半導體、二極體、積體電路元件(IC)等,且支架的粗化表面能夠增加與其他部件的結合面積,亦能提高晶片或焊線與支架之間的良導性,提昇結構信賴度和產品品質,延長產品的使用壽命讓產品更具市場競爭力。 It is an object of the present invention to provide an electronic component holder having a roughened surface, which can be used for various packaged electronic components having a wafer, such as a semiconductor, a diode, an integrated circuit component (IC), etc., and the support is thick. The surface can increase the bonding area with other components, improve the goodness between the wafer or the wire and the bracket, improve the structural reliability and product quality, and extend the service life of the product to make the product more competitive in the market.

為達成上述目的,本發明為一種具有粗化表面的電子元件支架,該支架具有一晶片承載部,以及複數導電接腳,所述晶片承載部及導電接腳表面具有一分層電鍍的底鍍層,以及一被覆於底鍍層表面的表層,其中,所述底鍍層至少有一層電鍍層為經過緞面電鍍製程所構成,使其表層的表面呈粗化凹凸面,能夠增加支架在後續固晶、打線或封裝等製造程序時,提高晶片與支架表層之間的附著力及良導性,並增加支架與封裝體等部件之間的結合力與密閉性,使各元件能夠穩固地與支架結合;除了上述提高晶片及封裝體等部件在支架上的附著力及結合力以外,若使用在例如發光二極體等,需要「打線」製程的電子元件時,經粗化的表層亦可以增加其表面積而提高焊線與支架表層之間的結合力與良導性,進而增加產品的信賴度。 In order to achieve the above object, the present invention is an electronic component holder having a roughened surface, the holder having a wafer carrying portion and a plurality of conductive pins, the wafer carrying portion and the conductive pin surface having a layered plated underplating layer And a surface layer coated on the surface of the underlying plating layer, wherein at least one of the plating layers of the underlying plating layer is formed by a satin plating process, and the surface of the surface layer is roughened and uneven, which can increase the subsequent solidification of the support, When manufacturing processes such as wire bonding or packaging, the adhesion and goodness between the wafer and the surface layer of the support are improved, and the bonding force and airtightness between the support and the package are increased, so that the components can be firmly coupled to the support; In addition to the above-mentioned improvement of the adhesion and bonding force of the components such as the wafer and the package on the holder, when an electronic component such as a light-emitting diode is used, which requires a "wire-bonding" process, the roughened surface layer can also increase its surface area. The bonding strength and goodness between the bonding wire and the surface layer of the bracket are improved, thereby increasing the reliability of the product.

以下進一步說明各元件之實施方式:實施時,該底鍍層為鎳、銅,或其他合金材質以不同電鍍模式分層電鍍所形成,表層則為銀或其他高導電性材質電鍍所形成;金屬鈑片沖壓形成複數整齊排列的金屬本體後,該金屬本體在表面進行電鍍工法,以分層電鍍形成底鍍層,其中至少有一層電鍍層為緞面電鍍製程,所述緞面電鍍製程比一般電鍍製程的表面更為粗糙,能形成粗化凹凸面,在後續底鍍層、表層進行一般電鍍製程後,便完成支架的電鍍程序,且表層仍可維持為粗化凹凸面的表面,增加與其他部件間的結合面積,提升結構強度。 The following further describes the implementation of each component: when implemented, the underplating layer is formed by layer plating of nickel, copper, or other alloy materials in different plating modes, and the surface layer is formed by plating of silver or other highly conductive material; After the sheet is stamped to form a plurality of neatly arranged metal bodies, the metal body is plated on the surface to form a bottom plating layer by layer plating, wherein at least one of the plating layers is a satin plating process, and the satin plating process is more than a general plating process The surface of the surface is rougher, and the roughened surface can be formed. After the subsequent plating process and the surface layer are subjected to a general plating process, the plating process of the stent is completed, and the surface layer can be maintained as a surface of the roughened surface, which is increased between other parts. The combined area enhances structural strength.

實施時,底鍍層的中心線平均粗糙度介於0.1~0.46μm之間,最佳粗糙度介於0.152~0.411μm之間。 In implementation, the centerline average roughness of the underplating layer is between 0.1 and 0.46 μm, and the optimum roughness is between 0.152 and 0.411 μm.

實施時,底鍍層的最大高度粗糙度(Ry)介於0.78~2.22μm之間,最佳粗糙度介於0.834~2.174μm之間。 In practice, the maximum roughness (Ry) of the underlying layer is between 0.78 and 2.22 μm, and the optimum roughness is between 0.834 and 2.174 μm.

實施時,底鍍層的十點平均粗糙度(Rz)介於0.82~3.29μm之間,最佳粗糙度介於0.921~3.242μm之間。 In practice, the ten-point average roughness (Rz) of the underlying layer is between 0.82 and 3.29 μm, and the optimum roughness is between 0.921 and 3.242 μm.

實施時,該電子元件為具有晶片的封裝型電子元件,例如半導體、二極體、發光二極體、積體電路元件(IC)等。 In implementation, the electronic component is a packaged electronic component having a wafer, such as a semiconductor, a diode, a light emitting diode, an integrated circuit component (IC), or the like.

藉由上述構造,本發明可供各種具有晶片的封裝型電子元件使用,且支架表層的凹凸面能夠增加晶片、焊線或封裝體等部件在支架上的附著力及良導性,長時間使用下也能夠穩固地與支架結合,增進支架與其他部件結合的信賴度。 According to the above configuration, the present invention can be used for various packaged electronic components having a wafer, and the uneven surface of the surface layer of the support can increase the adhesion and good conductivity of the components such as the wafer, the bonding wire or the package on the support, and is used for a long time. The bottom can also be firmly combined with the bracket to enhance the reliability of the combination of the bracket and other components.

再者,此支架使用在發光二極體時,粗化凹凸面還能讓發光二極體晶片之光線均勻漫射,維持較佳的發光亮度,並可以提高發光二極體的良率,讓產品更具市場競爭力。 Moreover, when the bracket is used in the light emitting diode, the roughening of the concave and convex surface can evenly diffuse the light of the light emitting diode chip, maintain a better light emitting brightness, and can improve the yield of the light emitting diode, so that Products are more competitive in the market.

相較於習知技術,本發明具有以下優點: Compared with the prior art, the present invention has the following advantages:

1.可供各種具有晶片的封裝型電子元件使用,例如半導體、二極體、積體電路元件(IC)等。 1. It can be used for various packaged electronic components having wafers, such as semiconductors, diodes, integrated circuit components (ICs), and the like.

2.支架表層的凹凸面能夠增加與其他部件的結合面積,藉此讓支架在後續進行固晶、打線或封裝等製造程序時,提昇晶片或焊線與支架表層之間的附著力及良導性。 2. The concave and convex surface of the surface of the bracket can increase the bonding area with other components, thereby enhancing the adhesion and guidance between the wafer or the surface of the soldering wire and the surface of the bracket during subsequent manufacturing processes such as die bonding, wire bonding or packaging. Sex.

3.支架表層的凹凸面能增加支架與封裝體等部件之間的結合力與密閉性,使各元件能夠穩固地與支架結合。 3. The uneven surface of the surface layer of the bracket can increase the bonding force and airtightness between the bracket and the package, so that the components can be firmly coupled with the bracket.

4.若使用在例如發光二極體等,需要「打線」製程的電子元件時,經粗化的表層亦可以增加其表面積而提高焊線與支架表層之間的結合力及良導性,進而增加產品結構的信賴度。 4. When using an electronic component such as a light-emitting diode that requires a "wire-bonding" process, the roughened surface layer can also increase the surface area thereof to improve the bonding force and good conductance between the bonding wire and the surface layer of the stent, and further Increase the reliability of the product structure.

5.能避免各部件從支架上脫離,延長產品的使用壽命讓產品更具市場競爭力。 5. It can avoid the detachment of each component from the bracket and prolong the service life of the product to make the product more competitive in the market.

6.使用在發光二極體時,能讓發光二極體晶片之光線均勻漫射,維持較佳的發光亮度。 6. When using the light-emitting diode, the light of the light-emitting diode chip can be uniformly diffused to maintain a good light-emitting brightness.

以下依據本發明之技術手段,列舉出適於本發明之實施方式,並配合圖式說明如後: In the following, according to the technical means of the present invention, embodiments suitable for the present invention are listed, and the following description is in conjunction with the drawings:

100‧‧‧表面黏著型發光二極體 100‧‧‧Surface Adhesive Light Emitting Diode

200‧‧‧插件式發光二極體 200‧‧‧Plug-in LED

300‧‧‧電子元件 300‧‧‧Electronic components

10‧‧‧支架 10‧‧‧ bracket

11‧‧‧晶片承載部 11‧‧‧ wafer carrier

12‧‧‧導電接腳 12‧‧‧Electrical pins

13‧‧‧定位空間 13‧‧‧Location space

14‧‧‧碗狀基座 14‧‧‧Bowl base

20‧‧‧底鍍層 20‧‧‧ bottom plating

21‧‧‧緞面電鍍層 21‧‧‧Satin plating

22‧‧‧一般電鍍層 22‧‧‧General plating

30‧‧‧表層 30‧‧‧ surface layer

40‧‧‧晶片 40‧‧‧ wafer

50‧‧‧封裝體 50‧‧‧Package

第一圖:本發明使用在表面黏著型電子元件之外觀示意圖。 First figure: A schematic view of the appearance of the surface-adhesive electronic component used in the present invention.

第二圖:本發明使用在表面黏著型電子元件之局部放大立體圖。 Second Figure: A partially enlarged perspective view of a surface-adhesive electronic component used in the present invention.

第三圖:本發明使用在插件式電子元件之外觀示意圖。 Third figure: A schematic view of the appearance of the plug-in type electronic component used in the present invention.

第四圖:本發明使用在插件式電子元件之局部放大立體圖。 Fourth Figure: A partially enlarged perspective view of a plug-in electronic component used in the present invention.

第五圖:本發明之底鍍層第一實施例結構放大示意圖。 Fig. 5 is an enlarged schematic view showing the structure of the first embodiment of the undercoat layer of the present invention.

第六圖:本發明之底鍍層第二實施例結構放大示意圖。 Figure 6 is a schematic enlarged view showing the structure of the second embodiment of the undercoat layer of the present invention.

第七圖:本發明應用在插件式發光二極體的結構示意圖。 Figure 7 is a schematic view showing the structure of the plug-in type light-emitting diode according to the present invention.

第八圖:本發明應用在表面黏著型發光二極體的結構示意圖。 Figure 8 is a schematic view showing the structure of the surface-adhesive light-emitting diode of the present invention.

第九圖:本發明應用在其他具有晶片之電子元件的結構示意圖。 Figure 9 is a schematic view showing the structure of the present invention applied to other electronic components having wafers.

本發明為一種具有粗化表面的電子元件支架,實施時,該電子元件可為具有晶片的封裝型電子元件,例如半導體、二極體、發光二極體、積體電路元件(IC)等。 The present invention is an electronic component holder having a roughened surface. When implemented, the electronic component can be a packaged electronic component having a wafer, such as a semiconductor, a diode, a light emitting diode, an integrated circuit component (IC), or the like.

如第一圖到第六圖所示,本發明製造時先將金屬鈑片沖壓形成複數整齊排列的金屬支架10,每一金屬支架10具有一晶片承載部11,以及複數導電接腳12,所述晶片承載部11及導電接腳12表面具有一分層電鍍的底鍍層20,以及一被覆底鍍層20表面的表層30;其中,第一及第二圖係揭示本發明使用在表面黏著型發光二極體100時,在金屬支架10的晶片承載部11外圍尚設有一利用塑膠射出成型的碗狀基座14。第三及第四圖則以插件式發光二極體200的支架為例,晶片承載部11直接製造成碗狀,且支架表面依序電鍍底鍍層20和表層30。 As shown in the first to sixth figures, the metal sheet is first stamped into a plurality of neatly arranged metal brackets 10, each of which has a wafer carrying portion 11 and a plurality of conductive pins 12, The surface of the wafer carrying portion 11 and the conductive pin 12 has a layer plating bottom plating layer 20 and a surface layer 30 covering the surface of the bottom plating layer 20; wherein, the first and second drawings disclose the surface adhesion type light emitted by the present invention. In the case of the diode 100, a bowl-shaped base 14 formed by plastic injection molding is provided on the periphery of the wafer carrier 11 of the metal holder 10. The third and fourth figures are exemplified by the bracket of the plug-in type LED 201. The wafer carrying portion 11 is directly formed into a bowl shape, and the surface of the holder is sequentially plated with the undercoat layer 20 and the surface layer 30.

如第五圖所示,底鍍層20為三層,其中有一層為經過緞面電鍍製程所形成的緞面電鍍層21,該緞面電鍍層21比一般電鍍層22的表面更為粗糙,以形成粗化凹凸面,在支架10表層30進行一般電鍍製程後, 仍可維持粗化凹凸面的表面,使支架10在後續固晶、封裝等製造程序時,可以提高晶片40、焊線或封裝體50等部件在支架10上的附著力,穩固地與支架10結合。或者如第六圖所示,底鍍層20之緞面電鍍層21是被覆在底鍍層20的表面,表層30再被覆於緞面電鍍層21上。 As shown in the fifth figure, the undercoat layer 20 is three layers, one of which is a satin plating layer 21 formed by a satin plating process, and the satin plating layer 21 is rougher than the surface of the general plating layer 22, Forming a roughened surface, after the general plating process of the surface layer 30 of the stent 10 The surface of the roughened surface can still be maintained, so that the support of the wafer 10, the bonding wire or the package 50 and the like on the support 10 can be improved when the support 10 is subsequently subjected to a manufacturing process such as die bonding, packaging, etc., and the support 10 is stably Combine. Alternatively, as shown in the sixth drawing, the satin plating layer 21 of the under plating layer 20 is coated on the surface of the underlying plating layer 20, and the surface layer 30 is further coated on the satin plating layer 21.

如第七圖所示,係本發明應用在表面黏著型發光二極體100的結構示意圖。該支架10具有一呈平面的晶片承載部11,以及複數導電接腳12;支架10在進行完電鍍底鍍層20的製程後,會在晶片承載部11與複數導電接腳12頂面射出成型一碗狀基座14,後續再進行固晶、打線、封裝等製程;因晶片承載部11和複數導電接腳12的表面具有粗化凹凸面,讓碗狀基座14、晶片40能分別與支架10穩固地結合,解決習知技術中晶片40、焊線或碗狀基座14與支架10之間結合不穩固的缺失。 As shown in the seventh figure, the present invention is applied to the structure of the surface-adhesive light-emitting diode 100. The holder 10 has a planar wafer bearing portion 11 and a plurality of conductive pins 12; after the plating of the underlying plating layer 20 is completed, the carrier 10 is formed on the top surface of the wafer carrying portion 11 and the plurality of conductive pins 12. The bowl-shaped pedestal 14 is subsequently subjected to a process of solid crystal bonding, wire bonding, packaging, etc.; since the surface of the wafer carrying portion 11 and the plurality of conductive pins 12 has a roughened surface, the bowl-shaped pedestal 14 and the wafer 40 can be respectively supported by the bracket 10 firmly combined to solve the lack of stability of the bonding between the wafer 40, the wire or the bowl base 14 and the stent 10 in the prior art.

此外,第七圖所示之表面黏著型發光二極體100在製程中需要「打線」,俾能夠將晶片40與導電接腳12電連接,而本創作因表層經過粗化,因此亦可以增加表層的表面積而提高焊線與支架表層之間的結合力及良導性,進而增加產品的信賴度。 In addition, the surface-adhesive LED assembly 100 shown in FIG. 7 needs to be "wired" in the process, and the wafer 40 can be electrically connected to the conductive pin 12, and the creation can be increased by roughening the surface layer. The surface area of the surface layer improves the bonding force and good conductivity between the bonding wire and the surface layer of the support, thereby increasing the reliability of the product.

如第八圖所示,以插件式發光二極體200為例,該支架10的晶片承載部11為中央凹陷四周隆起的形狀,二導電接腳12分別設置在晶片承載部11左右兩側,且其中一導電接腳12與晶片承載部11之間具有斷開的定位空間13;支架10在進行完電鍍底鍍層20的製程後,晶片承載部11和二導電接腳12的表面即具有粗化凹凸面,使晶片承載部11上設置晶片40、焊線或封裝體50包覆在晶片40和晶片承載部11外圍時,能夠提高晶片40或焊線與支架10表層的附著力及良導性,亦能增加支架10與封裝體50等部件之間的結合面積與密閉性,使各元件能夠穩固地與支架10結合。 As shown in the eighth embodiment, the wafer-mounting portion of the holder 10 is embossed around the central recess, and the two conductive pins 12 are respectively disposed on the left and right sides of the wafer carrying portion 11, And a conductive positioning space 13 is formed between the conductive pin 12 and the wafer carrying portion 11; after the plating of the underlying plating layer 20 is completed, the surface of the wafer carrying portion 11 and the two conductive pins 12 are thick. When the wafer 40, the bonding wire or the package 50 is disposed on the periphery of the wafer 40 and the wafer carrier 11 on the wafer carrying portion 11, the adhesion and guiding of the wafer 40 or the bonding wire to the surface layer of the holder 10 can be improved. The bonding area and the sealing property between the bracket 10 and the package 50 and the like can also be increased, so that the components can be firmly coupled with the bracket 10.

如第九圖所示,係本發明應用在其他具有晶片40之電子元件300的結構示意圖。該支架10具有複數晶片承載部11,以及複數導電接腳12;支架10在進行完電鍍底鍍層20的製程後,直接在晶片承載部11上設置晶片40後進行封裝製程,將晶片40和晶片承載部11包覆在封裝體50內,支架10表層30的粗化凹凸面讓晶片40、焊線或封裝體50能增加與支 架10的結合面積,提升結構強度和產品品質,延長產品的使用壽命。 As shown in the ninth figure, the present invention is applied to other structural diagrams of electronic components 300 having wafers 40. The holder 10 has a plurality of wafer carrying portions 11 and a plurality of conductive pins 12; after the plating of the underlying plating layer 20 is performed, the wafers 10 are directly disposed on the wafer carrying portion 11 and then packaged, and the wafers 40 and wafers are processed. The carrying portion 11 is wrapped in the package 50, and the roughened surface of the surface layer 30 of the bracket 10 allows the wafer 40, the bonding wire or the package 50 to be increased and supported. The combined area of the frame 10 enhances the structural strength and product quality and prolongs the service life of the product.

實施時,支架10之底鍍層20可為鎳、銅,或其他合金材質以不同電鍍模式分層電鍍所形成,表層30則為銀或其他高導電性材質電鍍所形成。 In practice, the bottom plating layer 20 of the stent 10 may be formed by layer plating of nickel, copper, or other alloy materials in different plating modes, and the surface layer 30 is formed by plating of silver or other highly conductive materials.

實施時,底鍍層20的中心線平均粗糙度介於0.1~0.46μm之間,最佳粗糙度介於0.152~0.411μm之間。 In implementation, the centerline average roughness of the underlying layer 20 is between 0.1 and 0.46 μm, and the optimum roughness is between 0.152 and 0.411 μm.

實施時,底鍍層20的最大高度粗糙度(Ry)介於0.78~2.22μm之間,最佳粗糙度介於0.834~2.174μm之間。 When implemented, the maximum roughness (Ry) of the underlying layer 20 is between 0.78 and 2.22 μm, and the optimum roughness is between 0.834 and 2.174 μm.

實施時,底鍍層20的十點平均粗糙度(Rz)介於0.82~3.29μm之間,最佳粗糙度介於0.921~3.242μm之間。 When implemented, the ten-point average roughness (Rz) of the underlying layer 20 is between 0.82 and 3.29 μm, and the optimum roughness is between 0.921 and 3.242 μm.

藉由上述構造,本發明可供各種具有晶片40的封裝型電子元件使用,且支架10表層的凹凸面能夠增加晶片40、焊線或封裝體50等部件與支架10之間的附著力及良導性,長時間使用下也能夠穩固地與支架10結合,增進支架10與其他部件結合的信賴度。再者,此支架10使用在發光二極體時,粗化凹凸面還能讓發光二極體晶片40之光線均勻漫射,維持較佳的發光亮度及均勻度,並可以提高發光二極體的良率,讓產品更具市場競爭力。 With the above configuration, the present invention can be used for various package type electronic components having the wafer 40, and the uneven surface of the surface of the holder 10 can increase the adhesion between the member such as the wafer 40, the bonding wire or the package 50, and the holder 10. The conductivity can be firmly combined with the stent 10 under long-term use, and the reliability of the combination of the stent 10 and other components is enhanced. Moreover, when the bracket 10 is used in the light emitting diode, the roughened concave and convex surface can evenly diffuse the light of the light emitting diode chip 40, maintain better brightness and uniformity of light emission, and can improve the light emitting diode. The yield makes the product more competitive in the market.

以上之實施說明及圖式所示,係舉例說明本發明之較佳實施例者,並非以此侷限本發明;舉凡與本發明之構造、裝置、特徵等近似或相雷同者,均應屬本發明之創設目的及申請專利範圍之內。 The above description of the embodiments and the drawings are intended to illustrate the preferred embodiments of the present invention, and are not intended to limit the present invention; the embodiments, devices, features, etc., which are similar or identical to the present invention, should be The purpose of the invention is set and the scope of the patent application.

10‧‧‧支架 10‧‧‧ bracket

11‧‧‧晶片承載部 11‧‧‧ wafer carrier

12‧‧‧導電接腳 12‧‧‧Electrical pins

14‧‧‧碗狀基座 14‧‧‧Bowl base

Claims (5)

一種具有粗化表面的電子元件支架,該支架具有一晶片承載部,以及複數導電接腳,所述晶片承載部及導電接腳表面具有一鎳、銅,或其他合金等材質以不同電鍍模式分層電鍍的底鍍層,以及一被覆在底鍍層表面以銀或其他高導電性材質電鍍的表層,其中,所述分層電鍍的底鍍層至少有一層電鍍層為經過緞面電鍍製程所構成,使其表層的表面呈粗化凹凸面,能夠增加支架在後續固晶、打線或封裝等製造程序時,提高晶片或焊線與支架之間的附著力及良導性,並增加支架與封裝體等部件之間的結合力與密閉性。 An electronic component holder having a roughened surface, the holder having a wafer carrying portion and a plurality of conductive pins, the wafer carrying portion and the surface of the conductive pin having a material such as nickel, copper, or other alloys in different plating modes a layered bottom plating layer, and a surface layer coated with silver or other highly conductive material on the surface of the bottom plating layer, wherein the layer plating bottom plating layer has at least one plating layer formed by a satin plating process, The surface of the surface layer has a roughened surface, which can increase the adhesion and good conductivity between the wafer or the wire and the support during the subsequent manufacturing processes such as die bonding, wire bonding or packaging, and increase the support and the package. Bonding force and tightness between parts. 如申請專利範圍第1項所述之具有粗化表面的電子元件支架,其中,底鍍層的中心線平均粗糙度介於0.1~0.46μm之間。 The electronic component holder having a roughened surface according to claim 1, wherein the bottom plating has a center line average roughness of between 0.1 and 0.46 μm. 如申請專利範圍第1項所述之具有粗化表面的電子元件支架,其中,底鍍層的最大高度粗糙度(Ry)介於0.78~2.22μm之間。 The electronic component holder having a roughened surface according to claim 1, wherein the bottom plating layer has a maximum height roughness (Ry) of between 0.78 and 2.22 μm. 如申請專利範圍第1項所述之具有粗化表面的電子元件支架,其中,底鍍層的十點平均粗糙度(Rz)介於0.82~3.29μm之間。 The electronic component holder having a roughened surface according to claim 1, wherein the undercoat has a ten point average roughness (Rz) of between 0.82 and 3.29 μm. 如申請專利範圍第1項所述之具有粗化表面的電子元件支架,其中,該電子元件為具有晶片的封裝型電子元件。 An electronic component holder having a roughened surface as described in claim 1, wherein the electronic component is a packaged electronic component having a wafer.
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