TWI564640B - Transflective liquid crystal panel - Google Patents

Description

Semi-transflective liquid crystal panel

The present invention relates to a transflective liquid crystal panel, and more particularly to a transflective liquid crystal panel capable of reducing driving complexity.

Conventional liquid crystal panels include transmissive, reflective, and transflective panels. Transmissive panels have high display quality, but are not suitable for use in high ambient light environments; reflective panels reflect external light to display images, because they do not require a backlight and have the advantage of power saving, but they cannot be used in dimly lit environments. And because of the lack of brightness and color saturation, it is generally used to display low-quality images. The transflective panel combines the advantages of both modes to drive through the sub-pixels and reflector sub-pixels to accommodate a variety of display needs.

However, the existing transflective panel architecture presents a problem of driving complexity. Figure 1 is a diagram showing the construction of a sub-pixel array of a conventional transflective panel. In Fig. 1, T represents a penetrating sub-pixel; R represents a reflecting sub-pixel; Col[n], Col[n+1], Col[n+2], Col[n+3], Col[n+4 ], Col[n+5] represents the data line in the row direction; Row[m], Row[m+1], Row[m+2], Row[m+3], Row[m+4], Row[ m+5] represents the gate line in the column direction. It can be seen from Fig. 1 that the penetrating sub-pixel T and the reflecting sub-pixel R are alternately arranged in the column direction and the row direction, and the penetrating sub-pixel T and the reflecting sub-pixel R are sequentially driven.

However, if the driver IC is based on the same gamma curve (gray scale is bright The degree curve) provides the driving voltage to the penetrating sub-pixel T and the reflecting sub-pixel R, because the voltage-luminance curves of the two do not match, resulting in poor display quality, and because of the penetrating sub-pixel T and the reflection sub-picture The charge residual phenomenon of the element R is different, and problems such as flicker or image persistence may occur. On the other hand, if the driver IC drives the penetrating sub-pixel T and the reflecting sub-pixel R according to an individual gamma curve, for a single data line, it must be switched to another gate every time the gate line is scanned. The voltage corresponding to the gamma curve drives the penetrating sub-pixel T or the reflecting sub-pixel R; for all data lines, when the gate line scans one column, the source driver must simultaneously output the penetrating region gamma curve Corresponding voltage and voltage corresponding to the gamma curve of the reflection area to each data line. Therefore, the conventional transflective panel requires complicated data processing, the driver IC requires high computing power, and the power consumption of the driver IC is also high.

In view of the above problems, an object of the present invention is to provide a transflective liquid crystal panel capable of reducing driving complexity, improving driving efficiency, and attempting to reduce power consumption by a new layout method.

According to the present invention, there is provided a transflective liquid crystal panel comprising: a plurality of sub-pixels arranged in a row direction and a column direction to form a sub-pixel array; a plurality of first wires extending in a column direction or a row direction; a plurality of second wires parallel to the first wire, wherein the plurality of sub-pixels include a penetrating sub-pixel and a reflection sub-pixel, and each column and each row of the sub-pixel array have the penetrator The pixels and the reflection sub-pixels are connected to the first wire and driven by the first wire, and the reflection sub-pixels are connected to the second wire and driven by the second wire.

Transflective liquid crystal panel in one embodiment of the present invention The first wire and the second wire are gate lines extending in a column direction, and the first wire and the second wire are alternately arranged in a row direction.

In a transflective liquid crystal panel according to another embodiment of the present invention, the first wire and the second wire are gate lines extending in a column direction, and the first wire and the second wire are disposed in each Between the adjacent sub-pixels. The first wire includes a first electrode layer and a second electrode layer.

In the above two embodiments, one of the penetrating sub-pixels and one of the reflecting sub-pixels are alternately arranged in the column direction and the row direction. Alternatively, one of the penetrating sub-pixels and one of the reflecting sub-pixels are alternately arranged in the row direction, and three of the penetrating sub-pixels and three of the reflecting sub-pixels are alternately arranged in the column direction.

In a transflective liquid crystal panel according to an embodiment of the present invention, the first wire and the second wire are data lines extending in a row direction, and the first wire and the second wire are alternately arranged in a column direction. .

In a transflective liquid crystal panel according to another embodiment of the present invention, the first wire and the second wire are data lines extending in a row direction, and the first wire and the second wire are disposed in each pair Between adjacent sub-pixel rows. The first wire includes a first electrode layer and a second electrode layer.

In the above two embodiments, one of the penetrating sub-pixels and one of the reflecting sub-pixels are alternately arranged in the column direction and the row direction. In the column direction, one of the penetrating sub-pixels and one of the reflecting sub-pixels are alternately arranged, and three of the penetrating sub-pixels and three of the reflecting sub-pixels are alternately arranged in the row direction.

According to another embodiment of the present invention, the transflective liquid crystal panel of the present invention further includes: a plurality of third wires and a plurality of fourth wires, wherein the data lines extend in a row direction, wherein the penetrating sub-pictures Connecting the third wire and by the first The three-wire driving, the reflective sub-pixels are connected to and driven by the fourth wire, and the third wire and the fourth wire are alternately arranged in the column direction.

According to the above embodiments, the present invention can reduce the driving complexity, improve the driving efficiency, and try to reduce the power consumption by a new layout method or a new driving method.

T‧‧‧ penetrating sub-pixel

R‧‧‧reflector

Col‧‧‧ data line

CKH‧‧‧ signal

G‧‧‧Information content

GAMMA‧‧‧gamma curve voltage corresponding unit

POL‧‧‧polar counterpart

Tgamma‧‧·penetrating gamma curve voltage corresponding components

Rgamma‧‧·Reflex gamma curve voltage corresponding component

S‧‧‧ data output

SW‧‧‧Switch unit

Row‧‧‧ gate line

Red zone of RED‧‧ color filters

GREEN‧‧‧Color filter green area

Blue area of BLUE‧‧ color filters

Figure 1 is a diagram showing the construction of a sub-pixel array of a conventional transflective panel.

Fig. 2 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 1 of the present invention.

Fig. 3 is a view showing an example of the pixel array of Fig. 1 with a color filter.

Fig. 4 is a view showing an example of the pixel array of Fig. 1 with a color filter.

Fig. 5 is a view showing an example of the pixel array of Fig. 1 with a color filter.

Fig. 6 is a view showing an example of the pixel array of Fig. 1 with a color filter.

Fig. 7a is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 2 of the present invention.

Figure 7b shows a schematic cross-sectional view of the gate line bridge across another gate line.

Fig. 8 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 3 of the present invention.

Fig. 9 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 4 of the present invention.

Fig. 10 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 5 of the present invention.

Fig. 11 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 6 of the present invention.

Fig. 12 is a view showing the construction of a sub-pixel array of a transflective panel of Embodiment 7 of the present invention.

Figure 13 is a view showing the construction of a sub-pixel array of a transflective panel of Embodiment 8 of the present invention.

Fig. 14a is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 9 of the present invention.

Figure 14b is a diagram showing the layout of the sub-pixel array data polarity of the transflective panel of Embodiment 9 of the present invention.

Fig. 14c is another layout showing the polarity of the sub-pixel array data of the transflective panel of the ninth embodiment of the present invention.

Fig. 15 is an explanatory view showing a driving embodiment of the transflective panel of the first embodiment of the present invention.

Fig. 16 is an explanatory view showing a driving embodiment of the transflective panel of the first embodiment of the present invention.

Embodiments of the present invention will be described below with reference to the drawings. Fig. 2 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 1 of the present invention.

As can be seen from Fig. 2, the penetrating sub-pixel T and the reflecting sub-pixel R are, in the same manner as the conventional technique, a chess pattern in which the row direction is alternately arranged in the row direction. However, only the reflective sub-pixel R of the first column is connected to the first gate line Row[m], and the penetrating sub-pixel T of the first column is not connected to the first gate line Row[m]. Connect to the second gate line Row[m+1]. The second column of sub-pixels T is also connected to the second gate line Row[m+1], and the second column of reflection sub-pixels R is connected to the third gate line Row[m+2]. The following columns and so on, the adjacent two columns of reflective sub-pixels R share a gate line, the adjacent two columns of penetrating sub-pixels T share a gate line, until the last column (Figure 2 The reflection sub-pixel R of the sixth column is connected to the seventh gate line Row[m+6]. In addition, the data line adopts a general configuration mode, and each line of data lines is connected to the line including all sub-pixels of the sub-pixel T and the reflection sub-pixel R, and penetrates the sub-pixel T and the reflector. The pixels R are alternately arranged in the row direction. The number of penetrating sub-pixels T and the reflecting sub-pixels R of the sub-pixel array are even numbers. For example, under the condition of full HD resolution, the number of penetrating sub-pixels T is 3,110,400 (1920*3*1080). /2), and the number of reflection sub-pixels R is also 3,110,400 (1920*3*1080/2). In Figure 2, only one of the 6*6 sub-pixel matrices is taken as an illustration.

Each of the gate lines except the first and last strips in the sub-pixel array of Embodiment 1 sequentially connects the upper and lower sub-pixels in the column direction. For convenience of description, the present invention The configuration method is called "flip arrangement". Therefore, the configuration of the first embodiment can be simply referred to as "gate line flip configuration, general configuration of data lines".

In Embodiment 1, the penetrating sub-pixel T and the reflecting sub-pixel R are each connected to different gate lines. In other words, each gate line is only used to drive the penetrating sub-pixel T and the reflecting sub-pixel R. One of them. Compared with the prior art, although one more need is needed The gate line Row[m+6], but for each column scanned during the panel driving, the source driver does not need to frequently read the voltage corresponding to the gamma curve of the penetration region and the voltage corresponding to the gamma curve of the reflection region and output to All the data lines, as long as the voltage corresponding to a gamma curve is read and output to all data lines, and even the gate line group corresponding to the sub-pixel T and the corresponding reflector sub-pixel R can be connected. The polar line group scans separately, and the source driver only needs to read the gamma curve gray scale voltage of the corresponding penetration area and output to all data lines when scanning the gate line group corresponding to the penetration sub-pixel T, and vice versa. The same applies to the scanning of the gate line group corresponding to the reflective sub-pixel R, so that the driving complexity can be greatly reduced. The penetrating sub-pixel T and the reflective sub-pixel R are respectively connected to different gate lines, and the gate line corresponding to the penetrating sub-pixel T (for example, the penetration mode in indoor or dark places) may be separately scanned according to the situation. Alternatively, or separately scanning the gate line of the corresponding reflective sub-pixel R (for example, outdoor or power-saving reflective mode), it is helpful to save power and display requirements of the handheld device.

15 and 16 are schematic views of a driving embodiment. Figure 15 shows a sub-pixel array. The total number of rows formed by the penetrating sub-pixel T and the reflecting sub-pixel R is n and the total number of columns is m, the number of gate lines is 2m+1, and the number of data lines is n. The penetrating sub-pixel T and the reflecting sub-pixel R are respectively connected to each gate line in a flipping configuration, wherein the reflective sub-pixel R is connected to the odd-numbered column gate line, and the penetrating sub-pixel T is connected to the even-numbered column gate line. The data line is connected to both the penetrating sub-pixel T and the reflecting sub-pixel R. Figure 16 shows a source driver (IC driver) circuit component connection mode and its output data content, including a gamma curve voltage corresponding unit GAMMA, which has a gamma curve voltage corresponding component Tgamma and a reflected gamma curve voltage Corresponding component Rgamma; polarity corresponding unit POL, respectively connected to the switch unit SW and the gamma curve voltage corresponding unit GAMMA; the switch unit SW, connected to the data output terminal S, a plurality of pairs of six (may also be a pair of three, a pair of nine, One-to-four or one-to-eight...etc. one-to-many solution multiplexer (DEMUX) connects the data output terminal S, receives the data signal, and controls the data signal G sorting and addressing mode by the signals CKH[1]~CKH[6].

As shown in Figures 15 and 16, the number of even-numbered gate lines Row[2]~Row[m] is L, and the even-numbered column gate lines Row[2]~Row[m] are penetrating sub-pixels T. The data content G[1] of the corresponding gate line Row[2] is R1_1, G1_1, B1_1, R1_2, G1_2_B1_2...R1_(n/3), G1_(n/3), and B1_(n/3), The rest of the data content G[2]~G[L] and so on. The odd column gate line Row[1]~Row[m+1] is L+1, and the odd column gate line Row[1]~Row[m+1] is the reflection subpixel R, corresponding to the odd column. The data content G[L+1] of the gate line Row[1] is r1_1, b1_1, g1_2, ..., g1_(n/3), and the rest of the data content G[L+2]~G[2L+1] So on and so forth. Among them, since even rows such as Col[2], Col[4], etc. do not have corresponding reflector sub-pixels R connected to the gate line Row[1], the data content G[L+1] is in Col[ 2], Col[4]... and other even lines do not have data content. Similarly, because the odd lines such as Col[1], Col[3], etc. do not have corresponding reflector sub-pixels R and gates. The polar line Row[m+1] is connected, so the data content G[2L+1] has no data content in odd lines such as Col[1], Col[3].

Since the penetrating sub-pixel T and the reflective sub-pixel R are respectively connected to different gate lines, the scanning timing of the gate line, the scanning frequency of the gate line, or the data type output by the data line can be controlled. To achieve power saving, optical gamma curve matching, inversion or flicker reduction. As shown in Figures 15 and 16, in a mix mode, the even-numbered column gate lines Row[2]~Row[m] corresponding to the penetrating sub-pixel T are scanned sequentially, after the scan is completed. The odd-numbered column gate lines Row[1]~Row[m+1] corresponding to the reflection sub-pixel R are successively scanned. In a through mode (T-mode), the even-numbered column gate lines Row[2]~G[m] corresponding to the penetrating sub-pixel T are sequentially scanned, and after the scanning is completed, at a lower frequency (for example, normal) 1/6 of the scanning frequency scans the odd-numbered column gate lines Row[1]~Row[m+1] corresponding to the reflection sub-pixel R, and gives the data content G[L+1]~G of the reflection sub-pixel R [2L+1] is a low gray level or a 0 gray level (black), and the Rgamma of the source driver can obtain a longer idle time so that the power saving effect for indoor use can be achieved. In a reflection mode (R-mode), the odd-numbered column gate lines Row[1]~G[m+1] corresponding to the reflection sub-pixel R are sequentially scanned, and after the scanning is completed, at a lower frequency (for example, normal) 1/6 of the scanning frequency is scanned corresponding to the even-numbered column gate lines Row[2]~Row[m] of the penetrating sub-pixel T, and the data content of the penetrating sub-pixel T is given to G[1]~G[L ] For low gray scale or 0 gray scale (black), the source driver Tgamma can obtain a longer idle time, which will achieve the power saving effect for outdoor use.

Figures 3 through 6 show examples of pixel arrays with color filters in Figure 1. The color filter matched with the sub-pixel array of the transflective panel of Embodiment 1 can also adopt the three colors of red (RED), green (GREEN), and blue (BLUE) as shown in FIG. The vertical stripe color filter covering a sub-pixel row, the adjacent three-color penetrating or reflecting sub-pixel forms a complete pixel that can display white. Further, even in the case of the vertical stripe color filter, as shown in FIG. 4, the color filter directly above the reflection sub-pixel R can be excavated so that the reflection sub-pixel R displays only the gray scale (ie, White, gray, black), used to display high-quality simple information, such as time or warning patterns, in power-saving mode (turning off the backlight) or outdoor display. Compared with the vertical stripe type color filter, the color filter may also adopt a red (RED), green (GREEN), and blue (BLUE) color as shown in FIG. 5 to sequentially cover a sub-pixel array. The horizontally striped color filter, adjacent to the three-color penetrating or reflecting sub-pixel, forms a complete pixel that can display white. Similarly, the horizontal stripe color filter can also be as shown in Fig. 6, The color filter directly above the reflection sub-pixel R is excavated so that the reflection sub-pixel R displays only the gray scale. The color filter may also be arranged in a red (RED), green (GREEN), or blue (BLUE) three-color oblique stripe manner, or may be arranged in an island-like manner to present a uniform mosaic pattern.

The above describes an example of a color green light sheet in which the sub-pixel array of the transflective panel of the first embodiment can be matched, but the present invention is not limited thereto, and the color filter combination is not necessarily only red ( RED), GREEN, BLUE, or red (RED), green (GREEN), blue (BLUE), white (WHITE), or red (RED), green (GREEN) ), blue (BLUE) and yellow (YELLOW) four colors, and even other colors. Similarly, the adjacent four-color penetrating or reflecting sub-pixel forms a complete pixel that can display white.

Fig. 7a is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 2 of the present invention. As shown in Fig. 7a, the gate lines Row[m] and Row[m+1] are arranged between the first column of sub-pixels and the second column of sub-pixels; the gate lines Row[m+2] and Row[m] +3] is arranged between the third column sub-pixel and the fourth column sub-pixel; the gate lines Row[m+4] and Row[m+5] are arranged between the fifth column sub-pixel and the sixth column sub-pixel . The gate line Row[m] connects all of the reflective sub-pixels R of the first column and the second column, and the gate line Row[m+1] connects all of the penetrating sub-pixels T of the first column and the second column. Similarly, the gate line Row[m+2] connects all the reflector sub-pixels R in the third column and the fourth column, and the gate line Row[m+3] connects all the penetrators in the third column and the fourth column. Picture T. The gate line Row[m+4] connects all the reflective sub-pixels R in the fifth column and the sixth column, and the gate line Row[m+5] connects all the penetrating sub-pixels T in the fifth column and the sixth column. .

Embodiment 2 is the same as Embodiment 1, each gate line is only used to drive One of the sub-pixel T and the reflection sub-pixel R is penetrated, so that the same effect as in Embodiment 1 can be achieved. However, the configuration of Embodiment 2 is such that two gate lines are disposed between each pair of adjacent sub-pixel columns, since one gate line must alternately connect the sub-pixels of the previous column with the next column in the column direction. The sub-pixel, as shown in Figure 7b, in which a gate line (such as Row[m+1]) will bridge across another gate line (such as Row[m]), changing the two gate lines. In the relative position in the row direction, the second electrode layer M2 and the insulating layer I which are the bridge portions are added to the first electrode layer M1 which is the gate line, and the insulating layer I is opened. A via electrically connects the second electrode layer M2 of the bridge portion with the first electrode layer M1. The data lines are generally configured. Each line of data lines is connected to the line including all sub-pixels that penetrate the sub-pixel T and the reflection sub-pixel R.

The configuration of the sub-pixel array of the second embodiment is because the two adjacent gate lines are interlaced with each other. Therefore, for convenience of description, the present invention refers to the arrangement of such wires as "staggered configuration". In this way, the structure of the second embodiment can be referred to as "gate line staggered configuration, data line general configuration". Embodiment 2 In addition to the effect of Embodiment 1, the number of gate lines is the same as the total number of columns, and no additional one is required.

Fig. 8 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 3 of the present invention. As shown in Fig. 8, the gate lines are generally arranged, and the gate lines of each column are connected to the column including all sub-pixels that penetrate the sub-pixel T and the reflection sub-pixel R. However, only the reflective sub-pixel R of the first row is connected to the first data line Col[n], and the penetrating sub-pixel T of the first row is not connected to the first data line Col[n] but is connected. To the second data line Col[n+1]. The second line of penetrating sub-pixels T is also connected to the second data line Col[n+1], and the second line of reflecting sub-pixels R is connected to the third data line Col[n+2]. The following lines and so on, the adjacent two rows of reflectors The prime R shares a data line, and the adjacent two columns of the penetrating sub-pixels T share a data line until the reflective sub-pixel R of the last column (the sixth line in FIG. 2) is connected to the seventh data line. Col[n+6].

According to the above-described naming manner of the structures of the first and second embodiments, the configuration of the third embodiment can be referred to as "normal configuration of the gate line, configuration of the data line flipping". In Embodiment 3, the penetrating sub-pixel T and the reflecting sub-pixel R are each connected to different data lines. In other words, each data line is only used to output data to the penetrating sub-pixel T and the reflecting sub-pixel R. One of them. Compared with the prior art, although one piece of data Col[n+6] needs to be added, for any data line, the voltage corresponding to the same gamma curve can be continuously supplied to drive the penetrating sub-pixel T or Reflecting the sub-pixel R, it is not necessary to switch different gamma curves with scanning, which can reduce the driving complexity and achieve power saving effect.

Fig. 9 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 4 of the present invention. As shown in Fig. 9, the data lines Col[m] and Col[n+1] are arranged between the first row of subpixels and the second row of subpixels; the data lines Col[n+2] and Col[n +3] is configured between the third row of subpixels and the fourth row of subpixels; the data lines Col[n+4] and Col[n+5] are arranged in the fifth row of subpixels and the sixth row of subpixels between. The data line Col[n] connects all of the reflection sub-pixels R of the first row and the second row, and the data line Col[n+1] connects all of the penetrating pixels T of the first row and the second row. Similarly, the data line Col[n+2] connects all the reflective sub-pixels R in the third row and the fourth row, and the data line Col[n+3] connects all the penetrating sub-pixels in the third row and the fourth row. T. The data line Col[n+4] is connected to all the reflection sub-pixels R in the fifth row and the sixth row, and the data line Col[n+5] is connected to all the penetrating sub-pixels T in the fifth row and the sixth row.

In the fourth embodiment, as in the third embodiment, each data line is only used to provide data to one of the penetrating sub-pixel T and the reflection sub-pixel R, so that it can be achieved. Example 3 has the same effect. However, the configuration of Embodiment 4 is that two data lines are arranged between each pair of adjacent sub-pixel rows, since one data line must alternately connect the sub-pixels of the previous row and the sub-pixels of the next row in the row direction. Therefore, one of the data lines will be bridged across another data line. Referring to Figure 7b of Embodiment 2, the relative positions of the two data lines in the column direction are changed. The gate lines are generally arranged, and the gate lines of each column are connected to the column including all the pixels that penetrate the sub-pixel T and the reflection sub-pixel R. Therefore, the configuration of the fourth embodiment can be referred to as "normal configuration of gate lines, staggered configuration of data lines".

The above embodiment is applied to a sub-pixel array in which the sub-pixel T and the reflection sub-pixel R are alternately arranged in one unit in the column direction and the row direction. However, the sub-pixel array of the transflective panel is not limited to the above layout, and the penetrating sub-pixel T and the reflective sub-pixel R may be alternated in the column direction by two, three or four. Arrangement, a structure in which the rows are alternately arranged in units of one row. In this configuration, the wire arrangement of the embodiments 5 and 6 of the present invention can be employed.

Fig. 10 is a view showing the construction of a sub-pixel array of the transflective panel of Embodiment 5 of the present invention. In the fifth embodiment, the configuration of the "gate line flip configuration, the data line general configuration" is adopted, and the penetrating sub-pixel T and the reflection sub-pixel R are alternately arranged in the column direction in three units, and one in the row direction. A configuration in which the units are alternately arranged. Therefore, the fifth embodiment is substantially the same as the concept of the first embodiment, and the same effects as those of the first embodiment can be achieved. When scanning the panel for each column, the source driver does not need to simultaneously output the voltage corresponding to the gamma curve of the penetration region and the voltage corresponding to the gamma curve of the reflection region to all the data lines, and only one of the gamma curves corresponding to the output is output. The voltage can therefore reduce drive complexity.

Figure 11 is a view showing a transflective surface of Embodiment 6 of the present invention. The construction of the subpixel array of the board. In the sixth embodiment, the configuration of the "gate line interleaving configuration, the data line general configuration" is adopted, and the penetrating sub-pixel T and the reflection sub-pixel R are alternately arranged in the column direction in three units, and one in the row direction. A configuration in which the units are alternately arranged. Therefore, the sixth embodiment is substantially the same as the concept of the second embodiment, and the same effects as those of the second embodiment can be achieved.

The pixel array of the transflective panel can also be alternately arranged in the row direction by two, three or four in the penetrating sub-pixel T and the reflecting sub-pixel R, one in the column direction The structure in which the units are alternately arranged. In this configuration, the wire arrangement of the embodiments 7 and 8 of the present invention can be employed.

Fig. 12 is a view showing the construction of a sub-pixel array of a transflective panel of Embodiment 7 of the present invention. In the seventh embodiment, the configuration of the "gate line general configuration, data line flip configuration" is adopted, and the penetrating sub-pixel T and the reflection sub-pixel R are alternately arranged in three rows in the row direction, in the column direction. A configuration in which the units are alternately arranged. Therefore, the embodiment 7 is substantially the same as the concept of the embodiment 3, and the same effects as those of the third embodiment can be achieved. For any data line, the voltage corresponding to the same gamma curve can be continuously supplied to drive the penetrating sub-pixel T or the reflection sub-pixel R, so there is no need to switch different gamma curves with scanning, Reduce drive complexity.

Figure 13 is a view showing the construction of a sub-pixel array of a transflective panel of Embodiment 8 of the present invention. In the eighth embodiment, the configuration of the "gate line general configuration, data line interleaving configuration" is adopted, and the penetrating sub-pixel T and the reflection sub-pixel R are alternately arranged in three rows in the row direction, in the column direction. A configuration in which the units are alternately arranged. Therefore, the embodiment 8 is substantially the same as the concept of the embodiment 4, and the same effects as those of the embodiment 4 can be achieved.

In addition to the arrangement of the above-described first to eighth embodiments, the present invention proposes an arrangement of "gate line inversion configuration and data line inversion configuration". Fig. 14 is a view showing the construction of a sub-pixel array of a transflective panel of Embodiment 9 of the present invention. As shown in Fig. 14, any gate line is connected only to one of the penetrating sub-pixel T and the reflection sub-pixel R, and any data line is only connected to the penetrating sub-pixel T and the reflector sub-picture. One of the prime R. Therefore, in combination with the effects of Embodiment 1 and Embodiment 3, the source driver does not need to simultaneously output the voltage corresponding to the gamma curve of the penetration region and the voltage corresponding to the gamma curve of the reflection region to every time one column is scanned during panel driving. The data line, as long as the voltage corresponding to one of the gamma curves is output. Moreover, for any data line, the voltage corresponding to the same gamma curve can be continuously supplied to drive the penetrating sub-pixel T or the reflection sub-pixel R, so that it is not necessary to switch different gamma curves with scanning. Can reduce drive complexity.

Figure 14b is a diagram showing the layout of the sub-pixel array data polarity of the transflective panel of Embodiment 9 of the present invention. As shown in Fig. 14b, in a frame time frame, the penetrating sub-pixel T polarity is positive (+), and the reflection sub-pixel R polarity is negative (-) in mixed mode (mixed mode). Next, a dot inversion display type is presented, so that a better display picture can be obtained. However, due to the difference in driving voltage variation between the sub-pixel T and the reflection sub-pixel R, such as a feed-though, the penetrating sub-pixel T and the reflection sub-pixel R are rendered by the inversion driving. Flickers caused by different brightness are easily observed.

Fig. 14c is another layout showing the polarity of the sub-pixel array data of the transflective panel of the ninth embodiment of the present invention. As shown in Fig. 14c, the sub-pixels of adjacent rows have two data lines, and are connected to the same demultiplexer (DEMUX) and the same data output terminal S, and are controlled to be turned on or off by the two switching signals SW. Adjacent The penetrating sub-pixels T are respectively connected to adjacent data lines in an interlaced manner, and the reflected sub-pixels R of the adjacent rows are also connected to adjacent data lines in an interlaced manner, at a frame time (frame). Inside, the penetrating sub-pixel T polarity is positive (+) negative (-) phase, and the reflective sub-pixel R polarity is also positive (+) negative (-) phase, which will compensate for the brightness when the inversion is reversed. Differences, reduce flicker and improve picture quality.

The embodiments of the present invention are described in detail above, but the present invention is not limited to the above-described embodiments, and the present invention includes various modifications and changes as long as it conforms to the gist of the invention described in the claims.

T‧‧‧ penetrating sub-pixel

R‧‧‧reflector

Col‧‧‧ data line

Row‧‧‧ gate line

Claims (13)

A transflective liquid crystal panel comprising: a plurality of sub-pixels arranged in a row direction and a column direction to form a sub-pixel array; a plurality of first wires extending in a column direction; and a plurality of second wires parallel to The first wire, wherein the first wire and the second wire are gate lines extending in a column direction, wherein the plurality of sub-pixels include a penetrating sub-pixel and a reflection sub-pixel, and the sub-pixel array Each of the columns and each of the rows have the penetrating sub-pixels and the reflective sub-pixels, and each of the first wires connects and drives the penetrating sub-pixels on both sides of the first wire, and each of the wires The second wire connects and drives the reflective sub-pixels on both sides of the second wire. The transflective liquid crystal panel of claim 1, wherein the first wire and the second wire are alternately arranged in a row direction. The transflective liquid crystal panel of claim 1, wherein the first wire and the second wire are disposed between each pair of adjacent sub-pixel columns. The transflective liquid crystal panel of claim 3, wherein the first wire comprises a first electrode layer and a second electrode layer. The transflective liquid crystal panel according to any one of claims 2 to 4, wherein the penetrating sub-pixel and one of the reflecting sub-pixels are alternately arranged in the column direction and the row direction. The transflective liquid crystal panel of any one of claims 2 to 4, wherein one of the penetrating sub-pixels and one of the reflecting sub-pixels are alternately arranged in the row direction, three in the column direction. The penetrating sub-pixels and the three reflecting sub-pixels are alternately arranged. The transflective liquid crystal panel of claim 2, further comprising: a plurality of third wires and a plurality of fourth wires, wherein the data lines extending in the row direction, wherein the penetrating sub-pixels are connected The third wire is driven by the third wire, and the reflective sub-pixels are connected to and driven by the fourth wire, and the third wire and the fourth wire are alternately arranged in the column direction. A transflective liquid crystal panel comprising: a plurality of sub-pixels arranged in a row direction and a column direction to form a sub-pixel array; a plurality of first wires extending in a row direction; and a plurality of second wires parallel to The first wire, wherein the first wire and the second wire are data lines extending in a row direction, wherein the plurality of sub-pixels include a penetrating sub-pixel and a reflection sub-pixel, and each of the sub-pixel arrays Each row and each row have the penetrating sub-pixels and the reflective sub-pixels, and each of the first wires is connected and driven at the first The penetrating sub-pixels on both sides of the wire, and each of the second wires connects and drives the reflective sub-pixels on both sides of the second wire. The transflective liquid crystal panel of claim 8, wherein the first wire and the second wire are alternately arranged in a column direction. The transflective liquid crystal panel of claim 8, wherein the first wire and the second wire are disposed between each pair of adjacent sub-pixel rows. The transflective liquid crystal panel of claim 10, wherein the first wire comprises a first electrode layer and a second electrode layer. The transflective liquid crystal panel according to any one of claims 8, wherein the one of the penetrating sub-pixels and one of the reflecting sub-pixels are alternately arranged in the column direction and the row direction. The transflective liquid crystal panel according to any one of claims 8, wherein the one of the penetrating sub-pixels and one of the reflecting sub-pixels are alternately arranged in the column direction. Up to three of these penetrating sub-pixels and three of these reflecting sub-pixels are alternately arranged.