TWI558076B - Ac/dc power supply circuit and method thereof - Google Patents

Ac/dc power supply circuit and method thereof Download PDF

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TWI558076B
TWI558076B TW104112569A TW104112569A TWI558076B TW I558076 B TWI558076 B TW I558076B TW 104112569 A TW104112569 A TW 104112569A TW 104112569 A TW104112569 A TW 104112569A TW I558076 B TWI558076 B TW I558076B
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logic
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power supply
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TW201639279A (en
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黃致銘
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研華股份有限公司
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交直流電源電路及其方法 AC/DC power supply circuit and method thereof

本發明係為一種交直流電源電路及其方法,特別是關於一種可用於交流電及直流電兩用的交直流電源電路及其方法。 The invention relates to an AC/DC power supply circuit and a method thereof, in particular to an AC/DC power supply circuit and a method thereof which can be used for both alternating current and direct current.

先前,一般家庭中為了將電力供應至各種電氣設備,使用以商用電源為中心的交流配電系統。近年,利用一般家庭用的太陽電池(例如太陽光發電)、燃料電池或蓄電池等的直流分散電源已逐漸普及。又,為了使各別的電氣設備中的交流電力轉換為直流電力時的電力損失減低,亦建議導入家庭用直流配電系統。此種情況下,除了先前的交流配電系統以外,也需要同時設置直流配電系統。 Previously, in order to supply electric power to various electric appliances in a general household, an AC power distribution system centered on a commercial power source was used. In recent years, DC distributed power sources using solar cells (for example, photovoltaic power generation), fuel cells, or batteries for general household use have become popular. Further, in order to reduce the power loss when the AC power in the respective electric equipment is converted into the DC power, it is also recommended to introduce the DC power distribution system for the home. In this case, in addition to the previous AC power distribution system, it is also necessary to set the DC power distribution system at the same time.

因此適用於交直流兩用之電氣設備或電器用品也隨之蓬勃發展。然而,一般交直流兩用之電氣設備均經由全波整流開始調變。例如一般交直流兩用之電氣設備均通過整流電路以輸出至後端電路。其中於直流電通過整流電路時,整流電路上的二極體損耗會造成發燙與功率消耗,藉此影響到後端電路輸出的效率。甚至,整流電路上的二極體因發燙與功率消耗等情況而造成電路損壞。 Therefore, electrical equipment or electrical appliances suitable for both AC and DC have also flourished. However, in general, both AC and DC electrical equipment are modulated by full-wave rectification. For example, electrical equipment for both AC and DC is output to the back-end circuit through a rectifier circuit. When the DC power passes through the rectifier circuit, the loss of the diode on the rectifier circuit causes burn and power consumption, thereby affecting the efficiency of the output of the back-end circuit. Even the diode on the rectifier circuit is damaged by the heat and power consumption.

本發明在於提供一種交直流電源電路,用以分辨交直流電源以及避開整流電路之功率損耗,藉此提升電路的輸出功率。 The invention provides an AC/DC power supply circuit for distinguishing AC/DC power supply and avoiding power loss of the rectifier circuit, thereby improving the output power of the circuit.

本發明提出一種交直流電源電路,透過一對輸入端子以電性連接一交流電或一直流電,且交直流電源電路電性連接至具有一 整流電路的一隔離電源轉換電路,交直流電源電路包括:一光耦式轉換單元、一觸發單元、一邏輯單元及一切換單元。觸發單元耦接光耦式轉換單元。邏輯單元耦接觸發單元。切換單元耦接於邏輯單元。其中,光耦式轉換單元經由該對輸入端子接收到交流電時,光耦式轉換單元輸出一第一脈波訊號給觸發單元,觸發單元根據第一脈波訊號以輸出一第二脈波訊號給邏輯單元,邏輯單元根據第二脈波訊號以輸出一第一訊號給切換單元,切換單元根據第一訊號以處於一第一狀態。其中,光耦式轉換單元經由該對輸入端子接收到直流電時,觸發單元輸出一邏輯訊號給邏輯單元,邏輯單元根據邏輯訊號以輸出一延遲一預設時間後轉態的第二訊號給切換單元,切換單元根據第二訊號以處於一第二狀態。 The invention provides an AC/DC power supply circuit, which is electrically connected to an alternating current or a continuous current through a pair of input terminals, and the AC/DC power supply circuit is electrically connected to have a An isolated power conversion circuit of the rectifier circuit, the AC/DC power supply circuit comprises: an optocoupler conversion unit, a trigger unit, a logic unit and a switching unit. The trigger unit is coupled to the optocoupler conversion unit. The logic unit is coupled to the contact unit. The switching unit is coupled to the logic unit. Wherein, when the optocoupler conversion unit receives the alternating current via the pair of input terminals, the optocoupler conversion unit outputs a first pulse signal to the trigger unit, and the trigger unit outputs a second pulse signal according to the first pulse signal. The logic unit sends a first signal to the switching unit according to the second pulse signal, and the switching unit is in a first state according to the first signal. When the optocoupler conversion unit receives the DC power through the pair of input terminals, the trigger unit outputs a logic signal to the logic unit, and the logic unit outputs a second signal that is delayed by a preset time according to the logic signal to the switching unit. The switching unit is in a second state according to the second signal.

本發明提出一種交直流電源選擇路徑方法,適用於透過一對輸入端子以電性連接一交流電或一直流電,且一交直流電源電路電性連接至具有一整流電路的一隔離電源轉換電路,交直流電源選擇方法包括:判斷一光耦式轉換單元是否接收到一交流電,若判斷結果為是,則光耦式轉換單元輸出一第一脈波訊號給觸發單元,觸發單元根據第一脈波訊號以輸出一第二脈波訊號給邏輯單元;邏輯單元根據第二脈波訊號以輸出一第一訊號給切換單元,切換單元根據第一訊號以處於一第一狀態;若判斷結果為否,則觸發單元輸出一邏輯訊號給邏輯單元;邏輯單元根據邏輯訊號以輸出一延遲一預設時間後轉態的第二訊號給切換單元,切換單元根據第二訊號以處於一第二狀態。 The invention provides a method for selecting an AC/DC power supply path, which is suitable for electrically connecting an alternating current or a continuous current through a pair of input terminals, and an AC/DC power supply circuit is electrically connected to an isolated power conversion circuit having a rectifier circuit. The DC power supply selection method includes: determining whether an optocoupler conversion unit receives an alternating current, and if the determination result is yes, the optocoupler conversion unit outputs a first pulse signal to the trigger unit, and the trigger unit is configured according to the first pulse signal. And outputting a second pulse signal to the logic unit; the logic unit outputs a first signal to the switching unit according to the second pulse signal, and the switching unit is in a first state according to the first signal; if the determination result is no, The trigger unit outputs a logic signal to the logic unit; the logic unit outputs a second signal delayed by a predetermined time according to the logic signal to the switching unit, and the switching unit is in a second state according to the second signal.

本發明之交直流電源電路,係透過光耦式轉換單元以分辨交流電或直流電,其中光耦式轉換單元根據交流電以產生第一脈波訊號給觸發單元,因此觸發單元將持續觸發邏輯單元。所以邏輯單元亦持續被觸發及延遲轉態,藉此邏輯單元控制切換單元處於一交流電通過整流電路的切換狀態。另光耦式轉換單元根據直交流而截止,因此觸發單元觸發邏輯單元。所以邏輯單元所輸出的 訊號延遲一預設時間後轉態,藉此邏輯單元控制切換單元處於一直流電直接繞過整流電路而耦接至後端電路的切換狀態。由此可知,本實施例確實達到提升電路的輸出功率。 The AC/DC power supply circuit of the present invention transmits an AC or DC power through an optocoupler conversion unit. The optocoupler conversion unit generates a first pulse signal according to the AC power to the trigger unit, so the trigger unit will continuously trigger the logic unit. Therefore, the logic unit is also continuously triggered and delayed, whereby the logic unit controls the switching unit to be in a switching state of an alternating current through the rectifier circuit. In addition, the optocoupler conversion unit is turned off according to the direct communication, so the trigger unit triggers the logic unit. So the output of the logic unit The signal is delayed after a predetermined time, whereby the logic unit controls the switching unit to be in a switching state in which the current is directly bypassed by the rectifier circuit and coupled to the back circuit. It can be seen from this that the present embodiment does achieve the output power of the boost circuit.

以上之概述與接下來的實施例,皆是為了進一步說明本發明之技術手段與達成功效,然所敘述之實施例與圖式僅提供參考說明用,並非用來對本發明加以限制者。 The above summary and the following examples are intended to be illustrative of the invention and the embodiments of the invention.

1‧‧‧交直流電源電路 1‧‧‧AC power supply circuit

8‧‧‧後端電路 8‧‧‧ Back-end circuit

9‧‧‧整流電路 9‧‧‧Rectifier circuit

10‧‧‧光耦式轉換單元 10‧‧‧optical coupling unit

12‧‧‧觸發單元 12‧‧‧Trigger unit

14‧‧‧邏輯單元 14‧‧‧Logical unit

16‧‧‧切換單元 16‧‧‧Switch unit

160‧‧‧繼電器 160‧‧‧Relay

VCC‧‧‧工作電壓源 VCC‧‧‧ working voltage source

C1、C2‧‧‧電容 C1, C2‧‧‧ capacitor

D0‧‧‧旁通路徑 D0‧‧‧ bypass path

D1‧‧‧二極體 D1‧‧‧ diode

Q1‧‧‧電晶體 Q1‧‧‧Optoelectronics

I1、I2‧‧‧輸入端 I1, I2‧‧‧ input

O1、RST‧‧‧輸出端 O1, RST‧‧‧ output

L1、L2‧‧‧輸入端子 L1, L2‧‧‧ input terminals

R1~R5‧‧‧電阻 R1~R5‧‧‧ resistance

PD‧‧‧光耦合元件 PD‧‧‧Optical coupling element

PD1‧‧‧光伏二極體 PD1‧‧‧Photovoltaic diode

PD2‧‧‧光伏感應器 PD2‧‧‧Photovoltaic sensor

LL1‧‧‧低邏輯準位的訊號 LL1‧‧‧ low logic level signal

LH1‧‧‧邏輯訊號 LH1‧‧‧ logic signal

P1‧‧‧第一脈波訊號 P1‧‧‧ first pulse signal

P2‧‧‧第二脈波訊號 P2‧‧‧Second pulse signal

N1、N2‧‧‧切換點 N1, N2‧‧‧ switching points

S1‧‧‧第一訊號 S1‧‧‧ first signal

S2‧‧‧第二訊號 S2‧‧‧ second signal

Td‧‧‧預設時間 Td‧‧‧ preset time

S701~S713‧‧‧流程步驟 S701~S713‧‧‧ Process steps

圖1為本發明一實施例之交直流電源電路之功能方塊圖。 1 is a functional block diagram of an AC/DC power supply circuit according to an embodiment of the present invention.

圖2為本發明另一實施例之光耦式轉換單元及觸發單元之電路圖。 2 is a circuit diagram of an optocoupler conversion unit and a trigger unit according to another embodiment of the present invention.

圖3為本發明另一實施例之邏輯單元及切換單元之電路圖。 3 is a circuit diagram of a logic unit and a switching unit according to another embodiment of the present invention.

圖4A為本發明另一實施例之交直流電源電路接收到交流電之訊號波形圖。 4A is a waveform diagram of signals received by an AC/DC power supply circuit receiving AC power according to another embodiment of the present invention.

圖4B為根據圖4A之本發明另一實施例之切換單元切換狀態示意圖。 4B is a schematic diagram of a switching state of a switching unit according to another embodiment of the present invention.

圖5A為本發明另一實施例之交直流電源電路接收到直流電之訊號波形圖。 FIG. 5A is a waveform diagram of signals received by an AC/DC power supply circuit receiving DC power according to another embodiment of the present invention.

圖5B為根據圖5A之本發明另一實施例之切換單元切換狀態示意圖。 FIG. 5B is a schematic diagram of a switching state of a switching unit according to another embodiment of the present invention.

圖6為本發明另一實施例之可應用交直流電源電路之電路圖。 FIG. 6 is a circuit diagram of an AC/DC power supply circuit applicable to another embodiment of the present invention.

圖7為本發明另一實施例之交直流電源選擇方法之流程圖。 FIG. 7 is a flowchart of a method for selecting an AC/DC power supply according to another embodiment of the present invention.

圖1為本發明一實施例之交直流電源電路之功能方塊圖。請參閱圖1。一種交直流電源電路1,透過一對輸入端子L1、L2以電性連接一交流電或一直流電,且交直流電源電路1電性連接至具有一整流電路9的一隔離電源轉換電路,交直流電源電路1包 括:一光耦式轉換單元10、一觸發單元12、一邏輯單元14及一切換單元16。在實務上,光耦式轉換單元10電性連接交流電(或直流電)及觸發單元12。邏輯單元14電性連接觸發單元12及切換單元16。切換單元16耦接至整流電路9。 1 is a functional block diagram of an AC/DC power supply circuit according to an embodiment of the present invention. Please refer to Figure 1. An AC/DC power supply circuit 1 is electrically connected to an alternating current or a continuous current through a pair of input terminals L1 and L2, and the AC/DC power supply circuit 1 is electrically connected to an isolated power conversion circuit having a rectifier circuit 9, and an AC/DC power supply. Circuit 1 package An optocoupler conversion unit 10, a trigger unit 12, a logic unit 14, and a switching unit 16 are included. In practice, the optocoupler conversion unit 10 is electrically connected to an alternating current (or direct current) and a trigger unit 12. The logic unit 14 is electrically connected to the trigger unit 12 and the switching unit 16. The switching unit 16 is coupled to the rectifier circuit 9.

一般交直流兩用的電源電路均通過整流電路9以輸出至後端電路8。其中於直流電通過整流電路9時,整流電路9上的二極體損耗會造成發燙與功率消耗,藉此影響到直流電輸出的效率。然而,本實施例之交直流電源電路1係透過分辨交流電或直流電。若交直流電源電路1分辨出直流電時,本實施例透過切換單元16的設計,致使直流電直接繞過整流電路9以輸出至後端電路8,藉此降低整流電路9上的二極體損耗、發燙與功率消耗等情況。 Generally, the power supply circuit for both AC and DC is output to the back end circuit 8 through the rectifier circuit 9. When the direct current passes through the rectifying circuit 9, the loss of the diode on the rectifying circuit 9 causes ironing and power consumption, thereby affecting the efficiency of the direct current output. However, the AC/DC power supply circuit 1 of the present embodiment transmits AC or DC power. When the AC/DC power supply circuit 1 distinguishes the DC power, the present embodiment transmits the DC power directly to the rectifier circuit 9 to output to the back end circuit 8 through the design of the switching unit 16, thereby reducing the loss of the diode on the rectifier circuit 9, Hot and power consumption.

若交直流電源電路1分辨出交流電時,本實施例透過切換單元16的設計,致使交流電通過整流電路9以輸出至後端電路8。藉此本實施例達到交直流兩用及降低整流電路9上的二極體損耗、發燙與功率消耗等功效。 When the AC/DC power supply circuit 1 distinguishes the AC power, the present embodiment transmits the AC power through the rectifier circuit 9 to output to the back end circuit 8 through the design of the switching unit 16. Thereby, the embodiment achieves the effects of AC/DC dual-use and reducing the loss of the diode, the ironing and the power consumption on the rectifier circuit 9.

進一步來說,光耦式轉換單元10例如透過一二極體與一光耦合元件(Photo-Diode)來實現。本實施例不限制光耦式轉換單元10的態樣。在實務上,光耦式轉換單元10用以分辨交流電或直流電。舉例來說,交流電的頻率一般為50Hz或60Hz。因此,交流電進到光耦式轉換單元10後,一部分交流電將會轉換為光伏的脈波訊號,另一部分交流電將被光耦式轉換單元10隔絕。然而,直流電具有方向性。因此,直流電進到光耦式轉換單元10後,直流電將被光耦式轉換單元10隔絕,或是直流電將使光耦式轉換單元10導通。也就是說,光耦式轉換單元10可視為一可分辨交流電或直流電的偵測電路。 Further, the optocoupler conversion unit 10 is realized by, for example, a diode and a photo-diode. This embodiment does not limit the aspect of the optocoupler conversion unit 10. In practice, the optocoupler conversion unit 10 is used to distinguish between alternating current or direct current. For example, the frequency of the alternating current is typically 50 Hz or 60 Hz. Therefore, after the alternating current enters the optocoupler conversion unit 10, part of the alternating current will be converted into the photovoltaic pulse signal, and the other part of the alternating current will be isolated by the optocoupler conversion unit 10. However, direct current has directionality. Therefore, after the direct current enters the optocoupler conversion unit 10, the direct current will be isolated by the optocoupler conversion unit 10, or the direct current will cause the optocoupler conversion unit 10 to be turned on. That is to say, the optocoupler conversion unit 10 can be regarded as a detection circuit capable of resolving alternating current or direct current.

觸發單元12耦接光耦式轉換單元10。在實務上,一部分的交流電會被光耦式轉換單元10轉換為脈波訊號,並輸出至觸發單元12。而直流電會被光耦式轉換單元10隔絕,或是直流電將使光耦 式轉換單元10導通。所屬技術領域具有通常知識者可自由設計可分辨交流電或直流電之光耦式轉換單元10。其中,觸發單元12例如透過反相觸發器來實現。觸發單元12用以觸發邏輯單元14,致使邏輯單元14控制切換單元16的切換作業。 The trigger unit 12 is coupled to the optocoupler conversion unit 10 . In practice, a part of the AC power is converted into a pulse signal by the optocoupler conversion unit 10 and output to the trigger unit 12. The DC power will be isolated by the optocoupler conversion unit 10, or the DC power will cause the optocoupler The conversion unit 10 is turned on. Those skilled in the art can freely design an optocoupler conversion unit 10 that can distinguish between alternating current or direct current. The trigger unit 12 is implemented, for example, by an inverting flip-flop. The trigger unit 12 is used to trigger the logic unit 14, causing the logic unit 14 to control the switching operation of the switching unit 16.

邏輯單元14耦接觸發單元12。在實務上,邏輯單元14例如透過延遲觸發器、緩衝觸發器或一具重置電路的邏輯器來實現。本實施例不限制邏輯單元14的態樣。此外,切換單元16耦接於邏輯單元14。在實務上,切換單元16例如透過電子式開關及機械式開關其中之一或組合來實現。其中電子式開關例如為雙極性接面電晶體、場效電晶體或閘極電晶體。機械式開關例如為繼電器。本實施例不限制切換單元16的態樣。 The logic unit 14 is coupled to the contact unit 12. In practice, logic unit 14 is implemented, for example, by a delay flip-flop, a buffer flip-flop, or a logic with a reset circuit. This embodiment does not limit the aspect of the logic unit 14. In addition, the switching unit 16 is coupled to the logic unit 14 . In practice, the switching unit 16 is implemented, for example, by one or a combination of an electronic switch and a mechanical switch. The electronic switch is, for example, a bipolar junction transistor, a field effect transistor or a gate transistor. The mechanical switch is, for example, a relay. This embodiment does not limit the aspect of the switching unit 16.

其中,光耦式轉換單元10經由該對輸入端子L1、L2接收到交流電時,光耦式轉換單元10輸出一第一脈波訊號給觸發單元12,觸發單元12根據第一脈波訊號以輸出一第二脈波訊號給邏輯單元14,邏輯單元14根據第二脈波訊號以輸出一第一訊號給切換單元16,切換單元16根據第一訊號以處於一第一狀態。第一狀態係為切換單元16處於常閉狀態,以使交流電經由整流電路9轉換至一後端電路8。 When the optocoupler conversion unit 10 receives the alternating current via the pair of input terminals L1 and L2, the optocoupler conversion unit 10 outputs a first pulse signal to the trigger unit 12, and the trigger unit 12 outputs according to the first pulse signal. A second pulse signal is sent to the logic unit 14. The logic unit 14 outputs a first signal to the switching unit 16 according to the second pulse signal. The switching unit 16 is in a first state according to the first signal. The first state is that the switching unit 16 is in a normally closed state to cause the alternating current to be converted to a back end circuit 8 via the rectifying circuit 9.

其中,光耦式轉換單元10經由該對輸入端子L1、L2接收到直流電時,觸發單元12輸出一邏輯訊號給邏輯單元14,邏輯單元14根據邏輯訊號以輸出一延遲一預設時間後轉態的第二訊號給切換單元16,切換單元16根據第二訊號以處於一第二狀態。第二狀態係為切換單元16處於常開狀態,以使直流電直接繞過整流電路9以供給後端電路8。 When the optocoupler conversion unit 10 receives the DC power through the pair of input terminals L1 and L2, the trigger unit 12 outputs a logic signal to the logic unit 14, and the logic unit 14 outputs a delay according to the logic signal after a predetermined time. The second signal is sent to the switching unit 16, and the switching unit 16 is in a second state according to the second signal. The second state is that the switching unit 16 is in a normally open state so that direct current is directly bypassed by the rectifier circuit 9 to supply the back end circuit 8.

基於上述,本實施例係以交流電具有頻率的概念來設計交直流電源電路1,以不改變原來的輸入方式,並於接收到直流電時以避開整流電路9上二極體的損耗點或路徑,藉此增強原有的輸出效率。當然,本實施例之交直流電源電路1亦可適用於多國頻率 範圍(50Hz/60Hz)。 Based on the above, the present embodiment designs the AC/DC power supply circuit 1 with the concept of alternating current having a frequency so as not to change the original input mode, and avoids the loss point or path of the diode on the rectifier circuit 9 when receiving the direct current. In order to enhance the original output efficiency. Of course, the AC/DC power supply circuit 1 of the embodiment can also be applied to multi-national frequencies. Range (50Hz/60Hz).

接下來,進一步說明圖1中的光耦式轉換單元10及觸發單元12的細部電路及其運作。圖2為本發明另一實施例之光耦式轉換單元及觸發單元之電路圖。請參閱圖2。為了方便說明,本實施例係以60HZ的交流電頻率來說明。 Next, the detailed circuit of the optocoupler conversion unit 10 and the trigger unit 12 in FIG. 1 and its operation are further explained. 2 is a circuit diagram of an optocoupler conversion unit and a trigger unit according to another embodiment of the present invention. Please refer to Figure 2. For convenience of explanation, the present embodiment is described by an AC frequency of 60 Hz.

詳細來說,光耦式轉換單元10包括一二極體D1與一光耦合元件PD,二極體D1與光耦合元件PD並聯。其中,光耦合元件PD包括一光伏二極體PD1與一光伏感應器PD2,光伏感應器PD2以光耦合方式耦接於光伏二極體PD1。光伏二極體PD1例如為光耦內發光二極體。而二極體D1與光伏二極體PD1係為反向並接,例如二極體D1的陰極耦接光伏二極體PD1的陽極及輸入端子L1。二極體D1的陽極耦接光伏二極體PD1的陰極及輸入端子L2。藉此光耦合元件PD於交流電的正半週期導通,並於交流電的負半週期截止,藉此交流電輸入時,光耦合元件PD產出例如為0101的訊號。另於該對輸入端子L1、L2接收到直流電時,二極體D1截止及光耦合元件PD導通。 In detail, the optocoupler conversion unit 10 includes a diode D1 and an optical coupling element PD, and the diode D1 is connected in parallel with the optical coupling element PD. The optical coupling element PD includes a photovoltaic diode PD1 and a photovoltaic sensor PD2. The photovoltaic sensor PD2 is optically coupled to the photovoltaic diode PD1. The photovoltaic diode PD1 is, for example, an optocoupler inner light-emitting diode. The diode D1 and the photovoltaic diode PD1 are connected in reverse. For example, the cathode of the diode D1 is coupled to the anode of the photovoltaic diode PD1 and the input terminal L1. The anode of the diode D1 is coupled to the cathode of the photovoltaic diode PD1 and the input terminal L2. Thereby, the optical coupling element PD is turned on during the positive half cycle of the alternating current and is turned off during the negative half cycle of the alternating current, whereby the optical coupling element PD generates a signal of, for example, 0101 when the alternating current is input. When the pair of input terminals L1, L2 receive DC power, the diode D1 is turned off and the optical coupling element PD is turned on.

舉例來說,光伏感應器PD2耦接於3.3伏工作電壓源VCC及接地端之間。其中光伏二極體PD1例如為一光發射器,光伏感應器PD2例如為一光偵測器。光耦合元件PD導通時,交流電流經光伏二極體PD1,以使光伏二極體PD1產生一光耦訊號給光伏感應器PD2。光伏感應器PD2根據光耦訊號而導通,以使3.3伏工作電壓源VCC耦接至接地端。反之,光耦合元件PD截止時,光伏二極體PD1及光伏感應器PD2均處於截止狀態。所以,3.3伏工作電壓源VCC無法耦接至接地端。藉此觸發單元12接收到第一脈波訊號。 For example, the photovoltaic sensor PD2 is coupled between the 3.3 volt working voltage source VCC and the ground. The photovoltaic diode PD1 is, for example, a light emitter, and the photovoltaic sensor PD2 is, for example, a light detector. When the optical coupling element PD is turned on, the alternating current flows through the photovoltaic diode PD1 to cause the photovoltaic diode PD1 to generate an optical coupling signal to the photovoltaic sensor PD2. The photovoltaic sensor PD2 is turned on according to the optocoupler signal to couple the 3.3 volt working voltage source VCC to the ground. On the contrary, when the optical coupling element PD is turned off, the photovoltaic diode PD1 and the photovoltaic sensor PD2 are both in an off state. Therefore, the 3.3 volt working voltage source VCC cannot be coupled to the ground. Thereby, the trigger unit 12 receives the first pulse signal.

於60HZ的交流電自該對輸入端子L1、L2輸入時,光伏二極體PD1於交流電的正半週期導通。因此,觸發單元12的輸入例如為一個60Hz的方波,藉此觸發單元12會持續輸出一例如PWM的 第二脈波訊號。反之,直流電自該對輸入端子L1、L2輸入時,光伏二極體PD1於直流電時導通,而二極體D1截止。因此,觸發單元12的輸入例如為一個低邏輯準位,藉此觸發單元12會持續輸出一高邏輯準位的邏輯訊號。 When 60 Hz AC power is input from the pair of input terminals L1, L2, the photovoltaic diode PD1 is turned on during the positive half cycle of the alternating current. Therefore, the input of the trigger unit 12 is, for example, a 60 Hz square wave, whereby the trigger unit 12 continues to output a PWM, for example. The second pulse signal. On the contrary, when the direct current is input from the pair of input terminals L1, L2, the photovoltaic diode PD1 is turned on when the direct current is turned on, and the diode D1 is turned off. Therefore, the input of the trigger unit 12 is, for example, a low logic level, whereby the trigger unit 12 continuously outputs a logic signal of a high logic level.

此外,觸發單元12例如為一反相觸發器(Inverting Schmitt trigger)。其中觸發單元12的輸入端I1耦接光伏感應器PD2,且輸出端O1耦接至邏輯單元14。本實施例不限制觸發單元12的態樣。 In addition, the trigger unit 12 is, for example, an Inverting Schmitt trigger. The input terminal I1 of the trigger unit 12 is coupled to the photovoltaic sensor PD2, and the output terminal O1 is coupled to the logic unit 14. This embodiment does not limit the aspect of the trigger unit 12.

接下來,進一步說明圖1中的邏輯單元14及切換單元16的細部電路及其運作。圖3為本發明另一實施例之邏輯單元及切換單元之電路圖。請參閱圖3。邏輯單元14例如為一具重置電路的邏輯器(Reset Circuit with Manual Reset)。而切換單元16例如為一電晶體Q1與一繼電器160的其中之一或組合。其中,繼電器160例如為單刀雙擲繼電器(SPDT)。在實務上,邏輯單元14的輸入端I2耦接至觸發單元12的重置輸出端O1。邏輯單元14的輸出端RST耦接至雙極性接面電晶體Q1的基極,其集極耦接繼電器160,其射極耦接接地端。 Next, the detailed circuit of the logic unit 14 and the switching unit 16 in FIG. 1 and its operation will be further explained. 3 is a circuit diagram of a logic unit and a switching unit according to another embodiment of the present invention. Please refer to Figure 3. The logic unit 14 is, for example, a reset circuit with a Manual Reset (Reset Circuit with Manual Reset). The switching unit 16 is, for example, one or a combination of a transistor Q1 and a relay 160. The relay 160 is, for example, a single pole double throw relay (SPDT). In practice, the input terminal I2 of the logic unit 14 is coupled to the reset output terminal O1 of the trigger unit 12. The output terminal RST of the logic unit 14 is coupled to the base of the bipolar junction transistor Q1, and the collector is coupled to the relay 160, and the emitter is coupled to the ground.

進一步來說,觸發單元12輸出如16.67微秒的固定脈衝的第二脈波訊號當作邏輯單元14的輸入,其中60Hz的每一脈衝周期約為16.67微秒。因此,於交流電輸入狀況下,邏輯單元14的輸入端I2於每一脈衝週期(約16.67微秒)會被第二脈波訊號觸發,藉此邏輯單元14的輸出端RST將輸出第一訊號,其中第一訊號為一低邏輯準位的訊號。 Further, the trigger unit 12 outputs a second pulse signal such as a fixed pulse of 16.67 microseconds as an input to the logic unit 14, wherein each pulse period of 60 Hz is approximately 16.67 microseconds. Therefore, in the AC input state, the input terminal I2 of the logic unit 14 is triggered by the second pulse signal every pulse period (about 16.67 microseconds), whereby the output terminal RST of the logic unit 14 outputs the first signal. The first signal is a signal with a low logic level.

此外,於直流電輸入狀況下,邏輯單元14的輸入端I2會接收到高邏輯準位的邏輯訊號,藉此邏輯單元14輸出一第二訊號,其中第二訊號為邏輯單元14延遲一預設時間後以將一低邏輯準位轉態為一高邏輯準位的訊號。舉例來說,直流電輸入狀況下,邏輯單元14於過200微秒後自低邏輯準位轉態為高邏輯準位的訊號係 為第二訊號。 In addition, in the DC input state, the input terminal I2 of the logic unit 14 receives the logic signal of the high logic level, and the logic unit 14 outputs a second signal, wherein the second signal is delayed by the logic unit 14 by a preset time. Then, the signal is converted to a high logic level by a low logic level. For example, in the DC input state, the logic unit 14 transitions from a low logic level to a high logic level signal signal after 200 microseconds. For the second signal.

值得注意的是,預設時間係大於第二脈波訊號的每一脈衝週期。舉例來說,50Hz的交流電將使觸發單元12輸出如20微秒的固定脈衝的第二脈波訊號當作邏輯單元14的輸入。因此,預設時間例如為25微秒、30微秒或其他數值微秒,則於交流電輸入狀況下,每20微秒即觸發邏輯單元14進行延遲轉態的運作。反之,若預設時間小於第二脈波訊號的每一脈衝週期,例如為15微秒,則邏輯單元14將無法正常控制切換單元16切換於交流電的運作。也就是說,交直流電源電路1無法達到上述功效。另所屬技術領域具有通常知識者可自由設計預設時間。 It is worth noting that the preset time is greater than each pulse period of the second pulse signal. For example, a 50 Hz alternating current will cause the trigger unit 12 to output a second pulse signal, such as a fixed pulse of 20 microseconds, as an input to the logic unit 14. Therefore, if the preset time is, for example, 25 microseconds, 30 microseconds, or other numerical microseconds, the logic unit 14 is triggered to perform the delay transition operation every 20 microseconds under the alternating current input condition. On the other hand, if the preset time is less than each pulse period of the second pulse signal, for example, 15 microseconds, the logic unit 14 will not normally control the operation of the switching unit 16 to switch to the alternating current. That is to say, the AC/DC power supply circuit 1 cannot achieve the above effects. A person skilled in the art can freely design a preset time.

此外,繼電器160的運作係根據導通或截止的電晶體Q1,以切換單刀雙擲的運作。舉例來說,於交流電輸入狀況下,電晶體Q1截止,繼電器160處於耦接至整流電路9的狀態。反之,於直流電輸入狀況下,電晶體Q1導通,繼電器160處於耦接至直接繞過整流電路9的狀態,也就是說,繼電器160將被切換,以使輸入端子L1、L2避開耦接到整流電路9之二極體的電路中。 In addition, the operation of the relay 160 is based on the transistor Q1 that is turned on or off to switch the operation of the single pole double throw. For example, in the AC input condition, the transistor Q1 is turned off, and the relay 160 is in a state of being coupled to the rectifier circuit 9. On the contrary, in the DC input condition, the transistor Q1 is turned on, and the relay 160 is coupled to the state of directly bypassing the rectifying circuit 9, that is, the relay 160 will be switched to avoid the input terminals L1, L2 from being coupled to In the circuit of the diode of the rectifier circuit 9.

由圖1、圖2及圖3所述內容可知,本實施例之交直流電源電路1。於交流電輸入狀況下,光耦合元件PD於交流電的正半週期導通,藉此光耦式轉換單元10輸出第一脈波訊號給觸發單元12。而觸發單元12輸出第二脈波訊號給邏輯單元14,以使邏輯單元14持續被觸發及延遲轉態,藉此邏輯單元14輸出一如低邏輯準位的第一訊號給切換單元16。因此,交流電將通過整流電路9。 The AC/DC power supply circuit 1 of this embodiment can be seen from the contents of FIG. 1, FIG. 2 and FIG. In the AC input state, the optical coupling element PD is turned on during the positive half cycle of the alternating current, whereby the optocoupler conversion unit 10 outputs the first pulse signal to the trigger unit 12. The trigger unit 12 outputs the second pulse signal to the logic unit 14 to keep the logic unit 14 continuously triggered and delayed, whereby the logic unit 14 outputs a first signal such as a low logic level to the switching unit 16. Therefore, the alternating current will pass through the rectifying circuit 9.

反之,於直流電輸入狀況下,光耦合元件PD於直流電時導通,藉此觸發單元12輸出邏輯訊號LH1給邏輯單元14,以使邏輯單元14所輸出的訊號延遲一預設時間後轉態,藉此邏輯單元14輸出一如延遲轉態的高邏輯準位的第二訊號給切換單元16。因此,直流電將直接繞過整流電路9以耦接至後端電路8。 On the other hand, in the DC input state, the optical coupling element PD is turned on when the DC power is turned on, so that the trigger unit 12 outputs the logic signal LH1 to the logic unit 14 to delay the signal output by the logic unit 14 after a predetermined time. The logic unit 14 outputs a second signal of a high logic level, such as a delayed transition, to the switching unit 16. Therefore, the direct current will bypass the rectifier circuit 9 directly to be coupled to the back end circuit 8.

由圖1、圖2及圖3可知,光耦式轉換單元10經由該對輸入 端子L1、L2接收到交流電24V時,光耦合元件PD將輸出DC 12V,而DC 12V輸入其控制電壓電路產生控制電壓3.3V,此時光耦合元件PD其光伏二極體PD1因為交流方式,故其導通方式只有正半週導通。所以,光耦合元件PD其隔離端的光伏感應器PD2會因此導通方式得到如開關產生邏輯1與0的訊號。 As can be seen from FIG. 1 , FIG. 2 and FIG. 3 , the optocoupler conversion unit 10 receives the pair of inputs. When the terminals L1 and L2 receive the alternating current 24V, the optical coupling element PD will output DC 12V, and the DC 12V is input to its control voltage circuit to generate the control voltage 3.3V. At this time, the optical coupling element PD has its photovoltaic diode PD1 because of the alternating current mode. The conduction mode is only positive for half a week. Therefore, the photovoltaic sensor PD2 of the isolated end of the optical coupling element PD is thus turned on to obtain a signal such as a switch generating logic 1 and 0.

此邏輯如01的訊號之反覆週期為市電之頻率60Hz的倒數(如為16.67ms),此訊號直接輸入到如延遲電路之邏輯單元14的控制端。其中邏輯單元14為一當控制電壓到達3.3V電壓位準後,會將其輸出信號由低邏輯準位的訊號經過延遲200ms後轉態為高邏輯準位的訊號輸出。 The repeating period of the signal such as 01 is the reciprocal of the frequency of the commercial power of 60 Hz (for example, 16.67 ms), and the signal is directly input to the control end of the logic unit 14 such as the delay circuit. The logic unit 14 is a signal output after the control voltage reaches the 3.3V voltage level, and the output signal is delayed by the low logic level signal by a delay of 200ms and then converted to a high logic level.

但是,在交流電輸入下,邏輯單元14的控制信號為16.67ms持續輸入邏輯如01的訊號,使其邏輯單元14一直保持在其輸出Keep Low 200ms的狀態。也就是說,邏輯單元14一直保持輸出低邏輯準位的訊號,再將此輸出當作如繼電器之切換單元16的線圈所耦接電晶體Q1控制端的輸入。當電晶體Q1控制端為低邏輯準位,電晶體Q1係處於關閉,使其繼電器的線圈無法獲得電壓而讓單刀雙擲的繼電器無法動作,藉此交流電流經過橋式整流電路9。 However, under the AC input, the control signal of the logic unit 14 is 16.67 ms and the signal of the logic such as 01 is continuously input, so that the logic unit 14 is kept in the state of its output Keep Low 200 ms. That is to say, the logic unit 14 keeps the signal outputting the low logic level at all times, and then regards this output as the input of the coil of the switching unit 16 of the relay coupled to the control terminal of the transistor Q1. When the control terminal of the transistor Q1 is at a low logic level, the transistor Q1 is turned off, so that the coil of the relay cannot obtain the voltage and the single-pole double-throw relay cannot be operated, whereby the alternating current passes through the bridge rectifier circuit 9.

換言之,假若目前輸入由AC 24V改為DC 12V的輸入,其中12V與3.3V產生方式同上述。當DC 12V輸入時,光耦合元件PD其光伏二極體PD1端之正負極性導通,光耦合元件PD亦是處於導通狀態,其光伏感應器PD2輸出為低邏輯準位的訊號,經過如反向器的觸發單元12後轉為高邏輯準位的訊號,再將此信號輸入到如延遲電路的邏輯單元14的控制端,一旦邏輯單元14的控制輸入為高邏輯準位的訊號,輸出就會延遲200ms後轉態為高邏輯準位的訊號,此高邏輯準位的信號輸入到繼電器的線圈所耦接電晶體Q1控制端,電晶體Q1導通形成迴路,繼電器的線圈獲得電壓進而產生動作,將原來的輸入端的正負極旁通(ByPass)到橋式整 流電路9後方,進而達到無橋式整流器損耗的功能。 In other words, if the current input is changed from AC 24V to DC 12V input, 12V and 3.3V are generated in the same way as above. When DC 12V is input, the photo-coupling element PD has positive and negative polarity of the photovoltaic diode PD1 end, and the optical coupling element PD is also in a conducting state, and the photovoltaic sensor PD2 outputs a signal with a low logic level, such as by The trigger unit 12 of the device then converts to a signal with a high logic level, and then inputs the signal to the control terminal of the logic unit 14 such as the delay circuit. Once the control input of the logic unit 14 is a signal with a high logic level, the output will be After a delay of 200ms, the signal is converted to a high logic level. The signal of the high logic level is input to the coil of the relay and coupled to the control terminal of the transistor Q1. The transistor Q1 is turned on to form a loop, and the coil of the relay obtains a voltage to generate an action. Bypassing the positive and negative terminals (ByPass) of the original input to the bridge The rear of the flow circuit 9 further achieves the function of loss of the bridgeless rectifier.

接下來,進一步說明圖1中的直流電源電路接收到交流電的細部運作。圖4A為本發明另一實施例之交直流電源電路1接收到交流電之訊號波形圖。圖4B為根據圖4A之本發明另一實施例之切換單元16切換狀態示意圖。請參閱圖4A及圖4B。圖4A所繪示為一第一脈波訊號P1、一第二脈波訊號P2與一第一訊號S1。其中,觸發單元12的輸入端I1之第一脈波訊號P1及輸出端O1之第二脈波訊號P2係為反相的脈波訊號。而第二脈波訊號P2的每一脈衝用以觸發邏輯單元14,以使邏輯單元14輸出一第一訊號S1。第一訊號S1為一低邏輯準位。 Next, the detailed operation of the AC power supply circuit of FIG. 1 to receive the AC power is further explained. FIG. 4A is a waveform diagram of signals received by the AC/DC power supply circuit 1 according to another embodiment of the present invention. FIG. 4B is a schematic diagram of a switching state of the switching unit 16 according to another embodiment of the present invention. Please refer to FIG. 4A and FIG. 4B. FIG. 4A illustrates a first pulse signal P1, a second pulse signal P2, and a first signal S1. The first pulse signal P1 of the input terminal I1 of the trigger unit 12 and the second pulse signal P2 of the output terminal O1 are inverted pulse signals. Each pulse of the second pulse signal P2 is used to trigger the logic unit 14 to cause the logic unit 14 to output a first signal S1. The first signal S1 is a low logic level.

詳細來說,邏輯單元14的輸入端12接收到一次的高邏輯準位的訊號,則邏輯單元14的輸出端RST將延遲於預設時間Td後以轉態輸出一高邏輯準位。其中,第二脈波訊號P2的每一脈衝週期小於預設時間Td。因此,於預設時間Td內,邏輯單元14會被觸發以重新計算延遲的預設時間Td;於下一次的預設時間Td內,邏輯單元14亦會被觸發以重新計算延遲的預設時間Td,藉此邏輯單元14的輸出端RST將輸出一如低邏輯準位的第一訊號S1給電晶體Q1的基極,藉此電晶體Q1不導通。所以繼電器160無法通電而無作動。也就是說,交流電將通過原來的整流電路9至後端電路8。 In detail, the input terminal 12 of the logic unit 14 receives the signal of the high logic level once, and the output terminal RST of the logic unit 14 will delay the output of the high logic level in the transition state after the preset time Td. The pulse period of the second pulse signal P2 is less than the preset time Td. Therefore, within the preset time Td, the logic unit 14 is triggered to recalculate the delayed preset time Td; during the next preset time Td, the logic unit 14 is also triggered to recalculate the delayed preset time. Td, whereby the output RST of the logic unit 14 outputs a first signal S1, such as a low logic level, to the base of the transistor Q1, whereby the transistor Q1 is not turned on. Therefore, the relay 160 cannot be energized and does not operate. That is, the alternating current will pass through the original rectifier circuit 9 to the back end circuit 8.

此外,圖4B係對應圖4A之繼電器160的運作態樣。其中,電晶體Q1根據邏輯單元14的輸出端RST所輸出的第一訊號S1而截止,藉此繼電器160根據截止的電晶體Q1,以使交流電通過原來的整流電路9至後端電路8。 In addition, FIG. 4B corresponds to the operational aspect of the relay 160 of FIG. 4A. The transistor Q1 is turned off according to the first signal S1 outputted by the output terminal RST of the logic unit 14, whereby the relay 160 passes the turned-off transistor Q1 to pass the alternating current through the original rectifier circuit 9 to the back-end circuit 8.

接下來,進一步說明圖1中的直流電源電路接收到直流電的細部運作。圖5A為本發明另一實施例之交直流電源電路接收到直 流電之訊號波形圖。圖5B為根據圖5A之本發明另一實施例之切換單元切換狀態示意圖。請參閱圖5A及圖5B。圖5A所繪示為一低邏輯準位的訊號LL1、一邏輯訊號LH1與一第二訊號S2。其中,低邏輯準位的訊號LL1及邏輯訊號LH1係為反相的訊號。而邏輯訊號LH1的高邏輯準位用以觸發邏輯單元14,以使邏輯單元14輸出一第二訊號S2。其中第二訊號S2為「邏輯單元14延遲於預設時間Td後,以將一低邏輯準位轉態為一高邏輯準位」的訊號。 Next, the detailed operation of the direct current power supply circuit of FIG. 1 to receive the direct current power is further explained. FIG. 5A is a diagram showing an AC/DC power supply circuit receiving a straight line according to another embodiment of the present invention; FIG. The signal waveform of the current. FIG. 5B is a schematic diagram of a switching state of a switching unit according to another embodiment of the present invention. Please refer to FIG. 5A and FIG. 5B. FIG. 5A illustrates a low logic level signal LL1, a logic signal LH1, and a second signal S2. The low logic level signal LL1 and the logic signal LH1 are inverted signals. The high logic level of the logic signal LH1 is used to trigger the logic unit 14 to cause the logic unit 14 to output a second signal S2. The second signal S2 is a signal that “the logic unit 14 is delayed by a preset logic time Td to change a low logic level to a high logic level”.

詳細來說,邏輯單元14的輸入端I2接收到一次的高邏輯準位的訊號,則邏輯單元14的輸出端RST將延遲於預設時間Td後以轉態輸出一高邏輯準位的第二訊號S2。其中,邏輯訊號LH1為一次性的高邏輯準位的訊號。因此,邏輯單元14的輸出端RST將輸出一延遲一預設時間Td後轉態的高邏輯準位的第二訊號S2,藉此邏輯單元14的輸出端RST將輸出一自低邏輯準位轉態為高邏輯準位的第二訊號S2給電晶體Q1的基極,藉此電晶體Q1導通。所以繼電器160通電而作動。也就是說,直流電將直接繞過原來的整流電路9至後端電路8。 In detail, the input terminal I2 of the logic unit 14 receives the high logic level signal once, and the output terminal RST of the logic unit 14 is delayed by the preset time Td and then outputs a second high logic level in a transition state. Signal S2. The logic signal LH1 is a one-time high logic level signal. Therefore, the output RST of the logic unit 14 outputs a second signal S2 of a high logic level that is delayed by a predetermined time Td, whereby the output RST of the logic unit 14 converts the output from a low logic level. The second signal S2 of the high logic level is supplied to the base of the transistor Q1, whereby the transistor Q1 is turned on. Therefore, the relay 160 is energized to operate. That is to say, the direct current will directly bypass the original rectifier circuit 9 to the back circuit 8.

此外,圖5B係對應圖5A之繼電器160的運作態樣。其中,電晶體Q1根據邏輯單元14的輸出端RST所輸出的第二訊號S2而導通,藉此繼電器160根據導通的電晶體Q1,以使直流電直接繞過原來的整流電路9至後端電路8。 In addition, FIG. 5B corresponds to the operational aspect of the relay 160 of FIG. 5A. The transistor Q1 is turned on according to the second signal S2 outputted by the output terminal RST of the logic unit 14, whereby the relay 160 directly bypasses the original rectifier circuit 9 to the back-end circuit 8 according to the turned-on transistor Q1. .

圖6為本發明另一實施例之可應用交直流電源電路1之電路圖。請參閱圖6。在實務上,後端電路8例如為反馳式隔離電源轉換電路、返馳式電路、轉換電路或負載電路;或是後端電路8例如為醫療設備、供電設備、電子設備或其他設備等之電路。本實施例不限制後端電路8的態樣。其中,本實施例之交直流電源電路1可應用於交直流兩用的電器設備上。 FIG. 6 is a circuit diagram of an applicable AC/DC power supply circuit 1 according to another embodiment of the present invention. Please refer to Figure 6. In practice, the back end circuit 8 is, for example, a flyback isolated power conversion circuit, a flyback circuit, a conversion circuit, or a load circuit; or the back end circuit 8 is, for example, a medical device, a power supply device, an electronic device, or the like. Circuit. This embodiment does not limit the aspect of the back end circuit 8. The AC/DC power supply circuit 1 of the embodiment can be applied to an AC/DC electrical device.

舉例來說,圖6中的該對輸入端子L1、L2例如耦接至圖1 中的交直流電源電路1,藉此達到「可分辨交直流」、「避開整流電路9中二極體之功率損耗」以及「提升直流電的輸出功率」等功效。其中,圖4B及/或圖5B之切換點例如耦接於圖6中的切換點。本實施例不限制交直流電源電路1應用於後端電路8的態樣。 For example, the pair of input terminals L1, L2 in FIG. 6 are coupled to, for example, FIG. In the AC/DC power supply circuit 1, the functions of "resolvable AC/DC", "avoiding the power loss of the diode in the rectifier circuit 9", and "increasing the output power of the DC power" are achieved. The switching point of FIG. 4B and/or FIG. 5B is coupled to, for example, the switching point in FIG. 6 . This embodiment does not limit the aspect in which the AC/DC power supply circuit 1 is applied to the back end circuit 8.

圖7為本發明另一實施例之交直流電源選擇方法之流程圖。請參閱圖7。一種交直流電源選擇方法,適用於透過一對輸入端子L1、L2以電性連接一交流電或一直流電,且一交直流電源電路1電性連接至具有一整流電路9的一隔離電源轉換電路,交直流電源選擇方法包括下列步驟: 於步驟S701中,判斷一光耦式轉換單元10是否接收到一交流電。若步驟S701判斷結果為是,則進行步驟S703,光耦式轉換單元10輸出一第一脈波訊號P1給觸發單元12,觸發單元12根據第一脈波訊號P1以輸出一第二脈波訊號P2給邏輯單元14。 FIG. 7 is a flowchart of a method for selecting an AC/DC power supply according to another embodiment of the present invention. Please refer to Figure 7. An AC/DC power supply selection method is applicable to electrically connect an alternating current or a continuous current through a pair of input terminals L1 and L2, and an AC/DC power supply circuit 1 is electrically connected to an isolated power conversion circuit having a rectifier circuit 9. The AC/DC power supply selection method includes the following steps: In step S701, it is determined whether an optocoupler conversion unit 10 receives an alternating current. If the result of the determination in the step S701 is YES, the step S703 is performed, the optocoupler conversion unit 10 outputs a first pulse signal P1 to the trigger unit 12, and the trigger unit 12 outputs a second pulse signal according to the first pulse signal P1. P2 is given to logic unit 14.

接著,於步驟S707中,邏輯單元14根據第二脈波訊號P2以輸出一第一訊號S1給切換單元16,切換單元16根據第一訊號S1以處於一第一狀態。於步驟S709中,第一狀態係為切換單元16處於常閉狀態,以使交流電經由整流電路9轉換至一後端電路8。 Next, in step S707, the logic unit 14 outputs a first signal S1 to the switching unit 16 according to the second pulse signal P2, and the switching unit 16 is in a first state according to the first signal S1. In step S709, the first state is that the switching unit 16 is in the normally closed state, so that the alternating current is converted to a back end circuit 8 via the rectifying circuit 9.

若步驟S701判斷結果為否,則進行步驟S705中,觸發單元12輸出一邏輯訊號LH1給邏輯單元14。於步驟S711中,邏輯單元14根據邏輯訊號LH1以輸出一延遲一預設時間Td後轉態的第二訊號S2給切換單元16,切換單元16根據第二訊號S2以處於一第二狀態。接著,於步驟S713中,第二狀態係為切換單元16處於常開狀態,以使直流電直接繞過整流電路9以供給後端電路8。 If the result of the determination in step S701 is no, then in step S705, the trigger unit 12 outputs a logic signal LH1 to the logic unit 14. In step S711, the logic unit 14 outputs a second signal S2 that is delayed by a predetermined time Td to the switching unit 16 according to the logic signal LH1, and the switching unit 16 is in a second state according to the second signal S2. Next, in step S713, the second state is that the switching unit 16 is in the normally open state, so that the direct current is directly bypassed by the rectifier circuit 9 to supply the back end circuit 8.

綜上所述,本發明之交直流電源電路,於交流電輸入狀況下,光耦式轉換單元於交流電的正半週期導通,以使觸發單元持續觸發邏輯單元,因此邏輯單元持續被觸發及延遲轉態,藉此邏輯單元輸出一第一訊號給切換單元。所以交流電將通過整流電路。於 直流電輸入狀況下,光耦式轉換單元於直流電時導通,以使觸發單元觸發邏輯單元,因此邏輯單元所輸出的訊號延遲一預設時間後轉態,藉此邏輯單元輸出一第二訊號給切換單元。所以直流電將直接繞過整流電路以耦接至後端電路。由此可知,本實施例確實達到提升電路的輸出功率。 In summary, in the AC/DC power supply circuit of the present invention, in the AC input condition, the optocoupler conversion unit is turned on during the positive half cycle of the alternating current, so that the trigger unit continuously triggers the logic unit, so the logic unit is continuously triggered and delayed. The logic unit outputs a first signal to the switching unit. Therefore, the AC power will pass through the rectifier circuit. to In the DC input state, the optocoupler conversion unit is turned on during the DC power, so that the trigger unit triggers the logic unit, so the signal output by the logic unit is delayed by a predetermined time, and then the logic unit outputs a second signal to the switch. unit. Therefore, the direct current will bypass the rectifier circuit directly to couple to the back end circuit. It can be seen from this that the present embodiment does achieve the output power of the boost circuit.

以上所述僅為本發明之實施例,其並非用以侷限本發明之專利範圍。 The above description is only an embodiment of the present invention, and is not intended to limit the scope of the invention.

1‧‧‧交直流電源電路 1‧‧‧AC power supply circuit

8‧‧‧後端電路 8‧‧‧ Back-end circuit

9‧‧‧整流電路 9‧‧‧Rectifier circuit

10‧‧‧光耦式轉換單元 10‧‧‧optical coupling unit

12‧‧‧觸發單元 12‧‧‧Trigger unit

14‧‧‧邏輯單元 14‧‧‧Logical unit

16‧‧‧切換單元 16‧‧‧Switch unit

D0‧‧‧旁通路徑 D0‧‧‧ bypass path

L1、L2‧‧‧輸入端子 L1, L2‧‧‧ input terminals

Claims (10)

一種交直流電源電路,透過一對輸入端子以電性連接一交流電或一直流電,且該交直流電源電路電性連接至具有一整流電路的一隔離電源轉換電路,該交直流電源電路包括:一光耦式轉換單元;一觸發單元,耦接該光耦式轉換單元;一邏輯單元,耦接該觸發單元;及一切換單元,耦接於該邏輯單元;其中,該光耦式轉換單元經由該對輸入端子接收到該交流電時,該光耦式轉換單元輸出一第一脈波訊號給該觸發單元,該觸發單元根據該第一脈波訊號以輸出一第二脈波訊號給該邏輯單元,該邏輯單元根據該第二脈波訊號以輸出一第一訊號給該切換單元,該切換單元根據該第一訊號以處於一第一狀態,以使該交流電經由該整流電路轉換至一後端電路;其中,該光耦式轉換單元經由該對輸入端子接收到該直流電時,該觸發單元輸出一邏輯訊號給該邏輯單元,該邏輯單元根據該邏輯訊號以輸出一延遲一預設時間後轉態的第二訊號給該切換單元,該切換單元根據該第二訊號以處於一第二狀態,以使該直流電直接繞過該整流電路以供給該後端電路。 An AC/DC power supply circuit is electrically connected to an alternating current or a continuous current through a pair of input terminals, and the AC/DC power supply circuit is electrically connected to an isolated power conversion circuit having a rectifier circuit, the AC/DC power supply circuit comprising: An optocoupler conversion unit; a trigger unit coupled to the optocoupler conversion unit; a logic unit coupled to the trigger unit; and a switching unit coupled to the logic unit; wherein the optocoupler conversion unit is When the pair of input terminals receives the alternating current, the optocoupler converting unit outputs a first pulse signal to the trigger unit, and the trigger unit outputs a second pulse signal to the logic unit according to the first pulse signal. The logic unit outputs a first signal to the switching unit according to the second pulse signal, and the switching unit is in a first state according to the first signal, so that the alternating current is converted to a back end via the rectifying circuit. a circuit; wherein, when the optocoupler conversion unit receives the DC power through the pair of input terminals, the trigger unit outputs a logic signal to the logic unit The logic unit outputs a second signal delayed by a predetermined time to the switching unit according to the logic signal, and the switching unit is in a second state according to the second signal, so that the direct current directly bypasses the A rectifier circuit is supplied to the back end circuit. 如申請專利範圍第1項所述之交直流電源電路,其中該第一狀態係為該切換單元處於常閉狀態,該第二狀態係為該切換單元處於常開狀態。 The AC/DC power supply circuit of claim 1, wherein the first state is that the switching unit is in a normally closed state, and the second state is that the switching unit is in a normally open state. 如申請專利範圍第1或2項所述之交直流電源電路,其中該光耦式轉換單元包括一二極體與一光耦合元件,該二極體與該光耦合元件並聯。 The AC/DC power supply circuit of claim 1 or 2, wherein the optocoupler conversion unit comprises a diode and an optical coupling element, and the diode is connected in parallel with the optical coupling element. 如申請專利範圍第3項所述之交直流電源電路,其中該光耦合 元件包括一光伏二極體與一光伏感應器,該光伏二極體與該二極體反向並接,該光伏感應器耦接該觸發單元,該光耦合元件於該交流電的正半週期導通,並於該交流電的負半週期截止,另於該對輸入端子接收到該直流電時,該二極體截止及該光耦合元件導通。 An AC/DC power supply circuit as described in claim 3, wherein the optical coupling The component includes a photovoltaic diode and a photovoltaic inductor. The photovoltaic diode is connected in reverse with the diode. The photovoltaic sensor is coupled to the trigger unit, and the optical coupling component is turned on during the positive half cycle of the alternating current. And the negative half cycle of the alternating current is turned off, and when the pair of input terminals receives the direct current, the diode is turned off and the optical coupling element is turned on. 如申請專利範圍第1或2項所述之交直流電源電路,其中該第二脈波訊號的每一脈衝用以觸發該邏輯單元,以使該邏輯單元輸出該第一訊號,該第一訊號為一低邏輯準位的訊號。 The AC/DC power supply circuit of claim 1 or 2, wherein each pulse of the second pulse signal is used to trigger the logic unit, so that the logic unit outputs the first signal, the first signal A signal with a low logic level. 如申請專利範圍第1或2項所述之交直流電源電路,其中,該邏輯訊號為用以觸發該邏輯單元,以使該邏輯單元輸出該第二訊號,該第二訊號為該邏輯單元延遲於該預設時間後以將一低邏輯準位轉態為一高邏輯準位的訊號。 The AC/DC power supply circuit of claim 1 or 2, wherein the logic signal is used to trigger the logic unit, so that the logic unit outputs the second signal, and the second signal is delayed by the logic unit. After the preset time, the signal is converted to a high logic level by a low logic level. 如申請專利範圍第1或2項所述之交直流電源電路,其中該第二脈波訊號的每一脈衝週期小於該預設時間。 The AC/DC power supply circuit of claim 1 or 2, wherein each pulse period of the second pulse signal is less than the preset time. 如申請專利範圍第1或2項所述之交直流電源電路,其中該觸發單元為一反相觸發器,該邏輯單元為一具重置電路的邏輯器,該切換單元為一電晶體與一繼電器的其中之一或組合,其中該繼電器為單刀雙擲繼電器。 The AC/DC power supply circuit of claim 1 or 2, wherein the trigger unit is an inverting flip-flop, the logic unit is a logic circuit with a reset circuit, and the switching unit is a transistor and a One or a combination of relays, wherein the relay is a single pole double throw relay. 一種交直流電源選擇路徑方法,適用於透過一對輸入端子以電性連接一交流電或一直流電,且一交直流電源電路電性連接至具有一整流電路的一隔離電源轉換電路,該交直流電源選擇路徑方法包括:判斷一光耦式轉換單元是否接收到該交流電,若判斷結果為是,則該光耦式轉換單元輸出一第一脈波訊號給一觸發單元,該觸發單元根據該第一脈波訊號以輸出一第二脈波訊號給一邏輯單元;該邏輯單元根據該第二脈波訊號以輸出一第一訊號給一切換單元,該切換單元根據該第一訊號以處於一第一狀態,以 使該交流電經由該整流電路轉換至一後端電路;若判斷結果為否,則該觸發單元輸出一邏輯訊號給該邏輯單元;該邏輯單元根據該邏輯訊號以輸出一延遲一預設時間後轉態的第二訊號給該切換單元,該切換單元根據該第二訊號以處於一第二狀態,以使該直流電直接繞過該整流電路以供給該後端電路。 An AC/DC power supply selection path method is adapted to electrically connect an alternating current or a continuous current through a pair of input terminals, and an AC/DC power supply circuit is electrically connected to an isolated power conversion circuit having a rectifier circuit, the AC/DC power supply The method of selecting a path includes: determining whether an optocoupler conversion unit receives the alternating current, and if the determination result is yes, the optocoupler converting unit outputs a first pulse signal to a trigger unit, and the trigger unit is configured according to the first The pulse signal outputs a second pulse signal to a logic unit; the logic unit outputs a first signal to a switching unit according to the second pulse signal, and the switching unit is in a first according to the first signal State to The alternating current is converted to a back end circuit via the rectifying circuit; if the determination result is no, the triggering unit outputs a logic signal to the logic unit; the logic unit outputs a delay according to the logic signal for a predetermined time and then turns The second signal of the state is given to the switching unit, and the switching unit is in a second state according to the second signal, so that the direct current directly bypasses the rectifying circuit to supply the back end circuit. 如申請專利範圍第9項所述之交直流電源選擇路徑方法,其中該第一狀態係為該切換單元處於常閉狀態,該第二狀態係為該切換單元處於常開狀態。 The AC/DC power supply selection path method according to claim 9, wherein the first state is that the switching unit is in a normally closed state, and the second state is that the switching unit is in a normally open state.
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