TWI557407B - Method of chip inspection - Google Patents

Method of chip inspection Download PDF

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TWI557407B
TWI557407B TW103107598A TW103107598A TWI557407B TW I557407 B TWI557407 B TW I557407B TW 103107598 A TW103107598 A TW 103107598A TW 103107598 A TW103107598 A TW 103107598A TW I557407 B TWI557407 B TW I557407B
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die
tested
light
providing
detecting
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TW103107598A
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TW201534900A (en
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關叡鉉
蘇詠喬
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晶元光電股份有限公司
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Description

晶粒檢測方法 Grain detection method

本發明係關於一種晶粒檢測方法,且特別係關於一種晶粒檢測方法,其提供一可發出一第一光線之第一光源位於第一待測晶粒下方,其中部份第一光線經由第一待測晶粒之一側表面入射第一待測晶粒,部份第一光線經由第一待測晶粒之一下表面入射第一待測晶粒。 The present invention relates to a method for detecting a crystal grain, and more particularly to a method for detecting a crystal grain, which provides a first light source that emits a first light source under the first die to be tested, wherein a portion of the first light passes through A side surface of a die to be measured is incident on the first die to be tested, and a portion of the first light is incident on the first die to be tested via a lower surface of the first die to be tested.

發光二極體(Light Emitting Diode,LED)係為固態半導體發光元件,其優點為功耗低,產生的熱能低,工作壽命長,防震,體積小,反應速度快和具有良好的光電特性,例如穩定的發光波長。因此發光二極體被廣泛應用於家用電器,設備指示燈,及光電產品等。 Light Emitting Diode (LED) is a solid-state semiconductor light-emitting device, which has the advantages of low power consumption, low heat energy, long working life, shock resistance, small volume, fast response speed and good photoelectric characteristics, for example. Stable light emission wavelength. Therefore, the light-emitting diodes are widely used in household appliances, equipment indicator lights, and optoelectronic products.

在發光二極體的半導體製程中,往往會因為一些無法避免的原因形成缺陷,因此為了維持產品品質的穩定,在進行半導體製程時,需針對所生產的產品依客戶或使用者需求規格進行缺陷檢測,再根據檢測的結果將不符合客戶或使用者需求規格的產品檢出,或是分析造成缺陷的原因,再藉由製程參數的調整來避 免或減少缺陷的產生,以達到提升製程良率以及可靠度的目的。 In the semiconductor manufacturing process of light-emitting diodes, defects are often formed for some unavoidable reasons. Therefore, in order to maintain the stability of product quality, in the semiconductor manufacturing process, defects must be made according to customer or user requirements for the products to be manufactured. Detecting, and then detecting the products that do not meet the customer or user requirements according to the test results, or analyzing the cause of the defects, and then avoiding the adjustment of the process parameters. Eliminate or reduce the occurrence of defects to achieve the goal of improving process yield and reliability.

本發明係提供一種晶粒檢測方法,包含:提供一第一待測晶粒,包含一下表面、一側表面和一上表面;以及提供一可發出一第一光線之第一光源位於第一待測晶粒下方,其中部份第一光線經由側表面入射第一待測晶粒,部份第一光線經由下表面入射第一待測晶粒。 The present invention provides a method for detecting a die, comprising: providing a first die to be tested, including a lower surface, a side surface, and an upper surface; and providing a first light source capable of emitting a first light to be located at the first Below the die, a portion of the first light enters the first die to be tested via the side surface, and a portion of the first light enters the first die to be tested via the lower surface.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the invention will be apparent from the following description.

1‧‧‧晶粒檢測裝置 1‧‧‧ grain inspection device

2‧‧‧晶粒承載部 2‧‧‧Grade carrier

3‧‧‧晶粒 3‧‧‧ grain

3a‧‧‧標準晶粒 3a‧‧‧standard grain

3b‧‧‧第一待測晶粒 3b‧‧‧First die to be tested

d‧‧‧切割道 D‧‧‧ cutting road

S1‧‧‧下表面 S1‧‧‧ lower surface

S2‧‧‧側表面 S2‧‧‧ side surface

S3‧‧‧上表面 S3‧‧‧ upper surface

11‧‧‧感光元件 11‧‧‧Photosensitive element

12‧‧‧第四光源 12‧‧‧ fourth source

121‧‧‧第四光線 121‧‧‧fourth light

13‧‧‧第二光源 13‧‧‧second light source

131‧‧‧第二光線 131‧‧‧second light

14‧‧‧第一光源 14‧‧‧First light source

141‧‧‧第一光線 141‧‧‧First light

15‧‧‧第三光源 15‧‧‧ Third light source

151‧‧‧第三光線 151‧‧‧3rd light

30‧‧‧半導體疊層 30‧‧‧Semiconductor laminate

31‧‧‧第一型半導體層 31‧‧‧First type semiconductor layer

32‧‧‧第二型半導體層 32‧‧‧Second type semiconductor layer

33‧‧‧主動層 33‧‧‧ active layer

34‧‧‧反射結構 34‧‧‧Reflective structure

35a‧‧‧電極結構 35a‧‧‧Electrode structure

35b‧‧‧電極結構 35b‧‧‧electrode structure

351‧‧‧缺陷 351‧‧‧ Defects

36‧‧‧基板 36‧‧‧Substrate

5‧‧‧待測晶粒 5‧‧‧Grade to be tested

50‧‧‧電極墊 50‧‧‧electrode pads

51‧‧‧半導體疊層 51‧‧‧Semiconductor laminate

6‧‧‧待測晶粒 6‧‧‧Grade to be tested

60‧‧‧電極墊 60‧‧‧electrode pads

61‧‧‧半導體疊層 61‧‧‧Semiconductor laminate

61a‧‧‧影像 61a‧‧ images

7‧‧‧標準晶粒 7‧‧‧ standard grain

70‧‧‧電極墊 70‧‧‧electrode pads

71‧‧‧半導體疊層 71‧‧‧Semiconductor laminate

71a‧‧‧影像 71a‧‧‧Image

61b‧‧‧缺陷影像 61b‧‧‧ Defective imagery

7a‧‧‧第一方向 7a‧‧‧First direction

7b‧‧‧第二方向 7b‧‧‧second direction

第1圖係本發明一實施例中所揭示之晶粒檢測裝置的示意圖。 1 is a schematic view of a die detecting apparatus disclosed in an embodiment of the present invention.

第2A圖係本發明一實施例所揭示之標準晶粒的一電極結構之上視圖。 2A is a top view of an electrode structure of a standard crystal grain disclosed in an embodiment of the present invention.

第2B圖係本發明一實施例所揭示之晶粒檢測裝置的部份示意圖。 2B is a partial schematic view of a die detecting apparatus according to an embodiment of the present invention.

第3A圖係本發明一實施例所揭示之待測晶粒的一電極結構之上視圖。 3A is a top view of an electrode structure of a die to be tested disclosed in an embodiment of the present invention.

第3B圖係本發明一實施例所揭示之晶粒檢測裝置的部份示 意圖。 FIG. 3B is a partial diagram of a die detecting device according to an embodiment of the invention. intention.

第4圖係本發明一實施例所揭示之晶粒檢測方法之流程圖。 FIG. 4 is a flow chart of a method for detecting a die disclosed in an embodiment of the present invention.

第5圖係本發明依據一標準晶粒的一影像示意圖。 Figure 5 is a schematic illustration of an image of a standard die according to the present invention.

第6圖係本發明依據一待測晶粒的一影像示意圖。 Figure 6 is a schematic diagram of an image of a crystal to be tested according to the present invention.

第7圖係本發明依據一待測晶粒的一影像示意圖。 Figure 7 is a schematic diagram of an image of a die to be tested according to the present invention.

第8A圖係本發明依據一標準晶粒的一影像示意圖。 Figure 8A is a schematic diagram of an image of a standard die according to the present invention.

第8B圖係本發明依據一待測晶粒的一影像示意圖。 Figure 8B is a schematic diagram of an image of a die to be tested according to the present invention.

第8C圖係本發明依據一待測晶粒的一缺陷面積示意圖。 Figure 8C is a schematic view of a defect area of a die to be tested according to the present invention.

第9圖係本發明一實施例中所揭示之晶粒檢測結果。 Figure 9 is a graph showing the results of grain inspection disclosed in an embodiment of the present invention.

為了使本發明之敘述更加詳盡與完備,請參照下列實施例之描述並配合相關圖示。惟,以下所示之實施例係用於例示本發明之發光元件,並非將本發明限定於以下之實施例。又,本說明書記載於實施例中的構成零件之尺寸、材質、形狀、相對配置等在沒有限定之記載下,本發明之範圍並非限定於此,而僅是單純之說明而已。且各圖示所示構件之大小或位置關係等,會由於為了明確說明有加以誇大之情形。更且,於以下之描述中,為了適切省略詳細說明,對於同一或同性質之構件用同一名稱、符號顯示。 In order to make the description of the present invention more detailed and complete, reference is made to the description of the following embodiments and the accompanying drawings. However, the examples shown below are intended to exemplify the light-emitting elements of the present invention, and the present invention is not limited to the following examples. Further, the dimensions, materials, shapes, relative arrangements, and the like of the components described in the present specification are not limited to the description, and the scope of the present invention is not limited thereto, and is merely illustrative. Further, the size, positional relationship, and the like of the members shown in the drawings may be exaggerated for clarity of explanation. Further, in the following description, in order to omit the detailed description, the same or similar members are denoted by the same names and symbols.

一光電元件,例如發光二極體,其製造係由一晶圓經過前段製程中的鍍膜、黃光微影製程定義後,再經過切割步驟,最 後形成複數顆獨立的晶粒。此複數顆獨立的晶粒需依客戶或使用者需求規格,再經過一連串的晶粒檢測,將不符合客戶或使用者需求規格的晶粒揀出。於本發明之一實施例中,此晶圓包括用以成長磷化鋁鎵銦(AlGaInP)之砷化鎵(GaAs)晶圓,或用以成長氮化銦鎵(InGaN)之藍寶石(Al2O3)晶圓、氮化鎵(GaN)晶圓或碳化矽(SiC)晶圓,或用以成長III-V族太陽能電池疊層之矽晶圓、鍺晶圓、或砷化鎵晶圓。於此晶圓上可利用有機金屬化學氣相沉積法(MOCVD)、分子束磊晶(MBE)、氫化物氣相沉積法(HVPE)、蒸鍍法或離子電鍍方法形成一具有光電特性之半導體疊層,例如發光(light-emitting)疊層或光伏(photovoltaic)疊層。在晶圓磊晶完成後,會經過蒸鍍製程形成電極,再經過黃光、蝕刻製程形成切割道,最後沿著切割道經過刀切或雷射切割步驟,使各晶粒彼此分離,即形成複數顆獨立的晶粒。 A photovoltaic element, such as a light-emitting diode, is fabricated by a wafer through a coating process in a front-end process, a yellow lithography process, and then a dicing step to form a plurality of individual dies. The plurality of independent dies are sorted according to the customer's or user's specifications, and after a series of die inspections, the dies that do not meet the customer's or user's specifications are sorted out. In one embodiment of the invention, the wafer includes a gallium arsenide (GaAs) wafer for growing aluminum gallium indium arsenide (AlGaInP) or sapphire (Al 2 for growing indium gallium nitride (InGaN). O 3 ) wafers, gallium nitride (GaN) wafers or tantalum carbide (SiC) wafers, or germanium wafers, germanium wafers, or gallium arsenide wafers used to grow III-V solar cell stacks . A semiconductor having photoelectric properties can be formed on the wafer by metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), evaporation or ion plating. A laminate, such as a light-emitting laminate or a photovoltaic laminate. After the wafer epitaxy is completed, the electrode is formed by an evaporation process, and then a yellow light, an etching process is formed to form a dicing street, and finally a dicing or laser cutting step is performed along the scribe line to separate the crystal grains from each other, that is, to form A plurality of independent grains.

承上所述,晶圓經過切割形成複數顆獨立的晶粒後,此 複數顆獨立的晶粒可貼附於一晶粒承載部,其中晶粒承載部可為具有黏性或是延展性之膠材,例如藍膜膠帶或紫外光膠帶,於本發明之一實施例中是選用藍膜膠帶做為晶粒承載部。前述之切割步驟亦可於晶圓貼附於晶粒承載部之後再進行。第1圖係本發明一實施例中所揭示之晶粒檢測裝置1的示意圖。如第1圖所示,以單顆待測晶粒為例,晶粒檢測裝置1包含一第一待測晶粒3b、一晶粒承載部2以承載第一待測晶粒3b,其中第一待測晶粒3b包含一下表面S1、一上表面S3以及一側表面S2。晶粒檢測裝置1包含 一背向光裝置100和一正向光裝置110以檢測晶粒缺陷,其中背向光裝置100位於晶粒承載部2下方,正向光裝置110位於晶粒承載部2上方。背向光裝置100包含一可發出一第一光線141之第一光源14位於第一待測晶粒3b下方、一可發出一第二光線131之第二光源13位於第一待測晶粒3b下方,其中第一光線141係以一斜角入射第一待測晶粒3b,第二光線131大致上係垂直入射第一待測晶粒3b,換言之,第二光線131入射下表面S1之角度小於第一光線141入射下表面S1之角度。具體而言,第一光線141係以一斜角,部份入射於下表面S1,部份入射於側表面S2,而第二光線131大致上係垂直入射於下表面S1。正向光裝置110包含一可發出一第三光線151之第三光源15位於第一待測晶粒3b上方,一可發出一第四光線121之第四光源12位於第一待測晶粒3b上方,其中第四光線121係以一斜角入射第一待測晶粒3b,第三光線151大致上係垂直入射第一待測晶粒3b,換言之,第三光線151入射上表面S3之角度小於第四光線121入射上表面S3之角度。晶粒檢測裝置1包含一感光元件11位於第一待測晶粒3b之上方以收集被第一待測晶粒3b反射或折射的第一光線141、第二光線131、第三光線151、或第四光線121。於本發明之一實施例中,第一光源14、第二光源13、第三光源15、或第四光源12為一脈衝式氙氣閃光燈。第一光源14或第四光源12為一具有一中央孔徑之環形結構。 According to the above, after the wafer is cut to form a plurality of independent crystal grains, this A plurality of independent dies may be attached to a die carrying portion, wherein the die carrying portion may be a viscous or ductile adhesive, such as a blue film tape or an ultraviolet tape, in an embodiment of the present invention The middle is to use blue film tape as the grain bearing part. The cutting step described above may also be performed after the wafer is attached to the die carrying portion. Fig. 1 is a schematic view of a crystal grain detecting apparatus 1 disclosed in an embodiment of the present invention. As shown in FIG. 1 , taking a single die to be tested as an example, the die detecting device 1 includes a first die 3b to be tested and a die carrying portion 2 to carry the first die 3b to be tested, wherein A die 3b to be tested includes a lower surface S1, an upper surface S3, and a side surface S2. The grain detecting device 1 includes A back light device 100 and a forward light device 110 are detected to detect grain defects, wherein the back light device 100 is located below the die carrier 2 and the forward light device 110 is located above the die carrier 2. The back light device 100 includes a first light source 14 that emits a first light 141, and a second light source 13 that emits a second light 131, which is located below the first die 3b. Below, wherein the first light 141 is incident on the first die 3b at an oblique angle, and the second light 131 is substantially perpendicularly incident on the first die 3b, in other words, the angle at which the second light 131 is incident on the lower surface S1. Less than the angle at which the first light ray 141 is incident on the lower surface S1. Specifically, the first light ray 141 is at an oblique angle, partially incident on the lower surface S1, partially incident on the side surface S2, and the second light ray 131 is substantially perpendicularly incident on the lower surface S1. The forward light device 110 includes a third light source 15 that emits a third light 151, and is disposed above the first die 3b, and a fourth light source 12 that emits a fourth light 121 is located at the first die 3b. Above, wherein the fourth light 121 is incident on the first die 3b at an oblique angle, and the third light 151 is substantially perpendicularly incident on the first die 3b, in other words, the angle of the third light 151 is incident on the upper surface S3. Less than the angle at which the fourth ray 121 is incident on the upper surface S3. The die detecting device 1 includes a photosensitive element 11 located above the first die 3b to be collected to collect the first light 141, the second light 131, the third light 151, or the third light 151, or the first light ray 151, or The fourth light ray 121. In an embodiment of the invention, the first light source 14, the second light source 13, the third light source 15, or the fourth light source 12 is a pulsed xenon flash lamp. The first light source 14 or the fourth light source 12 is an annular structure having a central aperture.

如第1圖所示,於本發明之一實施例中,第一待測晶粒3b包含一基板36,一半導體疊層30位於基板36之一側上,以及 一電極結構35b位於半導體疊層30之上表面S3上。基板36可為藍寶石基板或Ⅲ-V族半導體基板。半導體疊層30包含一第一型半導體層31,一第二型半導體層32,以及一主動層33位於第一型半導體層31及第二型半導體層32之間。第一型半導體層31與第二型半導體層32,例如為包覆層(cladding layer)或限制層(confinement layer),可分別提供電子與電洞,電子與電洞於一電流驅動下在主動層33複合以發出一光線。半導體疊層30之材料包含Ⅲ-V族半導體材料,例如AlxInyGa(1-x-y)N或AlxInyGa(1-x-y)P,其中0≦x,y≦1;(x+y)≦1。依據主動層33之材料,半導體疊層30可發出波長介於610nm及650nm之間的紅光,波長介於530nm及570nm之間的綠光,或是波長介於450nm及490nm之間的藍光。為了增加晶粒的光取出效率,於本發明之一實施例中,第一待測晶粒3b包含一反射結構34位於基板36之另一側上,也就是第一待測晶粒3b之下表面S1上,其中反射結構34為單層或多層結構,例如布拉格反射鏡(Distributed Bragg Reflector,DBR),反射結構34之材料包含金屬、金屬氧化物、氧化物、氮化物、氮氧化物或上述材料之任意組合。第一待測晶粒3b具有一高度位於50μm~200μm之間。 As shown in FIG. 1, in one embodiment of the present invention, the first die 3b to be tested includes a substrate 36, a semiconductor laminate 30 is disposed on one side of the substrate 36, and an electrode structure 35b is located on the semiconductor laminate. 30 above the surface S3. The substrate 36 may be a sapphire substrate or a III-V semiconductor substrate. The semiconductor stack 30 includes a first type semiconductor layer 31, a second type semiconductor layer 32, and an active layer 33 between the first type semiconductor layer 31 and the second type semiconductor layer 32. The first type semiconductor layer 31 and the second type semiconductor layer 32, for example, a cladding layer or a confinement layer, respectively provide electrons and holes, and the electrons and holes are actively driven by a current. Layer 33 is composited to emit a light. The material of the semiconductor stack 30 comprises a III-V semiconductor material, such as Al x In y Ga (1-xy) N or Al x In y Ga (1-xy) P, where 0 ≦ x, y ≦ 1; (x +y)≦1. Depending on the material of the active layer 33, the semiconductor stack 30 can emit red light having a wavelength between 610 nm and 650 nm, green light having a wavelength between 530 nm and 570 nm, or blue light having a wavelength between 450 nm and 490 nm. In one embodiment of the present invention, the first die 3b to be tested includes a reflective structure 34 on the other side of the substrate 36, that is, under the first die 3b to be tested. On the surface S1, wherein the reflective structure 34 is a single layer or a multilayer structure, such as a Distributed Bragg Reflector (DBR), the material of the reflective structure 34 comprises a metal, a metal oxide, an oxide, a nitride, an oxynitride or the like. Any combination of materials. The first die to be tested 3b has a height between 50 μm and 200 μm.

第2A圖係本發明一實施例所揭示之標準晶粒3a的一電極結構35a之上視圖。第2B圖係本發明一實施例所揭示之晶粒檢測裝置的部份示意圖。如第2B圖所示,部份第一光線141入射標準晶粒3a之下表面S1時會被反射結構34反射;部份第一光線141 則經由標準晶粒3a之側表面S2入射標準晶粒3a,接著穿透基板36及半導體疊層30,經由未被電極結構35a覆蓋之上表面S3射出。也就是說,藉由第一光線141經由側表面S2入射標準晶粒3a時,部份第一光線141未能穿透電極結構35a而進入到第1圖之感光元件11,於是形成一暗區;部份第一光線141則穿透未被電極結構35a覆蓋的上表面S3而進入到第1圖之感光元件11,於是形成一亮區,再藉由結合暗區和亮區,經由一電腦軟體處理,構成依據第2A圖所示之電極結構35a的一參考影像。第3A圖係本發明一實施例所揭示之待測晶粒3b的一電極結構35b之上視圖。第3B圖係本發明一實施例所揭示之晶粒檢測裝置的部份示意圖。如第3A圖所示,當電極結構35b包含一缺陷351,例如斷線,第一光線141可穿透此缺陷351,進入到第1圖之感光元件11而不被電極結構35b遮蔽,再依上述方法構成依據第3A圖所示之電極結構35b的一測試影像,將此測試影像拿來與參考影像比較圖樣或形狀之差異,藉此檢測第3A圖中電極結構35b之缺陷。但缺陷的種類不以電極結構之缺陷為限制,任何形成於第一待測晶粒3b表面的缺陷均可藉此方法和裝置予以檢測。 2A is a top view of an electrode structure 35a of a standard crystal 3a according to an embodiment of the present invention. 2B is a partial schematic view of a die detecting apparatus according to an embodiment of the present invention. As shown in FIG. 2B, part of the first light ray 141 is reflected by the reflective structure 34 when it is incident on the lower surface S1 of the standard crystal grain 3a; part of the first light ray 141 Then, the standard crystal grain 3a is incident via the side surface S2 of the standard crystal grain 3a, and then penetrates the substrate 36 and the semiconductor laminate 30, and is emitted by covering the upper surface S3 without the electrode structure 35a. That is, when the first light ray 141 is incident on the standard crystal grain 3a via the side surface S2, part of the first light ray 141 fails to penetrate the electrode structure 35a and enters the photosensitive element 11 of FIG. 1, thus forming a dark region. a portion of the first light 141 penetrates the upper surface S3 not covered by the electrode structure 35a and enters the photosensitive element 11 of FIG. 1, thereby forming a bright area, and then combining the dark area and the bright area through a computer The soft body processing constitutes a reference image of the electrode structure 35a shown in Fig. 2A. FIG. 3A is a top view of an electrode structure 35b of the die 3b to be tested disclosed in an embodiment of the present invention. FIG. 3B is a partial schematic view of a die detecting apparatus according to an embodiment of the present invention. As shown in FIG. 3A, when the electrode structure 35b includes a defect 351, such as a broken line, the first light ray 141 can penetrate the defect 351, enter the photosensitive element 11 of FIG. 1 without being shielded by the electrode structure 35b, and then The above method constitutes a test image according to the electrode structure 35b shown in Fig. 3A, and the test image is taken to compare the difference in pattern or shape with the reference image, thereby detecting the defect of the electrode structure 35b in Fig. 3A. However, the type of the defect is not limited by the defect of the electrode structure, and any defect formed on the surface of the first die 3b to be tested can be detected by the method and apparatus.

第4圖係本發明一實施例所揭示之晶粒檢測方法之一流程圖。 Figure 4 is a flow chart of a method for detecting a grain according to an embodiment of the present invention.

首先,提供一待測晶粒,例如第1圖或第3B圖所示的第一待測晶粒3b。接著提供一晶粒承載部2以承載待測晶粒,以及提供待測晶粒檢測所需的光源。如第1圖所示,提供可發出第一 光線141之第一光源14,例如脈衝式氙氣閃光燈,位於第一待測晶粒3b下方,其中部份第一光線141可穿透晶粒承載部2,經由第一待測晶粒3b之側表面S2入射第一待測晶粒3b,部份第一光線141經由第一待測晶粒3b之下表面S1入射第一待測晶粒3b。 具體而言,第一光線141可穿透第一待測晶粒3b之基板36及半導體疊層30,當第一待測晶粒3b具有反射結構34時,第一待測晶粒3b之反射結構34可反射部份射向第一待測晶粒3b下表面S1的第一光線141。 First, a die to be tested, such as the first die 3b to be tested shown in FIG. 1 or FIG. 3B, is provided. Then, a die carrying portion 2 is provided to carry the die to be tested, and a light source required for detecting the die to be tested is provided. As shown in Figure 1, the offer can be issued first The first light source 14 of the light 141, such as a pulsed xenon flash lamp, is located below the first die 3b to be tested, and a portion of the first light 141 can penetrate the die carrying portion 2 via the side of the first die 3b to be tested. The surface S2 is incident on the first die 3b to be tested, and a portion of the first ray 141 is incident on the first die 3b to be tested via the lower surface S1 of the first die 3b to be tested. Specifically, the first light 141 can penetrate the substrate 36 of the first die 3b to be tested and the semiconductor laminate 30. When the first die 3b to be tested has the reflective structure 34, the first die 3b is reflected. The structure 34 can reflect a portion of the first light 141 that is directed toward the lower surface S1 of the first die 3b to be tested.

其次,利用第1圖所示的晶粒檢測裝置1以收集待測晶 粒的一影像。請參照第5圖係本發明利用晶粒檢測裝置1所收集到另一待測晶粒5的影像,其中待測晶粒5包含電極墊50及半導體疊層51。並請參照第6圖係利用晶粒檢測裝置1所收集到另一待測晶粒6的影像,其中待測晶粒6包含電極墊60及半導體疊層61。 Next, the grain detecting device 1 shown in FIG. 1 is used to collect the crystal to be measured. An image of the grain. Referring to FIG. 5, an image of another die 5 to be tested is collected by the die detecting device 1 according to the present invention. The die 5 to be tested includes an electrode pad 50 and a semiconductor stack 51. Referring to FIG. 6 , an image of another die 6 to be tested is collected by the die detecting device 1 , wherein the die 6 to be tested includes an electrode pad 60 and a semiconductor stack 61 .

其次,提供一標準晶粒之一影像。請參照第7圖顯示本 發明另一標準晶粒7的影像,其中標準晶粒7包含電極墊70及半導體疊層71。 Second, an image of one of the standard dies is provided. Please refer to Figure 7 for this Another image of a standard die 7 is invented, wherein the standard die 7 comprises an electrode pad 70 and a semiconductor stack 71.

其次,提供一第一判斷步驟,比較待測晶粒之影像顏色與標準晶粒之影像顏色是否有色差差異,及此色差差異是否超過一標準,例如客戶容許範圍,如果色差差異在客戶容許範圍內則判斷為良品,如果色差差異在客戶容許範圍外則判斷為不良品。一旦判定為不良品,則將待測晶粒之影像顏色與標準晶粒之影像 顏色的色差差異超過標準之位置定義為一缺陷位置。舉例來說,比較待測晶粒5之影像顏色與標準晶粒7之影像顏色,如第5圖所示,待測晶粒5之半導體疊層51與標準晶粒7之半導體疊層71沒有色差差異,而待測晶粒5之電極墊50與標準晶粒7之電極墊70有色差差異,若此色差差異在客戶容許範圍內則判斷待測晶粒5為良品。舉例來說,比較待測晶粒6之影像顏色與標準晶粒7之影像顏色,如第6圖所示,待測晶粒6之電極墊60與標準晶粒7之電極墊70沒有色差差異,而待測晶粒6之半導體疊層61與標準晶粒7之半導體疊層71有色差差異,若此色差差異在客戶容許範圍外則判斷待測晶粒6為不良品,待測晶粒6經判定為不良品後,則將待測晶粒6之影像顏色與標準晶粒7之影像顏色的色差差異超過標準之位置定義為一缺陷位置。 Secondly, a first determining step is provided to compare whether there is a color difference between the image color of the die to be tested and the image color of the standard die, and whether the difference of the color difference exceeds a standard, such as a customer tolerance range, if the color difference is within the customer's allowable range It is judged to be a good product, and if the difference in color difference is outside the allowable range of the customer, it is judged to be a defective product. Once judged as defective, the image color of the die to be tested and the image of the standard grain The position where the color difference of the color exceeds the standard is defined as a defect position. For example, comparing the image color of the die 5 to be tested with the image color of the standard die 7, as shown in FIG. 5, the semiconductor stack 51 of the die 5 to be tested and the semiconductor stack 71 of the standard die 7 are not. The chromatic aberration is different, and the electrode pad 50 of the die 5 to be tested has a color difference difference from the electrode pad 70 of the standard die 7, and if the chromatic aberration difference is within the allowable range of the customer, it is judged that the die 5 to be tested is a good product. For example, comparing the image color of the die 6 to be tested with the image color of the standard die 7, as shown in FIG. 6, there is no difference in color difference between the electrode pad 60 of the die 6 to be tested and the electrode pad 70 of the standard die 7. The semiconductor stack 61 of the die 6 to be tested has a difference in color difference from the semiconductor stack 71 of the standard die 7. If the difference in color difference is outside the allowable range of the customer, it is judged that the die 6 to be tested is a defective product, and the die to be tested is After the determination of the defective product, the position difference between the image color of the die 6 to be tested and the image color of the standard crystal grain 7 exceeds the standard is defined as a defect position.

其次,提供一第二判斷步驟,其中第二判斷步驟包含於第一判斷步驟中所定義的缺陷位置測量缺陷的大小是否超過標準,如果缺陷的大小在客戶容許範圍內則判斷為良品,如果缺陷的大小在客戶容許範圍外則判斷為不良品。以待測晶粒6為例。 第8A圖係標準晶粒7之部份半導體疊層71的的影像71a,第8B圖係待測晶粒6之部份半導體疊層61的影像61a,經由比對影像61a與影像71a,而檢測出檢測晶粒6之影像61a與標準晶粒7之影像71a有色差差異,定義此有色差差異之位置為一缺陷位置,且具有一缺陷影像61b,如第8C圖所示。若此缺陷影像61b於第一判斷步驟中判斷色差差異在客戶容許範圍外,於是進一步在第 二判斷步驟分析缺陷影像61b的大小是否在客戶容許範圍外,如果缺陷影像61b的大小在客戶容許範圍內則判斷為良品,如果缺陷影像61b的大小在客戶容許範圍外則判斷為不良品。 Secondly, a second determining step is provided, wherein the second determining step comprises whether the size of the defect measured in the defect position defined in the first determining step exceeds a standard, and if the size of the defect is within the tolerance of the customer, it is judged as a good product, if the defect The size is judged to be a defective product outside the allowable range of the customer. Take the die 6 to be tested as an example. 8A is an image 71a of a portion of the semiconductor stack 71 of the standard die 7, and FIG. 8B is an image 61a of a portion of the semiconductor stack 61 of the die 6 to be tested, by comparing the image 61a with the image 71a. It is detected that the image 61a of the detecting die 6 has a color difference from the image 71a of the standard die 7, and the position where the difference in color difference is defined is a defect position, and has a defect image 61b as shown in FIG. 8C. If the defect image 61b determines that the color difference is outside the allowable range of the customer in the first determining step, then further In the second determination step, it is determined whether the size of the defective image 61b is outside the allowable range of the customer, and if the size of the defective image 61b is within the allowable range of the customer, it is judged to be a good product, and if the size of the defective image 61b is outside the allowable range of the customer, it is determined to be a defective product.

接著藉由移動承載晶粒承載部2之一平台(圖未示),重複前述第4圖的晶粒檢測方法進行其他待測晶粒的檢測。 Then, by moving the platform of one of the load bearing die carriers 2 (not shown), the die detecting method of FIG. 4 is repeated to detect other die to be tested.

第9圖係本發明一實施例中所揭示之晶粒檢測裝置的晶粒檢測的結果。複數個晶粒3位於晶粒承載部2上,各晶粒3彼此分離並為複數個切割道d(scribe line)所環繞,其中切割道d具有一寬度D,以使第1圖係所示的晶粒檢測裝置1的一背側光,例如第一光線141,可以穿透晶粒承載部2,入射晶粒3之側表面(圖未示),例如第一待測晶粒3b之側表面S2。藉由移動承載晶粒承載部2之一平台(圖未示),以一線性的行進方向,例如第一方向7a或第二方向7b,重複前述第4圖的晶粒檢測方法。如第9圖所示,複數個晶粒3經由第1圖所示的晶粒檢測裝置1和第4圖的晶粒檢測方法,可以揀出客戶容許範圍內的良品,例如晶粒3a,以及揀出客戶容許範圍外的不良品,例如晶粒3b。 Fig. 9 is a view showing the result of grain inspection of the crystal grain detecting apparatus disclosed in an embodiment of the present invention. A plurality of crystal grains 3 are located on the crystal grain carrying portion 2, and the crystal grains 3 are separated from each other and surrounded by a plurality of scribe lines d, wherein the cutting track d has a width D so that the first pattern is A back side light of the die detecting device 1 , for example, the first light ray 141 , can penetrate the die carrying portion 2 and enter the side surface of the die 3 (not shown), for example, the side of the first die 3b to be tested. Surface S2. The die detecting method of FIG. 4 is repeated in a linear traveling direction, for example, the first direction 7a or the second direction 7b, by moving a platform (not shown) of the carrier die bearing portion 2. As shown in FIG. 9, a plurality of crystal grains 3 can be sorted out of a customer's allowable range, such as a die 3a, via the die detecting device 1 shown in FIG. 1 and the die detecting method of FIG. Pick up defective products outside the customer's tolerance, such as die 3b.

以上各圖式與說明雖僅分別對應特定實施例,然而,各個實施例中所說明或揭露之元件、實施方式、設計準則、及技術原理除在彼此顯相衝突、矛盾、或難以共同實施之外,吾人當可依其所需任意參照、交換、搭配、協調、或合併。 The above figures and descriptions are only corresponding to specific embodiments, however, the elements, embodiments, design criteria, and technical principles described or disclosed in the various embodiments are inconsistent, contradictory, or difficult to implement together. In addition, we may use any reference, exchange, collocation, coordination, or merger as required.

雖然本發明已說明如上,然其並非用以限制本發明之範圍、實施順序、或使用之材料與製程方法。對於本發明所作之各 種修飾與變更,皆不脫本發明之精神與範圍。 Although the invention has been described above, it is not intended to limit the scope of the invention, the order of implementation, or the materials and process methods used. For each of the inventions Modifications and variations are possible without departing from the spirit and scope of the invention.

3b‧‧‧第一待測晶粒 3b‧‧‧First die to be tested

2‧‧‧晶粒承載部 2‧‧‧Grade carrier

30‧‧‧半導體疊層 30‧‧‧Semiconductor laminate

31‧‧‧第一導電性半導體層 31‧‧‧First conductive semiconductor layer

32‧‧‧第二導電性半導體層 32‧‧‧Second conductive semiconductor layer

33‧‧‧主動層 33‧‧‧ active layer

34‧‧‧反射結構 34‧‧‧Reflective structure

35b‧‧‧電極結構 35b‧‧‧electrode structure

351‧‧‧缺陷位置 351‧‧‧Defect location

36‧‧‧基板 36‧‧‧Substrate

14‧‧‧第一光源 14‧‧‧First light source

141‧‧‧第一光線 141‧‧‧First light

S1‧‧‧下表面 S1‧‧‧ lower surface

S2‧‧‧側表面 S2‧‧‧ side surface

S3‧‧‧上表面 S3‧‧‧ upper surface

Claims (10)

一種晶粒檢測方法,包含:提供一第一待測晶粒,包含一下表面、一側表面和一上表面;以及提供一可發出一第一光線之第一光源位於該第一待測晶粒下方,其中該第一光線之一部分經由該側表面入射該第一待測晶粒,該第一光線之另一部分經由該下表面入射該第一待測晶粒,其中該第一待測晶粒更包含一基板、一半導體疊層位於該基板之一側、一電極結構位於該半導體疊層之上,以及一反射結構位於該基板之另一側,該反射結構可反射該第一光線之該另一部份。 A method for detecting a die includes: providing a first die to be tested, including a lower surface, a side surface, and an upper surface; and providing a first light source capable of emitting a first light to be located in the first die to be tested In the lower part, the first portion of the first light is incident on the first die to be tested through the side surface, and the other portion of the first light is incident on the first die to be tested through the lower surface, wherein the first die to be tested Further comprising a substrate, a semiconductor stack on one side of the substrate, an electrode structure on the semiconductor stack, and a reflective structure on the other side of the substrate, the reflective structure reflecting the first light The other part. 如申請專利範圍第1項所述的晶粒檢測方法,更包含提供一晶粒承載部以承載該第一待測晶粒,其中入射該第一待測晶粒之該第一光線之一部分可穿透該晶粒承載部。 The method for detecting a grain according to claim 1, further comprising providing a die carrying portion for carrying the first die to be tested, wherein a portion of the first light incident on the first die to be tested may be Penetrating the die carrier. 一種晶粒檢測方法,包含:提供一第一待測晶粒;提供一可發出一第一光線之第一光源位於該第一待測晶粒下方;提供一感光元件位於該第一待測晶粒上方收集該第一光線穿透該第一待測晶粒之一部分以得到該第一待測晶粒之一測試影像;提供一參考影像;比較該測是影像的顏色與該參考影像的顏色以定義出一缺 陷;以及測量該缺陷的大小。 A method for detecting a die includes: providing a first die to be tested; providing a first light source that emits a first light is located under the first die to be tested; and providing a photosensitive element in the first crystal to be tested Collecting a first light beam over a portion of the first die to be tested to obtain a test image of the first die to be tested; providing a reference image; comparing the color of the image to the color of the reference image To define a deficiency Trap; and measure the size of the defect. 如申請專利範圍第1項所述的晶粒檢測方法,更包含提供一可發出一第二光線之第二光源位於該第一待測晶粒下方,其中該第二光線入射該下表面之角度小於該第一光線入射該下表面之角度。 The method for detecting a grain according to claim 1, further comprising providing a second light source emitting a second light below the first die to be tested, wherein the second light is incident on the lower surface Less than the angle at which the first ray is incident on the lower surface. 如申請專利範圍第1項所述的晶粒檢測方法,更包含:提供一可發出一第三光線之第三光源位於該第一待測晶粒上方;以及提供一可發出一第四光線之第四光源位於該第一待測晶粒上方,其中該第三光線入射該上表面之角度小於該第四光線入射該上表面之角度。 The method for detecting a grain according to claim 1, further comprising: providing a third light source capable of emitting a third light light over the first die to be tested; and providing a fourth light emitting The fourth light source is located above the first die to be tested, wherein an angle at which the third light is incident on the upper surface is smaller than an angle at which the fourth light is incident on the upper surface. 如申請專利範圍第1項所述的晶粒檢測方法,更包含提供一感光元件位於該第一待測晶粒上方以收集穿透該第一待測晶粒之該第一光線,得到該第一待測晶粒之一影像。 The method for detecting a grain according to claim 1, further comprising providing a photosensitive element above the first die to be collected to collect the first light that penetrates the first die to be obtained. An image of one of the crystals to be measured. 如申請專利範圍第6項所述的晶粒檢測方法,其中該第一光源為一環形結構,該感光元件經由該環形結構之一孔徑收集該第一光線。 The method for detecting a grain according to claim 6, wherein the first light source is an annular structure, and the photosensitive element collects the first light through an aperture of the annular structure. 如申請專利範圍第6項所述的晶粒檢測方法,更包含:提供一第一判斷步驟,其中該第一判斷步驟包含提供一標準晶粒之一影像,以及比較該第一待測晶粒之該影像的顏色與該標準晶粒之該影像的顏色以定義出一缺陷。 The method for detecting a grain according to claim 6, further comprising: providing a first determining step, wherein the first determining step comprises providing an image of a standard die, and comparing the first die to be tested The color of the image and the color of the image of the standard die define a defect. 如申請專利範圍第8項所述的晶粒檢測方法,更包含:提供一第二判斷步驟,其中該第二判斷步驟包含測量該缺陷的大小。 The method for detecting a grain according to claim 8, further comprising: providing a second determining step, wherein the second determining step comprises measuring a size of the defect. 如申請專利範圍第1項所述的晶粒檢測方法,更包含提供一第二待測晶粒位於該晶粒承載部上,其中該第一待測晶粒與該第二待測晶粒係以一距離分隔開來。 The method for detecting a grain according to claim 1, further comprising providing a second die to be tested on the die carrying portion, wherein the first die to be tested and the second die to be tested Separated by a distance.
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