TWI556574B - Charge module, driving circuit, and operating method of the driving circuit - Google Patents

Description

Charging module, driving circuit and operating method of driving circuit

This case is about an electronic circuit. In particular, it relates to a driving circuit, a charging module thereof, and an operating method applied to the driving circuit.

With the rapid development of electronics, various drive circuits have been widely used in people's lives.

Generally, the driving circuit includes a power metal oxide semiconductor filed-effect transistor (power MOSFET), and the power metal oxide half field effect transistor is used to start according to the control voltage, so that a driving current can pass the power. The gold-oxygen half-field effect transistor is used to drive the corresponding components (for example, a light-emitting diode module for indoor and outdoor lighting devices or a backlight module of an electronic device, etc.). In practice, since the coupling capacitance of the power MOS half-effect transistor has a coupling capacitance, the starting speed of the power MOS half-effect transistor will be limited. As a result, when the driving circuit performs the high-frequency dimming operation of the LED module, errors or offsets are caused, and the inaccuracy of the dimming operation and the instability of the driving circuit are further caused.

Therefore, a driving circuit having a high starting speed is proposed.

One aspect of the invention is a charging module. According to an embodiment of the invention, the charging module is configured to pre-charge a control node to a pre-charge voltage, so that when a control module outputs a control voltage, a driving module is configured according to the The control voltage is initiated with the pre-charge voltage plus a total gate voltage. The charging module includes a first switch, a charging switch and a second switch. The first switch is configured to provide a first voltage to an operating node. The charging switch is configured to be turned on corresponding to the first voltage of the operating node to charge the control node. The second switch is configured to provide a second voltage to the operating node according to the gate voltage. In the case that the gate voltage is greater than a predetermined voltage, the second switch provides the second voltage to the operating node to turn off the charging switch to stop charging the control node.

Another aspect of the invention is a drive circuit. According to an embodiment of the invention, the driving circuit comprises a charging module, a driving module, a sensing module and a control module. The charging module is configured to pre-charge a control node to a pre-charge voltage. The driving module is configured to be activated according to a gate voltage connected by a control voltage and the pre-charge voltage to enable a driving current to pass through the driving module. The sensing module is configured to receive the driving current and output a feedback voltage according to the driving current. The control module is configured to receive a reference voltage, the feedback voltage, and a pulse width modulation signal, and output the control voltage to the driving mode according to the reference voltage, the feedback voltage, and the pulse width modulation signal. group.

Another aspect of the invention is an operational method applied to a drive circuit. According to an embodiment of the invention, the operating method includes pre-charging a control node to a pre-charge voltage; generating a control voltage according to a reference voltage, a feedback voltage, and a pulse width modulation signal; The pre-charge voltage adds a total gate voltage to activate a driving module to enable a driving current to pass through the driving module; and generate the feedback voltage according to the driving current.

In summary, by applying the above embodiment, a charging module can be implemented. By pre-charging the control node to the pre-charge voltage through the charging module, the driving circuit provided with the charging module can have a high starting speed.

100‧‧‧ drive circuit

110‧‧‧Drive Module

120‧‧‧Sensor module

130‧‧‧Control Module

140‧‧‧Charging module

141‧‧‧Logical unit

142‧‧‧Click pulse generator

1422‧‧‧Inverter

1424‧‧‧Inverter

1426‧‧‧Anti-gate

400‧‧‧How to operate

SW1-SW7‧‧‧ switch

M‧‧‧O crystal

R‧‧‧resistance

C‧‧‧Coupling capacitor

VG‧‧‧ control node

Q‧‧‧Operation node

VDD‧‧‧first voltage

VSS‧‧‧second voltage

VREF‧‧‧reference voltage

VFB‧‧‧ feedback voltage

PWM‧‧‧ pulse width modulation signal

VP‧‧‧click pulse

IBP‧‧‧ operation signal

CH‧‧‧ control signal

I‧‧‧ drive current

S1-S4‧‧‧ steps

S11a-S14a‧‧‧Steps

S11b-S17b‧‧‧Steps

L‧‧‧ endpoint

1 is a schematic diagram of a driving circuit according to an embodiment of the invention; FIG. 2a is a schematic diagram of a charging module according to an embodiment of the invention; FIG. 2b is a diagram of another embodiment of the invention according to another embodiment of the invention A schematic diagram of a charging module is shown; FIG. 3a is a schematic diagram of a click pulse generator according to an embodiment of the invention; FIG. 3b is a diagram 3a according to an embodiment of the invention. Schematic diagram of a click pulse generator; 4 is a flowchart of an operation method according to an embodiment of the present invention; FIG. 5a is a detailed flowchart of an operation method according to an embodiment of the present invention; and FIG. 5b is a diagram according to another embodiment of the present invention; A detailed flow chart of the method of operation illustrated in an embodiment.

The spirit and scope of the present disclosure will be apparent from the following description of the preferred embodiments of the present disclosure. Modifications do not depart from the spirit and scope of the disclosure.

The use of the terms "first", "second", ", etc." as used herein does not specifically mean the order or the order, and is not intended to limit the present invention. It is merely to distinguish between elements or operations described in the same technical terms.

"Electrical connection" as used herein may mean that two or more elements are in direct physical or electrical contact with each other, or indirectly in physical or electrical contact with each other, and "electrical connection" may also mean two or Multiple components operate or act upon each other.

One embodiment of the present invention is a driving circuit. For the sake of clarity, the following paragraphs will be described by taking a current sink circuit of the LED module as an example, but the invention is not limited thereto.

FIG. 1 is a schematic diagram of a driving circuit 100 according to an embodiment of the invention. The driving circuit 100 can include a driving module 110 and a sensing module The group 120, the control module 130 and the charging module 140. In this embodiment, the driving module 110 can be electrically connected to the sensing module 120, the control module 130, the charging module 140, and the end point L for electrically connecting the LED module (not shown). . The sensing module 120 can be electrically connected to the control module 130. The control module 130 can be electrically connected to the charging module 140.

In this embodiment, the driving module 110 may include a transistor M (for example, a power MOS field effect transistor). In addition, in the first figure, although the transistor M is represented as an N-type transistor, a person skilled in the art can easily replace the N-type transistor with a P-type transistor, so the type of the transistor M is not the first. The limits shown are shown in the figure. The sensing module 120 can include a resistor R. Control module 130 can be implemented with one or more amplifiers. The transistor M can be electrically connected between the terminal L and the resistor R, and the gate terminal of the transistor M (ie, the control node VG) can be electrically connected to the control module 130 and the charging module 140. In addition, the gate terminal of the transistor M can be electrically connected to the coupling capacitor C (not shown). The resistor R can be connected between the transistor M and the second voltage VSS.

In this embodiment, the charging module 140 is used to pre-charge the control node VG to the pre-charge voltage. The driving module 110 is configured to start according to the total gate voltage from the control voltage and the pre-charge voltage, so that the driving current I can pass through the driving module 110. The magnitude of the drive current I corresponds to the magnitude of the gate voltage. The sensing module 120 is configured to receive the driving current I and output the feedback voltage VFB according to the driving current I. The control module 130 is configured to receive the reference voltage VREF, the feedback voltage VFB, and the pulse width modulation signal PWM, and output the control voltage to the driving module 110 according to the reference voltage VREF, the feedback voltage VFB, and the pulse width modulation signal PWM. To activate the drive module 110, And adjust the magnitude of the drive current I. In addition, the control module 130 is further configured to receive a first voltage VDD and a second voltage VSS for operation. On the other hand, the reference voltage VREF can be a fixed voltage, and the feedback voltage VFB can be a varying voltage.

By pre-charging the control node VG (ie, the pre-charge coupling capacitor C) to the pre-charge voltage through the charging module 140, in the case that the control module 130 outputs the control voltage, the driving module 110 can be based on the control voltage and the pre-charge voltage. The summed gate voltage starts quickly. In this way, the startup time length of the driving module 110 can be reduced, so that a driving circuit with a high starting speed can be realized.

For example, in the case that the threshold voltage of the driving module 110 is 0.7V, if the charging module 140 can pre-charge the control node VG to 0.5V, the control module 130 only needs to charge the control node VG by 0.5V. The drive module 110 is activated up to 0.7V. In this way, the length of time that the control module 130 activates the driving module 110 can be reduced.

FIG. 2a is a schematic diagram of a charging module 140 according to the first embodiment of the present invention. In this embodiment, the charging module 140 can include a switch SW1, a switch SW2, and a switch SW3. The switch SW1 is electrically connected between the first voltage VDD and the operation node Q. The switch SW2 is electrically connected between the second voltage VSS and the operation node Q. The switch SW3 is electrically connected between the first voltage VDD and the control node VG.

In this embodiment, the switch SW1 is configured to receive the operation signal IBP and provide the first voltage VDD to the operation node Q according to the operation signal IBP. The switch SW2 is used to determine whether the gate voltage on the control node VG is greater than one. The voltage is preset and used to provide a second voltage VSS to the operating node Q according to the gate voltage. The switch SW3 is turned on to turn on the first voltage VDD corresponding to the operation node Q to charge the control node VG (ie, the charge coupling capacitor C). It is noted that in an embodiment, the switch SW1 can be a current source.

Moreover, in an embodiment, each of the switches SW1-SW3 may include a transistor (eg, a metal oxide field effect transistor). It is noted that although in Fig. 2a, the switch SW1 includes a P-type transistor, the switch SW2 includes an N-type transistor, and the switch SW3 includes an N-type transistor, but those skilled in the art can easily use N The type transistor replaces the P-type transistor or replaces the N-type transistor with a P-type transistor. Therefore, the type of the transistor in the switches SW1-SW3 is not limited to that shown in FIG. 2a. In addition, in an embodiment, the magnitude of the preset voltage may be equal to the magnitude of the threshold voltage of the transistor in the switch SW2, and the magnitude of the preset voltage may be slightly smaller than the threshold voltage of the transistor M.

In the first operating state, in the case where the gate voltage is not greater than the preset voltage, the switch SW2 is turned off. At this time, the switch SW1 is turned on and conducts the first voltage VDD to the operation node Q. The switch SW3 is turned on according to the first voltage VDD of the operation node Q to charge the control node VG and boost the gate voltage.

In the second operating state, in the case where the gate voltage is greater than the preset voltage, the switch SW2 turns on and conducts the second voltage VSS to the operating node Q. The switch SW3 is turned off according to the second voltage VSS of the operation node Q to stop the control node VG from charging and to stop the gate voltage from rising.

With this setting, the control node VG can be charged to pre-charge In this way, the startup time length of the driving module 110 can be reduced, and a driving circuit with a high starting speed can be realized.

FIG. 2b is a schematic diagram of a charging module 140 according to another embodiment of the invention. In the present embodiment, portions similar to those in the embodiment of Fig. 2a will not be described herein. In this embodiment, the charging module 140 can further include a logic unit 141 (eg, a gate) and a click pulse generator 142. The first input end of the logic unit 141 is electrically connected to the operation node Q, the second input end of the logic unit 141 is electrically connected to the click pulse generator 142, and the output end of the logic unit 141 is electrically connected to the electricity in the switch SW3. The gate extreme of the crystal.

In this embodiment, the logic unit 141 is configured to receive the first voltage VDD or the second voltage VSS of the operation node Q and receive a one-shot pulse VP according to the first voltage VDD or the operation node Q. The two voltages VSS and the click pulse VP operatively output the charging signal CH to the switch SW3. The pulse generator 142 is clicked to receive the pulse width modulation signal PWM, and the click pulse VP is output to the logic unit 141 according to the pulse width modulation signal PWM.

In this embodiment, the click pulse VP can be a pulse signal, and the pulse signal has a high voltage level corresponding to the positive edge of the pulse width modulation signal PWM, and is in a short time (for example, 2 μs). Pull down to the low voltage level. In other words, the phase of the click pulse VP is the same as the phase of the pulse width modulation signal PWM, and the duty cycle of the click pulse VP is smaller than the duty cycle of the pulse width modulation signal PWM.

In the first operating state, click pulse VP has a high voltage level And during a period in which the gate voltage is not greater than the preset voltage, the switch SW2 is turned off at this time, and the switch SW1 is turned on and conducts the first voltage VDD to the operation node Q. The logic unit 141 outputs a control signal CH (for example, a high voltage level) to the switch SW3 to turn on the switch SW3 to charge the control node VG to raise the gate voltage.

In the second operating state, during a period in which the gate voltage is greater than the preset voltage, the switch SW2 turns on and conducts the second voltage VSS to the operating node Q. The logic unit 141 does not output the control signal CH to turn off the switch SW3 to stop the charging control node VG and stop raising the gate voltage.

In the third operating state, in the case where the click pulse VP has a low voltage level, the logic unit 141 does not output the control signal CH to turn off the switch SW3 to stop the charging control node VG and stop raising the gate voltage.

With such a setting, the control node VG can be charged to the precharge voltage, so that the startup time length of the drive module 110 can be reduced, and a drive circuit having a high startup speed can be realized.

In addition, through such setting, the control node VG is charged only when the click pulse VP has a high voltage level, so that the overcharge protection mechanism of the control node VG can be realized.

Refer to Figures 3a and 3b. FIG. 3a is a schematic diagram of a click pulse generator 142 according to an embodiment of the invention. The click pulse generator 142 can include an inverter 1422, an inverter 1424, and an inverse gate 1426. The inverter 1422 is configured to receive the pulse width modulation signal PWM and invert the pulse width modulation signal PWM to generate an inverted pulse width modulation signal. Inverter 1424 is configured to receive an inverted pulse width modulation signal No., and used to invert and delay the inverted pulse width modulation signal to generate a delayed pulse width modulation signal. The inverse gate 1426 is configured to receive the inverted pulse width modulation signal and the delayed pulse width modulation signal to generate the click pulse VP according to the inverted pulse width modulation signal and the delayed pulse width modulation signal.

FIG. 3b is a schematic diagram of the click pulse generator 142 in FIG. 3a according to an embodiment of the invention. In the present embodiment, the click pulse generator 142 may include an inverter 1422, an inverse OR gate 1426, and switches SW4-SW7. The connection relationship of each component in the pulse generator 142 can be referred to the figure shown in FIG. 3b, and details are not described herein.

Through the above settings, the click pulse generator 142 can be implemented.

Another embodiment of the invention is an operational method 400. This method of operation 400 can be applied to a drive circuit having the same or similar structure as in the first FIG. For convenience of description, the following operation method 400 is described by taking the driving circuit 100 shown in FIG. 1 as an example, but is not limited to the driving circuit 100 of FIG.

It is noted that in the steps in the following method of operation 400, there is no particular order unless otherwise stated. In addition, the following steps may be performed simultaneously or overlap in execution time.

Referring to FIG. 1 and FIG. 4, FIG. 4 is a flow chart of an operation method 400 according to an embodiment of the invention. The method of operation 400 includes the following steps. The control node VG is precharged to the precharge voltage through the charging module 140 (step S1). The control module 130 generates a control voltage according to the reference voltage VREF, a feedback voltage VFB, and a pulse width modulation signal PWM (step S2). The driving module 110 is activated according to the total gate voltage added by the control voltage and the pre-charging voltage, so that the driving current I can pass through the driving module 110 (step S3). The feedback voltage VFB is generated based on the drive current I through the sensing module 120 (step S3).

Through the above method, the startup time length of the driving module 110 can be reduced.

Referring also to Figures 2a and 5a, in an embodiment, step S1 includes the following steps. First, the first voltage VDD is supplied to an operation node Q through the switch SW1 (step S11a). Next, the switch SW3 is turned on according to the first voltage VDD of the operation node Q to charge the control node VG to raise the gate voltage (step S12a). Next, it is determined through the switch SW2 whether the gate voltage is greater than a preset voltage (step S13a). If so, the second voltage VSS is supplied to the operation node Q through the switch SW2 to turn off the switch SW3 to stop the charging control node VG to stop the gate voltage from rising (step S14a). If no, the process returns to step S12a.

In an embodiment, step S14a includes a step of transmitting a second voltage VSS to the operating node Q through the transistor in the switch SW2. The magnitude of the above preset voltage may be equal to the magnitude of the threshold voltage of the transistor in the switch SW2.

On the other hand, refer to Fig. 2b, Fig. 3a and Fig. 5b. In an embodiment, step S1 comprises the following steps. The first voltage VDD is supplied to the operation node Q through the switch SW1 (step S11b). The click pulse VP is generated based on the pulse width modulation signal PWM by clicking the pulse generator 142 (step S12b). Through the logic unit (for example, the gate) 141, to the operation node Q The first voltage VDD or the second voltage VSS and the click pulse VP are logically coupled to operatively generate a control signal CH (for example, a high voltage level) (step S13b). It is judged by the switch SW3 whether or not the control signal CH is generated (step S14b). If no, proceed to step S14b. If so, the switch SW3 is turned on to charge the control node VG to raise the gate voltage (step S15b). Next, it is determined through the switch SW2 whether the gate voltage is greater than a preset voltage (step S16b). If so, the second voltage VSS is supplied to the operating node Q through the switch SW2 to turn off the switch SW3 to stop the charging control node VG to stop the gate voltage from rising (step S17b). If no, proceed to step S16b.

When it is noted that the relevant details of the preset voltage can be referred to the previous embodiment, it is not repeated here.

In addition, in an embodiment, the phase of the click pulse VP is the same as the phase of the pulse width modulation signal PWM, and the duty cycle of the click pulse VP is smaller than the duty cycle of the pulse width modulation signal PWM.

Furthermore, in an embodiment, step S12b may include the following steps. Inverting the pulse width modulation signal PWM through the inverter 1422 to generate an inverted pulse width modulation signal. Through the inverter 1424, the inverted pulse width modulation signal is inverted and delayed to generate a delayed pulse width modulation signal. The inverted pulse width modulation signal and the delayed pulse width modulation signal are mutually exclusive operation through the inverse gate 1426 to operatively generate the click pulse VP.

Although the present invention has been disclosed above by way of example, it is not intended to limit the case, and anyone skilled in the art will not depart from the spirit and scope of the present invention. Within the scope of this patent, the scope of protection of this case shall be subject to the definition of the scope of the patent application.

140‧‧‧Charging module

141‧‧‧Logical unit

142‧‧‧Click pulse generator

VG‧‧‧ control node

Q‧‧‧Operation node

VDD‧‧‧first voltage

VSS‧‧‧second voltage

PWM‧‧‧ pulse width modulation signal

VP‧‧‧click pulse

IBP‧‧‧ operation signal

CH‧‧‧ control signal

SW1-SW3‧‧‧ switch

Claims (18)

A charging module for pre-charging a control node to a pre-charge voltage, such that in the case that a control module outputs a control voltage, a driving module is based on the pre-charge according to the control voltage The voltage is summed up by a gate voltage, wherein the charging module includes: a first switch for providing a first voltage to an operating node; and a charging switch for corresponding to the first voltage of the operating node Turning on to charge the control node; and a second switch for providing a second voltage to the operating node according to the gate voltage, wherein the second switch is when the gate voltage is greater than a predetermined voltage Providing the second voltage to the operating node to turn off the charging switch to stop charging the control node, wherein the second switch comprises a transistor, the predetermined voltage being equal to a threshold voltage of the transistor. The charging module of claim 1, further comprising: a logic unit configured to receive the first voltage or the second voltage of the operating node and receive a one-shot pulse to The first voltage or the second voltage of the operating node and operatively outputting a charging signal according to the click pulse to turn the charging switch on. The charging module of claim 2, further comprising: a click pulse generator for modulating the signal according to a pulse width The click pulse is generated, wherein the phase of the click pulse is the same as the phase of the pulse width modulation signal, and the duty cycle of the click pulse is less than the duty cycle of the pulse width modulation signal. The charging module of claim 3, wherein the click pulse generator comprises: a first inverter for receiving the pulse width modulation signal, and for inverting the pulse width modulation signal To generate an inverted pulse width modulation signal; a second inverter for receiving the inverted pulse width modulation signal, and for inverting and delaying the inverted pulse width modulation signal to Generating a delayed pulse width modulation signal; and an inverse OR gate for receiving the inverted pulse width modulation signal and the delayed pulse width modulation signal to modulate the signal according to the inverted pulse width and The delayed pulse width modulation signal produces the click pulse. The charging module of claim 2, wherein the logic unit does not output the control signal when the click pulse has a first voltage level, so that the charging switch is turned off to stop charging the control node. . The charging module of claim 2, wherein the logic unit outputs the control signal if the click pulse has a second voltage level and the gate voltage of the control node is not greater than the preset voltage So that the charging switch is turned on to charge the control node. A driving circuit includes: a charging module for pre-charging a control node to a pre-charging voltage; and a driving module for starting according to a gate voltage connected by a control voltage and the pre-charging voltage, So that a driving current can pass through the driving module; a sensing module is configured to receive the driving current, and output a feedback voltage according to the driving current; and a control module for receiving a reference voltage, the a voltage and a pulse width modulation signal for outputting the control voltage to the driving module according to the reference voltage, the feedback voltage, and the pulse width modulation signal; wherein the charging module comprises: a charging switch For charging the control node; and a second switch comprising a transistor, wherein the second switch is configured to operatively turn off the charging switch during the period in which the gate voltage is greater than a predetermined voltage, and The preset voltage is equal to a threshold voltage of the transistor in the second switch. The driving circuit of claim 7, wherein the charging module further comprises: a first switch electrically connected between a first voltage and an operating node, wherein the first switch is configured to conduct the first voltage To the operation node, wherein the charging switch is electrically connected to the first voltage and the control node The first voltage is turned on corresponding to the operating node, and wherein the second switch is electrically connected between a second voltage and the operating node, wherein the gate voltage is greater than a predetermined voltage. The second voltage is conducted to the operating node to operatively turn off the charging switch. The driving circuit of claim 8, wherein the driving module comprises a transistor, and the preset voltage is smaller than a threshold voltage of the transistor in the driving module. The driving circuit of claim 8, wherein the charging module further comprises: a logic unit configured to receive the first voltage or the second voltage of the operating node and receive a click pulse to operate according to the operating node The first voltage or the second voltage operatively outputs a charging signal according to the click pulse to turn the charging switch on. The driving circuit of claim 10, wherein the charging module further comprises: a click pulse generator for generating the click pulse according to the pulse width modulation signal, wherein the phase of the click pulse and the pulse The phase of the width modulation signal is the same, and the working period of the click pulse is less than the duty cycle of the pulse width modulation signal. The drive circuit of claim 11, wherein the click pulse is produced The generator further includes: a first inverter for receiving the pulse width modulation signal, and for inverting the pulse width modulation signal to generate an inverted pulse width modulation signal; a second inversion The device is configured to receive the inverted pulse width modulation signal, and to invert and delay the inverted pulse width modulation signal to generate a delayed pulse width modulation signal; and an inverse or gate for Receiving the inverted pulse width modulation signal and the delayed pulse width modulation signal to generate the click pulse according to the inverted pulse width modulation signal and the delayed pulse width modulation signal. The driving circuit of claim 10, wherein in the case that the click pulse has a first voltage level, the logic unit does not output the control signal to cause the charging switch to be turned off to stop charging the control node. The driving circuit of claim 10, wherein the logic unit outputs the control signal if the click pulse has a second voltage level and the gate voltage of the control node is not greater than the preset voltage. So that the charging switch is turned on to charge the control node. An operating method applied to a driving circuit, comprising: pre-charging a control node to a pre-charging voltage; and according to a reference voltage, a feedback voltage, and a pulse width modulation signal No. generating a control voltage; starting a driving module according to a control voltage and the pre-charging voltage plus a total gate voltage, so that a driving current can pass through the driving module; and generating the back according to the driving current The step of precharging the control node to the precharge voltage includes: charging a control node by using a charging switch; and operating by using a second switch during a period in which the gate voltage is greater than a predetermined voltage The charging switch is turned off, wherein the preset voltage is equal to a threshold voltage of a transistor in the second switch. The operation method of claim 15, wherein the step of precharging the control node to the precharge voltage comprises: providing a first voltage to an operation node; and turning on the charging switch according to the first voltage of the operation node, Charging the control node; and determining whether the gate voltage is greater than the preset voltage; if the gate voltage is greater than the preset voltage, providing a second voltage to the operating node to cause the charging switch to be turned off, Stop charging the control node. The method of claim 16, wherein the step of pre-charging the control node to the pre-charge voltage further comprises: generating a click pulse according to the pulse width modulation signal, wherein the single The phase of the pulse is the same as the phase of the pulse width modulation signal, and the duty cycle of the click pulse is less than the duty cycle of the pulse width modulation signal; and the first voltage of the operation node is The second voltage and the click pulse are logically coupled to operatively generate a control signal; determine whether the control signal is generated; and in the case where the control signal is generated, turn on the charging switch. The method of claim 17, wherein the step of generating the click pulse according to the pulse width modulation signal comprises: inverting the pulse width modulation signal to generate an inverted pulse width modulation signal; And delaying the inverted pulse width modulation signal to generate a delayed pulse width modulation signal; and transmitting the inverted pulse width modulation signal and the delayed pulse width modulation signal through an inverse OR gate Mutually exclusive operations to operatively generate the click pulse.