TWI545478B - Very fine metal wire manufacturing method and its structure - Google Patents

Very fine metal wire manufacturing method and its structure Download PDF

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TWI545478B
TWI545478B TW103131318A TW103131318A TWI545478B TW I545478 B TWI545478 B TW I545478B TW 103131318 A TW103131318 A TW 103131318A TW 103131318 A TW103131318 A TW 103131318A TW I545478 B TWI545478 B TW I545478B
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layer
conductive
substrate
adhesion
interposer
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TW201610774A (en
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Hsin-Lun Tsai
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Kingdom Co Ltd T
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Description

極細的金屬線路之製造方法及其結構Manufacturing method and structure of extremely fine metal lines

本發明有關於一種具有極細的金屬線路的電路基板或觸控面板中感應電極(Touch sensor)之製造方法及其結構,尤指一種利用遮蔽層步驟製成導電電極,同時提供導電電極的表面一完整包覆保護的構造及方法,提升金屬線路的生產良率及使用耐久性之目的。The present invention relates to a method for manufacturing a touch sensor in a circuit substrate or a touch panel having a very thin metal line, and a structure thereof, and more particularly to a method for forming a conductive electrode by using a masking step while providing a surface of the conductive electrode. The structure and method of complete cladding protection enhances the production yield and durability of metal circuits.

隨著電子資訊產品朝輕薄短小化的方向發展,半導體的製造方法亦朝著高密度及自動化生產的方向前進,目前該產業中的研發人員朝向將習知市場上具有電路基板或感應電極的電子產品或設備中之的金屬線路的線徑寬度製成極細作為研發方向。With the development of electronic information products in the direction of lightness and thinness, the manufacturing method of semiconductors is also moving toward high-density and automated production. Currently, R&D personnel in the industry are moving toward electronic circuits with circuit boards or sensing electrodes on the market. The wire diameter of the metal line in the product or equipment is made very fine as the research and development direction.

實際上一般金屬線路的結構與製程,通常為步驟(1)透過至少一附著層(又稱作接著層)將欲製成金屬線路主體的金屬導電電極層附著於基材上,使具有線路圖案的金屬線路不易由基材上脫落,步驟(2)而後將至少一耐候層(抗蝕層)覆合於上述金屬線路的上表面,步驟(3)於上述金屬線路之間形成一具有線路圖案的遮蔽層,步驟(4)接著再利用蝕刻液體進行濕式蝕刻程序(wet etching)成為金屬導電電極電極線路,將上述遮蔽層去除後便完成初步的上述金屬線路的製造,另外,有關於觸控面板的感應電極能夠於後續最終感測電極產品完成後,還能夠於載運至其它加工廠商之前再以保護膠膜(OCA)進行上述電路基板或觸控面板中感應電極的全部表面舖設。In fact, in general, the structure and process of the metal circuit, usually in step (1), the metal conductive electrode layer to be formed into the metal wiring body is adhered to the substrate through at least one adhesion layer (also referred to as an adhesion layer) to have a line pattern. The metal circuit is not easily detached from the substrate, and step (2) then covers at least one weather resistant layer (resist layer) on the upper surface of the metal line, and step (3) forms a line pattern between the metal lines. The masking layer, step (4) is followed by wet etching using an etching liquid to form a metal conductive electrode electrode line, and the mask layer is removed to complete the preliminary fabrication of the metal line, and The sensing electrodes of the control panel can be used to carry out the entire surface of the sensing electrodes in the circuit substrate or the touch panel with an OCC before the final sensing electrodes are completed.

其中,習知之附著層一般設計為兩層,分別為一與上述基材結合的中介層及一與上述金屬導電電極層結合的導電基底層。The conventional adhesion layer is generally designed as two layers, which are respectively an interposer combined with the substrate and a conductive substrate layer combined with the metal conductive electrode layer.

然而,濕式蝕刻是等向性的(Isotropic),而且因於上述耐候層為一耐蝕刻材料,造成上述耐候層以及上述金屬導電電極層之間對於蝕刻液體的蝕刻速率差距甚大,又,針對步驟(3)所形成的上述耐候層的分佈經常為一厚度不均勻樣態,因此,當蝕刻溶液做縱向蝕刻時,勢必會於蝕刻過程當中的上述金屬導電電極層的表面發生一側向蝕刻的現象。However, the wet etching is isotropic, and since the weathering layer is an etching resistant material, the etching rate between the weathering layer and the metal conductive electrode layer for the etching liquid is very large, and The distribution of the weather-resistant layer formed in the step (3) is often a thickness unevenness state. Therefore, when the etching solution is longitudinally etched, lateral etching of the surface of the metal conductive electrode layer during the etching process is bound to occur. The phenomenon.

換句話說,亦即是上述金屬線路的左右側面部份,尤其是指線徑的寬度設計為小於20μm以及其厚度設計大於0.3μm範圍的金屬線路,更容易發生上述側向蝕刻的現象,導致上述金屬線路的蝕刻總面積比例過大、蝕刻過程中的局部不均結果進而使得上述金屬線路的線徑之阻抗數值太大,使製造廠商所出產的金屬線路的良率及品質不易控管,實為目前極細的金屬線路於發展製作上的炙手根本問題。In other words, it is the left and right side portions of the above metal lines, especially the metal lines having a width of the wire diameter of less than 20 μm and a thickness design of more than 0.3 μm, which is more likely to occur in the lateral etching phenomenon. The ratio of the total area of the etching of the metal line is too large, and the local unevenness in the etching process further causes the impedance value of the wire diameter of the metal line to be too large, so that the yield and quality of the metal line produced by the manufacturer are difficult to control. It is a fundamental problem for the development of ultra-fine metal lines.

再者,更進一步而言,習知於產業界中已普遍使用之金屬線路的電極線路的線徑寬度為極細的情況下,若無更進一步地設計保護措施,使用者長久使用加上於環境氧化之下使得上述電子產品中的極細的金屬線路可能無法再達到原先預定的工作效能,恐有縮短產品使用壽命、影響製造廠商所出產的最終電子產品的成品之良率以及環境耐久性等品質表現等多種可能情況。Furthermore, in the case where the wire diameter of the electrode line which is commonly used in the industrial field is extremely fine, if the protective measures are not further designed, the user can use it for a long time in the environment. Under oxidation, the extremely fine metal wires in the above electronic products may not be able to achieve the originally predetermined working efficiency, which may shorten the service life of the products, affect the yield of finished products of the final electronic products produced by the manufacturers, and the environmental durability. Performance and many other possible situations.

另外,如以前述習知具有極細的金屬線路的電子產品進行一系列嚴格規定的環境檢測實驗,例如:將觸控面板進行一1000小時、85℃、90%濕度之下進行高溫加熱檢測實驗,又或者是以100℃ 煮沸100分鐘進行模擬一長期高溫高壓環境。In addition, a series of strictly specified environmental testing experiments are performed on the electronic products having the fine metal lines as described above, for example, the touch panel is subjected to a high temperature heating test under 1000 hours, 85 ° C, and 90% humidity. Alternatively, it may be boiled at 100 ° C for 100 minutes to simulate a long-term high temperature and high pressure environment.

於前述兩種檢測實驗的當下,水分子滲入上述保護膠膜中,進而接觸到上述金屬線路,極可能使上述金屬線路發生一逐漸的氧化現象,由此可知,使用者若長久使用以前述製程所出產的電子產品,其形成觸控螢幕的電容感應之阻抗數值極可能大幅增加,直至無法供給使用者一正常使用狀態。In the present two kinds of detection experiments, water molecules penetrate into the above protective film, and then contact with the above metal circuit, which is likely to cause a gradual oxidation phenomenon of the metal line, thereby knowing that if the user uses the above process for a long time In the electronic products produced, the impedance value of the capacitive sensing that forms the touch screen is likely to increase greatly until it is unable to supply the user to a normal use state.

有據於前述釋明的種種習知製程所生產的上述金屬線路之具有電路基板的電子產品或感應電極的觸控面板之不足缺失,實為本發明欲改良的目的。The lack of a touch panel of an electronic product having a circuit board or an induction electrode of the above metal wiring produced by the above-mentioned various conventional processes is the object of the present invention.

本發明之主要目的在於提供一種利用一具有預定線路圖案的遮蔽層之相關步驟製成具有極細的線徑的導電電極的生產過程,用以替代習知以蝕刻技術製成金屬線路的步驟,能夠完全避免習知之金屬線路的材料於蝕刻過程中所發生的嚴重側向蝕刻現象造成金屬線路的產品之良率下降的結果。SUMMARY OF THE INVENTION A primary object of the present invention is to provide a process for producing a conductive electrode having a very fine wire diameter by using an associated step of a shielding layer having a predetermined line pattern, which is a step of replacing a conventional metal wire by an etching technique. The result of a serious reduction in the yield of the metal line product caused by the severe lateral etching phenomenon of the material of the conventional metal circuit during the etching process is completely avoided.

本發明之另一目的在於利用一具有預定線路圖案的遮蔽層之相關步驟製成金屬線路的生產過程,可達到精確地管控並維持每一導電電極的線徑寬度之目的。Another object of the present invention is to produce a metal line using a related step of a masking layer having a predetermined line pattern, which achieves the purpose of accurately controlling and maintaining the wire diameter of each of the conductive electrodes.

本發明之再一目的在於透過在形成線路圖案的導電電極進行完整的耐候層包覆保護之設計,更進一步大幅降低使用者使用時,導電電極長期處於空氣中水氣滲入之氧化過程,增強導電電極的耐腐蝕功效,延長電路基板或觸控面板相關產品使用年限。A further object of the present invention is to design a complete weather-resistant layer coating protection through a conductive electrode forming a line pattern, thereby further reducing the oxidation process of the conductive electrode in the air for a long time in the air, and enhancing the conductivity. The corrosion resistance of the electrode extends the useful life of the circuit board or touch panel related products.

為達上述目的, 本發明極細的金屬線路之製造方法,(A)選定基材構築出一基材層;(B)於上述基材層的表面形成一遮蔽層,上述遮蔽層具有複數個形成線路圖案的凹槽;(C)於上述遮蔽層的表面及複數個凹槽的表面共同形成一附著層;(D)於上述附著層的表面形成一填滿上述複數個凹槽的導電層;(E)去除上述遮蔽層的上表面的局部導電層及附著層,並由上述凹槽中餘留的附著層與導電層共同形成一導電電極,由上述基材層及複數個導電電極共同構成上述金屬線路。In order to achieve the above object, in the method for manufacturing a very fine metal circuit of the present invention, (A) a selected substrate is used to form a substrate layer; (B) a shielding layer is formed on the surface of the substrate layer, and the shielding layer has a plurality of layers. a groove of the line pattern; (C) forming an adhesion layer on the surface of the shielding layer and the surface of the plurality of grooves; (D) forming a conductive layer filling the plurality of grooves on the surface of the adhesion layer; (E) removing the local conductive layer and the adhesion layer on the upper surface of the shielding layer, and forming a conductive electrode by the adhesion layer remaining in the groove and the conductive layer, and the substrate layer and the plurality of conductive electrodes are combined The above metal line.

於第一較佳實施例中,上述步驟(E)進一步包含一步驟(F):去除上述遮蔽層,使上述基材層與複數個導電電極共同構成一具有線路圖案的電路基板,並於複數個導電電極的外周面形成一耐候層,使上述導電電極與外部隔絕。In the first preferred embodiment, the step (E) further includes a step (F) of removing the shielding layer, and the substrate layer and the plurality of conductive electrodes together form a circuit substrate having a line pattern, and The outer peripheral surface of the conductive electrodes forms a weather resistant layer to isolate the conductive electrodes from the outside.

於第二較佳實施例中,上述步驟(E)進一步包含一步驟(F):於上述導電電極的上表面形成一耐候層再去除上述遮蔽層,由上述基材層、複數個導電電極以及耐候層共同構成一具有線路圖案的電路基板。In the second preferred embodiment, the step (E) further includes a step (F) of forming a weather-resistant layer on the upper surface of the conductive electrode and removing the shielding layer, the substrate layer, the plurality of conductive electrodes, and The weather resistant layers collectively constitute a circuit substrate having a line pattern.

其中,上述耐候層可設為一用於遮蔽上述導電層並具有黑化的性質。The weatherable layer may be provided to shield the conductive layer and have blackening properties.

再者,於一較佳實施例中,上述步驟(C)進一步於上述基材層的表面上形成一中介層、於上述中介層的表面形成一導電基底層以及於上述導電基底層的表面形成一抗氧化層以共同建構上述附著層。Furthermore, in a preferred embodiment, the step (C) further forms an interposer on the surface of the substrate layer, forms a conductive base layer on the surface of the interposer, and forms a surface on the conductive substrate layer. An anti-oxidation layer is used to jointly construct the above adhesion layer.

於另一較佳實施例中,上述步驟(C)進一步於上述基材層的表面上形成一黑化層,於上述黑化層的表面形成一中介層以及於上述中介層的表面形成一導電基底層以共同建構上述附著層。In another preferred embodiment, the step (C) further forms a blackening layer on the surface of the substrate layer, forms an interposer on the surface of the blackening layer, and forms a conductive layer on the surface of the interposing layer. The base layer is used to jointly construct the above adhesion layer.

於再一較佳實施例中,上述步驟(C)進一步於上述基材層的表面上形成一黑化層,於上述黑化層的表面形成一中介層、於上述中介層的表面形成一導電基底層以及於上述導電基底層的表面形成一抗氧化層以共同建構上述附著層。In a further preferred embodiment, the step (C) further forms a blackening layer on the surface of the substrate layer, forms an interposer on the surface of the blackening layer, and forms a conductive layer on the surface of the interposer layer. The base layer and an anti-oxidation layer are formed on the surface of the conductive base layer to jointly construct the adhesion layer.

而且,上述附著層可選自於真空濺鍍、化學鍍或者是蒸鍍其中一種或其組合方式進行製程。Moreover, the above adhesion layer may be selected from vacuum sputtering, electroless plating, or vapor deposition, or a combination thereof.

上述遮蔽層是以印刷或者是光阻曝光顯影技術其中一種或其組合方式進行製程。The above masking layer is processed by one of printing or photoresist exposure developing techniques or a combination thereof.

上述導電層可選自於真空濺鍍、蒸鍍、化學鍍、電鍍或者是導電高分子塗佈其中一種或其組合方式進行製程。The conductive layer may be selected from the group consisting of vacuum sputtering, evaporation, electroless plating, electroplating, or conductive polymer coating, or a combination thereof.

上述耐候層可選自於化學鍍、電鍍或者是導電高分子塗佈其中一種或其組合方式進行製程。The weatherable layer may be selected from one of electroless plating, electroplating, or conductive polymer coating, or a combination thereof.

再者,本發明極細的金屬線路,包含一基材層;以及複數個導電電極,於上述基材層的表面排設形成一線路圖案,上述導電電極設有一與上述基材層連接的附著層,上述附著層形成一凹槽,並於上述凹槽中容設一導電層。Furthermore, the ultrafine metal circuit of the present invention comprises a substrate layer; and a plurality of conductive electrodes are arranged on the surface of the substrate layer to form a line pattern, and the conductive electrode is provided with an adhesion layer connected to the substrate layer. The adhesion layer forms a recess and accommodates a conductive layer in the recess.

而且,上述導電電極更包含一耐候層,設於上述導電電極的表面,較精確地來說,於一較佳實施例中,上述耐候層包覆於上述導電電極的外周面,使上述導電層及附著層皆與外部隔絕,又或者是,於另一較佳實施例中,上述耐候層形成於上述導電電極的上表面。Moreover, the conductive electrode further includes a weather-resistant layer disposed on the surface of the conductive electrode. More precisely, in a preferred embodiment, the weather-resistant layer is coated on the outer peripheral surface of the conductive electrode to make the conductive layer. And the adhesion layer is isolated from the outside, or in another preferred embodiment, the weather resistance layer is formed on the upper surface of the conductive electrode.

此外,上述附著層可設計為三種不同的結構樣態,敘明如下:In addition, the above adhesion layer can be designed into three different structural forms, as described below:

第一種為上述附著層包含一位於上述基材層的表面的中介層、一形成於上述中介層的表面的導電基底層以及一位於上述導電基底層的表面的抗氧化層。The first type is that the adhesion layer comprises an interposer on the surface of the substrate layer, a conductive substrate layer formed on the surface of the interposer, and an anti-oxidation layer on the surface of the conductive substrate layer.

第二種為上述附著層包含一形成於上述基材層的表面的黑化層、一形成於上述黑化層的表面的中介層以及一形成於上述中介層的表面的導電基底層。The second type is that the adhesion layer comprises a blackening layer formed on a surface of the substrate layer, an interposer formed on a surface of the blackening layer, and a conductive underlayer formed on a surface of the interposer.

以及,第三種為上述附著層包含一形成於上述基材層的表面的黑化層、一形成於上述黑化層的表面的中介層、一形成於上述中介層的表面的導電基底層以及一形成於上述導電基底層的表面的抗氧化層。And a third embodiment, wherein the adhesion layer comprises a blackening layer formed on a surface of the substrate layer, an interposer formed on a surface of the blackening layer, a conductive underlayer formed on a surface of the interposer, and An oxidation resistant layer formed on a surface of the above conductive substrate layer.

其中,上述基材層可由軟性材料或者是玻璃板所構成,上述軟性材料是由聚對苯二甲酸以二酯、聚甲基丙烯酸甲酯、聚碳酸酯、聚亞苯基碸、聚乙烯亞胺或者是聚亞醯胺其中一種所製成。Wherein, the base material layer may be composed of a soft material or a glass plate, and the soft material is composed of polyterephthalic acid as a diester, polymethyl methacrylate, polycarbonate, polyphenylene fluorene or polyethylene. The amine is either one of polyamines.

上述附著層是由金屬、金屬氧化物或者是其複合材料其中一種所製成,而且,上述金屬是選自於鎢、鎳、鉻、銅、釩、鉬、錫、鋅、鈷、鐵、鈦、鋁、鈮或其合金其中一種所製成,上述金屬氧化物分別是由鎢、鎳、鉻、銅、釩、鉬、錫、鋅、鈷、鐵、鈦、鋁、鈮或其合金其中一種氧化所製成。The above adhesion layer is made of one of a metal, a metal oxide or a composite material thereof, and the metal is selected from the group consisting of tungsten, nickel, chromium, copper, vanadium, molybdenum, tin, zinc, cobalt, iron, and titanium. Or one of aluminum, bismuth or an alloy thereof, wherein the metal oxide is one of tungsten, nickel, chromium, copper, vanadium, molybdenum, tin, zinc, cobalt, iron, titanium, aluminum, cerium or an alloy thereof. Made by oxidation.

上述導電層是由金、銅、銀、鋅、鋁、鎳、錫等金屬、或其合金、或者是由導電高分子材料其中一種所製成。The conductive layer is made of a metal such as gold, copper, silver, zinc, aluminum, nickel, tin, or an alloy thereof, or one of conductive polymer materials.

上述耐候層是由碳、石墨、金屬、金屬氧化物、可導電的高分子材料或者是其複合材料其中一種所製成,而且,上述金屬是選自於鎢、鎳、鉻、銅、鋁、銀、鈦、鉬、錫、鋅、鈷、鐵、鈮或其合金其中一種所製成,上述金屬氧化物分別是由鎢、鎳、鉻、銅、鋁、銀、鈦、鉬、錫、鋅、鈷、鐵、鈮或其合金其中一種氧化所製成。The weathering layer is made of carbon, graphite, metal, metal oxide, conductive polymer material or a composite material thereof, and the metal is selected from the group consisting of tungsten, nickel, chromium, copper, aluminum, Made of silver, titanium, molybdenum, tin, zinc, cobalt, iron, bismuth or an alloy thereof, the above metal oxides are respectively tungsten, nickel, chromium, copper, aluminum, silver, titanium, molybdenum, tin, zinc , one of oxidation of cobalt, iron, ruthenium or its alloy.

由前述說明可知,本發明的特點在於:利用遮蔽層等相關製程達到大幅提升金屬線路的生產良率及進一步穩定地生產每一導電電極的線徑寬度之效果;此外,透過針對每一形成線路圖案的導電電極進行完整的包覆保護,藉此提升電路基板或觸控面板中感應電極的金屬線路之產品使用耐久性。As can be seen from the foregoing description, the present invention is characterized in that the effect of greatly increasing the production yield of the metal line and further stably producing the wire diameter of each of the conductive electrodes by using a related process such as a shielding layer; The patterned conductive electrode is completely covered and protected, thereby improving the durability of the product of the metal line of the sensing electrode in the circuit substrate or the touch panel.

茲為便於更進一步對本發明之構造、使用及其特徵有更深一層明確、詳實的認識與瞭解,爰舉出較佳實施例,配合圖式詳細說明如下:In order to further clarify and understand the structure, the use and the features of the present invention, the preferred embodiment is described in detail with reference to the following drawings:

請參照圖1所示,本發明電路基板或觸控面板中電路基板中極細的金屬線路1的製造方法於第一較佳實施例中,製造步驟如下敘明:Referring to FIG. 1 , in a first preferred embodiment of the method for manufacturing a very thin metal line 1 in a circuit substrate or a touch panel of the present invention, the manufacturing steps are as follows:

步驟(A)選定基材構築出一基材層2,其中,上述基材層2可由軟性材料或者是玻璃板所構成,上述軟性材料是由聚對苯二甲酸乙二酯(PET)、聚甲基丙烯酸甲酯(PMMA)、聚碳酸酯(PC)、聚亞苯基碸(PPSU)、聚乙烯亞胺(PEI)或者是聚亞醯胺(PI)其中一種所製成;Step (A) selecting a substrate to construct a substrate layer 2, wherein the substrate layer 2 may be composed of a soft material or a glass plate, and the soft material is polyethylene terephthalate (PET), poly Methyl methacrylate (PMMA), polycarbonate (PC), polyphenylene fluorene (PPSU), polyethyleneimine (PEI) or polyimidamide (PI);

步驟(B)於上述基材層2的表面形成一具有線路圖案的遮蔽層3,並由線路圖案形成複數個凹槽4。In the step (B), a shielding layer 3 having a line pattern is formed on the surface of the base material layer 2, and a plurality of grooves 4 are formed by the wiring pattern.

步驟(C)於上述遮蔽層3的表面及複數個凹槽4的表面共同形成一附著層5,換句話說,於上述遮蔽層3的全部表面及位於上述凹槽4中的基材層2的表面連續性地形成上述附著層5,其中,上述遮蔽層3是利用光阻曝光顯影技術配合感光阻劑或者是印刷方式配合運用高分子材料其中一種或者是其組合所製成。Step (C) forming an adhesion layer 5 on the surface of the shielding layer 3 and the surface of the plurality of grooves 4, in other words, on the entire surface of the shielding layer 3 and the substrate layer 2 in the groove 4. The surface of the above-mentioned adhesion layer 5 is continuously formed by using the photoresist resist development technique in combination with a photoresist or a printing method in combination with one or a combination of polymer materials.

另外,上述附著層5可選自於真空濺鍍、化學鍍或者是蒸鍍其中一種或其組合方式進行製程,而且上述附著層5是由金屬、金屬氧化物或者是其複合材料其中一種所製成。In addition, the adhesion layer 5 may be selected from one of vacuum sputtering, electroless plating, or vapor deposition, or a combination thereof, and the adhesion layer 5 is made of one of a metal, a metal oxide, or a composite material thereof. to make.

其中,上述附著層5的上述金屬是選自於鎢(W)、鎳(Ni)、鉻(Cr)、銅(Cu)、釩(V)、鉬(Mo)、錫(Sn)、鋅(Zn)、鈷(Co)、鐵(Fe)、鈦(Ti)、鋁(Al)、鈮(Nb)或其合金其中一種所製成,上述附著層5的上述金屬氧化物分別是由鎢(W)、鎳(Ni)、鉻(Cr)、銅(Cu)、釩(V)、鉬(Mo)、錫(Sn)、鋅(Zn)、鈷(Co)、鐵(Fe)、鈦(Ti)、鋁(Al)、鈮(Nb)或其合金其中一種氧化所製成。Wherein, the metal of the adhesion layer 5 is selected from the group consisting of tungsten (W), nickel (Ni), chromium (Cr), copper (Cu), vanadium (V), molybdenum (Mo), tin (Sn), and zinc ( Made of one of Zn), cobalt (Co), iron (Fe), titanium (Ti), aluminum (Al), niobium (Nb) or an alloy thereof, and the above-mentioned metal oxide of the above-mentioned adhesion layer 5 is made of tungsten ( W), nickel (Ni), chromium (Cr), copper (Cu), vanadium (V), molybdenum (Mo), tin (Sn), zinc (Zn), cobalt (Co), iron (Fe), titanium ( One of oxidation of Ti), aluminum (Al), niobium (Nb) or an alloy thereof.

請參照圖2所示,更進一步而言,相對於習知附著層5是由兩層所構成,本發明於一第一較佳實施例中,上述附著層5可利用濺鍍製程分別依序由一中介層51、一導電基底層52以及一抗氧化層53共三層所共同製成,先於上述基材層2表面上形成一中介層51、於上述中介層51表面形成一導電基底層52以及於上述導電基底層52表面形成一抗氧化層53。Referring to FIG. 2, further, the conventional adhesion layer 5 is composed of two layers. In the first preferred embodiment, the adhesion layer 5 can be sequentially processed by a sputtering process. An interposer 51, a conductive underlayer 52, and an anti-oxidation layer 53 are formed in three layers. An interposer 51 is formed on the surface of the substrate layer 2, and a conductive substrate is formed on the surface of the interposer 51. The layer 52 and an anti-oxidation layer 53 are formed on the surface of the conductive substrate layer 52.

請參照圖3所示,於第二較佳實施例中,上述附著層5可利用濺鍍製程分別依序由一黑化層50、一中介層51以及一導電基底層52共三層所共同製成,先於上述基材層2表面上形成一黑化層50,於上述黑化層50表面形成一中介層51以及於上述中介層51表面形成一導電基底層52。Referring to FIG. 3, in the second preferred embodiment, the adhesion layer 5 can be sequentially formed by a blackening layer 50, an interposer 51, and a conductive substrate layer 52 in a sputtering process. A blackening layer 50 is formed on the surface of the substrate layer 2, an interposer 51 is formed on the surface of the blackening layer 50, and a conductive substrate layer 52 is formed on the surface of the interposer 51.

請參照圖4所示,於第三較佳實施例中,上述附著層5可利用濺鍍製程分別依序由一黑化層50、一中介層51、一導電基底層52以及一抗氧化層53共四層所共同製成,先於上述基材層2表面上形成一黑化層50,再於上述黑化層50表面形成一中介層51、於上述中介層51表面形成一導電基底層52以及於上述導電基底層52表面形成一抗氧化層53。Referring to FIG. 4, in the third preferred embodiment, the adhesion layer 5 may sequentially comprise a blackening layer 50, an interposer 51, a conductive substrate layer 52, and an anti-oxidation layer by using a sputtering process. A total of four layers are formed together, a blackening layer 50 is formed on the surface of the substrate layer 2, an interposer 51 is formed on the surface of the blackening layer 50, and a conductive substrate layer is formed on the surface of the interposer 51. 52 and an anti-oxidation layer 53 is formed on the surface of the conductive substrate layer 52.

上述中介層51(又稱作Tie-coat)是用以結合上述黑化層50以及上述導電基底層52,上述導電基底層52(又稱作Seed layer)具有易氧化特性,相對於習知利用下述三種方法避免上述導電基底層52的氧化狀況發生:方法(1)以酸性溶液去除氧化的導電基底層52、方法(2)暫時先冷凍乾燥或者是低溫低濕保存並於12至24小時內使用上述導電基底層52、方法(3)以真空保存並於三至六個月內使用上述導電基底層52,然而,本發明係設計於上述導電基底層52表面形成一抗氧化層53,避免上述導電基底層52的氧化作用。The interposer 51 (also referred to as a Tie-coat) is used to bond the blackening layer 50 and the conductive base layer 52. The conductive base layer 52 (also referred to as a seed layer) has an oxidizable property and is used in comparison with the conventional one. The following three methods avoid the occurrence of the oxidation state of the conductive underlayer 52: the method (1) removes the oxidized conductive substrate layer 52 with an acidic solution, and the method (2) is temporarily freeze-dried or stored under low temperature and low humidity for 12 to 24 hours. The conductive base layer 52 and the method (3) are used for vacuum storage and the conductive base layer 52 is used within three to six months. However, the present invention is designed to form an oxidation resistant layer 53 on the surface of the conductive base layer 52. The oxidation of the above conductive substrate layer 52 is avoided.

步驟(D)於上述附著層5的表面再形成一填滿上述複數個凹槽4的空間並同時形成於上述遮蔽層3的上的附著層5的表面之導電層6,上述導電層6並不被限制於上述凹槽4當中,而且,由上述導電層6形成一完全覆蓋於上述附著層5的全部表面的樣態。Step (D) further forming a conductive layer 6 on the surface of the adhesion layer 5 to fill the space of the plurality of grooves 4 and simultaneously forming the surface of the adhesion layer 5 on the shielding layer 3, the conductive layer 6 It is not limited to the above-described grooves 4, and a state in which the entire surface of the above-mentioned adhesion layer 5 is completely covered by the above-mentioned conductive layer 6 is formed.

其中,上述導電層6可選自於真空濺鍍、蒸鍍、化學鍍、電鍍或者是導電高分子塗佈其中一種或其組合方式進行製程,上述導電層6是由金(Au)、銅(Cu)、銀(Ag)、鋅(Zn)、鋁(Al)、鎳(Ni)、錫(Sn)等金屬、或其合金、或者是由導電高分子材料其中一種所製成。The conductive layer 6 may be selected from the group consisting of vacuum sputtering, evaporation, electroless plating, electroplating, or conductive polymer coating, and the conductive layer 6 is made of gold (Au) or copper ( A metal such as Cu), silver (Ag), zinc (Zn), aluminum (Al), nickel (Ni), or tin (Sn), or an alloy thereof, or one of conductive polymer materials.

步驟(E)以蝕刻方式去除上述遮蔽層3的上表面的局部導電層6,及去除上述遮蔽層3的上表面的附著層5,只留下位於上述凹槽4中的上述附著層5及導電層6,並由上述凹槽4中餘留的附著層5與導電層6共同形成本發明之導電電極7,由上述基材層2及複數個導電電極7共同構成上述金屬線路1。Step (E) etching the partial conductive layer 6 on the upper surface of the shielding layer 3 and removing the adhesion layer 5 on the upper surface of the shielding layer 3, leaving only the adhesion layer 5 located in the groove 4 and The conductive layer 6 is formed by the adhesion layer 5 remaining in the recess 4 and the conductive layer 6 to form the conductive electrode 7 of the present invention. The base layer 2 and the plurality of conductive electrodes 7 together constitute the metal line 1.

據此,可察知本發明導電電極7之寬度能夠以前述敘明設置遮蔽層3配合蝕刻方式的相關步驟進行精確地控制,蝕刻過程中的蝕刻液體並不會發生與上述凹槽4當中的上述附著層5及導電層6相互接觸的可能性,由上述遮蔽層3的保護進而完全避免於蝕刻過程中對於上述附著層5及導電層6可能發生的側向蝕刻現象,因此,能夠保證所生產的上述導電電極7的線徑寬度。Accordingly, it can be seen that the width of the conductive electrode 7 of the present invention can be precisely controlled by the related steps of setting the shielding layer 3 in the etching manner as described above, and the etching liquid in the etching process does not occur with the above-mentioned grooves 4 The possibility that the adhesion layer 5 and the conductive layer 6 are in contact with each other, the protection of the shielding layer 3 further avoids the lateral etching phenomenon that may occur in the adhesion layer 5 and the conductive layer 6 during the etching process, thereby ensuring the production. The wire diameter of the above-mentioned conductive electrode 7.

由上述步驟(A)、(B)、(C)、(D)、(E)共同形成本發明可應用於電路基板或觸控面板中感應電路中極細的金屬線路1的初步產品,而上述每一導電電極7的寬度可精確地調整到0.5μm ~20μm之間。The above steps (A), (B), (C), (D), (E) together form a preliminary product of the present invention which can be applied to a very thin metal line 1 in a circuit board or a touch panel in a touch panel, and the above The width of each of the conductive electrodes 7 can be precisely adjusted to be between 0.5 μm and 20 μm.

於此第一較佳實施例中,前述步驟(E)還能夠更進一步包含一步驟(F):去除上述遮蔽層3,只留下原先位於上述凹槽4中的導電電極7,使上述基材層2與複數個導電電極7共同構成一具有線路圖案及極細線徑的金屬線路1的電路基板或設於觸控面板中的感應電極,並於複數個導電電極7的全部表面70(亦即是其外周面)形成一耐候層8,使上述導電電極7與外部隔絕。In the first preferred embodiment, the foregoing step (E) can further include a step (F) of removing the shielding layer 3, leaving only the conductive electrode 7 originally located in the groove 4, so that the base The material layer 2 and the plurality of conductive electrodes 7 together form a circuit substrate having a circuit pattern and a very thin wire diameter metal circuit 1 or an induction electrode disposed in the touch panel, and are on the entire surface 70 of the plurality of conductive electrodes 7 (also That is, the outer peripheral surface thereof forms a weather resistant layer 8 to isolate the conductive electrode 7 from the outside.

由上述耐候層8將上述已具有線路圖案的上述導電層6與外部隔絕密封,上述耐候層8形成一ㄇ字型樣態,再進更一步而言,上述耐候層8可設為一具有較深色顏色的黑化性質,也就是說其所製成的材料特性為本身顏色偏藍色、綠色、紫色、棕色或者是黑色等較為深色的顏色。The conductive layer 6 having the line pattern is sealed from the outside by the weather-resistant layer 8, and the weather-resistant layer 8 is formed in a U-shaped form. Further, the weather-resistant layer 8 can be set to have a comparative The blackening nature of the dark color, that is to say, the material properties of the dark color, such as blue, green, purple, brown or black, are darker colors.

其中,上述耐候層8可選自於化學鍍、電鍍或者是導電高分子塗佈其中一種或其組合方式進行製程,而上述耐候層8是由碳(C)、石墨(graphite)、金屬、金屬氧化物、可導電的高分子材料或者是其複合材料其中一種所製成。Wherein, the weathering layer 8 may be selected from one of electroless plating, electroplating or conductive polymer coating or a combination thereof, and the weather resistant layer 8 is made of carbon (C), graphite, metal, metal. An oxide, a conductive polymer material, or one of its composite materials.

其中,上述耐候層8的上述金屬是選自於鎢(W)、鎳(Ni)、鉻(Cr)、銅(Cu)、鋁(Al)、銀(Ag)、鈦(Ti)、鉬(Mo)、錫(Sn)、鋅(Zn)、鈷(Co)、鐵(Fe)、鈮(Nb)或其合金其中一種所製成,上述耐候層8的上述金屬氧化物分別是由鎢(W)、鎳(Ni)、鉻(Cr)、銅(Cu)、鋁(Al)、銀(Ag)、鈦(Ti)、鉬(Mo)、錫(Sn)、鋅(Zn)、鈷(Co)、鐵(Fe)、鈮(Nb)或其合金其中一種氧化所製成。Wherein, the metal of the weathering layer 8 is selected from the group consisting of tungsten (W), nickel (Ni), chromium (Cr), copper (Cu), aluminum (Al), silver (Ag), titanium (Ti), and molybdenum ( Mo), tin (Sn), zinc (Zn), cobalt (Co), iron (Fe), niobium (Nb) or an alloy thereof, the metal oxide of the weathering layer 8 is made of tungsten ( W), nickel (Ni), chromium (Cr), copper (Cu), aluminum (Al), silver (Ag), titanium (Ti), molybdenum (Mo), tin (Sn), zinc (Zn), cobalt ( Co), iron (Fe), niobium (Nb) or an alloy thereof is produced by oxidation of one of them.

除此之外,本發明之導電電極7可設計建構於上述基材層2的其中一面(單面),或者是位於上述基材層2的雙面(圖未示),甚至是分佈於上述基材層2的多個表面(圖未示)。In addition, the conductive electrode 7 of the present invention can be designed to be constructed on one side (one side) of the substrate layer 2, or on both sides (not shown) of the substrate layer 2, or even distributed on the above. A plurality of surfaces of the substrate layer 2 (not shown).

請參照圖5所示,於第二較佳實施例中,製造步驟(A)、(B)、(C)、(D)及(E)皆與第一實施例相同,僅於步驟(F)具有差異性:步驟(F) 於上述導電電極7的上表面71形成一耐候層8後,再去除上述遮蔽層3,由上述基材層2、複數個導電電極7以及耐候層8共同構成一具有金屬線路1線路圖案的電路基板。Referring to FIG. 5, in the second preferred embodiment, the manufacturing steps (A), (B), (C), (D), and (E) are the same as the first embodiment, only in the step (F). Having the difference: step (F) after the weathering layer 8 is formed on the upper surface 71 of the conductive electrode 7, the shielding layer 3 is removed, and the substrate layer 2, the plurality of conductive electrodes 7, and the weathering layer 8 are combined. A circuit substrate having a metal line 1 wiring pattern.

更進一步地說明,第二較佳實施例中的耐候層8是同時形成於位於上述凹槽4中的上述導電層6的上表面及附著層5的上表面,才使得上述耐候層8進而形成於上述導電電極7的上表面71樣態。It is further explained that the weather-resistant layer 8 in the second preferred embodiment is simultaneously formed on the upper surface of the conductive layer 6 and the upper surface of the adhesion layer 5 in the groove 4, so that the weather-resistant layer 8 is further formed. It is in the form of the upper surface 71 of the above-mentioned conductive electrode 7.

如此一來,本發明耐候層8配合上述附著層5兩者完全包覆於已具有線路圖案的上述導電層6全部表面之設計可達到不同於習知之防止使用者於使用之下,延長電路基板或觸控面板中感應電極的金屬線路1之產品使用年限之目的。In this way, the design of the weather-resistant layer 8 of the present invention and the adhesion layer 5 are completely covered on the entire surface of the conductive layer 6 having the line pattern, which can be different from the conventional one to prevent the user from using the circuit board. Or the purpose of the product of the metal line 1 of the sensing electrode in the touch panel.

再更進一步而言,本發明製程中利用具有預定線路圖案的遮蔽層3製造上述導電層6的線路圖案,便能完全避免習知於蝕刻程序中出現嚴重的側向蝕刻現象,而導致每一金屬線路1的產品之良率極低的現象以及線徑寬度不一致之情況,換句話說,本發明可達到提升上述導電電極7的生產良率,並精確管控維持每一導電電極7的線徑寬度之兩項目的。Further, in the process of the present invention, by using the shielding layer 3 having a predetermined line pattern to fabricate the wiring pattern of the conductive layer 6, it is possible to completely avoid the occurrence of severe lateral etching in the etching process, resulting in each In the case where the yield of the product of the metal line 1 is extremely low and the line width is inconsistent, in other words, the present invention can improve the production yield of the above-mentioned conductive electrode 7, and precisely control the wire diameter of each of the conductive electrodes 7. The width of the two items.

請參照圖6及圖7所示,本發明極細的金屬線路1於下列敘明之較佳實施例中,主要包含:一基材層2及複數個導電電極7等兩個部分。Referring to FIG. 6 and FIG. 7, the ultra-fine metal circuit 1 of the present invention mainly comprises two parts: a substrate layer 2 and a plurality of conductive electrodes 7 in the following preferred embodiments.

其中,上述基材層2可選自玻璃、塑膠板、及塑膠膜等其中之一,而本發明極細的金屬線路1形成於上述基材層2的其中一面、至少一面或者是全部表面。The base material layer 2 may be selected from one of glass, a plastic plate, and a plastic film, and the extremely fine metal wire 1 of the present invention is formed on one, at least one or all of the surface of the substrate layer 2.

本發明導電電極7的結構為於上述基材層2的表面排設形成一預定的線路圖案,上述導電電極7設有一與上述基材層2連接並呈現為複數個凹槽4樣態的附著層5,並於上述凹槽4中容設一導電層6。The conductive electrode 7 of the present invention has a structure in which a predetermined line pattern is formed on the surface of the base material layer 2, and the conductive electrode 7 is provided with an adhesion to the substrate layer 2 and presents a plurality of grooves 4 The layer 5 and a conductive layer 6 are accommodated in the groove 4.

於實際上製造本發明適用於電路基板或觸控面板的感應電極中極細的金屬線路1產品時,上述每一導電電極7的寬度介於0.1μm ~10μm之間。When the present invention is applied to a product of a very thin metal line 1 in a sensing electrode of a circuit substrate or a touch panel, the width of each of the conductive electrodes 7 is between 0.1 μm and 10 μm.

請參照圖6所示,於第一較佳實施例中,上述附著層5分佈於上述導電層6的左右兩側及下方的位置,而進一步於以一耐候層8完全包覆於上述導電電極7的外周面,也就是上述導電電極7的全部表面70,上述耐候層8最終呈現一ㄇ字型結構。Referring to FIG. 6 , in the first preferred embodiment, the adhesion layer 5 is distributed on the left and right sides and the lower side of the conductive layer 6 , and is further completely coated on the conductive electrode with a weather resistant layer 8 . The outer peripheral surface of 7, that is, the entire surface 70 of the above-mentioned conductive electrode 7, the weather-resistant layer 8 finally exhibits a U-shaped structure.

再者,上述耐候層8還能夠進一步設為具有一同時具有保護及遮蔽功效之較深色顏色的黑化性質,而且,若以剖視圖來看,此第一較佳實施例中耐候層8為一包覆於上述導電電極7的全部表面70且呈現ㄇ字型結構樣態的耐候層8。Furthermore, the weather-resistant layer 8 can be further configured to have a blackening property of a darker color having both protection and shielding effects, and the weather-resistant layer 8 of the first preferred embodiment is in cross-sectional view. A weather-resistant layer 8 coated on the entire surface 70 of the above-mentioned conductive electrode 7 and exhibiting a U-shaped structure.

或者是於第二較佳實施例中,請參照圖7所示,上述耐候層8可設計為形成於上述導電電極7的上表面71,再進一步說明之,上述耐候層8分佈於上述附著層5及上述導電層6的上表面位置,因此,上述耐候層8便能夠配合分佈於上述導電層6左右兩側及下方的附著層5共同連接完全將上述導電層6包覆進行保護的功效。Or in the second preferred embodiment, as shown in FIG. 7, the weather-resistant layer 8 can be formed on the upper surface 71 of the conductive electrode 7. Further, the weather-resistant layer 8 is distributed on the adhesion layer. 5 and the position of the upper surface of the conductive layer 6, the weather-resistant layer 8 can be integrally bonded to the adhesion layer 5 distributed on the left and right sides and the lower side of the conductive layer 6 to completely protect the conductive layer 6 from being protected.

再者,本發明之附著層5的厚度設為介於0.01μm~1μm範圍之間;而上述導電層6的厚度設為介於0.1μm~6μm範圍之間;以及,上述耐候層8的厚度設為介於0.01μm~1μm範圍之間。Furthermore, the thickness of the adhesion layer 5 of the present invention is set to be in the range of 0.01 μm to 1 μm; and the thickness of the above-mentioned conductive layer 6 is set to be in the range of 0.1 μm to 6 μm; and the thickness of the weather-resistant layer 8 described above. It is set to be in the range of 0.01 μm to 1 μm.

據此,本發明極細的金屬線路1結構於第一及第二較佳實施例中之耐候層8的位置分佈設計將上述導電層6被包覆其中,對於在高溫度、高濕度或是低溫環境之下,本發明極細的金屬線路1產品具有極高的環境耐候性質且良率極高。Accordingly, the positional distribution design of the weather-resistant layer 8 of the first and second preferred embodiments of the ultra-fine metal wiring 1 of the present invention is such that the conductive layer 6 is coated therein for high temperature, high humidity or low temperature. Under the environment, the extremely fine metal line 1 product of the invention has extremely high environmental weather resistance and high yield.

而且,本發明極細的金屬線路1結構能夠確實達到防止使用者於長期使用之下,位於上述附著層5及耐候層8的內部被包覆的導電電極7長期處於空氣中水氣所發生的氧化過程,本發明便可完成增強導電電極7的耐氧化功效,延長金屬線路1產品使用年限之目的。Moreover, the structure of the extremely thin metal wiring 1 of the present invention can surely prevent the oxidation of the conductive electrode 7 which is coated in the interior of the adhesion layer 5 and the weathering layer 8 for a long period of time in the air. In the process, the invention can complete the oxidation resistance of the conductive electrode 7 and extend the service life of the metal line 1 product.

最後,本發明極細的金屬線路1結構於前述較佳實施例中之耐候層8也能夠進一步地設計為具有深色顏色的黑化性質。Finally, the weather-resistant layer 8 of the extremely fine metal wiring 1 of the present invention in the preferred embodiment described above can be further designed to have a blackening property of a dark color.

上述所舉實施例,僅用為方便說明本發明並非加以限制,在不離本發明精神範疇,熟悉此一行業技藝人士依本發明申請專利範圍及發明說明所作之各種簡易變形與修飾,均仍應含括於以下申請專利範圍中。The above-mentioned embodiments are merely intended to be illustrative of the present invention and are not intended to limit the scope of the invention, and the various modifications and modifications made by those skilled in the art in accordance with the scope of the invention and the description of the invention are still It is included in the scope of the following patent application.

1‧‧‧金屬線路
2‧‧‧基材層
3‧‧‧遮蔽層
4‧‧‧凹槽
5‧‧‧附著層
50‧‧‧黑化層
51‧‧‧中介層
52‧‧‧導電基底層
53‧‧‧抗氧化層
6‧‧‧導電層
7‧‧‧導電電極
70‧‧‧表面
71‧‧‧上表面
8‧‧‧耐候層
1‧‧‧Metal lines
2‧‧‧Substrate layer
3‧‧‧shading layer
4‧‧‧ Groove
5‧‧‧Adhesive layer
50‧‧‧Blackening layer
51‧‧‧Intermediary
52‧‧‧ conductive base layer
53‧‧‧Antioxidant layer
6‧‧‧ Conductive layer
7‧‧‧Conductive electrode
70‧‧‧ surface
71‧‧‧Upper surface
8‧‧‧ weathering layer

圖1為本發明極細的金屬線路第一較佳實施例之製造方法流程圖; 圖2為附著層第一較佳實施例之結構示意圖; 圖3為附著層第二較佳實施例之結構示意圖; 圖4為附著層第三較佳實施例之結構示意圖; 圖5為本發明極細的金屬線路第二較佳實施例之製造方法流程圖; 圖6為本發明導電電極第一較佳實施例之結構示意圖; 圖7為本發明導電電極第二較佳實施例之結構示意圖。1 is a flow chart of a manufacturing method of a first preferred embodiment of a very thin metal circuit of the present invention; FIG. 2 is a schematic structural view of a first preferred embodiment of an adhesion layer; FIG. 3 is a schematic structural view of a second preferred embodiment of an adhesion layer. 4 is a schematic structural view of a third preferred embodiment of an adhesion layer; FIG. 5 is a flow chart of a manufacturing method of a second preferred embodiment of a very thin metal circuit of the present invention; FIG. 6 is a first preferred embodiment of a conductive electrode of the present invention; FIG. 7 is a schematic structural view of a second preferred embodiment of a conductive electrode according to the present invention.

1‧‧‧金屬線路 1‧‧‧Metal lines

2‧‧‧基材層 2‧‧‧Substrate layer

3‧‧‧遮蔽層 3‧‧‧shading layer

4‧‧‧凹槽 4‧‧‧ Groove

5‧‧‧附著層 5‧‧‧Adhesive layer

6‧‧‧導電層 6‧‧‧ Conductive layer

7‧‧‧導電電極 7‧‧‧Conductive electrode

70‧‧‧表面 70‧‧‧ surface

8‧‧‧耐候層 8‧‧‧ weathering layer

Claims (11)

一種極細的金屬線路之製造方法,(A)選定基材構築出一基材層;(B)於上述基材層的表面形成一遮蔽層,上述遮蔽層具有複數個形成線路圖案的凹槽;(C)於上述遮蔽層的表面及複數個凹槽的表面共同形成一附著層;(D)於上述附著層的表面形成一填滿上述複數個凹槽的導電層;(E)去除上述遮蔽層的上表面的局部導電層及附著層,並由上述凹槽中餘留的附著層與導電層共同形成一導電電極。 A method for manufacturing a very fine metal line, (A) selecting a substrate to form a substrate layer; (B) forming a shielding layer on a surface of the substrate layer, the shielding layer having a plurality of grooves forming a line pattern; (C) forming an adhesion layer on the surface of the shielding layer and the surface of the plurality of grooves; (D) forming a conductive layer filling the plurality of grooves on the surface of the adhesion layer; (E) removing the shielding a local conductive layer and an adhesion layer on the upper surface of the layer, and a conductive electrode is formed by the adhesion layer remaining in the groove and the conductive layer. 如申請專利範圍第1項所述之極細的金屬線路之製造方法,其中,上述步驟(E)更包含一步驟(F):去除上述遮蔽層,使上述基材層與複數個導電電極共同構成一具有線路圖案的電路基板,並於複數個導電電極的外周面形成一耐候層,使上述導電電極與外部隔絕。 The method for manufacturing a very fine metal circuit according to the first aspect of the invention, wherein the step (E) further comprises a step (F): removing the shielding layer, and forming the substrate layer and the plurality of conductive electrodes together A circuit board having a line pattern, and a weather-resistant layer is formed on an outer peripheral surface of the plurality of conductive electrodes to isolate the conductive electrode from the outside. 如申請專利範圍第1項所述之極細的金屬線路之製造方法,其中,上述步驟(E)更包含一步驟(F):於上述導電電極的上表面形成一耐候層再去除上述遮蔽層,由上述基材層、複數個導電電極以及耐候層共同構成一具有線路圖案的電路基板。 The method for manufacturing a very fine metal line according to the first aspect of the invention, wherein the step (E) further comprises a step (F): forming a weather-resistant layer on the upper surface of the conductive electrode and removing the shielding layer, A circuit board having a line pattern is formed by the base material layer, the plurality of conductive electrodes, and the weather resistant layer. 如申請專利範圍第2、3項所述之極細的金屬線路之製造方法,其中,上述耐候層可設為一用於遮蔽上述金屬導電電極並具有黑化的性質。 The method for producing a very fine metal wire according to the second or third aspect of the invention, wherein the weatherable layer is provided to shield the metal conductive electrode and has a blackening property. 如申請專利範圍第1項所述之極細的金屬線路之製造方法,其中,上述步驟(C)進一步於上述基材層的表面上形成一中介層、於上述中介層的表面形成一導電基底層以及於上述導電基底層的表面形成一抗氧化層以共同建構上述附著層。 The method for manufacturing a very fine metal wire according to the first aspect of the invention, wherein the step (C) further forms an interposer on the surface of the substrate layer, and forms a conductive substrate on the surface of the interposer. And forming an anti-oxidation layer on the surface of the conductive base layer to jointly construct the adhesion layer. 如申請專利範圍第1項所述之極細的金屬線路之製造方法,其中,上述步驟(C)進一步於上述基材層的表面上形成一黑化層,於上述黑化層的表面形成一中介層以及於上述中介層的表面形成一導電基底層以共同建構上述附著層。 The method for manufacturing a very fine metal wire according to the first aspect of the invention, wherein the step (C) further forms a blackening layer on the surface of the substrate layer to form an intermediary on the surface of the blackening layer. The layer and the surface of the interposer are formed with a conductive base layer to jointly construct the adhesion layer. 如申請專利範圍第1項所述之極細的金屬線路之製造方法,其中,上述步驟(C)進一步於上述基材層的表面上形成一黑化層,於上述黑化層的表面形成一中介層、於上述中介層的表面形成一導電基底層以及於上述導電基底層的表面形成一抗氧化層以共同建構上述附著層。 The method for manufacturing a very fine metal wire according to the first aspect of the invention, wherein the step (C) further forms a blackening layer on the surface of the substrate layer to form an intermediary on the surface of the blackening layer. And forming an electroconductive base layer on the surface of the interposer and forming an anti-oxidation layer on the surface of the conductive base layer to jointly construct the adhesion layer. 一種極細的金屬線路,包含:一基材層;複數個導電電極,於上述基材層的表面排設形成一線路圖案,上述導電電極設有一與上述基材層連接的附著層,上述附著層形成一凹槽,並於上述凹槽中容設一導電層;以及一耐候層,設於上述導電電極的表面,上述耐候層包覆於上述導電電極的外周面,使上述導電層及附著層皆與外部隔絕。 An extremely thin metal circuit comprising: a substrate layer; a plurality of conductive electrodes arranged on a surface of the substrate layer to form a line pattern, wherein the conductive electrode is provided with an adhesion layer connected to the substrate layer, the adhesion layer Forming a groove and accommodating a conductive layer in the groove; and a weather-resistant layer disposed on a surface of the conductive electrode, wherein the weather-resistant layer is coated on an outer peripheral surface of the conductive electrode to make the conductive layer and the adhesion layer They are all isolated from the outside. 如申請專利範圍第8項所述之極細的金屬線路,其中,上述附著層包含一位於上述基材層的表面的中介層、一形成於上述中介層的表面的導電基底層以及一位於上述導電基底層的表面的抗氧化層。 The ultrafine metal circuit of claim 8, wherein the adhesion layer comprises an interposer on a surface of the substrate layer, a conductive substrate layer formed on a surface of the interposer, and a conductive layer An oxidation resistant layer on the surface of the substrate layer. 如申請專利範圍第8項所述之極細的金屬線路,其中,上述附著層包含一形成於上述基材層的表面的黑化層、一形成於上述黑化層的表面的中介層以及一形成於上述中介層的表面的導電基底層。 The ultrafine metal circuit according to claim 8, wherein the adhesion layer comprises a blackening layer formed on a surface of the substrate layer, an interposer formed on a surface of the blackening layer, and a formation layer. a conductive substrate layer on the surface of the above interposer. 如申請專利範圍第10項所述之極細的金屬線路,其中,上述附著層更包含一形成於上述導電基底層的表面的抗氧化層。 The ultrafine metal circuit according to claim 10, wherein the adhesion layer further comprises an oxidation resistant layer formed on a surface of the conductive base layer.
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