TWI543140B - Calibrating circuit and calibrating method for display panel - Google Patents

Calibrating circuit and calibrating method for display panel Download PDF

Info

Publication number
TWI543140B
TWI543140B TW104115899A TW104115899A TWI543140B TW I543140 B TWI543140 B TW I543140B TW 104115899 A TW104115899 A TW 104115899A TW 104115899 A TW104115899 A TW 104115899A TW I543140 B TWI543140 B TW I543140B
Authority
TW
Taiwan
Prior art keywords
circuit
gain
voltage
coupled
amplifier
Prior art date
Application number
TW104115899A
Other languages
Chinese (zh)
Other versions
TW201642238A (en
Inventor
黃宏裕
Original Assignee
奇景光電股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 奇景光電股份有限公司 filed Critical 奇景光電股份有限公司
Priority to TW104115899A priority Critical patent/TWI543140B/en
Application granted granted Critical
Publication of TWI543140B publication Critical patent/TWI543140B/en
Publication of TW201642238A publication Critical patent/TW201642238A/en

Links

Landscapes

  • Analogue/Digital Conversion (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Description

顯示面板的校正電路與校正方法 Correction circuit and correction method of display panel

本發明是有關於一種校正電路,且特別是有關於一種顯示面板的校正電路與校正方法。 The present invention relates to a correction circuit, and more particularly to a correction circuit and a correction method for a display panel.

圖1是說明習知主動式有機發光二極體(Active matrix organic light emitting diode,AMOLED)顯示器的電路方塊圖。此AMOLED顯示器包括閘極驅動器(gate driver)110、源極驅動器(source driver)120與顯示面板130。顯示面板130具有多條掃描線(例如掃描線S_1與掃描線S_2)、多條資料線(例如資料線D_1與資料線D_2)以及多個像素電路(例如像素電路131)。像素電路131具有開關132、驅動電晶體133與有機發光二極體(organic LED,OLED)134。 1 is a circuit block diagram illustrating a conventional active matrix organic light emitting diode (AMOLED) display. The AMOLED display includes a gate driver 110, a source driver 120, and a display panel 130. The display panel 130 has a plurality of scanning lines (for example, the scanning lines S_1 and S_2), a plurality of data lines (for example, the data lines D_1 and the data lines D_2), and a plurality of pixel circuits (for example, the pixel circuits 131). The pixel circuit 131 has a switch 132, a driving transistor 133, and an organic LED (OLED) 134.

閘極驅動器110可以依序掃描顯示面板130的不同掃描線,以便讓源極驅動器120可以將資料電壓寫入像素電路。以圖1所示像素電路131為例,在閘極驅動器110透過掃描線S_1將開關132導通(turn on)的期間,源極驅動器120可以透過資料線D_1與開關132將資料電壓傳送至驅動電晶體133的閘極。驅動電晶體133的閘極電壓可以決定驅動電晶體133的電流I1。流經有機發光二極體134 的電流I1可以決定有機發光二極體134的亮度。驅動電晶體133的閘源極電壓與電流I1的關係式為I1=k(VGS-Vt)2,其中係數k為實數,VGS為驅動電晶體133的閘源極電壓,而Vt表示驅動電晶體133的閥電壓(threshold voltage)。由於製程漂移或是其他因素,使得不同像素電路中的驅動電晶體的閥電壓可能會互有差異。閥電壓的差異/漂移可能導致影像之光源不均(Mura)或其他瑕疵。若能測知驅動電晶體133的閥電壓,則源極驅動器120可以對應調整寫入像素電路131的資料電壓來補償閥電壓的漂移。 The gate driver 110 can sequentially scan different scan lines of the display panel 130 to allow the source driver 120 to write data voltages to the pixel circuits. Taking the pixel circuit 131 shown in FIG. 1 as an example, during the period in which the gate driver 110 turns the switch 132 through the scan line S_1, the source driver 120 can transmit the data voltage to the driving power through the data line D_1 and the switch 132. The gate of the crystal 133. The gate voltage of the driving transistor 133 can determine the current I1 of the driving transistor 133. Flowing through the organic light emitting diode 134 The current I1 can determine the brightness of the organic light-emitting diode 134. The relationship between the gate-source voltage of the driving transistor 133 and the current I1 is I1=k(VGS-Vt)2, where the coefficient k is a real number, VGS is the gate-source voltage of the driving transistor 133, and Vt represents the driving transistor. Threshold voltage of 133. Due to process drift or other factors, the valve voltages of the driving transistors in different pixel circuits may differ from each other. Differences/drifts in valve voltage may result in uneven light source (Mura) or other imperfections in the image. If the valve voltage of the driving transistor 133 can be detected, the source driver 120 can adjust the data voltage written in the pixel circuit 131 to compensate for the drift of the valve voltage.

一般來說,會在顯示面板130外設置一補償電路,用以感測驅動電晶體133的閥電壓。所感測的閥電壓會經過放大器與類比數位轉換器以得到數位碼,而所得到數位碼便可以用來校正閥電壓。然而,由於製程飄移或是其他因素,上述放大器的增益可能也會不一樣。 Generally, a compensation circuit is disposed outside the display panel 130 for sensing the valve voltage of the driving transistor 133. The sensed valve voltage is passed through an amplifier and an analog-to-digital converter to obtain a digital code, and the resulting digital code can be used to correct the valve voltage. However, due to process drift or other factors, the gain of the above amplifiers may also be different.

本發明提出一種顯示面板的校正電路與校正方法,可以校正上述放大器的增益。 The invention provides a correction circuit and a correction method for a display panel, which can correct the gain of the above amplifier.

本發明的實施例提出一種顯示面板的校正電路,顯示面板包括一像素電路,像素電路包括一驅動電晶體,校正電路包括像素感測器、至少一個校正感測器、放大電路、類比數位轉換器與增益調整電路。像素感測器的輸入端經由顯示面板的資料線耦接至像素電路,用以在感 測期間感測驅動電晶體的端點電壓。校正感測器的輸入端耦接至第一預設電壓與第二預設電壓。放大電路的輸入端耦接至像素感測器與校正感測器,用以在感測期間根據增益放大端點電壓,並於校正期間根據上述的增益來放大第一預設電壓與第二預設電壓。類比數位轉換器的輸入端耦接至放大電路的輸出端,用以在感測期間將放大後的端點電壓轉換為數位碼,並在校正期間將放大後的第一預設電壓轉換為第一數位碼,將放大後的第二預設電壓轉換為第二數位碼。增益調整電路是耦接至類比數位轉換器的輸出端與放大電路,用以根據第一數位碼與第二數位碼調整放大電路的增益。 Embodiments of the present invention provide a correction circuit for a display panel. The display panel includes a pixel circuit. The pixel circuit includes a driving transistor. The correction circuit includes a pixel sensor, at least one correction sensor, an amplification circuit, and an analog digital converter. And gain adjustment circuit. The input end of the pixel sensor is coupled to the pixel circuit via the data line of the display panel for sensing The terminal voltage of the driving transistor is sensed during the measurement. The input end of the correction sensor is coupled to the first preset voltage and the second preset voltage. The input end of the amplifying circuit is coupled to the pixel sensor and the correction sensor for amplifying the end point voltage according to the gain during the sensing period, and amplifying the first preset voltage and the second pre-preparation according to the gain during the correction period Set the voltage. The input end of the analog-to-digital converter is coupled to the output end of the amplifying circuit for converting the amplified end point voltage into a digit code during sensing, and converting the amplified first preset voltage into the first period during the correction period A digit code converts the amplified second preset voltage into a second digit code. The gain adjustment circuit is coupled to the output end of the analog to digital converter and the amplification circuit for adjusting the gain of the amplification circuit according to the first digital code and the second digital code.

在一實施例中,上述的增益調整電路包括第一暫存器、第二暫存器、比較電路與控制電路。第一暫存器是用以儲存第一數位碼。第二暫存器是用以儲存第二數位碼。比較電路的輸入端耦接至第一暫存器與第二暫存器,用以計算第一數位碼與第二數位碼之間的第一差。控制電路是用以根據第一差調整放大電路的增益。 In an embodiment, the gain adjustment circuit includes a first register, a second register, a comparison circuit, and a control circuit. The first register is used to store the first digit code. The second register is for storing the second digit code. The input end of the comparison circuit is coupled to the first register and the second register to calculate a first difference between the first digital code and the second digital code. The control circuit is configured to adjust the gain of the amplifying circuit according to the first difference.

在一實施例中,若第一差小於一個預設門檻值,控制電路用以增加放大電路的增益。若第一差大於預設門檻值,控制電路用以減少放大電路的增益。 In an embodiment, if the first difference is less than a predetermined threshold, the control circuit is configured to increase the gain of the amplification circuit. If the first difference is greater than the preset threshold, the control circuit is used to reduce the gain of the amplifying circuit.

在一實施例中,在控制電路調整放大電路的增益以後,放大電路根據調整後的增益放大第一預設電壓與第二預設電壓,並且類比數位轉換器重新產生第一數位碼與第二數位碼。比較電路也計算重新產生的第一數位碼 與重新產生的第二數位碼之間的第二差。若第一差小於預設門檻值且第二差大於等於預設門檻值,或是第一差大於等於預設門檻值且第二差小於預設門檻值,控制電路停止調整放大電路的增益。 In an embodiment, after the control circuit adjusts the gain of the amplifying circuit, the amplifying circuit amplifies the first preset voltage and the second preset voltage according to the adjusted gain, and the analog digital converter regenerates the first digital code and the second Digital code. The comparison circuit also calculates the regenerated first digit code The second difference from the regenerated second digit code. If the first difference is less than the preset threshold and the second difference is greater than or equal to the preset threshold, or the first difference is greater than or equal to the preset threshold and the second difference is less than the preset threshold, the control circuit stops adjusting the gain of the amplifying circuit.

在一實施例中,上述的第一預設電壓實質上為放大電路的輸入轉換範圍的25%,第二預設電壓實質上為輸入轉換範圍的75%。 In one embodiment, the first predetermined voltage is substantially 25% of the input conversion range of the amplification circuit, and the second predetermined voltage is substantially 75% of the input conversion range.

在一實施例中,上述的放大電路包括一開關與一放大器。此開關是耦接至像素感測器與校正感測器,放大器是耦接至此開關。此開關在感測期間將像素感測器耦接至放大器,並且在校正期間將校正感測器耦接至放大器。此放大器包括以下電路。差動放大器的第一輸入端與第二輸入端分別耦接至校正感測器的第一輸出端與第二輸出端。第一電容的第一端與第二端分別耦接至校正感測器的第一輸出端與差動放大器的第一輸入端。第二電容的第一端與第二端分別耦接至校正感測器的第二輸出端與差動放大器的第二輸入端。多個第三電容調整電路中的每一者包括第三電容與第一開關。每一個第三電容的第一端耦接至差動放大器的第一輸入端,每一個第三電容的第二端耦接至第一開關的第一端,每一個第一開關的第二端耦接至差動放大器的第一輸出端。第四電容的第一端耦接至差動放大器的第二輸入端。第二開關的第一端與第二端分別耦接至差動放大器的第一輸入端與差動放大器的第一輸出端。第三開關的第一端與第二端分別耦接至第一開關的第 二端與共模電壓。第四開關的第一端與第二端分別耦接至第一開關的第二端與差動放大器的第一輸出端。第五開關的第一端與第二端分別耦接至差動放大器的第二輸入端與差動放大器的第二輸出端。第六開關的第一端與第二端分別耦接至第四電容的第二端與共模電壓。第七開關的第一端與第二端分別耦接至第四電容的第二端與差動放大器的第二輸出端。增益調整電路用以控制第一開關以調整放大電路的增益。 In an embodiment, the amplifying circuit comprises a switch and an amplifier. The switch is coupled to the pixel sensor and the correction sensor to which the amplifier is coupled. This switch couples the pixel sensor to the amplifier during sensing and couples the correction sensor to the amplifier during calibration. This amplifier includes the following circuits. The first input end and the second input end of the differential amplifier are respectively coupled to the first output end and the second output end of the correction sensor. The first end and the second end of the first capacitor are respectively coupled to the first output end of the correction sensor and the first input end of the differential amplifier. The first end and the second end of the second capacitor are respectively coupled to the second output end of the correction sensor and the second input end of the differential amplifier. Each of the plurality of third capacitance adjustment circuits includes a third capacitance and a first switch. The first end of each of the third capacitors is coupled to the first input end of the differential amplifier, and the second end of each of the third capacitors is coupled to the first end of the first switch, and the second end of each of the first switches The first output is coupled to the differential amplifier. The first end of the fourth capacitor is coupled to the second input of the differential amplifier. The first end and the second end of the second switch are respectively coupled to the first input end of the differential amplifier and the first output end of the differential amplifier. The first end and the second end of the third switch are respectively coupled to the first switch Two-terminal and common-mode voltage. The first end and the second end of the fourth switch are respectively coupled to the second end of the first switch and the first output end of the differential amplifier. The first end and the second end of the fifth switch are respectively coupled to the second input end of the differential amplifier and the second output end of the differential amplifier. The first end and the second end of the sixth switch are respectively coupled to the second end of the fourth capacitor and the common mode voltage. The first end and the second end of the seventh switch are respectively coupled to the second end of the fourth capacitor and the second output end of the differential amplifier. The gain adjustment circuit is configured to control the first switch to adjust the gain of the amplification circuit.

本發明的實施例提出一種顯示面板的校正方法。此顯示面板包括像素電路,此像素電路包括驅動電晶體。驅動電晶體的端點電壓在感測期間被像素感測器所感測,像素感測器的輸出端耦接至放大電路,放大電路的輸出端耦接至類比數位轉換器。此校正方法包括:在校正期間感測第一預設電壓與第二預設電壓,並由放大電路根據一個增益放大第一預設電壓與第二預設電壓;由類比數位轉換器在校正期間將第一預設電壓轉換為第一數位碼,並將第二預設電壓轉換為第二數位碼;以及根據第一數位碼與第二數位碼調整放大電路的增益。 Embodiments of the present invention provide a method of correcting a display panel. The display panel includes a pixel circuit including a drive transistor. The end voltage of the driving transistor is sensed by the pixel sensor during sensing, the output end of the pixel sensor is coupled to the amplifying circuit, and the output end of the amplifying circuit is coupled to the analog digital converter. The calibration method includes: sensing a first preset voltage and a second preset voltage during the correction, and amplifying the first preset voltage and the second preset voltage according to a gain by the amplification circuit; during the calibration by the analog digital converter Converting the first preset voltage into a first digit code, and converting the second preset voltage into a second digit code; and adjusting a gain of the amplifying circuit according to the first digit code and the second digit code.

在一實施例中,上述根據第一數位碼與第二數位碼調整放大電路的增益的步驟包括:計算第一數位碼與第二數位碼之間的第一差;若第一差小於一預設門檻值,增加放大電路的增益;以及若第一差大於等於預設門檻值,減少放大電路的增益。 In an embodiment, the step of adjusting the gain of the amplifying circuit according to the first digit code and the second digit code comprises: calculating a first difference between the first digit code and the second digit code; if the first difference is less than a pre- The threshold value is set to increase the gain of the amplifying circuit; and if the first difference is greater than or equal to the preset threshold value, the gain of the amplifying circuit is reduced.

在一實施例中,上述的校正方法更包括:在調整放大電路的增益以後,由放大電路根據調整後的增益放大第一預設電壓與第二預設電壓,並且由類比數位轉換器重新產生第一數位碼與第二數位碼;計算重新產生的第一數位碼與重新產生的第二數位碼之間的第二差;若第一差小於預設門檻值且第二差大於預設門檻值,或是第一差大於等於預設門檻值且第二差小於預設門檻值,停止調整放大電路的增益。 In an embodiment, the correcting method further includes: after adjusting the gain of the amplifying circuit, the amplifying circuit amplifies the first preset voltage and the second preset voltage according to the adjusted gain, and is regenerated by the analog digital converter. a first digit code and a second digit code; calculating a second difference between the regenerated first digit code and the regenerated second digit code; if the first difference is less than a preset threshold and the second difference is greater than a preset threshold The value, or the first difference is greater than or equal to the preset threshold and the second difference is less than the preset threshold, and the gain of the amplifying circuit is stopped.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 The above described features and advantages of the invention will be apparent from the following description.

110‧‧‧閘極驅動器 110‧‧‧gate driver

120‧‧‧源極驅動器 120‧‧‧Source Driver

130‧‧‧顯示面板 130‧‧‧ display panel

131‧‧‧像素電路 131‧‧‧pixel circuit

132‧‧‧開關 132‧‧‧ switch

133‧‧‧驅動電晶體 133‧‧‧ drive transistor

134‧‧‧有機發光二極體 134‧‧‧Organic Luminescent Diodes

I1‧‧‧電流 I1‧‧‧ Current

D_1、D_2‧‧‧資料線 D_1, D_2‧‧‧ data line

S_1、S_2‧‧‧掃描線 S_1, S_2‧‧‧ scan line

200‧‧‧顯示裝置 200‧‧‧ display device

210‧‧‧閘極驅動器 210‧‧‧gate driver

220‧‧‧源極驅動器 220‧‧‧Source Driver

230‧‧‧顯示面板 230‧‧‧ display panel

211‧‧‧模式線 211‧‧‧ mode line

212‧‧‧掃描線 212‧‧‧ scan line

221‧‧‧資料線 221‧‧‧Information line

231‧‧‧像素電路 231‧‧‧Pixel Circuit

232、236、237‧‧‧開關 232, 236, 237‧‧ ‧ switch

233‧‧‧驅動電晶體 233‧‧‧Drive transistor

234‧‧‧發光二極體 234‧‧‧Lighting diode

235‧‧‧電容 235‧‧‧ Capacitance

I2‧‧‧電流 I2‧‧‧ current

GND‧‧‧接地電壓 GND‧‧‧ Grounding voltage

VDD‧‧‧系統電壓 VDD‧‧‧ system voltage

300‧‧‧校正電路 300‧‧‧correction circuit

310‧‧‧像素感測器 310‧‧‧pixel sensor

320‧‧‧校正感測器 320‧‧‧correction sensor

330‧‧‧放大電路 330‧‧‧Amplification circuit

331‧‧‧開關 331‧‧‧ switch

332‧‧‧放大器 332‧‧Amplifier

340‧‧‧類比數位轉換器 340‧‧‧ Analog Digital Converter

350‧‧‧增益調整電路 350‧‧‧Gain adjustment circuit

351、352‧‧‧暫存器 351, 352‧‧‧ register

353‧‧‧比較電路 353‧‧‧Comparative circuit

354‧‧‧控制電路 354‧‧‧Control circuit

V1‧‧‧第一預設電壓 V1‧‧‧ first preset voltage

VCM‧‧‧共模電壓 VCM‧‧‧ Common mode voltage

V2‧‧‧第二預設電壓 V2‧‧‧second preset voltage

410、420、430‧‧‧曲線 410, 420, 430‧‧‧ curves

502、504、505‧‧‧開關 502, 504, 505‧ ‧ switch

503、503‧‧‧電容 503, 503‧‧‧ capacitor

510、520‧‧‧增益放大器 510, 520‧‧‧ Gain Amplifier

VOP‧‧‧第一輸出端 VOP‧‧‧ first output

VON‧‧‧第二輸出端 VON‧‧‧second output

VR1‧‧‧第一參考電壓 VR1‧‧‧ first reference voltage

VR2‧‧‧第二參考電壓 VR2‧‧‧second reference voltage

610‧‧‧第三電容調整電路 610‧‧‧ Third capacitance adjustment circuit

620‧‧‧差動放大器 620‧‧‧Differential Amplifier

SW1~SW7‧‧‧開關 SW1~SW7‧‧‧ switch

C1~C4‧‧‧電容 C1~C4‧‧‧ capacitor

VIP_GA‧‧‧第一輸入端 VIP_GA‧‧‧ first input

VIN_GA‧‧‧第二輸入端 VIN_GA‧‧‧ second input

S701~S703‧‧‧步驟 S701~S703‧‧‧Steps

圖1是說明習知主動式有機發光二極體顯示器的電路方塊圖。 1 is a circuit block diagram illustrating a conventional active organic light emitting diode display.

圖2是依照本發明實施例說明一種顯示裝置200的電路示意圖。 2 is a circuit diagram illustrating a display device 200 in accordance with an embodiment of the invention.

圖3是根據一實施例繪示校正電路300的方塊示意圖。 FIG. 3 is a block diagram showing a correction circuit 300 according to an embodiment.

圖4A與圖4B是根據一實施例繪示根據第一差調整增益的示意圖。 4A and 4B are schematic diagrams showing adjustment of gain according to a first difference, according to an embodiment.

圖5是根據一實施例繪示校正感測器的電路圖。 FIG. 5 is a circuit diagram showing a correction sensor in accordance with an embodiment.

圖6是根據一實施例繪示放大器332的電路示意圖。 FIG. 6 is a circuit diagram showing an amplifier 332 according to an embodiment.

圖7是根據一實施例繪示顯示面板的控制方法的流程圖。 FIG. 7 is a flow chart showing a control method of a display panel according to an embodiment.

在本案說明書全文(包括申請專利範圍)中所使用的「耦接」一詞可指任何直接或間接的連接手段。舉例而言,若文中描述第一裝置耦接於第二裝置,則應該被解釋成該第一裝置可以直接連接於該第二裝置,或者該第一裝置可以透過其他裝置或某種連接手段而間接地連接至該第二裝置。另外,凡可能之處,在圖式及實施方式中使用相同標號的元件/構件/步驟代表相同或類似部分。不同實施例中使用相同標號或使用相同用語的元件/構件/步驟可以相互參照相關說明。 The term "coupled" as used throughout the specification (including the scope of the patent application) may be used in any direct or indirect connection. For example, if the first device is described as being coupled to the second device, it should be construed that the first device can be directly connected to the second device, or the first device can be connected through other devices or some kind of connection means. Connected to the second device indirectly. In addition, wherever possible, the elements and/ Elements/components/steps that use the same reference numbers or use the same terms in different embodiments may refer to the related description.

圖2是依照本發明實施例說明一種顯示裝置200的電路示意圖。此顯示裝置200包括閘極驅動器(gate driver)210、源極驅動器(source driver)220與顯示面板230。顯示面板230具有多條掃描線(或稱閘極線)、多條資料線(或稱源極線)以及多個像素電路。在此以掃描線212、資料線221與像素電路231為例。像素電路231具有開關232、驅動電晶體233、發光二極體234、儲存電容235、開關236與開關237。發光二極體234可以是有機發光二極體(organic LED,OLED)或是其他類型的發光二極體。 2 is a circuit diagram illustrating a display device 200 in accordance with an embodiment of the invention. The display device 200 includes a gate driver 210, a source driver 220, and a display panel 230. The display panel 230 has a plurality of scan lines (or gate lines), a plurality of data lines (or source lines), and a plurality of pixel circuits. Here, the scanning line 212, the data line 221, and the pixel circuit 231 are taken as an example. The pixel circuit 231 has a switch 232, a driving transistor 233, a light emitting diode 234, a storage capacitor 235, a switch 236, and a switch 237. The light emitting diode 234 can be an organic LED (OLED) or other type of light emitting diode.

在掃描期間,閘極驅動器210可以透過模式線211截止開關236並且導通開關237。在掃描期間,閘極驅 動器210還可以透過掃描線212導通開關232,以便讓源極驅動器220可以將資料電壓透過資料線221傳送至驅動電晶體233的閘極。此資料電壓可以被儲存於儲存電容235。驅動電晶體233的閘極電壓可以決定驅動電晶體233的電流I2。流經有機發光二極體234的電流I2可以決定有機發光二極體234的亮度。 During the scan, the gate driver 210 can turn off the switch 236 through the mode line 211 and turn on the switch 237. Gate drive during scanning The actuator 210 can also turn on the switch 232 through the scan line 212 to allow the source driver 220 to transmit the data voltage through the data line 221 to the gate of the drive transistor 233. This data voltage can be stored in the storage capacitor 235. The gate voltage of the driving transistor 233 can determine the current I2 that drives the transistor 233. The current I2 flowing through the organic light-emitting diode 234 can determine the brightness of the organic light-emitting diode 234.

在感測期間,閘極驅動器210可以透過模式線211導通開關236並且截止開關237。在感測期間,閘極驅動器210還可以透過掃描線212導通開關232,以便讓源極驅動器220內部的校正電路(容後說明)可以透過資料線221感測驅動電晶體233的端點電壓(在圖2中為閥電壓)。在測知驅動電晶體233的端點電壓後,源極驅動器220可以對應地調整欲寫入像素電路231的資料電壓來補償閥電壓的漂移。 During sensing, the gate driver 210 can turn on the switch 236 through the mode line 211 and turn off the switch 237. During sensing, the gate driver 210 can also turn on the switch 232 through the scan line 212, so that the correction circuit (described later) inside the source driver 220 can sense the terminal voltage of the driving transistor 233 through the data line 221 ( In Figure 2 is the valve voltage). After sensing the terminal voltage of the driving transistor 233, the source driver 220 can correspondingly adjust the data voltage to be written to the pixel circuit 231 to compensate for the drift of the valve voltage.

值得注意的是,在圖2的實施例中源極驅動器220所感測的端點電壓為驅動電晶體233閘極(汲極)上的電壓,但在其他實施例中像素電路231可以有不同的結構,而此端點電壓也可以是源極電壓。本發明並不限制像素電路231的結構,也不限制上述端點電壓為驅動電晶體233哪一個端點上的電壓。 It should be noted that in the embodiment of FIG. 2, the terminal voltage sensed by the source driver 220 is the voltage on the gate (drain) of the driving transistor 233, but in other embodiments the pixel circuit 231 may have different Structure, and this endpoint voltage can also be the source voltage. The present invention does not limit the structure of the pixel circuit 231, nor does it limit the voltage at which end point of the driving transistor 233 is the terminal voltage.

圖3是根據一實施例繪示校正電路300的方塊示意圖。請參照圖2與圖3,校正電路300包括像素感測器310、至少一個校正感測器320、放大電路330、類比數位轉換器340與增益調整電路350。在此實施例中,放大電路 330包括了開關331與放大器332,其中該開關331耦接至像素感測器310與校正感測器320,並且放大器332耦接至開關331。增益調整電路350包括了第一暫存器351、第二暫存器352、比較電路353與控制電路354。 FIG. 3 is a block diagram showing a correction circuit 300 according to an embodiment. Referring to FIGS. 2 and 3 , the correction circuit 300 includes a pixel sensor 310 , at least one correction sensor 320 , an amplification circuit 330 , an analog digital converter 340 , and a gain adjustment circuit 350 . In this embodiment, the amplifying circuit 330 includes a switch 331 and an amplifier 332 , wherein the switch 331 is coupled to the pixel sensor 310 and the correction sensor 320 , and the amplifier 332 is coupled to the switch 331 . The gain adjustment circuit 350 includes a first register 351, a second register 352, a comparison circuit 353, and a control circuit 354.

像素感測器310的輸入端經由資料線221耦接至像素電路231,放大電路330的輸入端是耦接至像素感測器310與校正感測器320。在感測期間,像素感測器310取得驅動電晶體232的端點電壓,而開關331使像素感測器310耦接至放大器332,像素感測器310會傳送端點電壓與共模電壓至放大器332,放大器332會根據一增益放大此端點電壓。但值得注意的是此增益可以是大於等於1或是小於1,在此實施例中此增益約為0.5,但本發明並不在此限。類比數位轉換器340的輸入端耦接至放大電路330,用以在感測期間將端點電壓轉換為數位碼(digital code),此數位碼便可以用來調整傳送給像素電路231的資料電壓。然而,在顯示裝置中可能有多個放大器332,由於製程飄移或是其他因素,不同的放大器332可能會有不同的增益。校正感測器320與增益調整電路350會校正放大器332的增益。 The input end of the pixel sensor 310 is coupled to the pixel circuit 231 via the data line 221 . The input end of the amplifier circuit 330 is coupled to the pixel sensor 310 and the correction sensor 320 . During sensing, pixel sensor 310 takes the endpoint voltage of drive transistor 232, and switch 331 couples pixel sensor 310 to amplifier 332, which transmits the endpoint voltage and common mode voltage to Amplifier 332, amplifier 332 amplifies the terminal voltage based on a gain. However, it is worth noting that the gain may be greater than or equal to 1 or less than 1, and in this embodiment the gain is about 0.5, but the invention is not limited thereto. The input end of the analog-to-digital converter 340 is coupled to the amplifying circuit 330 for converting the terminal voltage into a digital code during sensing, and the digital code can be used to adjust the data voltage transmitted to the pixel circuit 231. . However, there may be multiple amplifiers 332 in the display device, and different amplifiers 332 may have different gains due to process drift or other factors. Correction sensor 320 and gain adjustment circuit 350 will correct the gain of amplifier 332.

校正感測器320的輸入端耦接至第一預設電壓V1、共模電壓VCM與第二預設電壓V2。在校正期間,開關331會使校正感測器320耦接至放大器332,而校正感測器320會依序將第一預設電壓V1與第二預設電壓V2傳送至放大器332。具體來說,校正感測器320會先將第一預 設電壓V1與共模電壓VCM傳送至放大器332,而放大器332會根據增益來放大第一預設電壓V1。接著,類比數位轉換器340會將放大後的第一預設電壓V1轉換為第一數位碼,而此第一數位碼會儲存在第一暫存器351當中。接下來,校正感測器320會將第二預設電壓V2與共模電壓VCM傳送至放大器332,而放大器332會根據增益來放大第二預設電壓V2。類比數位轉換器340會將放大後的第二預設電壓V2轉換為第二數位碼,而此第二數位碼會儲存在第二暫存器352當中。 The input end of the correction sensor 320 is coupled to the first preset voltage V1, the common mode voltage VCM, and the second preset voltage V2. During the correction, the switch 331 will couple the correction sensor 320 to the amplifier 332, and the correction sensor 320 will sequentially transmit the first preset voltage V1 and the second preset voltage V2 to the amplifier 332. Specifically, the correction sensor 320 will first pass the first pre- The voltage V1 and the common mode voltage VCM are sent to the amplifier 332, and the amplifier 332 amplifies the first predetermined voltage V1 according to the gain. Then, the analog digital converter 340 converts the amplified first preset voltage V1 into a first digital code, and the first digital code is stored in the first temporary register 351. Next, the correction sensor 320 transmits the second preset voltage V2 and the common mode voltage VCM to the amplifier 332, and the amplifier 332 amplifies the second preset voltage V2 according to the gain. The analog digital converter 340 converts the amplified second preset voltage V2 into a second digital code, and the second digital code is stored in the second temporary register 352.

由於第一預設電壓V1與第二預設電壓V2為已知,並且放大器332的增益需要固定在某一個數值,因此第一數位碼與第二數位碼應為特定的數值。根據此第一數位碼與第二數位碼,增益調整電路350便可以調整放大器332的增益。在此實施例中,比較電路353會計算第一數位碼與第二數位碼之間的差(亦稱為第一差),而控制電路354會根據此第一差來調整放大器332的增益。 Since the first preset voltage V1 and the second preset voltage V2 are known, and the gain of the amplifier 332 needs to be fixed at a certain value, the first digit code and the second digit code should be specific values. Based on the first digit code and the second digit code, the gain adjustment circuit 350 can adjust the gain of the amplifier 332. In this embodiment, the comparison circuit 353 calculates the difference between the first digit code and the second digit code (also referred to as the first difference), and the control circuit 354 adjusts the gain of the amplifier 332 based on the first difference.

圖4A與圖4B是根據一實施例繪示根據第一差調整增益的示意圖。請參照圖3與圖4A,橫軸繪示了第一預設電壓V1與第二預設電壓V2,而縱軸表示類比數位轉換器340的輸出。曲線410表示理想放大器332的轉換曲線,而曲線420是實際曲線。在此實施例中,放大器332具有一個輸入轉換範圍,例如為4伏特到8伏特,第一預設電壓V1為此輸入轉換範圍的75%(即是7伏特),第二預設電壓V2則為此輸入轉換範圍的25%(即是5伏特)。另一方 面,類比數位轉換器340輸出的數位碼具有10位元,因此理想上經過放大器332以後,第一預設電壓V1所對應的第一數位碼應為767,而第二預設電壓V2所對應的第二數位碼應為256。然而,實際曲線420與理想曲線410之間有誤差,因此實際上所得到的第一數位碼為750,而第二數位碼為273。比較電路353會計算第一數位碼與第二數位碼之間的第一差(即750-273=477)。控制電路354會判斷此第一差是否小於一個預設門檻值,此預設門檻值是根據理想曲線410所對應的數位碼所計算出(即1024/2=512)。若第一差小於此預設門檻值,則表示放大器332的增益太小,因此控制電路354會增加放大器332的增益。若第一差大於預設門檻值,則表示放大器332的增益太大,因此控制電路354會減少放大器332的增益。在圖4A的實施例中,第一差為477,小於預設門檻值512,因此控制電路354會增加放大器332的增益。在調整增益以後,請參照圖4B,放大器332會具有曲線430,相對於曲線420來說更接近理想曲線410。 4A and 4B are schematic diagrams showing adjustment of gain according to a first difference, according to an embodiment. Referring to FIG. 3 and FIG. 4A , the horizontal axis shows the first preset voltage V1 and the second preset voltage V2 , and the vertical axis represents the output of the analog digital converter 340 . Curve 410 represents the conversion curve of ideal amplifier 332, while curve 420 is the actual curve. In this embodiment, the amplifier 332 has an input conversion range of, for example, 4 volts to 8 volts, the first predetermined voltage V1 is 75% of the input conversion range (ie, 7 volts), and the second predetermined voltage V2 is Enter 25% of the conversion range for this (ie 5 volts). The other side The digital code output by the analog-to-digital converter 340 has 10 bits. Therefore, after the amplifier 332 is ideally passed, the first digital code corresponding to the first preset voltage V1 should be 767, and the second preset voltage V2 corresponds to The second digit code should be 256. However, there is an error between the actual curve 420 and the ideal curve 410, so the actual first digit code is actually 750 and the second digit code is 273. Comparison circuit 353 calculates a first difference between the first digit code and the second digit code (i.e., 750-273 = 477). The control circuit 354 determines whether the first difference is less than a preset threshold value, and the preset threshold value is calculated according to the digital code corresponding to the ideal curve 410 (ie, 1024/2=512). If the first difference is less than the preset threshold, it indicates that the gain of the amplifier 332 is too small, so the control circuit 354 increases the gain of the amplifier 332. If the first difference is greater than the preset threshold, it indicates that the gain of the amplifier 332 is too large, so the control circuit 354 reduces the gain of the amplifier 332. In the embodiment of FIG. 4A, the first difference is 477, which is less than the preset threshold 512, so control circuit 354 increases the gain of amplifier 332. After adjusting the gain, referring to FIG. 4B, the amplifier 332 will have a curve 430 that is closer to the ideal curve 410 relative to the curve 420.

在上述的實施例中,第一預設電壓V1為此輸入轉換範圍的75%,第二預設電壓V2為輸入轉換範圍的25%,預設門檻值為512。但在其他實施例中,第一預設電壓V1與第二預設電壓V2可以位於其他的百分比,因此預設門檻值會對應地為其他數值。值得一提的是,第一預設電壓V1不應設置的太高,且第二預設電壓V2不應設置的太低,這是因為實際曲線420在兩端可能並不是線性。 在一實施例中,第一預設電壓V1可以設置為輸入轉換範圍的60%~90%,而第二預設電壓可以設置為輸入轉換範圍的10%~40%。另一方面,若類比數位轉換器340輸出的數位碼的解析度具有更多或更少的位元,則預設門檻值也會對應的改變。此外,在上述的實施例中,增益校正電路350是根據第一數位碼與第二數位碼之間的差來調整放大器332的增益,然而在其他實施例中,增益校正電路350也可以根據第一數位碼與第二數位碼之間的比例來調整放大器332的增益。 In the above embodiment, the first preset voltage V1 is 75% of the input conversion range, the second preset voltage V2 is 25% of the input conversion range, and the preset threshold is 512. However, in other embodiments, the first preset voltage V1 and the second preset voltage V2 may be located in other percentages, so the preset threshold value may be correspondingly other values. It is worth mentioning that the first preset voltage V1 should not be set too high, and the second preset voltage V2 should not be set too low, because the actual curve 420 may not be linear at both ends. In an embodiment, the first preset voltage V1 may be set to be 60% to 90% of the input conversion range, and the second preset voltage may be set to be 10% to 40% of the input conversion range. On the other hand, if the resolution of the digital code output by the analog-to-digital converter 340 has more or fewer bits, the preset threshold value will also change accordingly. In addition, in the above embodiment, the gain correction circuit 350 adjusts the gain of the amplifier 332 according to the difference between the first digital code and the second digital code. However, in other embodiments, the gain correction circuit 350 may also be based on the The ratio between a digital code and a second digital code adjusts the gain of amplifier 332.

請參照回圖3,在一實施例中,控制電路354每次是小幅度地調整放大器332的增益,因此控制電路354必須判斷是否要停止調整或繼續。具體來說,在根據第一差調整完放大器332的增益以後,會再輸入第一預設電壓V1與第二預設電壓V2至放大器332。放大器332會根據調整後的增益來放大第一預設電壓V1與第二預設電壓V2,並且類比數位轉換器340會重新產生對應的第一數位碼與第二數位碼至第一暫存器351與第二暫存器352。比較電路353會計算重新產生的第一數位碼與重新產生的第二數位碼之間的差(亦稱第二差)。若上述的第一差小於預設門檻值且第二差大於預設門檻值(如同圖4A與圖4B的例子),或者是第一差大於預設門檻值且第二差小於預設門檻值,則控制電路354會停止調整放大器332的增益。若是第一差與第二差都小於預設門檻值或是都大於預設門檻值,則表示 放大器332的增益與理想增益之間還有一段差距,因此控制電路354會繼續調整放大器332的增益。 Referring back to FIG. 3, in an embodiment, the control circuit 354 adjusts the gain of the amplifier 332 a small amount each time, so the control circuit 354 must determine whether to stop the adjustment or continue. Specifically, after the gain of the amplifier 332 is adjusted according to the first difference, the first preset voltage V1 and the second preset voltage V2 are input to the amplifier 332. The amplifier 332 amplifies the first preset voltage V1 and the second preset voltage V2 according to the adjusted gain, and the analog digital converter 340 regenerates the corresponding first digital code and the second digital code to the first temporary register. 351 and second register 352. Comparison circuit 353 calculates the difference (also known as the second difference) between the regenerated first digital code and the regenerated second digital code. If the first difference is less than the preset threshold and the second difference is greater than the preset threshold (as in the example of FIG. 4A and FIG. 4B), or the first difference is greater than the preset threshold and the second difference is less than the preset threshold Then, the control circuit 354 stops adjusting the gain of the amplifier 332. If the first difference and the second difference are both smaller than the preset threshold or both are greater than the preset threshold, There is still a gap between the gain of amplifier 332 and the ideal gain, so control circuit 354 will continue to adjust the gain of amplifier 332.

圖5是根據一實施例繪示校正感測器的電路圖。此實施例具有兩個校正感測器,這兩個校正感測器具有相同的電路結構,其中一個接收第一預設電壓V1與共模電壓VCM(如圖5所示),另一個則接收第二預設電壓V2與共模電壓VCM。為簡化起見,在此僅繪示接收第一預設電壓V1與共模電壓VCM的校正感測器,而在另一個校正感測器中可以將第一預設電壓V1替換為第二預設電壓V2。請參照圖5,校正感測器320包括開關502、504、505,電容503、506,與增益放大器510、520。開關502的第一端耦接至第一預設電壓V1。開關505的第一端耦接至共模電壓VCM。開關504的第一端與第二端分別耦接至開關502的第二端與開關505的第二端。 FIG. 5 is a circuit diagram showing a correction sensor in accordance with an embodiment. This embodiment has two correction sensors having the same circuit structure, one of which receives the first predetermined voltage V1 and the common mode voltage VCM (as shown in FIG. 5), and the other receives The second preset voltage V2 is a common mode voltage VCM. For the sake of simplicity, only the correction sensor that receives the first preset voltage V1 and the common mode voltage VCM is shown here, and the first preset voltage V1 can be replaced with the second one in the other correction sensor. Set the voltage V2. Referring to FIG. 5, the correction sensor 320 includes switches 502, 504, 505, capacitors 503, 506, and gain amplifiers 510, 520. The first end of the switch 502 is coupled to the first preset voltage V1. The first end of the switch 505 is coupled to the common mode voltage VCM. The first end and the second end of the switch 504 are respectively coupled to the second end of the switch 502 and the second end of the switch 505.

電容503的第一端與第二端分別耦接至第一參考電壓VR1與開關502的第二端。第一參考電壓VR1可以是任何準位的固定電壓,例如系統電壓、接地電壓或是其他固定電壓。電容506的第一端與第二端分別耦接至第二參考電壓VR2與開關505的第二端。第二參考電壓VR2可以是任何準位的固定電壓,例如系統電壓、接地電壓或是其他固定電壓。第一參考電壓VR1可以相同或不同於第二參考電壓VR2。 The first end and the second end of the capacitor 503 are respectively coupled to the first reference voltage VR1 and the second end of the switch 502. The first reference voltage VR1 can be a fixed voltage of any level, such as a system voltage, a ground voltage, or other fixed voltage. The first end and the second end of the capacitor 506 are respectively coupled to the second reference voltage VR2 and the second end of the switch 505. The second reference voltage VR2 can be a fixed voltage of any level, such as a system voltage, a ground voltage, or other fixed voltage. The first reference voltage VR1 may be the same or different from the second reference voltage VR2.

增益放大器510的輸入端耦接至開關502的第二端,增益放大器510的輸出端作為校正感測器320的第一 輸出端VOP。增益放大器520的輸入端耦接至開關505的第二端,增益放大器520的輸出端作為校正感測器320的第二輸出端VON。增益放大器510與增益放大器520可以是任何類型的放大電路。例如,在本實施例中,增益放大器510與增益放大器520可以是單元增益(Unit Gain)放大器。 The input end of the gain amplifier 510 is coupled to the second end of the switch 502, and the output end of the gain amplifier 510 is the first of the correction sensor 320. Output VOP. The input end of the gain amplifier 520 is coupled to the second end of the switch 505, and the output end of the gain amplifier 520 serves as the second output terminal VON of the correction sensor 320. Gain amplifier 510 and gain amplifier 520 can be any type of amplification circuit. For example, in the present embodiment, the gain amplifier 510 and the gain amplifier 520 may be unit Gain amplifiers.

當顯示面板230操作於所述感測期間時,於感測期間的第一期間(第一相位)T1,開關502與開關505為導通,而開關504為截止。因此在第一期間T1中,增益放大器510的輸出VOP(T1)=V1+Voffset1,而增益放大器520的輸出VON(T1)=VCM+Voffset2。其中,Voffset1表示增益放大器510的電壓偏移,Voffset2表示增益放大器520的電壓偏移。放大器332可以在第一期間T1中計算VOP(T1)-VON(T1)=(V1+Voffset1)-(VCM+Voffset2)。於感測期間的第二期間(第二相位)T2,開關502與開關505為截止,而開關504為導通。因此在第二期間T2中,增益放大器510的輸出VOP(T2)=Vreset+Voffset1,而增益放大器520的輸出VON(T2)=Vreset+Voffset2。其中,Vreset表示開關504導通時增益放大器510與增益放大器520的輸入端電壓。放大器332可以在第二期間T2中計算VOP(T2)-VON(T2)=Voffset1-Voffset2。放大器332可以計算[VOP(T1)-VON(T1)]-[VOP(T2)-VON(T2)]=V1-VCM。因 此,增益放大器510與增益放大器520的電壓偏移可以被消除。 When the display panel 230 operates during the sensing period, during the first period (first phase) T1 of the sensing period, the switch 502 and the switch 505 are turned on, and the switch 504 is turned off. Therefore, in the first period T1, the output VOP (T1) of the gain amplifier 510 = V1 + Voffset1, and the output of the gain amplifier 520 is VON (T1) = VCM + Voffset2. Wherein, Voffset1 represents the voltage offset of the gain amplifier 510, and Voffset2 represents the voltage offset of the gain amplifier 520. The amplifier 332 can calculate VOP(T1) - VON(T1) = (V1 + Voffset1) - (VCM + Voffset2) in the first period T1. During the second period (second phase) T2 of the sensing period, the switch 502 and the switch 505 are turned off, and the switch 504 is turned on. Therefore, in the second period T2, the output VOP (T2) of the gain amplifier 510 = Vreset + Voffset1, and the output VON (T2) of the gain amplifier 520 = Vreset + Voffset2. Wherein, Vreset indicates the input terminal voltage of the gain amplifier 510 and the gain amplifier 520 when the switch 504 is turned on. The amplifier 332 can calculate VOP(T2) - VON(T2) = Voffset1 - Voffset2 in the second period T2. The amplifier 332 can calculate [VOP(T1) - VON(T1)] - [VOP(T2) - VON(T2)] = V1 - VCM. because Thus, the voltage offset of the gain amplifier 510 and the gain amplifier 520 can be eliminated.

圖6是根據一實施例繪示放大器332的電路示意圖。請參照圖5與圖6,放大器332的第一輸入端VIP_GA是耦接至校正感測器320的第一輸出端VOP,而放大器332的第二輸入端VIN_GA是耦接至校正感測器320的第二輸出端VON。放大器332包括第一電容C1、第二電容C2、多個第三電容調整電路610、第四電容C4、第二開關SW2、第三開關SW3、第四開關SW4、第五開關SW5、第六開關SW6、第七開關SW7與差動放大器620。差動放大器620的第一輸入端(例如反向輸入端)與第二輸入端(例如非反向輸入端)分別耦接至放大器332的第一輸入端VIP_GA與第二輸入端VIN_GA。 FIG. 6 is a circuit diagram showing an amplifier 332 according to an embodiment. Referring to FIG. 5 and FIG. 6 , the first input terminal VIP_GA of the amplifier 332 is coupled to the first output terminal VOP of the correction sensor 320 , and the second input terminal VIN_GA of the amplifier 332 is coupled to the correction sensor 320 . The second output is VON. The amplifier 332 includes a first capacitor C1, a second capacitor C2, a plurality of third capacitance adjusting circuits 610, a fourth capacitor C4, a second switch SW2, a third switch SW3, a fourth switch SW4, a fifth switch SW5, and a sixth switch. SW6, seventh switch SW7 and differential amplifier 620. The first input terminal (eg, the inverting input terminal) and the second input terminal (eg, the non-inverting input terminal) of the differential amplifier 620 are respectively coupled to the first input terminal VIP_GA and the second input terminal VIN_GA of the amplifier 332.

第一電容C1的第一端與第二端分別耦接至放大器332的第一輸入端VIP_GA與差動放大器620的第一輸入端。每一個第三電容調整電路610包括第三電容C3與第一開關SW1。每一個第三電容C3的第一端耦接至差動放大器620的第一輸入端,每一個第三電容C3的第二端耦接至第一開關SW1的第一端。每一個第一開關SW1的第二端耦接至差動放大器620的第一輸出端(例如,非反向輸出端)。第二開關SW2的第一端與第二端分別耦接至差動放大器620的第一輸入端與第一輸出端。第三開關SW3的第一端與第二端分別耦接至第一開關SW1的第二端與共模電 壓VCM。第四開關SW4的第一端與第二端分別耦接至第一開關SW1的第二端與差動放大器620的第一輸出端。 The first end and the second end of the first capacitor C1 are respectively coupled to the first input terminal VIP_GA of the amplifier 332 and the first input end of the differential amplifier 620. Each of the third capacitance adjusting circuits 610 includes a third capacitor C3 and a first switch SW1. The first end of each of the third capacitors C3 is coupled to the first input of the differential amplifier 620, and the second end of each of the third capacitors C3 is coupled to the first end of the first switch SW1. A second end of each of the first switches SW1 is coupled to a first output of the differential amplifier 620 (eg, a non-inverting output). The first end and the second end of the second switch SW2 are respectively coupled to the first input end and the first output end of the differential amplifier 620. The first end and the second end of the third switch SW3 are respectively coupled to the second end of the first switch SW1 and the common mode Press VCM. The first end and the second end of the fourth switch SW4 are respectively coupled to the second end of the first switch SW1 and the first output end of the differential amplifier 620.

第二電容C2的第一端與第二端分別耦接至放大器332的第二輸入端VIN_GA與差動放大器620的第二輸入端(例如,非反向輸入端)。第四電容C4的第一端耦接至差動放大器620的第二輸入端。第五開關SW5的第一端與第二端分別耦接至差動放大器620的第二輸入端與第二輸出端。第六開關SW6的第一端與第二端分別耦接至第四電容C4的第二端與共模電壓VCM。第七開關SW7的第一端與第二端分別耦接至第四電容C4的第二端與差動放大器620的第二輸出端(例如,反向輸出端)。 The first end and the second end of the second capacitor C2 are respectively coupled to the second input terminal VIN_GA of the amplifier 332 and the second input terminal (for example, the non-inverting input terminal) of the differential amplifier 620. The first end of the fourth capacitor C4 is coupled to the second input of the differential amplifier 620. The first end and the second end of the fifth switch SW5 are respectively coupled to the second input end and the second output end of the differential amplifier 620. The first end and the second end of the sixth switch SW6 are respectively coupled to the second end of the fourth capacitor C4 and the common mode voltage VCM. The first end and the second end of the seventh switch SW7 are respectively coupled to the second end of the fourth capacitor C4 and the second output end of the differential amplifier 620 (eg, the reverse output end).

在所述感測期間的第一期間(第一相位)T1,第二開關SW2、第三開關SW3、第五開關SW5與第六開關SW6為導通,而第四開關SW4與第七開關SW7為截止。於感測期間的第二期間(第二相位)T2,第二開關SW2、第三開關SW3、第五開關SW5與第六開關SW6為截止,而第四開關SW4與第七開關SW7為導通。差動放大器620輸出的電壓可以表示為以下方程式(1),其中Voffset表示差動放大器620的電壓偏移,而A表示差動放大器620的增益值。 During the first period (first phase) T1 of the sensing period, the second switch SW2, the third switch SW3, the fifth switch SW5, and the sixth switch SW6 are turned on, and the fourth switch SW4 and the seventh switch SW7 are cutoff. During the second period (second phase) T2 of the sensing period, the second switch SW2, the third switch SW3, the fifth switch SW5, and the sixth switch SW6 are turned off, and the fourth switch SW4 and the seventh switch SW7 are turned on. The voltage output by the differential amplifier 620 can be expressed as the following equation (1), where Voffset represents the voltage offset of the differential amplifier 620, and A represents the gain value of the differential amplifier 620.

值得注意的是,方程式(1)中的電容值C3是由多個第三電容C3所提供,因此若更多的第一開關SW1導通,表示有更多的第三電容C3並聯在一起,因此方程式(1)中的電容值C3會更大。相反地,若有第一開關SW1被截止,表示方程式(1)中的電容值C3會減少。請參照圖3與圖6,在此實施例中,當控制電路354要增加放大器332的增益時,控制電路354會截止至少一個第一開關SW1。相反地,當控制電路354要減少放大器332的增益時,控制電路354會導通至少一個第一開關SW1。換句話說,控制電路354是控制第一開關SW1的導通狀態來調整放大器332的增益。 It is worth noting that the capacitance value C3 in the equation (1) is provided by the plurality of third capacitors C3, so if more of the first switches SW1 are turned on, it means that more third capacitors C3 are connected in parallel, so The capacitance value C3 in equation (1) will be larger. Conversely, if the first switch SW1 is turned off, it means that the capacitance value C3 in the equation (1) is reduced. Referring to FIG. 3 and FIG. 6, in this embodiment, when the control circuit 354 is to increase the gain of the amplifier 332, the control circuit 354 turns off the at least one first switch SW1. Conversely, when control circuit 354 is to reduce the gain of amplifier 332, control circuit 354 turns on at least one first switch SW1. In other words, the control circuit 354 controls the conduction state of the first switch SW1 to adjust the gain of the amplifier 332.

圖7是根據一實施例繪示顯示面板的控制方法的流程圖。請參照圖7,在步驟S701中,在校正期間感測第一預設電壓與第二預設電壓,並由放大電路根據一增益放大第一預設電壓與第二預設電壓。在步驟S702中,由類比數位轉換器在校正期間將第一預設電壓轉換為第一數位碼,並將第二預設電壓轉換為第二數位碼。在步驟S703中,根據第一數位碼與第二數位碼調整放大電路的增益。然而,圖7中各步驟已詳細說明如上,在此便不再重覆各步驟的描述。值得注意的是,圖7中各步驟可以實作為多個程式碼或是電路,本發明並不在此限。此外,圖7的方法可以搭配以上實施例使用,也可以單獨使用。 FIG. 7 is a flow chart showing a control method of a display panel according to an embodiment. Referring to FIG. 7, in step S701, the first preset voltage and the second preset voltage are sensed during the correction, and the first preset voltage and the second preset voltage are amplified by the amplification circuit according to a gain. In step S702, the first predetermined voltage is converted into the first digital code by the analog digital converter during the correction, and the second predetermined voltage is converted into the second digital code. In step S703, the gain of the amplification circuit is adjusted according to the first digital code and the second digital code. However, the steps in Fig. 7 have been described in detail above, and the description of each step will not be repeated here. It should be noted that the steps in FIG. 7 can be implemented as multiple codes or circuits, and the present invention is not limited thereto. In addition, the method of FIG. 7 can be used in conjunction with the above embodiments, or can be used alone.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者, 在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art, The scope of the present invention is defined by the scope of the appended claims.

221‧‧‧資料線 221‧‧‧Information line

300‧‧‧校正電路 300‧‧‧correction circuit

310‧‧‧像素感測器 310‧‧‧pixel sensor

320‧‧‧校正感測器 320‧‧‧correction sensor

330‧‧‧放大電路 330‧‧‧Amplification circuit

331‧‧‧開關 331‧‧‧ switch

332‧‧‧放大器 332‧‧Amplifier

340‧‧‧類比數位轉換器 340‧‧‧ Analog Digital Converter

350‧‧‧增益調整電路 350‧‧‧Gain adjustment circuit

351、352‧‧‧暫存器 351, 352‧‧‧ register

353‧‧‧比較電路 353‧‧‧Comparative circuit

354‧‧‧控制電路 354‧‧‧Control circuit

V1‧‧‧第一預設電壓 V1‧‧‧ first preset voltage

VCM‧‧‧共模電壓 VCM‧‧‧ Common mode voltage

V2‧‧‧第二預設電壓 V2‧‧‧second preset voltage

Claims (10)

一種顯示面板的校正電路,該顯示面板包括一像素電路,該像素電路包括一驅動電晶體,該校正電路包括:一像素感測器,其輸入端經由該顯示面板的一資料線耦接至該像素電路,用以在一感測期間感測該驅動電晶體的一端點電壓;至少一校正感測器,其輸入端耦接至一第一預設電壓與一第二預設電壓;一放大電路,其輸入端耦接至該像素感測器與該至少一校正感測器,用以在該感測期間根據一增益放大該端點電壓,並於一校正期間根據該增益放大該第一預設電壓與該第二預設電壓;一類比數位轉換器,其輸入端耦接至該放大電路的輸出端,用以在該感測期間將放大後的該端點電壓轉換為數位碼,並在該校正期間將放大後的該第一預設電壓轉換為一第一數位碼,將放大後的該第二預設電壓轉換為一第二數位碼;以及一增益調整電路,耦接至該類比數位轉換器的輸出端與該放大電路,用以根據該第一數位碼與該第二數位碼調整該放大電路的該增益。 A correction circuit for a display panel, the display panel includes a pixel circuit, the pixel circuit includes a driving transistor, and the correction circuit includes: a pixel sensor, wherein the input end is coupled to the data line via the data line of the display panel a pixel circuit for sensing an end voltage of the driving transistor during a sensing period; at least one correction sensor having an input coupled to a first predetermined voltage and a second predetermined voltage; a circuit having an input coupled to the pixel sensor and the at least one correction sensor for amplifying the terminal voltage according to a gain during the sensing, and amplifying the first according to the gain during a correction a preset voltage and the second preset voltage; an analog-to-digital converter having an input coupled to the output of the amplifier circuit for converting the amplified terminal voltage into a digital code during the sensing period And converting the amplified first preset voltage into a first digit code during the calibration, converting the amplified second preset voltage into a second digit code; and a gain adjustment circuit coupled to the The analogy Bit converter output terminal of the amplifying circuit for amplifying the gain of the circuit according to the first digit and the second digit code code adjustments. 如申請專利範圍第1項所述之校正電路,其中該增益調整電路包括:一第一暫存器,用以儲存該第一數位碼;一第二暫存器,用以儲存該第二數位碼;一比較電路,其輸入端耦接至該第一暫存器與該第二暫存器,用以計算該第一數位碼與該第二數位碼之間的第一差;以及一控制電路,用以根據該第一差調整該放大電路的該增益。 The calibration circuit of claim 1, wherein the gain adjustment circuit comprises: a first register for storing the first digit code; and a second register for storing the second digit a comparison circuit, wherein the input end is coupled to the first temporary register and the second temporary register to calculate a first difference between the first digital code and the second digital code; and a control And a circuit for adjusting the gain of the amplifying circuit according to the first difference. 如申請專利範圍第2項所述之校正電路,其中若該第一差小於一預設門檻值,該控制電路用以增加該放大電路的該增益,若該第一差大於該預設門檻值,該控制電路用以減少該放大電路的該增益。 The calibration circuit of claim 2, wherein the control circuit is configured to increase the gain of the amplifying circuit if the first difference is less than a predetermined threshold, if the first difference is greater than the preset threshold The control circuit is for reducing the gain of the amplifying circuit. 如申請專利範圍第3項所述之校正電路,在該控制電路調整該放大電路的該增益以後,該放大電路根據調整後的該增益放大該第一預設電壓與該第二預設電壓,並且該類比數位轉換器重新產生該第一數位碼與該第二數位碼,該比較電路計算重新產生的該第一數位碼與重新產生的該第二數位碼之間的一第二差, 若該第一差小於該預設門檻值且該第二差大於等於該預設門檻值,或是該第一差大於等於該預設門檻值且該第二差小於該預設門檻值,該控制電路停止調整該放大電路的該增益。 The calibration circuit of claim 3, after the control circuit adjusts the gain of the amplifying circuit, the amplifying circuit amplifies the first preset voltage and the second preset voltage according to the adjusted gain, And the analog-to-digital converter regenerates the first digit code and the second digit code, and the comparing circuit calculates a second difference between the regenerated first digit code and the regenerated second digit code. If the first difference is less than the preset threshold and the second difference is greater than or equal to the preset threshold, or the first difference is greater than or equal to the preset threshold and the second difference is less than the preset threshold, The control circuit stops adjusting the gain of the amplifying circuit. 如申請專利範圍第4項所述之校正電路,其中該第一預設電壓實質上為該放大電路的一輸入轉換範圍的25%,該第二預設電壓實質上為該輸入轉換範圍的75%。 The calibration circuit of claim 4, wherein the first predetermined voltage is substantially 25% of an input conversion range of the amplification circuit, and the second predetermined voltage is substantially 75 of the input conversion range. %. 如申請專利範圍第1項所述之校正電路,其中該放大電路包括:一開關,耦接至該像素感測器與該至少一校正感測器;以及一放大器,耦接至該開關,其中該開關在該感測期間將該像素感測器耦接至該放大器,並且在該校正期間將該至少一校正感測器耦接至該放大器,該放大器包括:一差動放大器,其一第一輸入端與一第二輸入端分別耦接至該至少一校正感測器的一第一輸出端與一第二輸出端;一第一電容,其一第一端與一第二端分別耦接至該至少一校正感測器的該第一輸出端與該差動放大器的該第一輸入端;一第二電容,其一第一端與一第二端分別耦接至該至少 一校正感測器的該第二輸出端與該差動放大器的該第二輸入端;多個第三電容調整電路,每一該些第三電容調整電路包括一第三電容與一第一開關,每一該些第三電容的第一端耦接至該差動放大器的該第一輸入端,每一該些第三電容的第二端耦接至該第一開關的第一端,每一該些第一開關的第二端耦接至該差動放大器的第一輸出端;一第四電容,其一第一端耦接至該差動放大器的該第二輸入端;一第二開關,其第一端與第二端分別耦接至該差動放大器的該第一輸入端與該差動放大器的該第一輸出端;一第三開關,其第一端與第二端分別耦接至該些第一開關的多個第二端與一共模電壓;一第四開關,其第一端與第二端分別耦接至該些第一開關的該些第二端與該差動放大器的該第一輸出端;一第五開關,其第一端與第二端分別耦接至該差動放大器的該第二輸入端與該差動放大器的第二輸出端;一第六開關,其第一端與第二端分別耦接至該第四電容的第二端與該共模電壓;以及一第七開關,其第一端與第二端分別耦接至該第四電容的該第二端與該差動放大器的該第二輸出端, 其中該增益調整電路用以控制該些第一開關以調整該放大電路的該增益。 The calibration circuit of claim 1, wherein the amplifying circuit comprises: a switch coupled to the pixel sensor and the at least one correction sensor; and an amplifier coupled to the switch, wherein The switch couples the pixel sensor to the amplifier during the sensing, and couples the at least one correction sensor to the amplifier during the calibration, the amplifier comprising: a differential amplifier, a first An input terminal and a second input end are respectively coupled to a first output end and a second output end of the at least one correction sensor; a first capacitor coupled to the first end and the second end Connected to the first output end of the at least one correction sensor and the first input end of the differential amplifier; a second capacitor, a first end and a second end are respectively coupled to the at least one a second output end of the correction sensor and the second input end of the differential amplifier; a plurality of third capacitance adjustment circuits, each of the third capacitance adjustment circuits including a third capacitor and a first switch The first end of each of the third capacitors is coupled to the first input end of the differential amplifier, and the second end of each of the third capacitors is coupled to the first end of the first switch, each a second end of the first switch is coupled to the first output end of the differential amplifier; a fourth end of the fourth capacitor is coupled to the second input end of the differential amplifier; a switch having a first end and a second end coupled to the first input end of the differential amplifier and the first output end of the differential amplifier; a third switch having a first end and a second end respectively a plurality of second ends coupled to the first switches and a common mode voltage; a fourth switch having a first end and a second end coupled to the second ends of the first switches and the difference a first output end of the dynamic amplifier; a fifth switch having a first end and a second end coupled to the differential amplifier respectively a second input end and a second output end of the differential amplifier; a sixth switch, wherein the first end and the second end are respectively coupled to the second end of the fourth capacitor and the common mode voltage; and a seventh switch The first end and the second end are respectively coupled to the second end of the fourth capacitor and the second output end of the differential amplifier, The gain adjustment circuit is configured to control the first switches to adjust the gain of the amplification circuit. 一種顯示面板的校正方法,該顯示面板包括一像素電路,該像素電路包括一驅動電晶體,該驅動電晶體的一端點電壓在一感測期間被一像素感測器所感測,該像素感測器的輸出端耦接至一放大電路,該放大電路的輸出端耦接至一類比數位轉換器,該校正方法包括:在一校正期間感測一第一預設電壓與一第二預設電壓,並由該放大電路根據一增益放大該第一預設電壓與該第二預設電壓;由該類比數位轉換器在該校正期間將該第一預設電壓轉換為一第一數位碼,並將該第二預設電壓轉換為一第二數位碼;以及根據該第一數位碼與該第二數位碼調整該放大電路的該增益。 A method for correcting a display panel, the display panel comprising a pixel circuit, the pixel circuit comprising a driving transistor, an end voltage of the driving transistor being sensed by a pixel sensor during a sensing period, the pixel sensing The output of the amplifier is coupled to an amplifier circuit, and the output of the amplifier is coupled to an analog converter. The calibration method includes: sensing a first preset voltage and a second preset voltage during a calibration period. And the amplification circuit amplifies the first preset voltage and the second preset voltage according to a gain; the analog digital converter converts the first preset voltage into a first digital code during the calibration, and Converting the second predetermined voltage into a second digit code; and adjusting the gain of the amplifying circuit according to the first digit code and the second digit code. 如申請專利範圍第7項所述之校正方法,其中根據該第一數位碼與該第二數位碼調整該放大電路的該增益的步驟包括:計算該第一數位碼與該第二數位碼之間的第一差;若該第一差小於一預設門檻值,增加該放大電路的該增益;以及 若該第一差大於等於該預設門檻值,減少該放大電路的該增益。 The method of claim 7, wherein the step of adjusting the gain of the amplifying circuit according to the first digit code and the second digit code comprises: calculating the first digit code and the second digit code a first difference between the two; if the first difference is less than a predetermined threshold, increasing the gain of the amplifying circuit; If the first difference is greater than or equal to the preset threshold, the gain of the amplifying circuit is reduced. 如申請專利範圍第8項所述之校正方法,更包括:在調整該放大電路的該增益以後,由該放大電路根據調整後的該增益放大該第一預設電壓與該第二預設電壓,並且由該類比數位轉換器重新產生該第一數位碼與該第二數位碼;計算重新產生的該第一數位碼與重新產生的該第二數位碼之間的一第二差;以及若該第一差小於該預設門檻值且該第二差大於該預設門檻值,或是該第一差大於等於該預設門檻值且該第二差小於該預設門檻值,停止調整該放大電路的該增益。 The calibration method of claim 8, further comprising: after adjusting the gain of the amplifying circuit, the amplifying circuit amplifies the first preset voltage and the second preset voltage according to the adjusted gain And regenerating the first digit code and the second digit code by the analog to digital converter; calculating a second difference between the regenerated first digit code and the regenerated second digit code; The first difference is less than the preset threshold and the second difference is greater than the preset threshold, or the first difference is greater than or equal to the preset threshold and the second difference is less than the preset threshold, and the adjustment is stopped. This gain of the amplifier circuit. 如申請專利範圍第9項所述之校正方法,該第一預設電壓為該類比數位轉換器的一輸入轉換範圍的25%,該第二預設電壓為該輸入轉換範圍的75%。 The calibration method of claim 9, wherein the first predetermined voltage is 25% of an input conversion range of the analog-to-digital converter, and the second predetermined voltage is 75% of the input conversion range.
TW104115899A 2015-05-19 2015-05-19 Calibrating circuit and calibrating method for display panel TWI543140B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW104115899A TWI543140B (en) 2015-05-19 2015-05-19 Calibrating circuit and calibrating method for display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW104115899A TWI543140B (en) 2015-05-19 2015-05-19 Calibrating circuit and calibrating method for display panel

Publications (2)

Publication Number Publication Date
TWI543140B true TWI543140B (en) 2016-07-21
TW201642238A TW201642238A (en) 2016-12-01

Family

ID=56997221

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104115899A TWI543140B (en) 2015-05-19 2015-05-19 Calibrating circuit and calibrating method for display panel

Country Status (1)

Country Link
TW (1) TWI543140B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102552033B1 (en) * 2018-12-26 2023-07-05 주식회사 엘엑스세미콘 Dmura compensation driver

Also Published As

Publication number Publication date
TW201642238A (en) 2016-12-01

Similar Documents

Publication Publication Date Title
US9542873B2 (en) Organic light emitting display for sensing electrical characteristics of driving element
JP6144250B2 (en) Organic light-emitting display device capable of compensating for deviations in electrical characteristics of drive elements
KR102627275B1 (en) Organic Light Emitting Display Device
EP3176774B1 (en) Organic light-emitting display comprising a current integrator
KR101549343B1 (en) Organic Light Emitting Display For Sensing Electrical Characteristics Of Driving Element
CN108074524B (en) Driver integrated circuit and display device including the same
KR101560492B1 (en) Organic Light Emitting Display For Sensing Electrical Characteristics Of Driving Element
JP5361825B2 (en) Display device and driving method thereof
KR20180014389A (en) Organic Light Emitting Display and Sensing Method thereof
TW201423701A (en) Error compensator and organic light emitting display device using the same
CN107293239A (en) Current sense type sensing unit and the OLED including the sensing unit
WO2014108879A1 (en) Driving scheme for emissive displays providing compensation for driving transistor variations
CN107564463B (en) Calibration apparatus and method and organic light emitting display including the same
KR102520694B1 (en) Organic Light Emitting Display And Degradation Compensation Method of The Same
KR101947806B1 (en) Organic Light Emitting Diode Display And Driving Method Thereof
TWI530931B (en) Sensing apparatus of display panel
US9754534B2 (en) Calibrating circuit and calibrating method for display panel
KR20170080775A (en) Organic light emitting diode display and driving method thereby
KR102431112B1 (en) Organic light emitting diode display and calibration method thereby
KR102444312B1 (en) Organic light emitting diode display device and method for driving the same
TWI543140B (en) Calibrating circuit and calibrating method for display panel
KR102311482B1 (en) Organic light emitting display device
KR20170070925A (en) Organic light emitting diode display and driving method of the same
US11568826B2 (en) Electroluminescence display apparatus and driving method thereof
KR20210080105A (en) Pixel Sensing Device And Electroluminescence Display Device Including The Same