TWI542049B - 發光晶片組合 - Google Patents

發光晶片組合 Download PDF

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TWI542049B
TWI542049B TW101149094A TW101149094A TWI542049B TW I542049 B TWI542049 B TW I542049B TW 101149094 A TW101149094 A TW 101149094A TW 101149094 A TW101149094 A TW 101149094A TW I542049 B TWI542049 B TW I542049B
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substrate
conductive
wafer
semiconductor layer
layer
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TW101149094A
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TW201427112A (zh
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賴志成
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鴻海精密工業股份有限公司
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Priority to US13/936,359 priority patent/US20140175498A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Description

發光晶片組合
本發明涉及一種晶片組合，特別是指一種發光晶片組合。
發光二極體作為新興的光源，已被廣泛地應用於各種用途當中。發光二極體通常包括基座、安裝於基座上的晶片及覆蓋晶片的封裝體。晶片由基板及依次生長於基板上的N型半導體層、發光層及P型半導體層組成。晶片還會分別在其N型半導體層及P型半導體層上形成P電極及N電極，以與基座電連接。當前，有部分晶片是直接採用導電材料來製造其基板的，業界通常稱之為垂直導通型晶片。此種晶片的基板可直接作為N型半導體層的電極使用，因而此種晶片僅會在其P型半導體層的頂部形成P電極。工作時，電流從P電極進入晶片內，並經由基板輸出至基座。
然而，此種垂直導通型晶片的P電極往往是僅覆蓋住P型半導體層的頂部的中間區域，導致電流在晶片內傳輸時也趨向於集中在晶片的中部，晶片兩側區域的電流則較少。由此，電流在晶片內的分佈出現中間多兩側少的情況，致使晶片中部區域受電流所激發的光線要多於晶片兩側區域受電流所激發的光線，使晶片無法均勻地發光。此種情況在大面積的晶片當中更為明顯，嚴重影響到晶片的正常使用。
因此，有必要提供一種具有均勻光輸出的發光晶片組合。
一種發光晶片組合，包括導電基板、與導電基板電連接並依次堆疊的第一半導體層、發光層、第二半導體層及電極，基板包括多個電流壁障，這些電流壁障的密度及尺寸中的至少一個從對應電極的位置處朝向基板的周邊減小。
由於電流壁障的密度或尺寸從對應電極的位置處朝向基板的周邊減小，因此從電極進入晶片內的電流在電流壁障的阻擋下會向晶片周邊擴散，從而在晶片內分佈均勻。分佈均勻的電流進而激發發光層發出均勻的光線，使晶片獲得理想的出光效果。
10‧‧‧發光晶片組合
20‧‧‧基板
22‧‧‧導通部
24‧‧‧電流壁障
26‧‧‧第一導電層
28‧‧‧第二導電層
29‧‧‧絕緣層
30‧‧‧晶片
32‧‧‧基板
320‧‧‧凹槽
34‧‧‧第一半導體層
36‧‧‧發光層
38‧‧‧第二半導體層
39‧‧‧電極
40‧‧‧導線
圖1示出本發明第一實施例的發光晶片組合。
圖2示出本發明第二實施例的發光晶片組合。
圖3示出本發明第三實施例的發光晶片組合。
圖4示出本發明第四實施例的發光晶片組合。
請參閱圖1，示出了本發明第一實施例的發光晶片組合10。發光晶片組合10包括一基板20及固定於基板20上的晶片30。
晶片30包括基板32、依次形成於基板32上的第一半導體層34、發光層36、第二半導體層38及電極39。本實施例中，基板32是由導電的材料製成，比如矽、碳化矽或者金屬材料。當基板32採用矽或碳化矽製造時，第一半導體層34、發光層36及第二半導體層38可直接生長於基板32上。此時第一半導體層34為N型半導體層，第二半導體層38為P型半導體層。當基板32採用金屬材料製造時 ，第二半導體層38、發光層36及第一半導體層34是先依次生長在一暫時基板(圖未示)上，然後再在第一半導體層34上形成金屬基板32，最後將暫時基板移除。此時第一半導體層34為P型半導體層，第二半導體層38為N型半導體層。第一半導體層34、發光層36及第二半導體層38均可採用諸如氮化鎵、氮化銦鎵及氮化鋁銦鎵等發光材料製成。電極39的面積小於第二半導體層38的面積。電極39僅覆蓋住第二半導體層38頂面的中部區域而使第二半導體層38頂面的相對兩側暴露在外。
晶片30通過黏膠或共晶接合的方式固定於基板20頂面。基板20由諸如環氧樹脂、矽膠或陶瓷等絕緣材料製成，其內部形成有多個導通部22。每一導通部22均由金屬材料製成。當基板20由環氧樹脂或矽膠製造時，這些導通部22可預先通過定位工具定位，然後基板20通過射入成型等方式形成於導通部22上。當基板20由陶瓷製造時，這些導通部22可與陶瓷薄片通過低溫共燒陶瓷技術一同成型。這些導通部22均位於晶片30的正下方，且每一導通部22均從基板20頂面延伸至基板20底面。本實施例中，每一導通部22的尺寸均相同，且導通部22的分佈密度從對應晶片30電極39位置處朝向基板20周邊位置處逐漸減小。每二相鄰的導通部22之間形成一電流壁障24。由於導通部22的尺寸相同且排列密度從中間向兩側逐漸減小，因而由導通部22所定義出的電流壁障24的排列密度保持不變，但尺寸從中間(即對應晶片30電極39位置處)向兩側(即對應基板20周邊位置處)逐漸減小。
基板20在其頂面及底面分別形成第一導電層26及第二導電層28。第一導電層26與晶片30隔開，並通過一導線40與晶片30頂部的電 極39連接。第二導電層28連接所有導通部22的底面。由此，晶片30的電極39與第一導電層26電連接，晶片30的基板32與第二導電層28電連接。電流可經由第一導電層26從電極39輸入進晶片30內(以第一半導體層34為N型半導體層為例)，然後再通過導通部22從第二導電層28輸出。在傳輸過程中，由於電流壁障24的尺寸從中間到兩側逐漸減小，因而從電極39進入晶片30的電流將受到電流壁障24的阻礙而從晶片30中部向兩側分散，從而均勻地流過晶片30。因此，在均勻分佈的電流激發下，晶片30可發出均勻的光線，從而得到理想的出光效果。
可以理解地，如圖2所示，上述基板20的電流壁障24的尺寸也可保持相同，但排布密度從中間(即對應晶片30電極39位置處)向兩側(即對應基板20周邊位置處)逐漸減小，同樣可起到均化電流的作用。當然，電流壁障24的尺寸及排布密度也可同時發生變化，即從對應晶片30電極39位置處朝向晶片第一半導體層34周邊均逐漸減小，以起到更強的均化電流的效果。
還可以理解地，晶片30自身的基板32也可以形成相應的電流壁障來對電流進行擴散。如圖3所示，基板32下表面通過蝕刻等方式形成多個作為電流壁障的凹槽320。這些凹槽320的尺寸相同，但分佈密度從對應電極39的位置處朝向對應基板32周邊的位置處逐漸減小。凹槽320的此種排列方式可起到阻礙電流的作用，使電流從晶片30中間向兩側分散，從而使晶片30發出均勻的光線。當然，也可通過控制蝕刻條件(如蝕刻時間、蝕刻液的濃度等等)來使凹槽320的尺寸從對應電極39的位置處朝向對應基板32周邊的位置處逐漸減小，而排列密度保持不變，或者是尺寸及排列密度 均從對應電極39的位置處朝向對應基板32周邊的位置處逐漸減小。此種情況下承載晶片30的基板20就可直接採用導電的金屬材料製造，但須通過絕緣層29與第一導電層26保持絕緣，以防止短路的情況發生。
還可以理解地，圖3的晶片30自身的基板32可與圖1的承載晶片30的基板20結合使用，從而共同形成如圖4所示的雙重電流壁障24，以起到更強的電流擴散效果。
綜上所述，本發明符合發明專利要件，爰依法提出專利申請。惟，以上所述者僅為本發明之較佳實施例，舉凡熟悉本案技藝之人士，在爰依本發明精神所作之等效修飾或變化，皆應涵蓋於以下之申請專利範圍內。
10‧‧‧發光晶片組合
20‧‧‧基板
22‧‧‧導通部
24‧‧‧電流壁障
26‧‧‧第一導電層
28‧‧‧第二導電層
30‧‧‧晶片
32‧‧‧基板
34‧‧‧第一半導體層
36‧‧‧發光層
38‧‧‧第二半導體層
39‧‧‧電極
40‧‧‧導線

Claims (7)

  1. 一種發光晶片組合，包括導電基板、與基板電連接並依次堆疊的第一半導體層、發光層、第二半導體層及電極，其改良在於：基板包括多個電流壁障，電流壁障的排布密度及尺寸中的至少一個從基板上對應電極的位置處朝向基板周邊減小，其中基板直接與第一半導體層連接，基板由導電材料製成，電流壁障為形成於基板遠離發光層的表面的凹槽，所述發光晶片組合還包括承載基板的另一基板，凹槽位於基板與另一基板的接合處。
  2. 如申請專利範圍第1項所述之發光晶片組合，其中基板通過另一基板與第一半導體層連接。
  3. 如申請專利範圍第2項所述之發光晶片組合，其中基板由絕緣材料製成，基板內部形成多個導通部，相鄰導通部之間形成電流壁障。
  4. 如申請專利範圍第3項所述之發光晶片組合，其中基板包括第一表面及與第一表面相對的第二表面，導通部從第一表面貫穿基板延伸至第二表面。
  5. 如申請專利範圍第4項所述之發光晶片組合，其中另一基板接合於基板第一表面上對應導通部的位置處並與導通部連接。
  6. 如申請專利範圍第5項所述之發光晶片組合，其中還包括在基板第一表面上形成的第一導電層及在基板第二表面上形成的第二導電層，第一導電層與另一基板隔開，第二導電層連接導通部。
  7. 如申請專利範圍第6項所述之發光晶片組合，其中電極通過導線與第一導電層連接。
TW101149094A 2012-12-21 2012-12-21 發光晶片組合 TWI542049B (zh)

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