TWI539174B - A method for in-circuit test - Google Patents

Description

Internal circuit test method

The invention relates to the field of testing, and in particular to an internal circuit testing method.

In-Circuit Test (ICT) is used in the manufacturing process of printed circuit boards (PCBs) by electrical and electrical connections to components on the board such as resistors, capacitors, inductors, and diodes. A standard test method for testing to detect manufacturing defects and component defects can clearly indicate the location of the defect, greatly improving the inspection efficiency and product quality of the defective product. SFIS (Shop Floor Integrated System) can realize the monitoring of production process and production quality. For example, SFIS can use the surrounding inquiry system to find out the input and output defect rate, yield, error quantity, etc. Personnel do not need to use calculators, statistical tables, etc. to count the data, greatly reducing the cost of human and material resources.

At present, the operator uses the reading gun to read the barcode on the single-chip board to be tested, and the data acquirer receives the barcode and transmits it to the server confirmation barcode in the production line, and then transmits it to the ICT and the test software. Finally, the test results are transmitted to SFIS.

The Chinese patent (CN 101782615) discloses an SFIS pre-reading method for an ICT test station, which uses a code reading gun to read a bar code, and the DLICLient.dll file in the test software of the ICT tester transmits the bar code transmitted by the code reading gun. After pre-existing, after the ICT tester is tested, the DLICTL.inet.dll file integrates the test results with the barcode and returns it to SFIS. The pre-stored barcode identifier For the current test state, and passed to the ICT test software, waiting for the test results, repeat the above process, which uses the operator's test waiting time to perform pre-reading code, thereby saving reading time and improving production efficiency.

Although the above patent can save the operator time to repeatedly scan the barcode, the test method of inserting the ICT into a single chip board can only test one single circuit board at a time, and the operator must pay heavy each time. Handling and placing a single board is still cumbersome and time consuming.

In view of the above problems, the present invention changes the traditional ICT test mode, and changes the single-chip board test to the multi-piece circuit board test, which improves the test efficiency while increasing the productivity and saving labor costs.

The technical solution provided by the present invention is as follows:

An internal circuit testing method comprising the steps of: preparing a test carrier for testing a multi-piece circuit board; mounting a multi-piece circuit board on the test carrier; and extracting the multi-piece circuit board The plurality of single-chip boards respectively corresponding to the plurality of identification information and integrated into a information label; the information label is attached to the test vehicle; and the information label is scanned, and the identification is decomposed into the plurality of identification information; The multi-piece circuit board is tested according to the identification information, and the test result is automatically uploaded and displayed.

Preferably, the multi-piece circuit board comprises 16 single-chip boards.

The identification information includes an information format that distinguishes a plurality of single-chip boards in the multi-connected circuit board.

Preferably, the plurality of slabs are sequentially connected by automatic optical detection A plurality of pieces of identification information corresponding to the plurality of single-chip boards are integrated into one information label.

Preferably, the information tag is attached to one side of the multi-piece circuit board in the test carrier.

The internal circuit testing method provided by the present invention has the following beneficial effects as compared with the prior art:

1. By pasting the label information on the test carrier of the multi-connected circuit board, in the ICT test, the multi-piece circuit board to be tested is automatically identified by scanning the label information on the test vehicle, thereby realizing the multi-connected circuit board. Synchronous test.

2. Different from the traditional single information uploading method, the present invention can distinguish the label information of different single-chip boards in the multi-connected circuit board from being synchronously uploaded to the SFIS.

3. Improve test efficiency while increasing production capacity and saving labor costs.

S110~S160‧‧‧Steps

The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

FIG. 1 is a schematic flow chart of an ICT test method for uploading SFIS by label information in the present invention.

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the present invention will be specifically described below in conjunction with the accompanying drawings and embodiments. The drawings in the following description are merely one embodiment of the present invention. Other drawings may also be obtained from those of ordinary skill in the art in view of the drawings.

FIG. 1 is a schematic flowchart of an ICT (In-Circuit Test) test method for uploading an SFIS (Shop Floor Integrated System) in a label information manner according to the present invention, which specifically includes the following steps: Step S110 prepares a test carrier for testing the multi-piece circuit board; step S120 installs the multi-piece circuit board onto the test carrier; and step S130 extracts a plurality of single-chips in the multi-connected circuit board Each of the plurality of identification information corresponding to the circuit board is integrated into a information label; step S140 attaches the information label to the test vehicle; step S150 scans the information label, and the identification is decomposed into the plurality of identification information; Step S160 tests the multi-connected circuit board according to the identification information, automatically uploads the test result and displays it.

In the embodiment of the present invention, preferably, in steps S110 and S120, the corresponding ICT test carriers are first prepared according to the models used in the actual application, and specifically, each of the models prepares its corresponding test carrier. The multi-connected circuit board includes 16 single-chip boards. The invention breaks through the traditional test mode of the ICT monolithic circuit board, and provides a test method for the entire production line of SMT (Surface Mount Technology), wherein the whole production line includes 16 single-chip boards. In the practical application, the invention can realize the test of the one-time 16-chip single-chip board, greatly improving the efficiency and productivity of the test, and saving man-hours, for example, the time of the single-chip board test (including the single piece) The time for picking and dropping the circuit board is 16.5 s/pcs, and the test time of the entire production line (including the pick-and-place time of the multi-connected circuit board) of the present invention is 50.5 s/pcs, which can be calculated, each single piece The board time is 50.5/16=3.2s/pcs, and the saved man-hour is 13.3s/pcs. In particular, the present invention does not limit the number of single-chip boards included in the multi-piece circuit board, as long as the number thereof satisfies the capacity of the one-time test of the ICT test equipment, and is included in the present invention. , the more the number of single-chip boards included in the multi-connected board, the more The more work time saved, the higher the test efficiency.

In the embodiment of the present invention, preferably, in step S130, the identification information corresponding to all the single-chip boards on the entire production line is sequentially connected by AOI (Automatic Optic Inspection), and the identification information is automatically automatically Integrated as a news tag, replacing the manual integration of working hours, such as integrating 16 pieces of identification information of 16 single-chip boards on the entire production line into one information tag, that is, the above information tag, thereby achieving the entire test In the process of production line, the operation of picking up and scanning and scanning the label, which was originally operated 16 times, is improved to only one pick-and-place and scan information label, which greatly saves the operator's pick-and-place and scanning man-hours. Further, the conventional ICT test label format output after the multi-chip board does not distinguish the multi-piece board, and thus in the present invention, in order to distinguish the information of the single board, the single board The format of the identification information has been specially improved. For example, the label information format of the conventional single-chip board is ICT07, 2047, 4711-001232-31, US5532T20S0134QD04FJ02, 20130430, 160409, P, 0, 1, M000324, FFPFPPPPPNNN, 1 , F, 3, in the present invention, in order to facilitate the distinction between single-chip board information, the identification information format is improved to: ICT01, 41, 4711-002142-31, US5542T28S103BJD00AC01, 20131120, 034331, P, 0, 1, M000816, PPPPPPPPPNNN, 1, 16, PPPPPPPPPPPPPPPP, .... In particular, the present invention does not specifically limit the identification information, as long as its information format can distinguish single-chip information, and is included in the present invention.

In the embodiment of the present invention, preferably, in step S140, the information label is attached to one side of the test carrier and the multi-piece circuit board is placed to facilitate scanning by the operator and reading of the AOI.

In the embodiment of the present invention, preferably, in step S150, the corresponding test program of the ICT decomposes the received second tag information into the third tag information corresponding to the identification information, and in the test program, the decomposed The three-tag information can be in one-to-one correspondence with the multi-piece board.

In the embodiment of the present invention, preferably, in step S160, the ICT tests the multi-connected circuit boards one by one, and the test program automatically tests in turn, and then uploads the test results to the SFIS. Since the information label can identify and distinguish the single-chip board information corresponding to the detected program, there is no confusion in the detection process, and the detection result is in one-to-one correspondence with the single-chip board, wherein the test result includes OK and NG, OK means the test passed, and NG means the test result is bad. Finally, the test results are displayed on the display.

In summary, the internal circuit testing method provided by the embodiment of the present invention, by pasting a test label on a multi-connected circuit board, can identify the information label of the single-chip board in the multi-connection piece, in the ICT test. By scanning the label information on the test vehicle, the single-chip board in the multi-connected circuit board to be tested can be automatically identified, and no confusion occurs during the detection process, thereby realizing the synchronous test of the multi-connected circuit board. The test results are in one-to-one correspondence with the single-chip board, and the automatic uploading test results are realized, the test efficiency is improved, the productivity is increased, and the labor cost is saved.

The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention. Any modifications, equivalents, improvements, etc., which are included in the spirit and principles of the present invention, should be included in the protection of the present invention. Within the scope.

S110~S160‧‧‧Steps

Claims (5)

An internal circuit testing method, comprising the steps of: preparing a test carrier for testing a multi-piece circuit board; mounting a multi-piece circuit board on the test carrier; extracting the multi-connection a plurality of pieces of identification information corresponding to the plurality of single-chip boards in the circuit board are integrated into one information label; the information label is attached to the test vehicle; and the information label is scanned, and the identification is decomposed into the plurality of information labels According to the identification information, the multi-connected circuit board is tested, and the test result is automatically uploaded and displayed. The internal circuit testing method according to claim 1, wherein said multi-piece circuit board comprises 16 single-chip boards. The internal circuit testing method according to claim 1, wherein the identification information comprises an information format for distinguishing a plurality of single-chip boards in the multi-connected circuit board. The internal circuit testing method according to claim 1, wherein a plurality of identification information corresponding to the plurality of single-chip boards in the multi-connected circuit board are sequentially connected and integrated into an information label by automatic optical detection. . The internal circuit testing method according to claim 1, wherein the information tag is attached to one side of the multi-piece circuit board in the test carrier.