TWI527098B - Termination structure for superjunction power device and manufacturing method thereof - Google Patents

Description

Pressure end termination structure of super junction power component and manufacturing method thereof

The invention relates to a pressure termination structure of a super junction power component and a manufacturing method thereof, in particular to a pressure termination structure capable of improving the withstand voltage of a breakdown voltage of a super junction power component. .

In the development of conventional power semiconductor components, how to obtain a high breakdown voltage and reduce on-resistance has been the key to the development of power semiconductor components. In recent years, with the concept of super junction, the super junction structure with high doping concentration can effectively improve the relationship between breakdown voltage and on-resistance, and can break through the silicon-limit. Therefore, many The structure of power semiconductor components combined with super junctions has emerged.

Super junction power semiconductor components are commonly used in switching components, and their types include insulated gate bipolar transistors (IGBTs) and metal-oxide-semiconductor field effect transistors (MOSFETs). . The main design of the super junction is to alternately design a P-type epitaxial layer and an N-type epitaxial layer to form a plurality of PN junctions perpendicular to the substrate.

In the conventional method for manufacturing a super junction power galvanic half field effect transistor, there are two main methods, the first one is a multiple epitaxial growth method, and the second is a trench filling method. However, manufacturing techniques for fabricating a super junction structure in a gold oxide half field effect transistor to increase breakdown voltage and reduce on-resistance still face many manufacturing difficulties.

In view of the above-mentioned problems of the prior art, it is an object of the present invention to provide a withstand voltage termination structure of a super junction power device to improve the withstand voltage capability of the breakdown voltage of the super junction power device.

The voltage termination structure of the super junction power device comprises at least a substrate having a first conductivity type; an epitaxial layer having a first conductivity type on the substrate; a plurality of trenches in the epitaxial layer, wherein the plurality of trenches The spacing between the slots is increasing toward the outside of the super junction power component; the plurality of first doped regions having the first conductivity type are located in the epitaxial layer and adjacent to the bottoms of the plurality of trenches respectively; a plurality of second doped regions of a conductivity type, located in the epitaxial layer and adjacent to sidewalls of the plurality of trenches; a plurality of first oxide layers in the plurality of trenches; and a plurality of layers on the epitaxial layer a gate conductive layer; and a second oxide layer covering the plurality of gate conductive layers.

According to another object of the present invention, a method for fabricating a withstand voltage termination structure of a super junction power device includes providing a substrate having a first conductivity type, and forming a first epitaxial layer having a first conductivity type on the substrate; Forming a plurality of first doped regions having a first conductivity type in a portion of the first epitaxial layer; forming a second epitaxial layer having a first conductivity type on the first epitaxial layer; forming a plurality of trenches in the first In the two epitaxial layers, the bottoms of the plurality of trenches respectively adjoin the plurality of first doped regions, wherein a plurality of trenches are inclined toward the outside of the super junction power device; forming a second conductive a plurality of second doped regions of the type are in the second epitaxial layer, and the plurality of second doped regions respectively adjoin the sidewalls of the plurality of trenches; forming a plurality of first oxide layers in the plurality of trenches; forming a plurality A gate conductive layer is on the second epitaxial layer; and a second oxide layer is formed to cover the plurality of gate conductive layers.

The plurality of first doped regions and the plurality of second doped regions are formed by ion implantation. Therefore, by forming a plurality of first doped regions having a first conductivity type, compensation can be made to multiple implantations of a plurality of trenches to form a plurality of second doped regions having a second conductivity type. The high concentration of dopants accumulated at the bottom of the trench increases the breakdown voltage of the super junction power device.

In addition, the manufacturing method further includes forming a screen oxide layer on sidewalls of the plurality of trenches before forming the plurality of second doped regions, and removing the shield oxide layer after forming the plurality of second doped regions. By shielding the oxide layer, the diffusion efficiency of the carrier can be avoided by diffusing impurities other than the dopant into the epitaxial layer during ion implantation.

The first conductivity type is N-type and the second conductivity type is P-type, or the first conductivity type is P-type and the second conductivity type is N-type. The aforementioned substrate is a drain conductive layer of a super junction power device.

In addition, the plurality of gate conductive layers and the epitaxial layer further comprise a third oxide layer, so that the plurality of gate conductive layers form a plurality of floating gate conductive layers.

As described above, the withstand voltage termination structure of the super junction power device according to the present invention may have one or more of the following advantages:

(1) The withstand voltage termination structure of the super junction power device of the present invention increases the breakdown voltage of the breakdown voltage of the withstand voltage termination structure by gradually increasing the groove pitch toward the outside of the super junction power device.

(2) The voltage termination structure of the super junction power device of the present invention can compensate for the high concentration dopant accumulated at the bottom of the trench by forming a plurality of first doped regions to improve the breakdown of the super junction power device. Voltage.

(3) The voltage-resistant termination structure of the super junction power device of the present invention can prevent the carrier transmission efficiency from being affected by the diffusion of impurities other than the dopant into the epitaxial layer during the ion implantation process by shielding the oxide layer.

For a better understanding and understanding of the technical features and the efficacies of the present invention, the preferred embodiments and the detailed description are as follows.

1 to 10 are schematic cross-sectional views showing a process of a preferred embodiment of the withstand voltage termination structure of the super junction power device of the present invention.

Embodiments of the withstand voltage termination structure of the super junction power device according to the present invention will be described below with reference to the related drawings. For ease of understanding, the same components in the following embodiments are denoted by the same reference numerals.

Please refer to FIG. 1 to FIG. 10 , which are schematic cross-sectional views showing a process of a preferred embodiment of the withstand voltage termination structure of the super junction power device of the present invention.

First, as shown in FIG. 1, a substrate 10 having a first conductivity type is provided. In a preferred embodiment of the present invention, the substrate 10 is an N ⁺ type doped germanium substrate, and may be a super junction power device. Bungee jumping. In addition, the active cell region (not shown) and the transition region (not shown) on the substrate 10 are further defined on the left side of the termination region of the withstand voltage region of FIG. 1. Then, the epitaxial layer 20 can be formed on the substrate 10 by, for example, a physical vapor deposition (PVD) method or a chemical vapor deposition (CVD) method, wherein the epitaxial layer 20 is preferably N. ^- Type epitaxial layer.

As shown in Fig. 2, the thickness 21 of the epitaxial layer 20 can be, for example, about 10 μm. Next, arsenic (As) may be implanted into the partial epitaxial layer 20 by ion implantation, for example, and heat-driven to cause the arsenic dopant to diffuse into the epitaxial layer 20 to form a first a plurality of first doping regions 30 of a conductivity type, wherein the first doping region 30 can be, for example, an N ⁺ -type doping region, and the ion implantation energy is about 30 KeV to 50 KeV, and the ion implantation dose is about 5 ×10 ¹⁴ atom/cm ² to 9 × 10 ¹⁵ atoms/cm ² , and annealing at about 1100 ° C for 100 minutes in a nitrogen/oxygen (N ₂ /O ₂ ) environment was performed.

Next, as shown in FIG. 3, an epitaxial layer 20a having a thickness of about 50 μm is successively deposited on the structure of FIG. 2, and a plurality of trenches are formed in the epitaxial layer 20a by lithography and etching as shown in FIG. Slot 40. For example, the trench 40 may be formed by depositing an oxide layer on the top surface of the epitaxial layer 20a and coating the photoresist layer on the oxide layer, and exposing the oxide layer with a photomask having a trench pattern, followed by exposure. The development and etching of the oxide layer are followed by removal of the photoresist layer, and the epitaxial layer 20a is dry etched using the patterned oxide layer as a hard mask, such that the trench pattern is transferred into the epitaxial layer 20a. However, the invention is not limited thereto. The epitaxial layer 20a is preferably an N ^- type epitaxial layer.

Wherein, the distance 41a, 41b, 41c, 41d between the plurality of trenches 40 increases toward the outside of the super junction power component (the right side, that is, away from the active cell region), that is, the pitch 41d>41c>41b> 41a. In this way, by gradually increasing the groove pitches 41a, 41b, 41c, and 41d outward, not only the high-intensity electric field of the active cell region can be alleviated, but also the breakdown voltage of the withstand voltage termination structure can be improved. Pressure resistance.

In addition, the number of trenches 40 depends on the outward diffusion of the high-intensity electric field of the active cell region, as long as the number of trenches 40 enables the high-intensity electric field of the active cell region to fall to zero at the edge of the withstand voltage termination structure. It is intended to be within the scope of the claimed invention.

Next, as shown in FIG. 5, the deposition shielding oxide layer 50 covers the sidewalls of the plurality of trenches 40, and boron (B) is implanted into the epitaxial layer 20a covering the sidewalls of the trench 40, for example, by ion implantation, and then Thermal incorporation is performed such that the boron dopant diffuses into the epitaxial layer 20a of the sidewalls of the trench 40 to form a second doped region 60 having a second conductivity type. The second doping region 60 can be, for example, a P-type doping region, and the ion implantation energy is about 40 KeV to 100 KeV, and the ion implantation dose is about 4.5×10 ¹³ atoms/cm ² to 1.5×10 ¹⁴ atom/ Cm ² and a two-stage thermal annealing, wherein the first stage is about 1100 ° C, 100 minutes of thermal annealing in a nitrogen/oxygen (N ₂ /O ₂ ) environment, and the second stage is about 1100 ° C, 200 minutes. Thermal annealing in a nitrogen (N ₂ ) environment.

As shown in Fig. 6, after the shield oxide layer 50 is removed, a plurality of PN junctions, that is, super junctions, are formed. Therefore, by shielding the oxide layer 50, it is possible to prevent the diffusion of impurities other than the dopant during the ion implantation into the epitaxial layer 20a, thereby affecting the carrier transport efficiency.

In addition, due to the influence of Laceford scattering, boron dopants accumulate at the bottom of the trench 40 during ion implantation, and this high concentration of boron dopant causes the breakdown voltage of the super junction power device to decrease. . Therefore, the plurality of first doped regions 30 adjacent to the bottom of the plurality of trenches 40 can be used to neutralize the high concentration of boron dopants to avoid the high concentration of dopants at the bottom of the plurality of trenches 40 to cause the super junction power components. The breakdown voltage is reduced.

Next, as shown in FIG. 7, the first oxide layer 70 is filled in a plurality of trenches 40, and the first oxide layer 70 is subjected to chemical mechanical polishing (CMP) and etch back. Until the top surface of the epitaxial layer 20a is exposed.

As shown in FIGS. 8 and 9, a gate conductive layer 80 is deposited on the epitaxial layer 20a, and the gate conductive layer 80 is patterned and planarized to form a plurality of gate conductive layers 80. The gate conductive layer 80 may include, for example, doped polysilicon, and the plurality of gate conductive layers 80 and the epitaxial layer 20a further include a third oxide layer 81, so that the plurality of gate conductive layers 80 are formed. A plurality of floating gate conductive layers 80 are formed.

Finally, as shown in FIG. 10, the second oxide layer 90 is successively deposited on the structure of FIG. 9 to cover the gate conductive layer 80, the plurality of trenches 40, and the epitaxial layer 20a. The pressure termination structure of the super junction power device of the present invention is formed.

In summary, the voltage termination structure of the super junction power device of the present invention not only mitigates the height of the active cell region by gradually increasing the groove pitch 41a, 41b, 41c, 41d toward the super junction power device. The intensity field is outwardly diffused, which further improves the withstand voltage of the breakdown voltage of the withstand voltage termination structure.

The above is intended to be illustrative only and not limiting. Any equivalent modifications or alterations to the spirit and scope of the invention are intended to be included in the scope of the appended claims.

10‧‧‧Substrate
20, 20a‧‧‧ epitaxial layer
21, 22‧‧‧ thickness of the epitaxial layer
30‧‧‧First doped area
40‧‧‧ trench
41a, 41b, 41c, 41d‧‧‧ spacing between trenches
50‧‧‧Shielding oxide layer
60‧‧‧Second doped area
70‧‧‧First oxide layer
80‧‧‧ gate conductive layer
81‧‧‧ third oxide layer
90‧‧‧Second oxide layer

no

10‧‧‧Substrate

20, 20a‧‧‧ epitaxial layer

30‧‧‧First doped area

41a, 41b, 41c, 41d‧‧‧ spacing between trenches

60‧‧‧Second doped area

70‧‧‧First oxide layer

80‧‧‧ gate conductive layer

81‧‧‧ third oxide layer

90‧‧‧Second oxide layer

Claims (10)

A termination structure of a superjunction power device, comprising: a substrate having a first conductivity type; an epitaxial layer having the first conductivity type, located on the substrate; and a plurality of trenches a trench, located in the epitaxial layer, wherein the distance between the trenches increases toward the outside of the super junction power device; a plurality of first doped regions having the first conductivity type are located in the epitaxial layer And a plurality of second doped regions having a second conductivity type, respectively located in the epitaxial layer and adjacent to sidewalls of the trenches; a plurality of first oxides a layer, located in the trenches; a plurality of gate conductive layers on the epitaxial layer; and a second oxide layer covering the gate conductive layers, the trenches, and the epitaxial layer. The voltage termination structure of the super junction power device according to claim 1, wherein the first conductivity type is N-type and the second conductivity type is P-type, or the first conductivity type is P-type and The second conductivity type is N-type. The voltage termination structure of the super junction power device according to claim 1, wherein the substrate is a drain conductive layer of the super junction power device. The pressure termination structure of the super junction power device of claim 1, wherein the gate conductive layer and the epitaxial layer further comprise a third oxide layer, so that the gate conductive layers are formed. A plurality of floating gate conductive layers. A method for manufacturing a withstand voltage termination structure of a super junction power device, comprising: providing a substrate having a first conductivity type; forming a first epitaxial layer having the first conductivity type on the substrate; forming the a plurality of first doped regions of the first conductivity type are in the portion of the first epitaxial layer; forming a second epitaxial layer having the first conductivity type on the first epitaxial layer; forming a plurality of trenches In the second epitaxial layer, the bottoms of the trenches are respectively adjacent to the first doped regions, wherein the distance between the trenches increases toward the outside of the super junction power device; a plurality of second doped regions having a second conductivity type in the second epitaxial layer, and the second doped regions respectively adjoining sidewalls of the trenches; forming a plurality of first oxide layers on the Forming a plurality of gate conductive layers on the second epitaxial layer; and forming a second oxide layer covering the gate conductive layers, the trenches, and the epitaxial layer. The method for manufacturing a withstand voltage termination structure of a super junction power device according to claim 5, further comprising forming a plurality of screen oxide layers in the trenches before forming the second doped regions. The sidewalls of the trenches are removed and the shield oxide layers are removed after forming the second doped regions. The method for manufacturing a withstand voltage termination structure of a super junction power device according to claim 5, wherein the first conductivity type is N-type and the second conductivity type is P-type, or the first conductivity type is P type and the second conductivity type is N type. The method for manufacturing a withstand voltage termination structure of a super junction power device according to claim 5, wherein the substrate is a drain conductive layer of the super junction power device. The method for manufacturing a withstand voltage termination structure of a super junction power device according to claim 5, wherein the first doped regions and the second doped regions are ion implanted form. The method for manufacturing a withstand voltage termination structure of a super junction power device according to claim 5, wherein the gate conductive layer and the epitaxial layer further comprise a third oxide layer, thereby causing the gates The conductive layer forms a plurality of floating gate conductive layers.