TWI520393B - Nitride-based memristors - Google Patents

Description

Nitride-based memristor [Government Rights Statement]

The invention is carried out with government support. The government has certain rights in the invention.

The present invention relates to memristors, particularly nitride based memristors.

The continuing trend in electronic devices is to minimize the size of the device. While current generation of commercial microelectronic devices is based on sub-micron design rules, numerous research and development efforts have been directed to devices that explore nanoscales, where the size of the device is typically measured in the order of nanometers or tens of nanometers. In addition to the significant reduction in individual device sizes and much higher packing densities compared to microscale devices, nanoscale devices may also be provided due to physical phenomena on the nanoscale (not visible on the micrometer scale). New functionality.

For example, electronic switching in a nanoscale device using titanium oxide as a switching material has recently been reported. The resistive switching behavior of such devices has been found to be related to the memristor circuit component theory originally predicted by L. O. Chua in 1971. The discovery of memristive behavior in nanoscale switches has spurred widespread interest and there are numerous ongoing research efforts to further develop these nanoscale switches and implement them in a variety of applications. One of the many important potential applications is the use of such switching devices as memory cells for storing digital data.

In order to compete with CMOS flash memory, emerging resistive switches need to have switching durability of at least millions of switching cycles. Device The internal reliable switching channels significantly improve the durability of these switches. Different switching material systems are being explored to achieve memristors with desired electrical performance, such as high speed, high durability, long hold time, low energy, and low cost.

A nitride-based memristor is disclosed in an embodiment, comprising: a first electrode comprising a first nitride material; a second electrode comprising a second nitride material; and an active region; Located between the first electrode and the second electrode. The active zone comprises a half conductive or nominally insulated and weakly ionic switching nitride phase.

In another embodiment, a method for fabricating the foregoing memristor is disclosed, the method comprising: providing the first electrode; forming the active region on the first electrode; and forming the second electrode on the active region .

In yet another embodiment, a method for fabricating a memristor further comprising a third electrode of a third nitride material, the third electrode being disposed in the active region to form two separate active regions is disclosed The method includes: providing the first electrode; forming the first active region on the first electrode; forming the third electrode on the first active region; forming the second active region on the third electrode; And forming the second electrode on the second active region.

Reference is now made in detail to the specific embodiments of the disclosed fully nitride memristor and specific embodiments for establishing the disclosed fully nitride memristor. Alternative embodiments are also briefly described where applicable.

In the context of the specification and claims, the singular forms "a" and "the" Several indicators.

"Approximately" and "about" mean, for example, ±10% variation caused by variations in the manufacturing process, as used in the specification and the accompanying claims.

In the following detailed description, reference is made to the claims The components of the embodiments can be positioned in a number of different orientations, and any directional terminology used with respect to the orientation of the components is used for purposes of illustration and not limitation. Directional terms include terms such as "top", "bottom", "front", "back", "leading", "trailing", etc. .

It is understood that there are other embodiments in which the invention may be practiced, and structural or logical changes may be made without departing from the scope of the invention. Therefore, the following detailed description is not to be taken in a limiting sense. In fact, the scope of the invention is defined by the scope of the accompanying application.

Memristors are nanoscale devices that can be used as components in various electronic circuits, such as memory, switches, and logic circuits and systems. In the memory structure, a crossbar type memristor can be used. When used as the basis for memory, the memristor can be used to store one-bit information, 1 or 0. When used as a logic circuit, the memristor can be used as a configuration bit and switch in a logic circuit similar to a field programmable gate array, or can be the basis of a wired logic programmable logic array.

When used as a switch, the memristor can be a closed or open switch in the cross-point memory. In recent years, researchers have made great progress in discovering ways to make these memristor switching functions work efficiently. For example, yttrium oxide (TaO _x ) based memristors have proven to have superior durability over other nanoscale devices capable of electronic switching. In laboratory settings, yttria-based memristors can perform more than 10 billion switching cycles, while other memristors such as yttria-based (WO _x ) or titanium oxide (TiO _x ) based memristors may be required Complex feedback mechanisms to avoid over-energizing such devices, or may require additional steps to renew the device with a stronger voltage pulse in order to achieve durability over a range of 10 million switching cycles.

The memristor device typically can include two electrodes that sandwich an insulating layer. A conductive path can be formed in the insulating layer between the two electrodes, which is switchable between two states: in one state, the conductive path forms a conductive path between the two electrodes ("ON" ), and in one state, the conductive path does not form a conductive path between the two electrodes ("OFF").

One embodiment of the apparatus of the present invention is depicted in FIG. Device 100 includes a bottom or first electrode 102, a metal oxide layer 104, and a top or second electrode 106.

In one embodiment, the bottom electrode 102 can be platinum having a thickness of 100 nm, the metal oxide layer 104 can be a metal oxide having a thickness of 12 nm, such as TaO _x , and the top electrode 106 can be 100 nm thick. .

In some embodiments, the switching function of the memristor 100 is achieved in the switching layer 104. In general, the switching layer 104 is a weakly ionic conductor that is semiconducting and/or insulating without dopants. These materials may be doped with native dopants such as oxygen vacancies or impurity dopants (eg, intentionally Different metal ions are introduced into the switching layer 104). The resulting doped material is electrically conductive because the dopant is charged and is movable under an electric field. Therefore, the concentration distribution of the dopant inside the switching layer 104 can be reconfigured by the electric field, resulting in a change in the resistance of the device under the electric field, that is, electrical switching.

In some embodiments, the switching layer 104 can include a transition metal oxide such as hafnium oxide, titanium oxide, hafnium oxide, tantalum oxide, zirconium oxide, or other similar oxide, or can include a metal oxide such as aluminum oxide, oxidation. Calcium, magnesium oxide, or other similar oxides. In one embodiment, the switching layer 104 can include an oxide formed from a metal of one of the electrodes 102, 106. In an alternate embodiment, the switching layer 104 can comprise a ternary oxide, a quaternary oxide, or other composite oxide such as barium titanate (STO) or barium calcium manganese oxide (PCMO).

One or more switching channels (not shown) may be formed in the switching layer 104 using an annealing process or other thermoforming process, such as by exposure to a high temperature environment or by exposure to resistive heating or other suitable process. To cause localized atomic modifications in the switching layer. In some embodiments, the conductivity of the switching channel can be adjusted by applying a different bias voltage across the first electrode 102 and the second electrode 106. In other embodiments, the switching layer 104 can be specially configured. In other embodiments, the memristor switching layer 104 can be comprised of a relatively thin layer of insulating oxide (approximately 5 nm thick) and a relatively thick, heavily reduced oxide layer. In these embodiments (also referred to as freeform memristors), a process for forming a switching channel is not required because the oxide layer is thin so that no high voltage or heat is applied to form the switching channel. The voltage applied during the switching operation is sufficient to form a switching channel.

In one embodiment, the memristor can be turned off and on, at which point oxygen or metal atoms move in the electric field, resulting in reconfiguration of the switching channel in the switching layer 104. In particular, when the atoms move such that the formed switching channel reaches the second electrode 106 from the first electrode 102, the memristor is in an on state, and the voltage supplied between the first electrode and the second electrode has a relative Lower resistance. Similarly, when the atoms move such that the formed switching channel has a gap between the first electrode 102 and the second electrode 106 (referred to as a switching region (not shown)), the memristor is in an off state, and The voltage provided between the first electrode and the second electrode has a relatively high resistance. In some embodiments, more than one switching channel can be formed in the switching layer 104 when heated.

The switching layer 104 can be interposed between the first electrode 102 and the second electrode 106. In some embodiments, first electrode 102 and second electrode 106 can comprise any conventional electrode material. Examples of conventional electrode materials may include, but are not limited to, aluminum (Al), copper (Cu), gold (Au), molybdenum (Mo), niobium (Nb), palladium (Pd), platinum (Pt), niobium ( Ru), ruthenium oxide (RuO ₂ ), silver (Ag), tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN), tungsten (W), and tungsten nitride (WN).

A metal nitride such as TiN can be used as the electrode material of the memristor device. Nitride electrodes using oxide switching materials may be unstable due to chemical reduction of the stoichiometric amount of nitride to oxide. On the other hand, metal electrodes using nitride memristive switching materials cannot achieve billions of switching cycles without large nitrogen reservoirs.

However, some insulating nitrides such as AlN may be combined with nitrogen such as TiN. The compound electrode is in thermal equilibrium. TiN has a large N solubility, which makes it a candidate memristive electrode material. AlN has a large band gap and has only two solid phases in the Al-N system, both of which make AlN a candidate memristive switching material.

According to the teachings herein, a fully nitride memristor is disclosed. In an embodiment, the nitride-based memristor may comprise a stack of TiN/AlN/TiN. High durability, large on/off ratios, low cost, and CMOS compatibility are desirable.

2 is a view similar to FIG. 1, but the switching layer 104 of FIG. 1 is replaced by the active area 204 in FIG. The active region 204 has the same properties and functionality as the switching layer 104, but may comprise a metal nitride such as AlN as described above. Additionally, electrodes 202 and 206 have the same properties and functionality as electrodes 102, 106, but may include a metal nitride such as TiN as described above.

2 shows further details of an example memristive element or memristor 200 as compared to FIG. The memristive element 200 can include an active region 204 disposed between the first electrode 202 and the second electrode 206. The active region 204 can include one or two switching phases (shown here as layers 208, 210), and a conductive layer 212 formed of a dopant-derived material. The switching layers 208, 210 can each be formed of a switching material capable of carrying a dopant and transporting the dopants at an applied potential. Conductive layer 212 can be disposed between switching layers 208, 210 and in electrical contact with switching layers 208, 210. Conductive layer 212 may be formed of a dopant-derived material including such dopants that are capable of drifting into the switching layer at the applied potential and thus changing the conductance of memristive element 200 rate. In some embodiments, only the switching layer 208 may be present; in other embodiments, only the switching layer 210 may be present, and in other embodiments, there may be both switching layers 208 and 210, depending on the device 200 Specific requirements for current-voltage characteristics. In some cases, the nitride layers 202 and 206 can serve as dopant source materials, and the conductive layer 212 can comprise no dopant source material.

When a potential is applied to the memristive element 200 in a first direction, such as in the positive z-axis direction, one of the switching layers (the first switching layer) exhibits an excess of dopant and another switching layer ( The second switching layer) exhibits insufficient dopant. When the direction of the potential is reversed, the polarity of the voltage potential is reversed, and the drift direction of the dopant is reversed. The first switching layer exhibits insufficient dopant and the second switching layer exhibits an excess of dopant.

In the device depicted in FIG. 2, it can be made conductive by introducing nitrogen vacancies in at least a portion of the active region 204. The dopant species (i.e., nitrogen vacancies V _N ) diffuses under an electric field (which can be assisted by Joule heating). In these sections, the metal nitride is in a nitrogen-deficient state, indicating (in the case of AlN) AlN _1-x , where x represents the nitrogen deficiency from AlN. In some embodiments, the value of x can be less than 0.2. In other embodiments, the value of x can be less than 0.02.

Other materials may be used in place of AlN as the active region 204. Examples of such materials include, but are not limited to, nitrides of trivalent elements such as BN, GaN, and InN, and nitrides of metals having a maximum valence of 3 and forming a semiconducting nitride, such as ScN, YN, LaN , NdN, SmN, EuN, GdN, DyN, HoN, ErN, TmN, YbN and LuN. When the total valence of the element is complementary to the valence of nitrogen to form a filled valence layer (eg, for Si ₃ N ₄ and Ge ₃ N ₄ ), other semiconductive compounds are present. The conductive portion 212 of the active region 204 may comprise AN _1-x , where A may be B, Ga, In, Sc, Y, La, Nd, Sm, Eu, Gd, Dy Ho, Er, Tm, Yb or Lu, And the value of x can be less than 0.2, or include Si ₃ N _4-x or Ge ₃ N _4-x , where the value of x can now be less than 0.8. Furthermore, excellent memristor performance can be obtained by using the above compounds in any combination with each other or with other nitrides not specifically mentioned. In addition, new features and excellent performance can be obtained by using heterostructures composed of multiple layers of different nitrides and/or alloys.

Other materials may be used as the electrodes 202, 206 instead of TiN. Examples of such materials include, but are not limited to, metal-nitride compounds other than trivalent transition metals, such as tantalum nitride (TaN), hafnium nitride (HfN), zirconium nitride (ZrN), chromium nitride (CrN) And bismuth nitride (NbN), and metal or semi-metal nitrides such as tungsten nitride (WN ₂ ), molybdenum nitride (Mo ₂ N), and iron nitride (Fe ₂ N, Fe ₃ N, Fe ₄ N) And Fe ₁₆ N ₂ ), and alloys thereof, such as ternary nitrides. Alternatively, alloys of such nitrides with other metal nitrides (e.g., AlN) may be used to form ternary alloys, such as TiAlN. The electrodes 202, 206 can each be constructed of the same material or different materials.

Conditions for improved device performance have been identified. Such conditions may include (1) thermal stability between the substrate and the channel; (2) thermal stability between the electrode and the switching material; and (3) reservoir for the movable species (N vacancy).

FIG. 3 depicts a ternary phase diagram 300 of an Al-Ti-N system. The binary phase diagram 302 of the Al-N system is associated with the Al-N portion of the ternary phase diagram, and the binary phase diagram 304 of the Ti-N system is associated with the Ti-N portion of the ternary phase diagram.

An example of thermal stability between the substrate and the channel is provided by Al-N. The Al-N system provides a relatively simple phase diagram 302 in which a single compound, AlN, is formed. Therefore, (Al) is balanced with AlN on the Al side, and N is balanced with AlN on the N side. (Al) means an Al metal having a specific amount of N solute.

An example of thermal stability between the electrode and the switching material is provided by TiN-AlN as shown in the Al-Ti-N ternary phase diagram 300. The connecting line 306 connects the AlN and TiN phases in the ternary phase diagram 300, thereby indicating that the two phases are in thermal equilibrium, that is, there is no reaction between the two phases, even in the high temperature induced by electric heating in the switching operation. The same is true. Based on this, the complete structure (electrode/active layer/electrode) of the memristor can be provided by combining TiN/AlN/TiN.

An example of a reservoir for a movable species (here N vacancies) is a material that has greater solubility for the movable species, i.e., TiN, such as shown in the Ti-N binary phase diagram 304.

Thus, a fully nitride memristor can include, as an example, TiN (electrode 202) / AlN (active region 204) having a conductive portion AlN _1-x (212) / TiN (electrode 206), or more simply, TiN/AlN-AlN _1-x /TiN. TiN has a greater solubility for N, making it the appropriate electrode for the reservoir and reservoir that acts as an N vacancy. AlN has only two stable solid phases (such as Ta-O, which is commonly used in another material in memristors). AlN is a large bandgap insulator, resulting in a large on/off conductance ratio, as well as reduced leakage current and thus reduced parasitic resistance. The TiN/AlN-AlN _1-x /TiN system is thermally stable and does not occur due to the thermal reaction of electrical heating, which can adversely alter the state of the device. Finally, based on the foregoing, the system can have great durability, with at least a few billion switching cycles.

Also, in another embodiment, the fully nitride memristor may comprise TiN (electrode 202) / Si ₃ N ₄ having a conductive portion Si ₃ N _4-x (212) / TiN (electrode 206) (acting region 204 ) or, more simply, TiN/Si ₃ N ₄ -Si ₃ N _4-x /TiN.

4 is a flow diagram depicting an example method 400 for fabricating a memristor in accordance with embodiments disclosed herein. It should be understood that the method 400 depicted in FIG. 4 may include additional steps, and some of the steps described herein may be removed and/or modified without departing from the scope of the method 400.

First, a bottom or first electrode 202 can be formed (402), such as by sputtering, evaporation, ALD, co-deposition, chemical vapor deposition, IBAD (ion beam assisted deposition), or any other thin film deposition technique. The thickness of the first electrode 202 may range from about 50 nm to several microns.

An active region 204 can then be formed (404) on the electrode 202. In one embodiment, the active region 204 is a semiconducting or nominally insulating and weakly ionic conductor. The active region 204 can be deposited by sputtering, atomic layer deposition, chemical vapor deposition, evaporation, co-sputtering (e.g., using two metal oxide targets), or other such process. The thickness of the active region 204 can be approximately 4 nm to 50 nm.

A top or second electrode 206 can be formed (406) on the active region 204. Electrode 306 can be provided by any suitable forming process such as described above for forming first electrode 302. In some embodiments, more than one electrode can be provided. The thickness of the second electrode 306 can range from about 50 nm to a few microns.

In some embodiments, a switching channel (not shown) can be formed. In one embodiment, the switching channel is formed by heating the active region 204. can Heating is accomplished using a number of different processes, including thermal annealing or passing current through a memristor. In other embodiments using a freeform memristor having a built-in conductance channel, since the switching channel is built-in, heating may not be required, and as discussed above, a first voltage is applied (which may approximate the operating voltage) The same) to the virgin state of the memristor 200 may be sufficient to form a switching channel.

In some cases, the order in which the bottom electrode 202 and the top electrode 206 are formed can be changed.

FIG. 5 shows another example memristive element 500 in accordance with the principles described herein. The memristive element 500 includes two active regions 504a, 504b disposed between the first electrode 502 and the second electrode 506. Each of the active regions 504a, 504b can include switching layers 508, 510 formed of a switching material capable of carrying a dopant and conductive layers 512a, 512b formed of a dopant source material. A third or intermediate electrode 514 is disposed between the active regions 504a, 504b and in electrical contact with both active regions 504a, 504b. The relative positions of the interchangeable elements 510 and 512a, and the relative positions of the elements 508 and 512b, may also be exchanged.

When a potential is applied to the memristive element 500 in a first direction, such as in the positive z-axis direction, one of the switching layers (the first switching layer) exhibits an excess of dopant and another switching layer ( The second switching layer) exhibits insufficient dopant. When the direction of the potential is reversed, the polarity of the voltage potential is reversed, and the drift direction of the dopant is reversed. The first switching layer exhibits insufficient dopant and the second switching layer exhibits an excess of dopant. The third electrode 514 can block the movable dopant species and also depends on the relative working work of the electrode and the memristive nitride. Can adjust the contact characteristics of this interface.

It should be understood that the memristors 200, 500 described herein (such as the example memristors depicted in Figures 2 and 5) may include additional components and may be within the scope of the memristor disclosed herein. Some of the components described herein are removed and/or modified. It is also understood that the components depicted in the figures are not drawn to scale, and therefore, the components may have different relative sizes relative to each other as shown in the figures. For example, the upper or second electrode 206 can be configured substantially perpendicular to the lower or first electrode 202, or can be disposed at some other non-zero angle relative to each other. As another example, the active region 204 can be relatively smaller or relatively larger than either or both of the electrodes 202 and 206.

The fully nitride memristor 200 solves the reliability and stability problems caused by the reaction between the oxide switching layer 104 and the nitride electrodes 102, 106 of the oxide-based memristor having a nitride electrode. Replacing the oxide switching layer 104 with the nitride active region 204 reduces these reactions.

A fully nitride memristor can have high durability, simple structure, long-term reliability, and low cost.

100‧‧‧ device

102‧‧‧ bottom or first electrode

104‧‧‧Metal oxide layer/switching layer

106‧‧‧Top or second electrode

200‧‧‧Resistance elements or memristors/devices

202‧‧‧First electrode

204‧‧‧Action area

206‧‧‧second electrode

208‧‧‧Switching layer

210‧‧‧Switching layer

212‧‧‧ Conductive layer

300‧‧‧ ternary phase diagram

302‧‧‧ binary phase diagram

304‧‧‧ binary phase diagram

400‧‧‧ method

500‧‧‧Resistive components

502‧‧‧First electrode

504a‧‧‧Action area

504b‧‧‧Action area

506‧‧‧second electrode

508‧‧‧Switching layer

510‧‧‧Switching layer

512a‧‧‧ Conductive layer

512b‧‧‧ Conductive layer

514‧‧‧ Third or intermediate electrode

1 is an embodiment of a memrist device of the present invention.

2 is an embodiment of a memristor device based on the principles disclosed herein.

3 is a ternary phase diagram of an Al-Ti-N system that can be used to practice the various embodiments disclosed herein, along with binary phase diagrams of Al-N and Ti-N systems.

4 is a flow chart depicting an example method for fabricating a memristor in accordance with embodiments disclosed herein.

FIG. 5 illustrates another embodiment of a memristor device based on the principles disclosed herein.

200‧‧‧Resistance elements or memristors/devices

202‧‧‧First electrode

204‧‧‧Action area

206‧‧‧second electrode

208‧‧‧Switching layer

210‧‧‧Switching layer

212‧‧‧ Conductive layer

Claims (14)

A nitride-based memristor comprising: a first electrode comprising a first nitride material; a second electrode comprising a second nitride material; and an active region positioned at the first Between an electrode and the second electrode, wherein the active region comprises a semiconducting or nominally insulating and weakly ionic switching nitride phase, wherein each active region or a portion thereof will form a switching channel. The memristor of claim 1, further comprising a third electrode comprising a third nitride material disposed in the active region to form two separate active regions. A memristor according to claim 1 or 2, wherein each electrode comprises a nitride independently selected from the group consisting of: a metal-nitride compound other than a trivalent transition metal; a metal nitride ; and semi-metal nitrides. A memristor according to claim 3, wherein each of the electrodes comprises a nitride independently selected from the group consisting of tantalum nitride, tantalum nitride, zirconium nitride, chromium nitride, and tantalum nitride. Titanium nitride, tungsten nitride, molybdenum nitride and iron nitride; and alloys thereof, and alloys with other metal nitrides. The memristor of claim 1 or 2, wherein the active region is selected from the group consisting of: a nitride of a trivalent element; A nitride of a metal having a maximum valence of 3 and forming a semiconducting nitride; and an atomic valence complementary to nitrogen to form an element filling the valence layer. The memristor of claim 5, wherein the active region is selected from the group consisting of: AlN, BN, GaN, and InN; ScN, YN, LaN, NdN, SmN, EuN, GdN, DyN, HoN , ErN, TmN, YbN and LuN; and Si ₃ N ₄ and Ge ₃ N ₄ . The memristor of claim 5, wherein the switching nitride phase is selected from the group consisting of: AN _1-x , wherein A is selected from the group consisting of: Al, B, Ga, In , Sc, Y, La, Nd, Sm, Eu, Gd, Ho, Er, Tm, Yb, and Lu, and wherein x is less than 0.2; and Si ₃ N _4-x and Ge ₃ N _4-x , wherein x is less than 0.8 ; and its alloys, and alloys with other nitrides. The memristor of claim 1, wherein the first electrode comprises titanium nitride, the active region comprises aluminum nitride, the switching nitride phase comprises AlN _1-x , wherein x is less than 0.2, and the second The electrode comprises titanium nitride. The memristor of claim 1, wherein the first electrode comprises titanium nitride, the active region comprises tantalum nitride, and the switching nitride phase comprises Si ₃ N _4-x , wherein x is less than 0.8, and The second electrode comprises titanium nitride. A memristor according to claim 1 or 2, wherein each electrode has a thickness of 50 nm or more, and each of them The use zone has a thickness in the range of 4 nm to 50 nm. A memristor according to claim 1 or 2, wherein the active region comprises a heterostructure comprising a plurality of layers of different nitrides. A method for manufacturing a memristor according to claim 1, the method comprising: providing the first electrode; forming the active region on the first electrode; and forming the second electrode on the active region . The method of claim 12, further comprising forming a switching channel in the active area. A method for manufacturing a memristor according to claim 2, the method comprising: providing the first electrode; forming the first active region on the first electrode; forming the first active region a third electrode; forming the second active region on the third electrode; and forming the second electrode on the second active region.