TWI512916B - Semiconductor insulation package device and manufacturing method thereof - Google Patents

Description

Insulation packaging device for semiconductor and manufacturing method thereof

The present invention relates to a package device and a method of fabricating the same, and more particularly to an insulation package device for a semiconductor and a method of fabricating the same.

With the continuous advancement of the semiconductor process, in addition to the gradual improvement of the performance of the existing semiconductor components, the volume thereof is gradually reduced, but relatively, the heat generated by the operation of the existing semiconductor components is gradually increased, in order to improve the heat dissipation efficiency to avoid the semiconductor. Since the temperature of the component is too high, the efficiency is degraded or even damaged, so that the heat sink of the semiconductor wafer exists.

Referring to FIG. 1, a general semiconductor wafer 1 is generally disposed on a semiconductor substrate 10 and covered with a heat sink 2 thereon. The heat sink 2 is in contact with the semiconductor wafer 1 to operate the semiconductor wafer 1. The generated heat source is conducted out by increasing the heat dissipation area to alleviate the problem of excessive heat of the semiconductor wafer 1.

However, it is well known that as the technological process progresses, the volume of electronic products becomes smaller and smaller, and the volume of the semiconductor wafer 1 used is also becoming smaller and smaller, and the volume of the heat sink 2 made of the metal is relatively small. The smaller the shrinkage, the more difficult it is for the semiconductor wafer 1 and the heat sink 2 to be soldered or fitted to the package. In addition, as the volume of the semiconductor wafer 1 and the heat sink 2 shrinks, the gap H between the semiconductor wafer 1 and the heat sink 2 becomes smaller and smaller, such as the heat sink 2 (for example, the heat sink 2). If the amount of deformation is large, the heat sink 2 made of metal may be short-circuited with the semiconductor wafer 1 or short-circuited by external static electricity, causing the semiconductor wafer 1 to malfunction, so that the semiconductor wafer 1 is packaged well. The rate is reduced.

Therefore, in the case where the heat sink 2 and the semiconductor wafer 1 are gradually miniaturized, it is still highly stable and can improve the inconvenience of soldering or fitting work, improve the yield of the semiconductor wafer 1 package, and maintain good at the same time. The cooling effect has become an urgent need for the relevant industry.

Accordingly, it is an object of the present invention to provide an insulating package for a semiconductor that is easy to apply, has high stability, and has excellent heat dissipation.

An insulating packaging device for a semiconductor, the semiconductor having a substrate, and at least one semiconductor component disposed on the substrate, the semiconductor insulating package device being adapted to be overlying the semiconductor

Therefore, the semiconductor insulating package device of the present invention has a substrate, and at least one semiconductor component disposed on the substrate, the semiconductor insulating package device is adapted to cover the semiconductor, and comprises: a metal substrate, A metal coating and an insulating adhesive layer. The metal substrate is substantially in the form of a sheet, and the metal plating layer is plated on the surface of the metal substrate, and the insulating adhesive layer is bonded to one side of the metal plating layer.

Another object of the present invention is to provide a method for manufacturing an insulating packaging device for a semiconductor which is convenient to apply, has high stability, and has excellent heat dissipation effect.

Thus, the method of manufacturing the insulating package device of the present invention comprises the following steps. First, a metal substrate is prepared. Next, a metal plating layer is plated on the metal substrate. Then, an insulating adhesive layer is coated on the metal plating layer and adhered to the semiconductor substrate.

The invention has the beneficial effects that the rough surface of the metal plating layer can enhance the bonding force with the insulating adhesive layer, and the insulating and adhesive effect of the insulating adhesive layer can be directly bonded to the semiconductor component to avoid soldering. The problem of difficulty in operation makes it possible to surely avoid contact of the semiconductor element with the metal plating layer, thereby improving stability and heat dissipation.

The foregoing and other objects, features, and advantages of the invention will be apparent from the

In addition, it should be noted that similar elements are denoted by the same reference numerals before the detailed description.

2 and 3 show a first preferred embodiment of the insulating package device 6 of the semiconductor 5 of the present invention. The semiconductor 5 has a substrate 51 and at least one component 52 disposed on the substrate 51. It should be noted that the component 52 can be one of a semiconductor wafer, an electronic component, or a passive component, and in the first preferred embodiment, the component 52 is a semiconductor wafer.

The insulating package device 6 of the semiconductor 5 is adapted to be overlaid on the semiconductor 5 and comprises: a metal substrate 61, a metal plating layer 62, and an insulating adhesive layer 63. The metal substrate 61 is substantially in the form of a sheet. The metal plating layer 62 is plated on the surface of the metal substrate 61. The insulating adhesive layer 63 is bonded to one side of the metal plating layer 62, and is bonded to the semiconductor substrate 51. The upper elements 52 are connected together. The metal substrate 61 has a first surface 611 and a second surface 612 opposite to the first surface 611. The metal plating layer 62 is plated on the first surface 611 and the second surface 612 of the metal substrate 61. .

It is to be noted that in the insulating package device 6 of the semiconductor 5 of the present invention, the material of the metal substrate 61 may be selected from one of copper, aluminum, iron, and stainless steel. The material of the metal plating layer 62 is selected from nickel, chromium or a combination thereof. The material of the insulating adhesive layer 63 is epoxy, and the epoxy resin is a thermosetting plastic, and has functions such as an adhesive and a coating.

In the practical application, since the metal substrate 61 is directly bonded to the element 52 of the semiconductor 5 by the insulating adhesive layer 63, it can be improved in addition to the problem that the soldering operation is difficult due to the shrinkage of the semiconductor process volume. The insulating adhesive layer 63 prevents the semiconductor 5 from coming into contact with the metal plating layer 62 to cause interference or short circuit, and the heat transfer by the substantial epoxy resin is better than the air insulation, thereby improving the yield of the packaging process and the heat dissipation effect of the wafer. The advantages.

In the first preferred embodiment, the insulating adhesive layer 63 made of epoxy resin may also fill the metal substrate 61 and the substrate 51 as shown in FIG. 3 . All gaps between. Since the insulating adhesive layer 63 has an insulating effect, external static electricity can be prevented from being introduced through the insulating adhesive layer 63, and the operation of the component 52 can be affected by the substrate 51, and the component 52 can be protected from external electromagnetic waves.

Referring to FIG. 4, a second preferred embodiment of the insulating package device 6 of the semiconductor 5 of the present invention is shown. The second preferred embodiment is substantially the same as the first preferred embodiment, and the details are not described herein again. The difference is that the metal substrate 61 has a body portion 613 and a surrounding portion 613. The periphery extends downwardly to the surrounding portion 614 of the substrate 51, and the element 52 is composed of a plurality of electronic components and passive components.

Since the insulating effect of the insulating adhesive layer 63 is poor, in addition to preventing external static electricity from being introduced through the insulating adhesive layer 63 and affecting the operation of the electronic component 52 through the substrate 51, the electronic component 52 can be reduced from external electrostatic introduction. The probability of interference, as well as the function of electromagnetic wave protection.

Referring to Figures 5 and 6, a third preferred embodiment of the insulating package device 6 of the semiconductor 5 of the present invention is shown. The third preferred embodiment is substantially the same as the first preferred embodiment, and the same points are not described herein again, except that in the third preferred embodiment, the metal substrate 61 is substantially inverted. U-shaped and disposed on the substrate 51 of the semiconductor wafer 5.

The metal substrate 61 has a body portion 613, a surrounding portion 614 surrounding the periphery of the body portion 613 and extending downward to the semiconductor substrate 51, and an extending portion 616 connected to the semiconductor substrate 51. The body portion 613 The surrounding portion 614 and the semiconductor substrate 51 collectively define an accommodating space 615. The extending portion 616 is connected to the bottom end of the surrounding portion 614 and extends outward, and is disposed in parallel with the body portion 613. The insulating adhesive layer 63 is located in the accommodating space 615 and disposed under the body portion 613.

In the third preferred embodiment, the insulating adhesive layer 63 made of epoxy resin can also fill all the gaps in the accommodating space 615 as shown in FIG. 6 . . Since the insulating adhesive layer 63 has an insulating effect, external static electricity can be prevented from being introduced through the insulating adhesive layer 63, and the operation of the component 52 is affected by the substrate 51, and the component 52 can be protected from external electromagnetic waves.

Referring to FIG. 7, a fourth preferred embodiment of the insulating package device 6 of the semiconductor 5 of the present invention is shown. The fourth preferred embodiment is substantially the same as the third preferred embodiment, and the same is not described herein except that the metal plating layer 62 of the insulating adhesive layer 23 is only plated on the metal substrate 61. On the second surface 612. There is no metal plating 62 on the first surface 611, so that the first surface 611 is suitable for other processes, for example, black oxidation treatment or anodizing of copper or aluminum metal on the first surface 611. .

Referring to FIGS. 8 and 9, a first preferred embodiment of the method for fabricating the insulating package device 6 of the semiconductor 5 of the present invention is mainly used to explain the method for fabricating the above-described preferred embodiment of the insulating package device 6. The structure described in the preferred embodiment is a plurality of preferred embodiments of the above-described insulating package device 6, and thus no further details are provided herein.

First, as shown in step 71, a sheet-like metal substrate 61 is prepared. Next, as shown in step 72, the metal plating layer 62 is plated on the metal substrate 61. Since the metal plating layer 62 is plated on the metal substrate 61, the rough surface generated by plating the metal plating layer 62 can be increased between the insulating adhesive layer 63 and the metal plating layer 62 as shown in FIG. The contact area and frictional force enhance the bonding force between the insulating adhesive layer 63 and the metal plating layer 62.

Referring to Figures 8 and 10, next, as shown in step 73, the metal substrate 61 is stamped into a substantially inverted U shape so as to cover the substrate 51 of the semiconductor wafer 5. After being stamped, the metal substrate 61 has a body portion 613, a surrounding portion 614 surrounding the periphery of the body portion 613 and extending downward to the semiconductor substrate 51, and an extension portion 616 connected to the semiconductor substrate 51. Finally, as shown in step 74, an epoxy resin is coated on one side of the metal plating layer 62 to form the insulating adhesive layer 63, and the metal substrate 61 and the semiconductor substrate 51 are heated and pressed. The elements 52 are bonded together. Of course, corresponding to the first to fourth preferred embodiments of the insulating package device 6 of the semiconductor 5, whether the metal substrate 61 requires the surrounding portion 614 or the extending portion 616 can be processed by stamping or continuous molding. Decided, I will not repeat them here.

It can be seen from the above description that in the process of packaging the semiconductor 5, since the solder is more easily adhered to the tin plating layer of the homogenous material, the epoxy resin of the insulating adhesive layer 63 and the tin plating layer have different properties, thereby avoiding The solder is sticky. By the same token, in the packaging process, there is also a glue from the outside onto the semiconductor substrate 51, so that the metal substrate 61 and the semiconductor 5 are more closely bonded together.

In addition, since the insulating adhesive layer 63 has an insulating effect, external static electricity can be prevented from being introduced through the insulating adhesive layer 63, and the metal substrate 61 can pass through the metal substrate 61 to affect the operation of the element 52, and also has the function of electromagnetic wave protection. Therefore, the adhesion effect generated by the insulating adhesive layer 63 can be more easily bonded directly to the semiconductor 5, thereby avoiding the problem that the package soldering is difficult to bond, thereby improving the stability of the semiconductor 5 during operation and enhancing the heat dissipation effect.

In summary, the insulating package device 6 of the semiconductor 5 of the present invention and the manufacturing method thereof can improve the bonding force between the metal plating layer 62 and the insulating adhesive layer 63 by using the rough surface when the metal plating layer 62 is plated. The insulating and adhesive effect of the insulating adhesive layer 63 can not only improve the soldering operation caused by the shrinkage of the semiconductor process, but also prevent the semiconductor wafer 5 from being bonded to the metal plating layer 62 by using the insulating adhesive layer 63. The contact generates interference or short circuit, and the heat transfer by the epoxy resin is superior to the simple air insulation. Therefore, it also has the advantages of improving the package process yield and the heat dissipation effect of the wafer, so that the object of the present invention can be achieved.

However, the above is only a plurality of preferred embodiments of the present invention, and the scope of the invention is not limited thereto, that is, the simple equivalent changes made by the scope of the invention and the description of the invention are Modifications are still within the scope of the invention.

5. . . semiconductor

51. . . Substrate

52. . . element

6. . . Semiconductor insulation package

61. . . Metal substrate

611. . . First surface

612. . . Second surface

613. . . Body part

614. . . Surrounding

615. . . Housing space

616. . . Extension

62. . . Metal plating

63. . . Insulating adhesive layer

71. . . Preparing a sheet of metal substrate

72. . . Plating the metal plating on the metal substrate

73. . . Stamping the metal substrate into a substantially inverted U shape so as to cover the substrate of the semiconductor. After the metal substrate is stamped, a body portion is formed, and a circumference surrounds the body portion and extends downward to a surrounding portion of the semiconductor substrate, the body portion, the surrounding portion, and the semiconductor substrate collectively define an accommodating space

74. . . An epoxy resin is coated on one side of the metal plating layer to form the insulating adhesive layer, and the metal substrate is bonded to the components on the semiconductor substrate by heat pressing.

1 is a cross-sectional view showing a state of a conventional packaging device for a semiconductor;

2 is a partial cross-sectional view showing a first preferred embodiment of the semiconductor insulating package device of the present invention;

Figure 3 is a partial cross-sectional view showing another embodiment of the first preferred embodiment;

4 is a partial cross-sectional view showing a second preferred embodiment of the semiconductor insulating package device of the present invention;

Figure 5 is a partial cross-sectional view showing a third preferred embodiment of the semiconductor insulating package device of the present invention;

Figure 6 is a partial cross-sectional view showing another embodiment of the third preferred embodiment;

Figure 7 is a partial cross-sectional view showing a fourth preferred embodiment of the semiconductor insulating package device of the present invention;

Figure 8 is a flow chart showing a first preferred embodiment of a method of fabricating an insulating package device for a semiconductor 88 wafer of the present invention;

Figure 9 is a partially enlarged schematic view showing the rough surface of a metal plating layer;

Figure 10 is a partial cross-sectional view showing the metal substrate being stamped into a substantially inverted U shape so as to cover the substrate of the semiconductor wafer.

5. . . semiconductor

51. . . Substrate

52. . . element

6. . . Semiconductor insulation package

61. . . Metal substrate

611. . . First surface

612. . . Second surface

62. . . Metal plating

63. . . Insulating adhesive layer

Claims (9)

An insulating packaging device for a semiconductor, the semiconductor having a substrate, and at least one semiconductor component disposed on the substrate, the semiconductor insulating package device is adapted to cover the semiconductor, and comprises: a metal substrate, an outline piece And having a first surface and an opposite second surface, the second surface being a bottom surface of the metal substrate; a metal plating layer disposed on the second surface of the metal substrate, the metal plating material is Selected from nickel, chromium or a combination thereof; and an insulating adhesive layer bonded to one side of the metal plating layer and connected to the semiconductor element on the semiconductor substrate. The insulating packaging device for a semiconductor according to the first aspect of the invention, wherein the insulating adhesive layer is made of an epoxy resin. The semiconductor packaging device of claim 2, wherein the metal substrate is disposed on the semiconductor substrate, has an inverted U shape, has a body portion, and surrounds the periphery of the body portion The body portion, the surrounding portion, and the semiconductor substrate collectively define an accommodating space, and the insulating adhesive layer is located in the accommodating space and disposed under the body portion. The semiconductor package according to claim 3, wherein the metal substrate further has an extension connected to the semiconductor substrate, the extension being connected to the bottom end of the surrounding portion and extending outwardly. And disposed in parallel with the body portion. A method of manufacturing an insulating packaging device for a semiconductor, the semiconductor having a substrate, and at least one semiconductor component disposed on the substrate, the half The insulating packaging device of the conductor is adapted to cover the semiconductor, and comprises the following steps: A) preparing a sheet metal substrate having a first surface and an opposite second surface, the second surface a bottom surface of the metal substrate; B) plating a metal plating layer on the second surface of the metal substrate, the metal plating layer is selected from the group consisting of nickel, chromium or the like; and C) coating the metal plating layer An insulating adhesive layer is adhered to the semiconductor component. The method for manufacturing an insulating packaging device for a semiconductor according to claim 5, further comprising a step D) between the step B) and the step C), wherein the metal substrate is stamped into an inverted U shape to Covering the substrate, after the metal substrate is stamped, a body portion is formed, and a surrounding portion surrounding the periphery of the body portion and extending downward to the semiconductor substrate, the body portion, the surrounding portion, and the semiconductor The substrates collectively define an accommodation space. The manufacturing method of the semiconductor insulating package device according to claim 6, wherein in the step D), after the metal substrate is stamped, an extension portion connected to the semiconductor substrate is further formed, and the extension portion is The bottom end of the surrounding portion is connected and extends outward, and is disposed in parallel with the body portion. The method for manufacturing an insulating packaging device for a semiconductor according to claim 7, wherein the step C) is to apply an epoxy resin on one side of the metal plating layer to form the insulating adhesive layer and adhere to the semiconductor. On the component. The method for manufacturing a semiconductor insulating package according to the eighth aspect of the invention, wherein the material of the metal substrate of the step A) is one selected from the group consisting of copper, aluminum, iron, and stainless steel.