CN112117243A - Semiconductor packaging structure and preparation method thereof - Google Patents
Semiconductor packaging structure and preparation method thereof Download PDFInfo
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- CN112117243A CN112117243A CN201910543331.2A CN201910543331A CN112117243A CN 112117243 A CN112117243 A CN 112117243A CN 201910543331 A CN201910543331 A CN 201910543331A CN 112117243 A CN112117243 A CN 112117243A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The invention provides a semiconductor packaging structure and a preparation method thereof. The semiconductor package structure includes: a package substrate; the chip is bonded on the upper surface of the packaging substrate; the plastic packaging material layer is positioned on the upper surfaces of the packaging substrate and the chip and is used for plastically packaging the chip; the heat-conducting adhesive layer is positioned on the upper surface of the plastic packaging material layer; the heat conduction lead penetrates through the plastic packaging material layer, and two ends of the heat conduction lead are respectively connected with the chip and the heat conduction adhesive layer; and the heat dissipation layer is positioned on the upper surface of the heat conduction adhesive layer. The semiconductor packaging structure of the invention completely moves the heat dissipation layer to the surface of the whole semiconductor packaging structure, which is beneficial to increasing the heat dissipation area of the heat dissipation layer, and simultaneously conducts the heat dissipated by the chip to the heat dissipation layer through the heat conduction lead, which is beneficial to fast heat dissipation of the chip, thereby being beneficial to improving the performance of the semiconductor packaging structure.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging structure and a preparation method thereof.
Background
With the rapid development of electronic information technology and the continuous improvement of the consumption level of people, the functions of a single electronic device are increasingly diversified and the size of the single electronic device is increasingly miniaturized, so that in the internal structure of the electronic device, the density of chips and functional components is continuously increased, and the Critical Dimension (line width) of the device is continuously smaller, which brings great challenges to the semiconductor packaging industry. Although various packaging technologies are developed, the heat dissipation problem of packaged devices has not been solved well, and tends to worsen.
Fig. 1 illustrates a conventional semiconductor package structure. Although the package structure has the heat sink 14 added in the package structure in consideration of the heat dissipation problem, the heat sink 14 extends from the package substrate 11 to the upper side of the chip 12 through the support connection of several brackets; however, the problem with this structure is that the heat generated by the chip 12 can reach the heat sink 14 only by conduction through the plastic packaging material layer 13, and the plastic packaging material layer 13 is usually made of resin, which has poor heat conductivity, resulting in poor heat dissipation effect of the package structure; meanwhile, in the package structure, the heat sink 14 is usually mounted after the chip 12 is bonded to the package substrate 11, and then the plastic package material layer 13 is subjected to plastic package, and the plastic package material layer 13 is usually formed by curing a liquid plastic package material, so that the plastic package material is likely to overflow to the surface of the heat sink 14 during the plastic package process, which leads to a reduction in the heat dissipation effect of the heat sink 14, and finally leads to problems of poor heat dissipation of the package device, a reduction in electrical performance caused by poor heat dissipation, and the like.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a semiconductor package structure and a method for manufacturing the same, which are used to solve the problems of the package structure in the prior art, such as poor heat dissipation effect and performance degradation of the packaged device.
To achieve the above and other related objects, the present invention provides a semiconductor package structure, comprising:
a package substrate;
the chip is bonded on the upper surface of the packaging substrate;
the plastic packaging material layer is positioned on the upper surfaces of the packaging substrate and the chip and is used for plastically packaging the chip;
the heat-conducting adhesive layer is positioned on the upper surface of the plastic packaging material layer;
the heat conduction lead penetrates through the plastic packaging material layer, and two ends of the heat conduction lead are respectively connected with the chip and the heat conduction adhesive layer;
and the heat dissipation layer is positioned on the upper surface of the heat conduction adhesive layer.
Optionally, the chip is bonded to the upper surface of the package substrate by a bonding wire, and the bonding wire and the heat conducting wire are made of the same material.
Optionally, the thermally conductive adhesive layer comprises an electrically conductive silver adhesive layer.
Optionally, the heat dissipation layer has a non-planar surface structure.
Optionally, the heat dissipation layer includes a metal main body layer and a plating layer on the metal main body layer.
The invention also provides a preparation method of the semiconductor packaging structure, which comprises the following steps:
providing a packaging substrate, bonding a chip on the upper surface of the packaging substrate, and forming a heat conducting lead, wherein one end of the heat conducting lead is connected with the chip;
forming a plastic packaging material layer on the upper surfaces of the packaging substrate, the chip and the heat conducting lead, wherein the plastic packaging material layer is used for carrying out plastic packaging on the chip and the heat conducting lead, and the other end of the heat conducting lead is exposed on the surface of the plastic packaging material;
forming a heat-conducting adhesive layer on the surface of the plastic packaging material layer, wherein the heat-conducting adhesive layer is connected with the other end of the heat-conducting lead;
and forming a heat dissipation layer on the surface of the heat conduction adhesive layer.
Optionally, the thermally conductive adhesive layer comprises an electrically conductive silver adhesive layer.
Optionally, the heat dissipation layer has a non-planar surface structure.
Optionally, the heat dissipation layer includes a metal main body layer and a plating layer on the metal main body layer.
Optionally, the chip is bonded to the upper surface of the package substrate by a bonding wire; the heat conducting lead and the bonding lead are formed in the same process, the heat conducting lead extends from the surface of the chip to be jointed with the surface of the packaging substrate, the maximum height of the heat conducting lead is greater than the height of the bonding lead, and the joint of the heat conducting lead and the packaging substrate is positioned at one end of the bonding lead, which is far away from the chip; the plastic packaging material layer is used for completely plastic packaging the chip, the bonding lead and the heat conducting lead; the preparation method of the semiconductor packaging structure further comprises the steps of flattening the packaging structure obtained after the plastic packaging material layer is formed before the heat conducting adhesive layer is formed, and removing the joint part of the heat conducting lead and the packaging substrate.
As described above, the semiconductor package structure and the method for manufacturing the same of the present invention have the following advantages: the semiconductor packaging structure of the invention completely moves the heat dissipation layer to the surface of the whole semiconductor packaging structure, which is beneficial to increasing the heat dissipation area of the heat dissipation layer, and simultaneously conducts the heat dissipated by the chip to the heat dissipation layer through the heat conduction lead, which is beneficial to fast heat dissipation of the chip, thereby being beneficial to improving the performance of the semiconductor packaging structure. The preparation method can obviously improve the performance of the prepared semiconductor packaging structure, is simple to operate and has higher industrial utilization value.
Drawings
Fig. 1 is a schematic cross-sectional view of a semiconductor package structure in the prior art.
Fig. 2 is a schematic cross-sectional view of a semiconductor package structure according to the present invention.
Fig. 3 and 4 are schematic cross-sectional views illustrating a heat dissipation layer in a semiconductor package structure according to the present invention.
Fig. 5 is a flow chart illustrating a method for fabricating a semiconductor package structure according to the present invention.
Fig. 6 to 11 are schematic cross-sectional views of structures obtained in the steps of the method for manufacturing a semiconductor package structure according to the present invention.
Description of the element reference numerals
11 packaging substrate
12 chips
13 layer of plastic packaging material
14 Heat sink
21 packaging substrate
22 chip
23 layer of a plastic sealant
24 heat-conducting glue layer
25 Heat conducting wire
26 Heat dissipation layer
27 bonding wire
28 solder ball bump
29 underfill layer
S1-S4
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 2 to 11. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and although the drawings only show the components related to the present invention and are not drawn according to the number, shape and size of the components in actual implementation, the form, quantity and proportion of each component in actual implementation may be changed at will, the layout of the components may be more complex, and "upper" and "lower" in the present embodiment are not strictly limited and are only for the convenience of description.
Example one
As shown in fig. 2, the present invention provides a semiconductor package structure, which includes: a package substrate 21; a chip 22 bonded to an upper surface of the package substrate 21; a plastic packaging material layer 23 located on the upper surfaces of the package substrate 21 and the chip 22, and configured to plastic package the chip 22; the heat-conducting adhesive layer 24 is positioned on the upper surface of the plastic packaging material layer 23; the heat conducting lead 25 penetrates through the plastic packaging material layer 23, and two ends of the heat conducting lead are respectively connected with the chip 22 and the heat conducting adhesive layer 24; and the heat dissipation layer 26 is positioned on the upper surface of the heat conduction glue layer 24. The semiconductor packaging structure of the invention moves the heat dissipation layer 26 to the surface of the whole semiconductor packaging structure, which is beneficial to increasing the heat dissipation area of the heat dissipation layer 26, and simultaneously, the heat dissipated by the chip 22 is conducted to the heat dissipation layer 26 through the heat conduction lead 25, which is beneficial to fast heat dissipation of the chip 22, thereby being beneficial to improving the performance of the semiconductor packaging structure.
The material of the package substrate 21 may be selected according to different requirements, and may be, for example, non-metal material such as silicon, glass, silicon oxide, ceramic, polymer, etc., metal material such as copper, etc., or composite material of two or more, the shape of which may be circular, square, or any other desired shape, and the surface area of which is determined to be capable of bearing subsequent structures. In this embodiment, for subsequent packaging, the surface area of the package substrate 21 is larger than the surface area of the chip 22, for example, the surface area of the package substrate 21 is 1.1 to 2 times of the surface area of the chip 22.
The chip 22 may include various types of active or passive components, the number of which may be one or more. In this embodiment, as an example, the chip 22 is bonded to the upper surface of the package substrate 21 by a bonding wire 27, that is, two ends of the bonding wire 27 are respectively connected to the package substrate 21 and the chip 22, and a connection pad (not shown) may be disposed on the surface of the chip 22 and connected to the bonding wire 27. The material of the bonding wire 27 is preferably gold wire, because gold wire not only has good conductivity and oxidation resistance, but also has the characteristics of very good ductility and easy balling, and thus contributes to the improvement of the performance of the semiconductor package device. Of course, in other examples, the chip 22 may be fixed to the surface of the package substrate 21 in other manners according to different needs, such as being soldered to the surface of the package substrate 21 through a pad.
As an example, the material of the molding compound layer 23 may include, but is not limited to, one or more of polyimide, silicon gel, or epoxy, and the molding compound layer 23 preferably completely covers the upper surface of the package substrate 21.
In one example, the bonding wires 27 and the heat conducting wires 25 are made of the same material, such as gold wires, so that the heat conducting wires 25 and the bonding wires 27 can be formed in the same process, which is beneficial to simplifying the manufacturing process. Of course, in other examples, the heat conducting wire 25 may also be other metal wires with good heat conducting performance, such as copper wire, aluminum wire, copper alloy wire, and the like, and the present embodiment is not limited strictly. The heat generated by the chip 22 can be quickly conducted to the thermal adhesive layer 24 through the thermal conductive wires 25 and finally dissipated through the heat dissipation layer 26. The number of the heat conductive wires 25 and the number of the bonding wires 27 are preferably plural, for example, 2 or more.
In a conventional semiconductor package structure, a thermal conductive adhesive made of an insulating material, such as silicon gel, is generally used. In this embodiment, the thermal conductive adhesive layer 24 is preferably made of a material with electrical conductivity, such as a conductive silver adhesive layer, so that the thermal conductive adhesive layer 24 connects the heat dissipation layer 26 to the ground, so that the heat dissipation layer 26 can also play a role of electromagnetic shielding while achieving a heat dissipation function, thereby improving the performance of the semiconductor package device.
The heat dissipation layer 26 may be made of any material with good heat dissipation performance. In the present embodiment, as an example, the heat dissipation layer 26 includes a metal main body layer and a plating layer on the metal main body layer; the metal main body layer can be a copper layer, an aluminum layer, a stainless steel layer, a copper alloy layer or a composite layer of multiple metal layers, the coating layer can be a nickel layer, a chromium layer or other coatings with good antirust and anticorrosive properties, and the coating layer is used for protecting the metal main body layer so as to prevent the heat dissipation performance of the metal main body layer from being reduced due to oxidation and/or corrosion and ensure the heat dissipation performance of the heat dissipation layer 26. The surface area of heat dissipation layer 26 is usually not less than the surface area of plastic packaging material layer 23, promptly heat dissipation layer 26 will plastic packaging material layer 23 covers completely, just the edge of heat dissipation layer 26 can also buckle downwards in order to with the lateral wall portion cladding of plastic packaging layer not only can increase through such setting heat dissipation layer 26's heat radiating area increases semiconductor packaging structure's heat dissipation route can make simultaneously heat dissipation layer 26 with the connection of plastic packaging layer is more firm, promotes semiconductor packaging structure's performance.
In another example, the heat sink layer 26 is a graphene layer; the graphene is conductive, has good heat dissipation performance, and has good oxidation resistance, corrosion resistance and other characteristics. By using graphene as the heat dissipation layer 26, the thickness of the heat dissipation layer 26 can be reduced, which is beneficial to further miniaturization of the semiconductor package device.
By way of example, the heat dissipation layer 26 has a non-flat surface structure, that is, the surface of the heat dissipation layer 26 is not flat, and for example, the surface may be an uneven structure as shown in fig. 3, or a corrugated structure as shown in fig. 4, or may also be any other irregular shape, which is not limited in this embodiment. The surface of the heat dissipation layer 26 is configured to be non-flat, so that on one hand, the surface area of the heat dissipation layer 26 can be increased to increase the heat dissipation area, and meanwhile, the problems of expansion deformation, stress and the like of the heat dissipation layer 26 when being heated are avoided through the configuration of the non-flat surface structure, and the performance of the semiconductor package structure is ensured. In order to match the heat dissipation layer 26, the surface of the thermal conductive adhesive layer 24 may also have a non-flat surface structure, so as to have a larger contact area with the heat dissipation layer 26, thereby ensuring better fit between the two; meanwhile, the thermal conductive adhesive layer 24 is configured to have a non-flat surface structure, and after the thermal conductive adhesive layer 24 is formed, a more flexible process can be adopted to form the heat dissipation layer 26 having a non-flat surface structure on the surface, for example, the heat dissipation layer 26 having a non-flat surface structure on the surface can be formed by an electroplating process or a physical vapor deposition process, which is beneficial to simplifying the manufacturing process of the semiconductor package structure.
As an example, the semiconductor package structure further has solder ball bumps 28, the solder ball bumps 28 are located on a lower surface of the package substrate 21 (i.e., a surface opposite to the surface on which the chip 22 is located), and a material of the solder ball bumps 28 may include at least one of copper and tin; the solder ball bumps 28 may also be connected to the package substrate 21 through bonding pads (not shown); the solder ball bumps 28 are preferably a plurality of solder ball bumps 28, and the solder ball bumps 28 are uniformly distributed at intervals to electrically lead out the semiconductor package structure.
As an example, the semiconductor package structure further has an underfill layer 29, the underfill layer 29 is located on the lower surface of the package substrate 21 and partially covers the solder ball bumps 28, and the lower surfaces of the solder ball bumps 28 protrude outward from the surface of the underfill layer 29; the material of the underfill layer 29 may include, but is not limited to, one or more of polyimide, silicone, and epoxy, and the process of forming the underfill layer 29 may include, but is not limited to, one or more of an inkjet process, a dispensing process, a compression molding process, a transfer molding process, a liquid seal molding process, a vacuum lamination process, or a spin coating process; the underfill layer 29 can protect the solder ball bumps 28 and also provide buffer protection for the chip 22.
The semiconductor package structure of the present invention rapidly conducts the heat generated by the chip 22 to the heat dissipation layer 26 through the heat conductive wire 25, which is helpful for improving the heat dissipation performance of the semiconductor package structure.
As shown in fig. 5, the present invention further provides a method for manufacturing a semiconductor package structure, which can be used for manufacturing the semiconductor package structure according to any of the above embodiments, so that the above description of the semiconductor package structure is fully applicable here and is not repeated as much as possible for the sake of brevity; similarly, the contents mentioned in the present manufacturing method are also fully applicable to the aforementioned semiconductor package structure.
The preparation method comprises the following steps:
s1: providing a package substrate 21, bonding a chip 22 on an upper surface of the package substrate 21, and forming a heat conducting wire 25, where one end of the heat conducting wire 25 is connected to the chip 22, as shown in fig. 6;
s2: forming a plastic package material layer 23 on the upper surfaces of the package substrate 21, the chip 22, and the heat conducting wire 25, wherein the plastic package material layer 23 plastic packages the chip 22 and the heat conducting wire 25, and the other end of the heat conducting wire 25 is exposed on the surface of the plastic package material, as shown in fig. 7 to 9;
s3: forming a heat-conducting adhesive layer 24 on the surface of the plastic package material layer 23, where the heat-conducting adhesive layer 24 is connected to the other end of the heat-conducting lead 25, as shown in fig. 10;
s4: a heat dissipation layer 26 is formed on the surface of the thermal conductive adhesive layer 24, as shown in fig. 11.
The material of the package substrate 21 may be selected according to different requirements, and may be, for example, non-metal material such as silicon, glass, silicon oxide, ceramic, polymer, etc., metal material such as copper, etc., or composite material of two or more, the shape of which may be circular, square, or any other desired shape, and the surface area of which is determined to be capable of bearing subsequent structures. In this embodiment, for subsequent packaging, the surface area of the package substrate 21 is larger than the surface area of the chip 22, for example, the surface area of the package substrate 21 is 1.1 to 2 times of the surface area of the chip 22. In this embodiment, the chip 22 is bonded to the package substrate 21 through a wire bonding process (i.e., through the bonding wires 27). Of course, in other examples, the chip 22 may be soldered on the package substrate 21 by using a die bonding (die bonding), which is not limited in this embodiment.
As an example, the process of forming the heat conducting wire 25 is also a wire bonding process, the heat conducting wire 25 and the bonding wire 27 are preferably formed in the same process, and the heat conducting wire 25 and the bonding wire 27 are preferably made of the same material, such as gold wire; the bonding wire 27 and the heat conductive wire 25 can be simultaneously formed without replacing equipment and materials, contributing to simplification of the manufacturing process.
The material of the plastic package material layer 23 may include, but is not limited to, one or more of polyimide, silicone, and epoxy resin, and the process for forming the plastic package material layer 23 may include, but is not limited to, one or more of an inkjet process, a dispensing process, a compression molding process, a transfer molding process, a liquid seal molding process, a vacuum lamination process, or a spin coating process.
As an example, the thermal conductive adhesive layer 24 may be an insulating material layer, such as a silicone layer; in this embodiment, the thermal conductive adhesive layer 24 preferably has a material layer with an electrical conduction function, such as an electrically conductive silver adhesive layer, so as to ground the heat dissipation layer 26 through the thermal conductive adhesive layer 24, so that the heat dissipation layer 26 can also play a role of electromagnetic shielding while achieving a heat dissipation function, thereby improving the performance of the semiconductor package device; the process for forming the thermal conductive adhesive layer 24 may include, but is not limited to, one or more of an inkjet process, a dispensing process, a compression molding process, a transfer molding process, a liquid sealing process, a vacuum lamination process, or a spin coating process; in this embodiment, an inkjet or dispensing process is preferred, so that the thermal conductive adhesive layer 24 with a non-flat surface structure can be more easily formed, and thus there are more process options in the subsequent process of forming the heat dissipation layer 26 with a non-flat surface structure, for example, the heat dissipation layer 26 with a metal body layer and a plated layer on the metal body layer can be formed by a physical vapor deposition or electroplating process, because the thermal conductive adhesive layer 24 has a non-flat surface structure, the formed heat dissipation layer 26 naturally has a non-flat surface structure, so that the heat dissipation layer 26 has a larger heat dissipation surface area, and deformation caused by thermal expansion and/or adverse effects caused by stress can be avoided; at the same time, the thermal conductive adhesive layer 24 and the heat dissipation layer 26 can be made to be closer to each other, so that the heat of the chip 22 can be conducted to the heat dissipation layer 26 through the thermal conductive adhesive layer 24 and finally dissipated to the external environment. If the heat dissipation layer 26 is a graphene layer, the heat dissipation layer 26 may be formed by transfer molding.
Certainly, in other examples, the heat dissipation layer 26 may also be a heat dissipation sheet customized in advance, and the heat dissipation sheet is attached to the thermal conductive adhesive layer 24 to form the heat dissipation layer 26, which is not strictly limited in this embodiment, and the surface area of the heat dissipation sheet is preferably slightly larger than the surface area of the thermal conductive adhesive layer 24, so that after the heat dissipation sheet is attached to the thermal conductive adhesive layer 24, the edge of the heat dissipation sheet can be bent downward along the sidewall of the thermal conductive adhesive layer 24 until covering part of the sidewall of the plastic package material layer 23, so that the heat dissipation sheet and the thermal conductive adhesive layer 24 are attached more tightly and firmly, and a heat dissipation channel on the side surface is provided for the semiconductor package structure, thereby further improving the performance of the semiconductor package structure.
It should be particularly noted that, although the foregoing preparation method is divided into a plurality of steps for the convenience of description, the steps are not strictly distinguished and the order is not limited, for example, the step of forming the heat conductive wire 25 and the step of bonding the chip 22 to the upper surface of the package substrate 21 may be simultaneously completed in the same process, or the bonding of the chip 22 may be completed before forming the heat conductive wire 25; it is also possible to form the thermal conductive wires 25 and then bond the chip 22 to the package substrate 21, and it is important to design the thermal conductive wires according to the process selected in each step. In this embodiment, as an example, the chip 22 is bonded to the upper surface of the package substrate 21 through a bonding wire 27, the heat conducting wire 25 and the bonding wire 27 are formed in the same process, so that in the process of bonding the chip 22 to the upper surface of the package substrate 21, that is, in the process of forming the bonding wire 27, a heat conducting wire 25 is further formed on the surface of the chip 22, the heat conducting wire 25 extends from the surface of the chip 22 to be bonded to the surface of the package substrate 21, that is, one end of the heat conducting wire 25 is bonded to the chip 22, and the other end of the heat conducting wire is bonded to the package substrate 21; the maximum height of the heat conducting wire 25 is greater than the height of the bonding wire 27, and the bonding point of the heat conducting wire 25 and the package substrate 21 is located at one end of the bonding wire 27 far away from the chip 22, then the chip 22, the bonding wire 27 and the heat conducting wire 25 are completely plastically packaged by the plastic package material layer 23 in the plastic package process, after the plastic package material layer 23 is formed, the obtained package structure is flattened (in the direction shown by the horizontal dotted line shown in fig. 8) so that the upper surface of the heat conducting wire 25 is exposed on the surface of the plastic package material layer 23, and further, the bonding part of the heat conducting wire 25 and the package substrate 21 is removed (in the direction shown by the dotted line in the longitudinal direction of fig. 8), so that the semiconductor package structure is further miniaturized.
In this embodiment, the joints of the heat conducting wire 25 and the package substrate 21 are all located on the same side (as shown in fig. 6), so that only one removal process (for example, a cutting process) is required to be performed subsequently when the joint is removed, and in addition, the size requirement of the package substrate 21 can be correspondingly reduced (compared with the case where the joints are located on two sides or more sides), the plastic package workload and the usage amount of the plastic package material in the subsequent plastic package process can be reduced, which is beneficial to the simplification of the manufacturing process and the reduction of the manufacturing cost, and is beneficial to the improvement of the production yield due to the simplification of the manufacturing process.
Certainly, in other processes, the preparation process and the preparation sequence of the heat conducting wire 25 may also have other options, for example, the chip 22 may be bonded on the package substrate 21, then the molding compound layer 23 is formed to completely mold the chip 22, then a through hole (not shown) exposing the chip 22 is formed in the molding compound layer 23, and finally the heat conducting wire 25 is formed in the through hole by depositing metal through a physical vapor deposition process or other processes, and the chip 22 may be directly bonded on the package substrate 21 through a bonding pad, which is not strictly limited in this embodiment. However, with the former method (i.e., forming the heat conducting wire 25 first, then performing plastic package, and then performing planarization), short circuit between the heat conducting wire 25 and the bonding wire 27 can be effectively avoided, and meanwhile, through holes do not need to be formed through processes such as photolithography and etching, and the packaging cost can be effectively reduced.
As an example, the method for manufacturing the semiconductor package structure further includes a step of forming an underfill layer 29 on the lower surface of the package substrate 21; the material of the underfill layer 29 may include, but is not limited to, one or more of polyimide, silicone, and epoxy, and the step of forming the underfill layer 29 includes, but is not limited to, one or more of an inkjet process, a dispensing process, a compression molding process, a transfer molding process, a liquid sealing process, a vacuum lamination process, or a spin coating process.
As an example, the preparation method further includes a step of forming a solder ball bump 28 after forming the underfill layer 29, such as forming a through hole in the underfill layer 29 to expose the lower surface of the package substrate 21, and then depositing metal in the formed through hole by a process such as physical vapor deposition or electroplating to form the solder ball bump 28, where the solder ball bump 28 is connected to the package substrate 21 and is partially covered by the underfill layer 29, that is, the solder ball bump 28 protrudes outward from the surface of the underfill layer 29, and the solder ball bump 28 is used for electrically leading out the semiconductor package structure, and the material of the solder ball bump 28 includes but is not limited to one or more of copper or tin; the underfill layer 29 can provide good protection for the solder ball bumps 28 and the chip 22. The structure finally prepared by the preparation method of this example is shown in fig. 2.
In summary, the present invention provides a semiconductor package structure and a method for fabricating the same, wherein the semiconductor package structure includes a package substrate; the chip is bonded on the upper surface of the packaging substrate; the plastic packaging material layer is positioned on the upper surfaces of the packaging substrate and the chip and is used for plastically packaging the chip; the heat-conducting adhesive layer is positioned on the upper surface of the plastic packaging material layer; the heat conduction lead penetrates through the plastic packaging material layer, and two ends of the heat conduction lead are respectively connected with the chip and the heat conduction adhesive layer; and the heat dissipation layer is positioned on the upper surface of the heat conduction adhesive layer. The semiconductor packaging structure of the invention completely moves the heat dissipation layer to the surface of the whole semiconductor packaging structure, which is beneficial to increasing the heat dissipation area of the heat dissipation layer, and simultaneously conducts the heat dissipated by the chip to the heat dissipation layer through the heat conduction lead, which is beneficial to fast heat dissipation of the chip, thereby being beneficial to improving the performance of the semiconductor packaging structure.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-described embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A semiconductor package structure, comprising:
a package substrate;
the chip is bonded on the upper surface of the packaging substrate;
the plastic packaging material layer is positioned on the upper surfaces of the packaging substrate and the chip and is used for plastically packaging the chip;
the heat-conducting adhesive layer is positioned on the upper surface of the plastic packaging material layer;
the heat conduction lead penetrates through the plastic packaging material layer, and two ends of the heat conduction lead are respectively connected with the chip and the heat conduction adhesive layer;
and the heat dissipation layer is positioned on the upper surface of the heat conduction adhesive layer.
2. The semiconductor package structure of claim 1, wherein: the chip is bonded on the upper surface of the packaging substrate through a bonding wire, and the bonding wire and the heat conducting wire are made of the same material.
3. The semiconductor package structure of claim 1, wherein: the heat-conducting adhesive layer comprises a conductive silver adhesive layer.
4. The semiconductor package structure of claim 1, wherein: the heat dissipation layer has a non-flat surface structure.
5. The semiconductor package structure of any one of claims 1 to 4, wherein: the heat dissipation layer comprises a metal main body layer and a coating layer located on the metal main body layer.
6. A preparation method of a semiconductor packaging structure is characterized by comprising the following steps:
providing a packaging substrate, bonding a chip on the upper surface of the packaging substrate, and forming a heat conducting lead, wherein one end of the heat conducting lead is connected with the chip;
forming a plastic packaging material layer on the upper surfaces of the packaging substrate, the chip and the heat conducting lead, wherein the plastic packaging material layer is used for carrying out plastic packaging on the chip and the heat conducting lead, and the other end of the heat conducting lead is exposed on the surface of the plastic packaging material;
forming a heat-conducting adhesive layer on the surface of the plastic packaging material layer, wherein the heat-conducting adhesive layer is connected with the other end of the heat-conducting lead;
and forming a heat dissipation layer on the surface of the heat conduction adhesive layer.
7. The method for manufacturing a semiconductor package structure according to claim 6, wherein: the heat-conducting adhesive layer comprises a conductive silver adhesive layer.
8. The method for manufacturing a semiconductor package structure according to claim 6, wherein: the heat dissipation layer has a non-flat surface structure.
9. The method for manufacturing a semiconductor package structure according to claim 6, wherein: the heat dissipation layer comprises a metal main body layer and a coating layer located on the metal main body layer.
10. The method for manufacturing a semiconductor package structure according to any one of claims 6 to 9, wherein: the chip is bonded on the upper surface of the packaging substrate through a bonding wire; the heat conducting lead and the bonding lead are formed in the same process, the heat conducting lead extends from the surface of the chip to be jointed with the surface of the packaging substrate, the maximum height of the heat conducting lead is greater than the height of the bonding lead, and the joint of the heat conducting lead and the packaging substrate is positioned at one end of the bonding lead, which is far away from the chip; the plastic packaging material layer is used for completely plastic packaging the chip, the bonding lead and the heat conducting lead; the preparation method of the semiconductor packaging structure further comprises the steps of flattening the packaging structure obtained after the plastic packaging material layer is formed before the heat conducting adhesive layer is formed, and removing the joint part of the heat conducting lead and the packaging substrate.
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| CN115273672A (en) * | 2022-08-22 | 2022-11-01 | 京东方科技集团股份有限公司 | Display device and display module thereof |
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| CN115273672A (en) * | 2022-08-22 | 2022-11-01 | 京东方科技集团股份有限公司 | Display device and display module thereof |
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