TWI512309B - Automatic test equipment and control method thereof - Google Patents

Automatic test equipment and control method thereof Download PDF

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TWI512309B
TWI512309B TW102148866A TW102148866A TWI512309B TW I512309 B TWI512309 B TW I512309B TW 102148866 A TW102148866 A TW 102148866A TW 102148866 A TW102148866 A TW 102148866A TW I512309 B TWI512309 B TW I512309B
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module
signal
automatic test
test device
test
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TW201525492A (en
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Wen Yue Chuang
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Chroma Ate Inc
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Description

自動測試設備及其控制方法Automatic test equipment and control method thereof

本發明有關於一種自動測試設備及其控制方法,且特別是有關於一種適用於平行測試架構的自動測試設備及其控制方法。The invention relates to an automatic test device and a control method thereof, and in particular to an automatic test device suitable for a parallel test architecture and a control method thereof.

目前市面上的自動測試設備(automatic test equipment,ATE)在對待測裝置(device under test,DUT)進行類比波形(analog waveform)的測試時,測試人員僅需依照測試需求輸入所需之資料與其所需測試的參數(例如類比波形的頻率),自動測試設備即可依照上述輸入之資料與參數對待測裝置輸入類比波形,並接收由待測裝置所反饋的波形,以作為類比測試用途。At present, the automatic test equipment (ATE) on the market performs the analog waveform test on the device under test (DUT). The tester only needs to input the required data according to the test requirements. The parameters to be tested (such as the frequency of the analog waveform), the automatic test equipment can input the analog waveform according to the input data and parameters, and receive the waveform fed back by the device under test for analog test purposes.

上述這種類比波形的產生方式是透過軟體的演算後載入硬體記憶體而達成,此硬體記憶體需事先寫入對應的資料,且一組測試的參數所對應的資料僅能儲存於一個硬體記憶體中。The generation of the analog waveform described above is achieved by loading the hardware into the hardware memory, and the hardware memory needs to be written in advance, and the data corresponding to a set of test parameters can only be stored in the data. In a hardware memory.

然而,隨著現今半導體製程的進步,自動測試設備已漸漸朝向高密度且複雜的平行測試架構演進,以符合高 密度測試通道的需求,但目前的自動測試設備針對類比測試有很多資源的限制(例如測試深度與不同site間的測試頻率),這些限制會使得原本已為數不多的類比通道的自動測試設備在使用上更顯出窘境。However, with the advancement of today's semiconductor processes, automated test equipment has evolved toward high-density and complex parallel test architectures to meet high The requirements of the density test channel, but the current automatic test equipment has many resource limitations for the analog test (such as the test depth and the test frequency between different sites), these restrictions will make the automatic test equipment of the original analog channel The use of the situation is even more obvious.

有鑒於以上的問題,本揭露提出一種自動測試設備及其控制方法,其透過多工模組與控制模組之設計,使得自動測試設備僅需單一個實體記憶體即能實現平行測試架構,增加了此實體記憶體的使用效率。In view of the above problems, the present disclosure provides an automatic test device and a control method thereof. The design of the multiplex module and the control module enables the automatic test device to implement a parallel test architecture by only a single physical memory. The efficiency of the use of this physical memory.

根據本揭露一實施例中的一種自動測試設備,此自動測試設備用於測試第一待測裝置。此自動測試設備主要包括儲存模組、第一多工模組、控制模組以及第一數位類比轉換模組,其中控制模組電性連接儲存模組與第一多工模組,第一數位類比轉換模組電性連接第一多工模組的輸出端與控制模組。儲存模組用以儲存複數個資料訊號。第一多工模組用以接收具有不同頻率的複數個時脈訊號並依據控制訊號由所述多個時脈訊號中選擇其中之一輸出。控制模組用以產生控制訊號,並選擇性地讀取儲存模組中的所述多個資料訊號其中之一。第一數位類比轉換模組用以依據第一多工模組所輸出的時脈訊號與被控制模組讀取的資料訊號產生第一測試訊號,並輸出此第一測試訊號至第一待測裝置。An automatic test device for testing a first device under test according to an embodiment of the present disclosure. The automatic test device mainly comprises a storage module, a first multiplex module, a control module and a first digital analog conversion module, wherein the control module is electrically connected to the storage module and the first multiplex module, and the first digit The analog conversion module is electrically connected to the output end of the first multiplex module and the control module. The storage module is configured to store a plurality of data signals. The first multiplex module is configured to receive a plurality of clock signals having different frequencies and output one of the plurality of clock signals according to the control signal. The control module is configured to generate a control signal and selectively read one of the plurality of data signals in the storage module. The first digital analog conversion module is configured to generate a first test signal according to the clock signal output by the first multiplex module and the data signal read by the control module, and output the first test signal to the first test Device.

於一實施例中,自動測試設備於接收到第一待測 裝置所輸出的反饋訊號時,第一數位類比轉換模組會至少依據所述多個時脈訊號其中之一對反饋訊號進行取樣,並據以產生測試結果訊號。In an embodiment, the automatic test equipment receives the first test When the feedback signal is output by the device, the first digital analog conversion module samples the feedback signal according to at least one of the plurality of clock signals, and generates a test result signal accordingly.

根據本揭露一實施例中的一種自動測試設備控制方法,此自動測試設備控制方法用於以自動測試設備測試第一待測裝置。此自動測試設備控制方法的步驟流程如下所述。接收具有不同頻率的複數個時脈訊號,並由所述多個時脈訊號中選擇其中之一。選擇性地讀取自動測試設備中的複數個資料訊號其中之一。依據被選擇的時脈訊號與被讀取的資料訊號產生第一測試訊號,並輸出此第一測試訊號至第一待測裝置。According to an embodiment of the present disclosure, an automatic test device control method for testing a first device under test with an automatic test device is provided. The flow of steps of this automatic test equipment control method is as follows. Receiving a plurality of clock signals having different frequencies, and selecting one of the plurality of clock signals. Optionally reading one of a plurality of data signals in the automatic test equipment. And generating a first test signal according to the selected clock signal and the read data signal, and outputting the first test signal to the first device under test.

於一實施例中,自動測試設備於接收到第一待測裝置所輸出的反饋訊號時,此自動測試設備更至少依據所述多個時脈訊號其中之一對此反饋訊號進行取樣,並據以產生測試結果訊號。In an embodiment, when the automatic test device receives the feedback signal output by the first device under test, the automatic test device further samples the feedback signal according to at least one of the plurality of clock signals, and according to To generate test result signals.

綜合以上所述,本揭露提供一種自動測試設備及其控制方法,此自動測試設備透過多工模組可以由複數個時脈訊號選擇其中之一來給對應的數位類比轉換模組之特性,使得數位類比轉換模組可依據多工模組所選擇的時脈訊號與儲存模組中所儲存的複數個資料訊號其中之一來產生一種提供給待測裝置的測試訊號。另一方面,在自動測試設備接收到待測裝置所輸出的反饋訊號時,數位類比轉換模組更可以 依據多工模組所選擇的時脈訊號來對此反饋訊號進行取樣,以將反饋訊號解調回測試結果訊號。In summary, the present disclosure provides an automatic test device and a control method thereof. The automatic test device can select one of a plurality of clock signals through a multiplex module to give characteristics of a corresponding digital analog conversion module. The digital analog conversion module can generate a test signal for the device to be tested according to one of the clock signal selected by the multiplex module and the plurality of data signals stored in the storage module. On the other hand, when the automatic test equipment receives the feedback signal output by the device under test, the digital analog conversion module can The feedback signal is sampled according to the clock signal selected by the multiplex module to demodulate the feedback signal back to the test result signal.

以上之關於本揭露內容之說明及以下之實施方式之說明係用以示範與解釋本發明之精神與原理,並且提供本發明之專利申請範圍更進一步之解釋。The above description of the disclosure and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention, and to provide further explanation of the scope of the invention.

1、1’‧‧‧自動測試設備1, 1'‧‧‧Automatic test equipment

100‧‧‧儲存模組100‧‧‧ storage module

102、102a、102b‧‧‧多工模組102, 102a, 102b‧‧‧Multiplex modules

104‧‧‧控制模組104‧‧‧Control Module

106、106a、106b‧‧‧數位類比轉換模組106, 106a, 106b‧‧‧Digital analog conversion module

108‧‧‧切換模組108‧‧‧Switching module

2、2a、2b‧‧‧待測裝置2, 2a, 2b‧‧‧ device under test

S300~S304‧‧‧步驟流程S300~S304‧‧‧Step process

第1圖係為根據本揭露一實施例之自動測試設備的功能方塊圖。1 is a functional block diagram of an automatic test equipment according to an embodiment of the present disclosure.

第2圖係為根據本揭露另一實施例之自動測試設備的功能方塊圖。2 is a functional block diagram of an automatic test equipment according to another embodiment of the present disclosure.

第3圖係為根據本揭露一實施例之自動測試設備控制方法的步驟流程圖。FIG. 3 is a flow chart showing the steps of the automatic test equipment control method according to an embodiment of the present disclosure.

以下在實施方式中詳細敘述本發明之詳細特徵以及優點,其內容足以使任何熟習相關技藝者了解本發明之技術內容並據以實施,且根據本說明書所揭露之內容、申請專利範圍及圖式,任何熟習相關技藝者可輕易地理解本發明相關之目的及優點。以下之實施例係進一步詳細說明本發明之觀點,但非以任何觀點限制本發明之範疇。The detailed features and advantages of the present invention are set forth in the Detailed Description of the Detailed Description of the <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; The objects and advantages associated with the present invention can be readily understood by those skilled in the art. The following examples are intended to describe the present invention in further detail, but are not intended to limit the scope of the invention.

〔自動測試設備之一實施例〕[An example of an automatic test equipment]

請參照第1圖,第1圖係為根據本揭露一實施例 之自動測試設備的功能方塊圖。如第1圖所示,此自動測試設備1用於測試第一待測裝置2,此自動測試設備1主要包括儲存模組100、第一多工模組102、控制模組104以及第一數位類比轉換模組106,其中第一多工模組102與第一數位類比轉換模組106互相電性連接,且儲存模組100、第一多工模組102以及第一數位類比轉換模組106皆與控制模組104電性連接。以下將分別就自動測試設備1中的各部功能模組作詳細的說明。Please refer to FIG. 1 , which is an embodiment according to the present disclosure. Functional block diagram of the automatic test equipment. As shown in FIG. 1 , the automatic test equipment 1 is used to test the first device 2 to be tested. The automatic test device 1 mainly includes a storage module 100 , a first multiplex module 102 , a control module 104 , and a first digit The analog conversion module 106, wherein the first multiplex module 102 and the first digital analog conversion module 106 are electrically connected to each other, and the storage module 100, the first multiplex module 102, and the first digital analog conversion module 106 Both are electrically connected to the control module 104. The function modules of each part of the automatic test equipment 1 will be described in detail below.

儲存模組100用以儲存複數個資料訊號,其中此資料訊號係為自動測試設備1欲對第一待測裝置2進行測試的數位資料。於實務上,儲存模組100可以為一種可程式化唯讀記憶體(programmable read-only memory,PROM)、可擦可程式化唯讀記憶體(erasable programmable read-only memory,EPROM)、可電擦可程式化唯讀記憶體(electrically erasable programmable read-only memory,EEPROM)、快閃記憶體(flash memory)等非揮發性記憶體(non-volatile memory),或者是可以為一種動態隨機存取記憶體(dynamic random access memory,DRAM)、靜態隨機存取記憶體(static random access memory,SRAM)等揮發性記憶體(volatile memory),本發明在此不加以限制。The storage module 100 is configured to store a plurality of data signals, wherein the data signals are digital data that the automatic testing device 1 wants to test the first device under test 2 . In practice, the storage module 100 can be a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), and an electrical A non-volatile memory such as an electrically erasable programmable read-only memory (EEPROM) or a flash memory, or a dynamic random access A volatile memory such as a dynamic random access memory (DRAM) or a static random access memory (SRAM) is not limited herein.

第一多工模組102用以接收具有不同頻率的複數個時脈訊號,並依據控制模組104所產生的控制訊號而由 所述多個時脈訊號中選擇其中之一輸出。於實務上,第一多工模組102可以為一種多工器(multiplexer,MUX),由於多工器技術已為於所屬技術領域具有通常知識者所慣用技術,故在此不再特別贅述。The first multiplex module 102 is configured to receive a plurality of clock signals having different frequencies, and according to the control signals generated by the control module 104 One of the plurality of clock signals is selected for output. In practice, the first multiplex module 102 can be a multiplexer (MUX). Since the multiplexer technology is already used by those skilled in the art, it will not be further described herein.

此外,自動測試設備1更可以包括有時脈產生模組(未繪示於圖式),此時脈產生模組電性連接第一多工模組102,且此時脈產生模組用以對第一多工模組102提供所述多個時脈訊號。於實務上,時脈產生模組為一種振盪器(oscillator),且此振盪器可以依據自動測試設備1的實際需求而逕行設定所輸出時脈訊號的頻率以及數量。In addition, the automatic test equipment 1 may further include a pulse generation module (not shown), wherein the pulse generation module is electrically connected to the first multiplex module 102, and the pulse generation module is used for The plurality of clock signals are provided to the first multiplex module 102. In practice, the clock generation module is an oscillator, and the oscillator can set the frequency and quantity of the output clock signal according to the actual requirements of the automatic test equipment 1.

控制模組104用以產生上述的控制訊號,並選擇性地從儲存模組100中讀取所述多個資料訊號其中之一。於實務上,控制模組可以為一種場可程式邏輯閘陣列(field programmable gate array,FPGA)、微控制器(microcontroller,MCU)或中央處理器(central processing unit,CPU),本發明在此不加以限制。The control module 104 is configured to generate the control signal and selectively read one of the plurality of data signals from the storage module 100. In practice, the control module can be a field programmable gate array (FPGA), a microcontroller (MCU), or a central processing unit (CPU). The present invention does not Limit it.

第一數位類比轉換模組106用以依據第一多工模組102所輸出的時脈訊號與被控制模組104讀取的資料訊號而產生一個第一測試訊號,並輸出此第一測試訊號至第一待測裝置2。換句話說,第一數位類比轉換模組106用以將第一多工模組102所輸出的時脈訊號的頻率以及被控制模組104讀取的資料訊號的數位資料進行調變,並據以產生一種類比 測試訊號,並將此類比測試訊輸出至第一待測裝置2,使得第一待測裝置2可以依據此類比測試訊號進行測試程序。The first digital analog conversion module 106 is configured to generate a first test signal according to the clock signal output by the first multiplex module 102 and the data signal read by the control module 104, and output the first test signal. To the first device under test 2. In other words, the first digital analog conversion module 106 is configured to modulate the frequency of the clock signal output by the first multiplex module 102 and the digital data of the data signal read by the control module 104, and according to To produce an analogy The test signal is outputted to the first device under test 2 so that the first device under test 2 can perform a test procedure according to such a comparison test signal.

此外,當自動測試設備1接收到第一待測裝置2所輸出的反饋訊號(即第一待測裝置2依據第一測試訊號進行測試程序時所產生的訊號)時,第一數位類比轉換模組106至少會依據所述多個時脈訊號其中之一對上述的反饋訊號進行取樣,並據以產生一個測試結果訊號。換句話說,當自動測試設備1接收到第一待測裝置2所輸出的反饋訊號時,第一數位類比轉換模組106會依據所述多個時脈訊號其中之一的頻率,將屬於類比訊號的反饋訊號進行取樣,以將上述的反饋訊號解調為具有複數個取樣點的測試結果訊號。於實務上,第一數位類比轉換模組106可以為一種數位類比轉換器(digital to analog converter,DAC)與類比數位轉換器(analog to digital converter,ADC)所組成之組合電路。In addition, when the automatic test equipment 1 receives the feedback signal output by the first device under test 2 (ie, the signal generated when the first device under test 2 performs a test procedure according to the first test signal), the first digital analog conversion mode The group 106 samples the feedback signal according to at least one of the plurality of clock signals, and generates a test result signal accordingly. In other words, when the automatic test device 1 receives the feedback signal output by the first device under test 2, the first digital analog conversion module 106 will be classified according to the frequency of one of the multiple clock signals. The feedback signal of the signal is sampled to demodulate the above feedback signal into a test result signal having a plurality of sampling points. In practice, the first digital analog conversion module 106 can be a combination of a digital to analog converter (DAC) and an analog to digital converter (ADC).

在實際的操作中,第一數位類比轉換模組106更可透過探針(probe)或是其他傳輸埠來與第一待測裝置2電性連接,本發明在此不加以限制。此外,當第一數位類比轉換模組106將反饋訊號解調回測試結果訊號後,控制模組104更可以將屬於數位訊號的測試結果訊號寫入至儲存模組100中,或是直接將此測試結果訊號以圖像、數值或聲音的方式提供給測試人員,本發明在此不加以限制。In the actual operation, the first digital analog conversion module 106 can be electrically connected to the first device 2 to be tested through a probe or other transmission port. The invention is not limited herein. In addition, after the first digital analog conversion module 106 demodulates the feedback signal back to the test result signal, the control module 104 can further write the test result signal belonging to the digital signal to the storage module 100, or directly The test result signal is provided to the tester in the form of image, numerical value or sound, and the invention is not limited thereto.

因此,自動測試設備1更可包括有提示模組(未 繪示於圖式),此提示模組電性連接控制模組104,此提示模組用以依據上述的測試結果訊號而產生一組提示訊號,此提示訊號用以指示測試結果訊號中的資訊。於實務上,提示模組可以為一種顯示模組(例如發光二極體、顯示面板、七段顯示器等電子顯示元件)或是發聲模組(例如喇叭、蜂鳴器等電子發聲元件),本發明在此不加以限制。若提示模組為顯示模組的話,則提示訊號係以影像或是光線之型式呈現給測試人員;若提示模組為發聲模組的話,則提示訊號係以聲音之型式呈現給測試人員。Therefore, the automatic test equipment 1 may further include a prompt module (not The prompting module is electrically connected to the control module 104. The prompting module is configured to generate a group of prompt signals according to the test result signal, and the prompt signal is used to indicate information in the test result signal. . In practice, the prompting module can be a display module (such as a light-emitting diode, a display panel, a seven-segment display, etc.) or a sounding module (such as an electronic sounding component such as a speaker or a buzzer). The invention is not limited herein. If the prompting module is a display module, the prompt signal is presented to the tester in the form of image or light; if the prompting module is a sounding module, the prompt signal is presented to the tester in the form of sound.

〔自動測試設備之另一實施例〕[Another embodiment of automatic test equipment]

請參照第2圖,第2圖係為根據本揭露另一實施例之自動測試設備的功能方塊圖。如第2圖所示,此自動測試設備1’用於測試第一待測裝置2a與第二待測裝置2b,此自動測試設備1’主要包括儲存模組100、第一多工模組102a、第二多工模組102b、控制模組104、第一數位類比轉換模組106a、第二數位類比轉換模組106b以及切換模組108,其中第一多工模組102a與第一數位類比轉換模組106a互相電性連接,第二多工模組102b與第二數位類比轉換模組106b互相電性連接,切換模組108電性連接於第一數位類比轉換模組106a與第二數位類比轉換模組106b之間,且儲存模組100、第一多工模組102a、第二多工模組102b以及切換模組108皆與控制模組104電性連接。Please refer to FIG. 2, which is a functional block diagram of an automatic test equipment according to another embodiment of the present disclosure. As shown in FIG. 2, the automatic test equipment 1' is used for testing the first device under test 2a and the second device under test 2b. The automatic test device 1' mainly includes a storage module 100 and a first multiplex module 102a. The second multiplex module 102b, the control module 104, the first digital analog conversion module 106a, the second digital analog conversion module 106b, and the switching module 108, wherein the first multiplex module 102a is compared with the first digit The conversion module 106a is electrically connected to each other, the second multiplex module 102b and the second digital analog conversion module 106b are electrically connected to each other, and the switching module 108 is electrically connected to the first digital analog conversion module 106a and the second digit. The storage module 100, the first multiplex module 102a, the second multiplex module 102b, and the switching module 108 are electrically connected to the control module 104.

由於本實施例之自動測試設備1’之大部份的功能模組與前一實施例之自動測試設備1相同,其主要差別僅在於功能模組的個數不同,例如本實施例之自動測試設備1’中的第一多工模組102a與第二多工模組102b皆相同於前一實施例之自動測試設備1的第一多工模組102,本實施例之自動測試設備1’中的第一數位類比轉換模組106a與第二數位類比轉換模組106b皆相同於前一實施例之自動測試設備1的第一數位類比轉換模組106,故本實施例在此不再加以贅述相同的功能模組的作動方式。Since most of the functional modules of the automatic test equipment 1' of the present embodiment are the same as the automatic test equipment 1 of the previous embodiment, the main difference is only in the number of functional modules, such as the automatic test of this embodiment. The first multiplex module 102a and the second multiplex module 102b of the device 1' are the same as the first multiplex module 102 of the automatic test device 1 of the previous embodiment. The automatic test device 1' of this embodiment The first digital analog conversion module 106a and the second digital analog conversion module 106b are the same as the first digital analog conversion module 106 of the automatic test equipment 1 of the previous embodiment, so the present embodiment does not Describe the operation of the same functional module.

與前一實施例之自動測試設備1不同的是,本實施例之自動測試設備1’更包括有切換模組108,此切換模組108受控於控制模組101,而使得切換模組108可以選擇性地導通儲存模組100與第一數位類比轉換模組106a之間的路徑或儲存模組100與第二數位類比轉換模組106b之間的路徑。Different from the automatic test equipment 1 of the previous embodiment, the automatic test equipment 1 ′ of the embodiment further includes a switch module 108 controlled by the control module 101 to make the switch module 108 The path between the storage module 100 and the first digital analog conversion module 106a or the path between the storage module 100 and the second digital analog conversion module 106b can be selectively turned on.

藉此,在實際的操作中,本實施例之自動測試設備1’可以透過切換模組108對第一待測裝置2a與第二待測裝置2b進行平行測試的動作。舉例來說,於自動測試設備1’接收到第一待測裝置2a所輸出的反饋訊號而使第一數位類比轉換模組106a對此反饋訊號進行取樣的過程中,切換模組108會導通儲存模組100與第二數位類比轉換模組106b之間的路徑,使得第二數位類比轉換模組106b可以依據第二多工模組102b所輸出的時脈訊號與被控制模組104讀取的資料訊號而 產生一個第二測試訊號。接著,於第二數位類比轉換模組106b輸出第二測試訊號至第二待測裝置2b的過程中,切換模組108會導通儲存模組100與第一數位類比轉換模組106b之間的路徑,以使控制模組104可以將第一數位類比轉換模組106a所產生的測試結果訊號寫入至儲存模組100,或是將測試結果訊號以圖像、數值或聲音的方式提供給測試人員。Therefore, in the actual operation, the automatic test equipment 1' of the embodiment can perform the parallel test action on the first device under test 2a and the second device under test 2b through the switching module 108. For example, in the process that the automatic test equipment 1' receives the feedback signal output by the first device under test 2a and causes the first digital analog conversion module 106a to sample the feedback signal, the switching module 108 turns on the storage. The path between the module 100 and the second digital analog conversion module 106b is such that the second digital analog conversion module 106b can be read by the control module 104 according to the clock signal output by the second multiplexing module 102b. Information signal Generate a second test signal. Then, in the process that the second digital analog conversion module 106b outputs the second test signal to the second device under test 2b, the switching module 108 turns on the path between the storage module 100 and the first digital analog conversion module 106b. So that the control module 104 can write the test result signal generated by the first digital analog conversion module 106a to the storage module 100, or provide the test result signal to the tester in an image, numerical value or sound manner. .

此外,雖然本實施例之自動測試設備1’係為具有兩個多工模組(即第一多工模組102a與第二多工模組102b)與兩個數位類比轉換模組(即第一數位類比轉換模組106a與第二數位類比轉換模組106b),但本發明在此不加以限制自動測試設備中的多工模組與數位類比轉換模組的個數,於所屬技術領域具有通常知識者可以依據所欲同時測試之待測裝置的個數而逕行設計出合理之結構。In addition, although the automatic test equipment 1' of the embodiment has two multiplex modules (ie, the first multiplex module 102a and the second multiplex module 102b) and two digital analog conversion modules (ie, a digital analog conversion module 106a and a second digital analog conversion module 106b), but the present invention does not limit the number of multiplex modules and digital analog conversion modules in the automatic test equipment, and has the technical field. Usually, the knowledger can design a reasonable structure according to the number of devices to be tested that are simultaneously tested.

值得注意的是,由於本發明實施例之自動測試設備1’可以透過控制模組104與切換模組108之作用來達成儲存模組100的資源分配,使得本發明實施例之儲存模組100可以為一種單一記憶體,此單一記憶體具有複數個記憶區塊(memory block),每一個記憶區塊儲存有所述多個資料訊號其中之一。此外,某些情況下,控制模組104可將測試結果訊號寫入至儲存模組100中的其中一個記憶區塊中。It is to be noted that the automatic test device 1 ′ of the embodiment of the present invention can achieve the resource allocation of the storage module 100 through the function of the control module 104 and the switch module 108 , so that the storage module 100 of the embodiment of the present invention can For a single memory, the single memory has a plurality of memory blocks, each of which stores one of the plurality of data signals. In addition, in some cases, the control module 104 can write the test result signal into one of the memory blocks in the storage module 100.

〔自動測試設備控制方法之一實施例〕[An example of an automatic test equipment control method]

請第3圖,第3圖係為根據本揭露一實施例之自 動測試設備控制方法的步驟流程圖。如第3圖所示,此自動測試設備控制方法適用於第1圖所繪示之自動測試設備1或第2圖所繪示之自動測試設備1’。以下將分別就自動測試設備控制方法中的各步驟流程作詳細的說明。Please refer to FIG. 3, which is a diagram according to an embodiment of the present disclosure. Flow chart of the steps of the dynamic test equipment control method. As shown in Fig. 3, the automatic test equipment control method is applied to the automatic test equipment 1 shown in Fig. 1 or the automatic test equipment 1' shown in Fig. 2. The steps of each step in the automatic test equipment control method will be described in detail below.

在步驟S300中,自動測試設備1(或自動測試設備1’)會接收具有不同頻率的複數個時脈訊號,並由這些時脈訊號中選擇其中之一。在步驟S302中,自動測試設備1(或自動測試設備1’)會選擇性地讀取自動測試設備1(或自動測試設備1’)中的複數個資料訊號其中之一。在步驟S304中,自動測試設備1(或自動測試設備1’)會依據被選擇的時脈訊號與被讀取的資料訊號來產生一個第一測試訊號,並輸出此第一測試訊號至第一待測裝置2(或第一待測裝置2a)。In step S300, the automatic test equipment 1 (or the automatic test equipment 1') receives a plurality of clock signals having different frequencies, and selects one of the clock signals. In step S302, the automatic test equipment 1 (or the automatic test equipment 1') selectively reads one of the plurality of data signals in the automatic test equipment 1 (or the automatic test equipment 1'). In step S304, the automatic test equipment 1 (or the automatic test equipment 1') generates a first test signal according to the selected clock signal and the read data signal, and outputs the first test signal to the first Device 2 to be tested (or first device under test 2a).

值得注意的是,本實施例之自動測試設備控制方法在此不加以限制步驟S300與步驟S302的先後順序,換句話說,步驟S302可以執行於步驟S300之前,或是步驟S300與步驟S302可以同時一起被執行。此外,自動測試設備1(或自動測試設備1’)中的記憶體個數僅具有一個實體記憶體,此實體記憶體具有複數個記憶區塊,此記憶區塊儲存有所述多個資料訊號其中之一。It should be noted that the automatic test device control method in this embodiment does not limit the sequence of step S300 and step S302. In other words, step S302 may be performed before step S300, or step S300 and step S302 may be simultaneously performed. Executed together. In addition, the number of memories in the automatic test device 1 (or the automatic test device 1') has only one physical memory, and the physical memory has a plurality of memory blocks, and the memory block stores the plurality of data signals. one of them.

除此之外,自動測試設備1(或自動測試設備1’)於接收到第一待測裝置2(或第一待測裝置2a)所輸出的反饋訊號時,自動測試設備1(或自動測試設備1’)更至少依據所述 多個時脈訊號其中之一對此反饋訊號進行取樣,並據以產生一個測試結果訊號。在某些情況下,上述的測試結果訊號會被寫入至自動測試設備1(或自動測試設備1’)的實體記憶體中。In addition, the automatic test device 1 (or the automatic test device 1') automatically tests the device 1 (or automatically tests) when receiving the feedback signal output by the first device under test 2 (or the first device under test 2a). Device 1') is further based at least on the One of the multiple clock signals samples the feedback signal and generates a test result signal accordingly. In some cases, the above test result signal will be written to the physical memory of the automatic test equipment 1 (or the automatic test equipment 1').

承接上述,於自動測試設備1’接收到第一待測裝置2a所輸出的反饋訊號而對反饋訊號進行取樣的步驟中,自動測試設備1’更可以依據被第二多工模組102b所選擇的時脈訊號與被讀取的資料訊號產生一個第二測試訊號,並輸出此第二測試訊號至第二待測裝置2b。In the above, in the step that the automatic test device 1' receives the feedback signal output by the first device under test 2a and samples the feedback signal, the automatic test device 1' can be selected according to the second multiplex module 102b. The clock signal and the read data signal generate a second test signal, and the second test signal is output to the second device under test 2b.

〔實施例的可能功效〕[Possible effects of the examples]

綜合以上所述,本發明實施例提供一種自動測試設備及其控制方法,此自動測試設備透過多工模組可以由複數個時脈訊號選擇其中之一來給對應的數位類比轉換模組之特性,使得數位類比轉換模組可依據多工模組所選擇的時脈訊號與儲存模組中所儲存的複數個資料訊號其中之一來產生一種提供給待測裝置的測試訊號。另一方面,在自動測試設備接收到待測裝置所輸出的反饋訊號時,數位類比轉換模組更可以依據多工模組所選擇的時脈訊號來對此反饋訊號進行取樣,以將反饋訊號解調回測試結果訊號。藉此,本發明實施例之自動測試設備及其控制方法可以對儲存模組進行有效率的資源分配,使得儲存模組僅需單一個記憶體即能達成一次測試複數個待測裝置的平行測試架構,除了可以降低自動 測試設備的製造成本與減少PCB在設計上的總面積外,更可以增加記憶體的使用效率,十分具有實用性。In summary, the embodiments of the present invention provide an automatic test device and a control method thereof. The automatic test device can select one of a plurality of clock signals through a multiplex module to give characteristics of a corresponding digital analog conversion module. The digital analog conversion module can generate a test signal for the device to be tested according to one of the clock signal selected by the multiplex module and the plurality of data signals stored in the storage module. On the other hand, when the automatic test equipment receives the feedback signal output by the device under test, the digital analog conversion module can further sample the feedback signal according to the clock signal selected by the multiplex module to provide a feedback signal. Demodulate the test result signal back. Therefore, the automatic test equipment and the control method thereof in the embodiments of the present invention can perform efficient resource allocation on the storage module, so that the storage module can achieve parallel testing of a plurality of devices to be tested only by using a single memory. Architecture, in addition to reducing auto In addition to reducing the manufacturing cost of the test equipment and reducing the total area of the PCB, it can increase the efficiency of memory usage and is very practical.

雖然本發明以上述之實施例揭露如上,然其並非用以限定本發明。在不脫離本發明之精神和範圍內,所為之更動與潤飾,均屬本發明之專利保護範圍。關於本發明所界定之保護範圍請參考所附之申請專利範圍。Although the present invention has been disclosed above in the above embodiments, it is not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention.

1‧‧‧自動測試設備1‧‧‧Automatic test equipment

100‧‧‧儲存模組100‧‧‧ storage module

102‧‧‧多工模組102‧‧‧Multiplex modules

104‧‧‧控制模組104‧‧‧Control Module

106‧‧‧數位類比轉換模組106‧‧‧Digital analog conversion module

2‧‧‧待測裝置2‧‧‧Device under test

Claims (10)

一種自動測試設備,用於測試一第一待測裝置,該自動測試設備包括:一儲存模組,用以儲存複數個資料訊號;一第一多工模組,用以接收具有不同頻率的複數個時脈訊號,並依據一控制訊號由該些時脈訊號中選擇其中之一輸出;一控制模組,電性連接該儲存模組與該第一多工模組,用以產生該控制訊號,並選擇性地讀取該些資料訊號其中之一;以及一第一數位類比轉換模組,電性連接該第一多工模組的輸出端與該控制模組,用以依據該第一多工模組所輸出的該時脈訊號與被該控制模組讀取的該資料訊號產生一第一測試訊號,並輸出該第一測試訊號至該第一待測裝置。An automatic test device for testing a first device under test, the automatic test device comprising: a storage module for storing a plurality of data signals; and a first multiplex module for receiving a plurality of frequencies having different frequencies a clock signal, which is selected by one of the clock signals according to a control signal; a control module electrically connected to the storage module and the first multiplex module for generating the control signal And selectively reading one of the data signals; and a first digital analog conversion module electrically connecting the output end of the first multiplex module and the control module, according to the first The clock signal outputted by the multiplex module generates a first test signal with the data signal read by the control module, and outputs the first test signal to the first device under test. 如請求項1所述之自動測試設備,其中該自動測試設備於接收到該第一待測裝置所輸出的一反饋訊號時,該第一數位類比轉換模組至少依據該些時脈訊號其中之一對該反饋訊號進行取樣,並據以產生一測試結果訊號。The automatic test device of claim 1, wherein the first digital analog conversion module is based on at least the clock signals when the automatic test device receives a feedback signal output by the first device under test The feedback signal is sampled and a test result signal is generated accordingly. 如請求項2所述之自動測試設備,其中該自動測試設備更包括:一第二多工模組,電性連接該控制模組,用以接收該 些時脈訊號,並依據該控制訊號由該些時脈訊號中選擇其中之一輸出;以及一第二數位類比轉換模組,電性連接該第二多工模組的輸出端與該控制模組,於該自動測試設備接收到該第一待測裝置所輸出的該反饋訊號而使該第一數位類比轉換模組對該反饋訊號進行取樣的過程中,該第二數位類比轉換模組依據該第二多工模組所輸出的該時脈訊號與被該控制模組讀取的該資料訊號產生一第二測試訊號,並輸出該第二測試訊號至一第二待測裝置。The automatic test device of claim 2, wherein the automatic test device further comprises: a second multiplex module electrically connected to the control module for receiving the The clock signal is selected by one of the clock signals according to the control signal; and a second digital analog conversion module is electrically connected to the output end of the second multiplex module and the control mode And the second digital analog conversion module is configured according to the automatic test device receiving the feedback signal output by the first device under test and causing the first digital analog conversion module to sample the feedback signal. The clock signal outputted by the second multiplex module generates a second test signal with the data signal read by the control module, and outputs the second test signal to a second device under test. 如請求項3所述之自動測試設備,其中該自動測試設備更包括一切換模組,該切換模組電性連接於該控制模組、該第一數位類比轉換模組與該第二數位類比轉換模組之間,該切換模組用以選擇性地導通該儲存模組與該第一數位類比轉換模組之間的路徑或該儲存模組與該第二數位類比轉換模組之間的路徑。The automatic test device of claim 3, wherein the automatic test device further includes a switch module electrically connected to the control module, the first digital analog conversion module and the second digital analogy Between the conversion modules, the switching module is configured to selectively turn on a path between the storage module and the first digital analog conversion module or between the storage module and the second digital analog conversion module. path. 如請求項1所述之自動測試設備,其中該自動測試設備更包括一時脈產生模組,該時脈產生模組電性連接該第一多工模組,該時脈產生模組用以提供該些時脈訊號。The automatic test device of claim 1, wherein the automatic test device further comprises a clock generation module, wherein the clock generation module is electrically connected to the first multiplex module, and the clock generation module is configured to provide These clock signals. 如請求項1所述之自動測試設備,其中該儲存模組係為一單一記憶體,該單一記憶體具有複數個記憶區塊,每一該記憶區塊儲存該些資料訊號其中之一。The automatic test device of claim 1, wherein the storage module is a single memory, the single memory has a plurality of memory blocks, and each of the memory blocks stores one of the data signals. 一種自動測試設備控制方法,用於以一自動測試設備測試 一第一待測裝置,該自動測試設備控制方法包括:接收具有不同頻率的複數個時脈訊號,並由該些時脈訊號中選擇其中之一;選擇性地讀取該自動測試設備中的複數個資料訊號其中之一;以及依據被選擇的該時脈訊號與被讀取的該資料訊號產生一第一測試訊號,並輸出該第一測試訊號至該第一待測裝置。An automatic test device control method for testing with an automatic test device a first device under test, the automatic test device control method includes: receiving a plurality of clock signals having different frequencies, and selecting one of the clock signals; selectively reading the automatic test device One of the plurality of data signals; and generating a first test signal according to the selected clock signal and the read data signal, and outputting the first test signal to the first device under test. 如請求項7所述之自動測試設備控制方法,其中該自動測試設備於接收到該第一待測裝置所輸出的一反饋訊號時,該自動測試設備更至少依據該些時脈訊號其中之一對該反饋訊號進行取樣,並據以產生一測試結果訊號。The automatic test device control method of claim 7, wherein the automatic test device receives at least one feedback signal output by the first device under test, the automatic test device is further based on at least one of the clock signals The feedback signal is sampled and a test result signal is generated accordingly. 如請求項8所述之自動測試設備控制方法,其中於該自動測試設備接收到該第一待測裝置所輸出的該反饋訊號而對該反饋訊號進行取樣的步驟中,更包括依據被選擇的該時脈訊號與被讀取的該資料訊號產生一第二測試訊號,並輸出該第二測試訊號至一第二待測裝置。The automatic test device control method of claim 8, wherein the step of sampling the feedback signal by the automatic test device receiving the feedback signal output by the first device under test further comprises: The clock signal generates a second test signal with the read data signal, and outputs the second test signal to a second device under test. 如請求項7所述之自動測試設備控制方法,其中該自動測試設備中具有一單一記憶體,該單一記憶體具有複數個記憶區塊,每一該記憶區塊儲存該些資料訊號其中之一。The automatic test device control method of claim 7, wherein the automatic test device has a single memory, the single memory has a plurality of memory blocks, and each of the memory blocks stores one of the data signals. .
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