TWI508252B - Non-planar chip assembly - Google Patents

Non-planar chip assembly Download PDF

Info

Publication number
TWI508252B
TWI508252B TW101135413A TW101135413A TWI508252B TW I508252 B TWI508252 B TW I508252B TW 101135413 A TW101135413 A TW 101135413A TW 101135413 A TW101135413 A TW 101135413A TW I508252 B TWI508252 B TW I508252B
Authority
TW
Taiwan
Prior art keywords
elastic
wafer
circuit device
wafers
flat
Prior art date
Application number
TW101135413A
Other languages
Chinese (zh)
Other versions
TW201322405A (en
Inventor
Long Sheng Fan
Original Assignee
Iridium Medical Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/300,548 external-priority patent/US9155881B2/en
Application filed by Iridium Medical Technology Co Ltd filed Critical Iridium Medical Technology Co Ltd
Publication of TW201322405A publication Critical patent/TW201322405A/en
Application granted granted Critical
Publication of TWI508252B publication Critical patent/TWI508252B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

Landscapes

  • Micromachines (AREA)

Description

非平面晶片組件Non-planar wafer assembly

本發明一般而言係有關於微型裝置,特定而言係有關於三維曲面彈性裝置晶片之組件。The present invention relates generally to microdevices, and in particular to components of a three-dimensional curved elastic device wafer.

積體電路業依賴於「平面」技術以減少光蝕刻方法之特徵尺寸限制並根據摩爾定律(Moore's law)發展,乃因當數值孔徑被增加以定義光蝕刻方法中的更細微之特徵時,焦距深度會被降低。然而,基於此平面技術之裝置平面表面可能會限制在這些裝置間或與一或多個外部系統間之互動及/或互連的幾何條件。The integrated circuit industry relies on "planar" techniques to reduce the feature size limitations of photolithography methods and develop according to Moore's law, because when the numerical aperture is increased to define more subtle features in photolithography, the focal length The depth will be reduced. However, device planar surfaces based on this planar technology may limit the geometrical conditions of interaction and/or interconnection between these devices or with one or more external systems.

因此,傳統平面技術可能無法提供具有非平面幾何之裝置,以將裝置間或與外部系統間之互動的複雜性最小化。Therefore, conventional planar techniques may not provide devices with non-planar geometry to minimize the complexity of interaction between devices or with external systems.

於一實施例中,一種用於非平面(例如類球面)結構例如半導體晶片(或晶片堆疊)之非平面表面片體的組裝方法可包含將受應力膜沈積於薄晶片之薄半導體基板的其中一側(或兩側),以用於晶片之小型形變。In one embodiment, an assembly method for a non-planar surface sheet of a non-planar (eg, spherical-like) structure, such as a semiconductor wafer (or wafer stack), can include depositing a stressed film on a thin semiconductor substrate of a thin wafer. One side (or both sides) for small deformation of the wafer.

於另一實施例中,受應力膜可沈積成具有受應力膜圖案(例如藉由利用光蝕刻及蝕刻或掀離(lift-off)製程),以用於具有控制形狀之小型形變。In another embodiment, the stressed film can be deposited to have a stressed film pattern (eg, by utilizing photolithography and etching or lift-off processes) for small deformations with controlled shapes.

於另一實施例中,槽孔可產生於薄晶片上,且受應力膜可沈積成使得晶片之大型形變得以進行。In another embodiment, the slots can be created on a thin wafer and the stressed film can be deposited such that a large shape of the wafer becomes available.

於另一實施例中,槽孔可產生於薄晶片上,且晶片可 接合至限制元件(例如環形片體或另一晶片)之分離塊體,以使晶片之較大型形變得以進行。上述接合可為機械性限制,以在元件(包含晶片)的接合塊體之間提供電性連結。In another embodiment, the slot can be produced on a thin wafer, and the wafer can be A separate block bonded to a confinement element (e.g., an annular sheet or another wafer) to cause a larger profile of the wafer to proceed. The bonding described above can be mechanically limited to provide an electrical connection between the bonding blocks of the component (including the wafer).

於另一實施例中,將具有受應力膜之槽孔與限制元件結合可形成用於晶片之彎曲表面。In another embodiment, combining a slot having a stressed film with a restraining element can form a curved surface for the wafer.

於另一實施例中,二個或以上之經開槽的晶片塊體可接合成具有相互或多個限制以將彎曲塊體保持於適當地方。In another embodiment, two or more slotted wafer blocks can be joined to have mutual or multiple confinements to hold the curved block in place.

於某些實施例中,因而形成之彎曲結構可適用於腦機介面(例如視網膜義體)或處理單元之三維互連的新結構。In some embodiments, the resulting curved structure can be adapted to a new structure of a brain-computer interface (eg, a retina or a three-dimensional interconnection of processing units).

本發明之一實施例包含一種非平面積體電路裝置,其包含一彈性結構以及與前述彈性結構接合之至少一固定結構。上述彈性結構可彎曲成一期望形變。上述彈性結構可包含複數個接觸區域。電路可內嵌於上述彈性結構中,用以實施處理操作。於一實施例中,上述固定結構可透過上述接觸區域與上述彈性結構接合以提供保持限制,用以使上述彈性結構得以保持彎曲。One embodiment of the present invention includes a non-flat area body circuit device including an elastic structure and at least one fixed structure that engages the aforementioned elastic structure. The above elastic structure can be bent into a desired deformation. The elastic structure described above may include a plurality of contact regions. The circuit can be embedded in the above described elastic structure for performing processing operations. In one embodiment, the fixing structure is engageable with the elastic structure through the contact area to provide a retention limit for maintaining the elastic structure to be bent.

於另一實施例中,一種具有三維形狀表面之三維積體電路裝置可包含複數個彈性晶片以及複數個接合墊。每一彈性晶片可彎曲成符合上述三維形狀表面。至少二個彈性晶片可配置成在裝置中彼此相對而無妨礙。上述彈性晶片可透過上述接合墊接合在一起。每一彈性晶片係透過二個或以上之接合墊與至少一個分離之彈性晶片接合,以提供相互保持限制,用以使經接合之彈性晶片保持彎曲。於一 實施例中,上述裝置可包含連接路徑,其位於上述彼此相對之複數個彈性晶片之間,以使上述彼此相對之複數個彈性晶片之間得以進行直接通訊。上述接合墊及上述連接路徑可在上述複數個彈性晶片之間提供連結配置,以實施處理操作。In another embodiment, a three-dimensional integrated circuit device having a three-dimensional shaped surface can include a plurality of elastic wafers and a plurality of bonding pads. Each of the elastic wafers can be bent to conform to the above-described three-dimensional shape surface. The at least two elastic wafers can be configured to oppose each other in the device without obstruction. The elastic wafers described above can be joined together through the bonding pads. Each of the elastic wafers is joined to the at least one separate elastic wafer by two or more bond pads to provide mutual retention restrictions for maintaining the bonded elastic wafers in a curved shape. Yu Yi In an embodiment, the apparatus may include a connection path between the plurality of elastic wafers opposed to each other to enable direct communication between the plurality of elastic wafers opposed to each other. The bonding pad and the connecting path may provide a connection arrangement between the plurality of elastic wafers to perform a processing operation.

於又另一實施例中,一種植入彈性裝置可包含複數個光感測器用以接收光線、複數個微電極以及耦合至上述光感測器及上述微電極之電路。上述電路可驅動上述微電極以刺激神經元細胞,用以使上述神經元細胞得以感知上述光感測器所捕捉到之光線的景象。上述裝置可由彈性材料所製成,上述彈性材料具有槽孔以在材料中形成開孔。上述槽孔可使上述裝置得以彎曲成符合人類眼球形狀之上述期望形變,用以使上述微電極得以設置成緊鄰上述神經元細胞以用於上述刺激。In yet another embodiment, an implantable resilient device can include a plurality of optical sensors for receiving light, a plurality of microelectrodes, and circuitry coupled to the photosensors and the microelectrodes. The above circuit can drive the microelectrode to stimulate the neuron cells, so that the neuron cells can perceive the scene of the light captured by the photosensor. The above device may be made of an elastic material having a slot to form an opening in the material. The slot allows the device to be bent to conform to the desired deformation of the human eye shape for positioning the microelectrode in close proximity to the neuronal cells for stimulation.

從後附圖式及以下詳細敘述將使讀者得以清楚了解本發明之其他特徵。Other features of the present invention will be apparent from the following description and appended claims.

於此將敘述視網膜晶片組裝程序或(整合)半導體晶片之非平面(例如類球面(quasi-spherical))表面片體及其方法。於以下敘述中將提出若干特定細節,藉以徹底解釋本發明之實施例。然而,本領域具通常知識者皆應瞭解,本發明之實施例在不具有這些特定細節的情況下仍可實施。另外,眾所皆知的元件、結構及技術並未詳細顯示,以避免模糊本發明的技術重點。Non-planar (e.g., quasi-spherical) surface sheets of retinal wafer assembly procedures or (integrated) semiconductor wafers and methods therefor will be described herein. In the following description, numerous specific details are set forth. However, it should be understood by those of ordinary skill in the art that the embodiments of the invention may be practiced without these specific details. In addition, well-known components, structures, and techniques have not been shown in detail to avoid obscuring the technical aspects of the present invention.

說明書中所提到之「一實施例」係指與實施例有關而敘述之特定特徵、結構或特性可被包含於本發明的至少一實施例中。在本說明書中不同段落出現之「於一實施例中」並不一定全部指向同一實施例。The "an embodiment" referred to in the specification means that a specific feature, structure or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the various embodiments in the various embodiments are not necessarily all referring to the same embodiment.

於一實施例中,具有非平面表面之整合主動元件、電晶體電路、轉換器(transducer)或微型系統係有利的,以改變這些裝置、子系統間之互動、互連的幾何條件,或與一或多個外部系統間之互動、互連的幾何條件。具有非平面形狀或幾何之整合裝置可使新運算架構(例如球形幾何為三維中之「圓桌論壇(round-table forum)」,其將表面上之運算元件間的互動、通訊及互連以及球體內之通訊/互動連結最佳化)得以使用。其使得將電子或光子接合至一般之生物神經系統有了新的方法(例如在腦機介面(brain-machine interface)中常遭遇到類球面表面)。In an embodiment, an integrated active component, a transistor circuit, a transducer, or a microsystem having a non-planar surface is advantageous to change the interaction between the devices, subsystems, interconnected geometric conditions, or The geometrical conditions of interaction and interconnection between one or more external systems. An integrated device with a non-planar shape or geometry enables a new computing architecture (eg, a spherical geometry is a "round-table forum" in three dimensions that interacts, communicates, and interconnects the operational elements on the surface and the ball The communication/interactive link optimization in the body is available. It has new methods for joining electrons or photons to the general biological nervous system (for example, a spherical surface is often encountered in a brain-machine interface).

舉例而言,於人工視網膜之情況中,義體裝置(prosthesis device)與人類眼球後端處的視網膜之間的介面係為具有約12.5毫米(mm)之曲率半徑的類球面表面。為了將穿過眼球之互連的複雜度最小化,較佳為將作為介面之微型電極及電子電路放置在一起,並一同緊靠於視網膜神經元之表面。此說明書將會教導將典型剛性半導體電子器件形成為非平面形狀(於此例如為類球面)之方法。For example, in the case of an artificial retina, the interface between the prosthesis device and the retina at the posterior end of the human eye is a spherical surface having a radius of curvature of about 12.5 millimeters (mm). In order to minimize the complexity of the interconnection through the eyeball, it is preferred to place the microelectrodes and electronic circuits as interfaces together and abut against the surface of the retinal neurons. This description will teach a method of forming a typical rigid semiconductor electronic device into a non-planar shape (here, for example, a spherical surface).

第一A圖至第一D圖係顯示用於彈性晶片之非平面組件之示範性實施例的概要示意圖。第一A圖之組件100A可顯示類球面(quasi-spherical)形狀之人工視網膜義體裝 置,上述類球面形狀與眼球內視網膜之形狀相符合,以使裝置得以緊靠視網膜神經元表面設置。形狀符合可因此減少神經元之所需電激發閥值(electrical excitation thresholds),並增加裝置(例如透過電極)與視網膜神經元間之介面的顆粒度(granularity)。1A through 1D are schematic diagrams showing exemplary embodiments of non-planar components for an elastic wafer. Assembly 100A of Figure A can display a quasi-spherical shape of artificial retina The spherical shape described above conforms to the shape of the retina in the eyeball so that the device can be placed against the surface of the retinal neuron. The shape conformance can thus reduce the required electrical excitation thresholds of the neurons and increase the granularity of the interface between the device (eg, through the electrodes) and the retinal neurons.

於一實施例中,組件100A可包含彈性晶片103,其具有光感測器、電極、驅動電路等。彈性晶片103可加以機械限制(mechanically constrained)使其彎曲成期望之形狀,或透過固定結構101加以變形。例如,固定結構101可包含彈性高分子材料,其形狀具有期望曲率或變形成具有期望曲率。彈性晶片103可接合或固定至固定結構101,以保持彎曲成期望形狀。In one embodiment, assembly 100A can include an elastomeric wafer 103 having photosensors, electrodes, drive circuitry, and the like. The elastic wafer 103 can be mechanically constrained to be bent into a desired shape or deformed by the fixed structure 101. For example, the fixed structure 101 may comprise an elastic polymeric material having a shape having a desired curvature or deformed to have a desired curvature. The elastic wafer 103 can be bonded or fixed to the fixed structure 101 to remain curved into a desired shape.

現請參照第一B圖,組件100B可為相對球形組件,其包含多層的彈性晶片。例如,彈性晶片107、109可加以變形以促進彈性晶片107、109之表面元件間的通訊。彈性晶片107、109可設置或配置成彼此相對,以利用光束、導線或其他可行連結建立通訊路徑,例如通訊路徑111。於某些實施例中,面向同一方向之不同彎曲晶片(例如固定結構105、彈性晶片107)間的通訊路徑可基於貫穿矽穿透結構(through silicon via,TSV)。上述貫穿矽穿透結構可將薄積體電路晶片之某些焊墊引導通過其薄矽基板到達薄積體電路晶片之背側(例如從前側),藉此多個晶片可堆疊且接合在一起。多個晶片,例如固定結構105、彈性晶片107,可基於這些晶片間之相互限制(mutual constraints)而在組 件100B內保持彎曲。Referring now to Figure B, assembly 100B can be a relatively spherical component that includes multiple layers of elastomeric wafers. For example, the elastic wafers 107, 109 can be deformed to facilitate communication between the surface elements of the elastic wafers 107, 109. The elastic wafers 107, 109 can be arranged or arranged to oppose each other to establish a communication path, such as the communication path 111, using light beams, wires or other feasible connections. In some embodiments, the communication path between different curved wafers (eg, fixed structure 105, elastic wafer 107) facing in the same direction may be based on through silicon vias (TSVs). The through-through structure can direct certain pads of the thin-film circuit wafer through its thin substrate to the back side of the thin-film circuit (eg, from the front side), whereby the plurality of wafers can be stacked and bonded together . A plurality of wafers, such as fixed structure 105, elastic wafer 107, may be grouped based on mutual constraints between the wafers The piece 100B remains curved.

組件100B之非平面幾何可使以連結或其他可行之非平面形特徵為基礎的運算架構得以使用。例如,於球形組件中之球形幾何可為三維幾何中之「圓桌論壇(round-table forum)」,用以將球形組件之表面上的運算元件(或彈性晶片之電路)間的互動、通訊及互連以及用於位在球形組件內之元件的通訊/互動連結最佳化。The non-planar geometry of component 100B enables the use of computational architectures based on concatenation or other feasible non-planar features. For example, the spherical geometry in a spherical component can be a "round-table forum" in three-dimensional geometry for interaction, communication, and communication between operational components (or circuits of flexible wafers) on the surface of a spherical component. Interconnect and communication/interactive link optimization for components located within the spherical component.

現請參照第一C圖,非平面人工視網膜組件可以視網膜下(sub-retina)方式加以植入以用於眼球113。人工視網膜可包含彈性晶片117,其與眼球113之視網膜121緊密接觸。彈性晶片117可與固定結構115接合以保持彎曲,用以符合眼球113之形狀。於一實施例中,固定結構115與彈性晶片117兩者均可包含透明材料,以允許光線通過其中。Referring now to Figure C, the non-planar artificial retinal assembly can be implanted for sub-retina in the sub-retina. The artificial retina may include an elastic wafer 117 that is in intimate contact with the retina 121 of the eyeball 113. The elastic wafer 117 can be engaged with the fixed structure 115 to remain curved to conform to the shape of the eye 113. In one embodiment, both the fixed structure 115 and the elastic wafer 117 may comprise a transparent material to allow light to pass therethrough.

另則,於第一D圖中,非平面人工視網膜組件可以視網膜上(epi-retina)方式加以植入以供眼球113之用。人工視網膜可包含彈性晶片119,其從眼球113內側與視網膜121緊密接觸。此外,人工視網膜可包含固定結構123以提供機械約束,用以使彈性晶片119得以保持彎曲以符合眼球113之形狀。非平面人工視網膜組件可具有彈性,藉此可根據所期望之不同配置或形狀加以變形。Alternatively, in the first D diagram, the non-planar artificial retinal component can be implanted for the eyeball 113 in an epi-retina manner. The artificial retina may include an elastic wafer 119 that is in close contact with the retina 121 from the inside of the eye 113. In addition, the artificial retina may include a fixation structure 123 to provide mechanical restraint for the elastic wafer 119 to remain curved to conform to the shape of the eye 113. The non-planar artificial retinal component can be resilient, whereby it can be deformed depending on the desired configuration or shape.

第二A圖係顯示沈積有受應力薄膜(stressed thin film)之彈性結構(或裝置)的橫切面圖之方塊圖。於一實施例中,結構200可包含薄的元件層205,其夾設於阻障層 (barrier layer)203與聚合物層210之間。元件層205可基於用於醫療植入之薄金屬氧化物半導體(MOS,Metal Oxide Semiconductor)晶粒,其由阻障層203及生物相容之聚合物層210所包覆,以使其免受元件腐蝕及/或毒害活體組織。結構200A可足夠薄以根據來自受應力膜層207之應力或拉伸力進行捲曲(或彎曲、變形)。Figure 2A is a block diagram showing a cross-sectional view of an elastic structure (or device) deposited with a stressed thin film. In an embodiment, the structure 200 can include a thin component layer 205 sandwiched between barrier layers. A barrier layer 203 is interposed between the polymer layer 210. The element layer 205 can be based on a thin metal oxide semiconductor (MOS, Metal Oxide Semiconductor) die for medical implantation, which is covered by the barrier layer 203 and the biocompatible polymer layer 210 to protect it from The component is corroded and/or poisons the living tissue. The structure 200A can be thin enough to curl (or bend, deform) depending on the stress or tensile force from the stressed film layer 207.

於某些實施例中,受應力薄膜,例如受應力膜層207,可沈積於薄結構或晶片之其中一側或兩側上,以達到晶片之期望形變(例如具有某個角度之彎曲)。例如,受應力薄膜可加以預先壓縮或預先拉伸,以在不同方向施加彎曲力(bending force)。受應力薄膜可選擇性地在製程期間加以圖案化(例如藉由光蝕刻及蝕刻程序形成環狀或長條紋狀),以產生各種薄結構用之彎曲形狀(例如以波狀方式或其他可行之形式)。結構200在從經由黏著劑211附著之厚晶圓載具(carrier wafer)209(或操作晶圓(handle wafer))鬆開時可能會捲曲。In some embodiments, a stressed film, such as stressed film layer 207, may be deposited on one or both sides of the thin structure or wafer to achieve the desired deformation of the wafer (eg, bending at an angle). For example, the stressed film can be pre-compressed or pre-stretched to apply a bending force in different directions. The stressed film can be selectively patterned during the process (eg, by photolithography and etching processes to form a ring or stripe shape) to produce curved shapes for various thin structures (eg, in a wavy manner or other feasible form). The structure 200 may curl when it is released from a thick wafer carrier 209 (or a handle wafer) attached via the adhesive 211.

第二B圖係根據此處所述實施例顯示以波狀方式變形之非平面裝置的概要示意圖。例如,非平面積體電路裝置200B可包含以波狀方式彎曲之彈性薄結構213。受應力膜215、217可形成(例如透過圖案遮罩)在彈性薄結構213之兩側上,以形成特定(或預先指定)圖案(例如條紋狀、鋸齒狀或其他可行圖案等),用以將彈性薄結構213彎曲成期望之形變,例如波狀方式。於一實施例中,受應力膜215可加以預先壓縮或可為有壓縮性的。另則,受應力膜可加以 預先拉伸。受應力膜215、217可提供位移限制(displacement constraints)或力,例如龐大之殘餘薄膜應力,以將彈性薄結構213彎曲成期望之形變。非平面裝置可包含預先壓縮之膜、預先拉伸之膜或有壓縮性之膜的組合,其以指定圖案形成,以根據指定圖案提供應力分配,用以達到裝置之期望形變。Second B is a schematic diagram showing a non-planar device that is deformed in a wavy manner in accordance with the embodiments described herein. For example, the non-flat area body circuit device 200B can include an elastic thin structure 213 that is curved in a wavy manner. The stressed films 215, 217 may be formed (eg, through a pattern mask) on both sides of the elastic thin structure 213 to form a specific (or pre-specified) pattern (eg, stripe, zigzag, or other feasible pattern, etc.) for The elastic thin structure 213 is bent into a desired deformation, such as a wavy manner. In one embodiment, the stressed film 215 may be pre-compressed or may be compressible. In addition, the stressed film can be Pre-stretched. The stressed films 215, 217 can provide displacement constraints or forces, such as bulky residual film stress, to bend the elastic thin structure 213 into the desired deformation. The non-planar device can comprise a combination of a pre-compressed film, a pre-stretched film, or a compressible film formed in a specified pattern to provide a stress distribution in accordance with a specified pattern to achieve the desired deformation of the device.

根據一實施例,期望形變可包含晶片彎曲曲率。例如,若彈性晶片欲被從平面盤體變形成非平面球面片體,則可計算出彈性晶片之外圓圓周所需要縮減的量。於一實施例中,當源自於基板彎曲之位移遠小於晶圓厚度(例如元件層205之厚度)時,具有殘餘膜應力之沈積薄膜(於相對厚之基板上)所造成的晶片彎曲曲率可基於「史東納(Stoney)方程式」(或近似方程式)加以估算。對於薄晶片上之較大應力而言,當位移可輕易地因二維限制(two-dimensional constraints)而大於基板厚度時,數值方法(numerical methods)可用以計算晶片彎曲曲率,而無需透過近似方程式超估位移。According to an embodiment, the desired deformation may comprise a wafer bending curvature. For example, if the elastic wafer is to be deformed from a planar disk to a non-planar spherical sheet, the amount of reduction required for the outer circumference of the elastic wafer can be calculated. In one embodiment, when the displacement from the bending of the substrate is much smaller than the thickness of the wafer (eg, the thickness of the element layer 205), the curvature of the wafer caused by the deposited film having residual film stress (on a relatively thick substrate) It can be estimated based on the "Stoney equation" (or approximate equation). For large stresses on thin wafers, numerical methods can be used to calculate the curvature of the wafer when the displacement can easily be greater than the thickness of the substrate due to two-dimensional constraints, without the need to apply an approximation equation. Overestimate the displacement.

第三A圖至第三C圖係根據此處所述之實施例顯示以槽孔(slots)為基礎之示範性非平面晶片的概要示意圖。例如,概要圖300A可包含薄晶粒或晶圓之薄晶片305以及經誇張化之槽孔301、303,前述槽孔301之尖端307處具有應力消除圓角。當薄晶片305被變形時,槽孔301之兩側可能會接觸或閉合。薄晶片305在製程期間可於載體基板(carrier substrate)上預先加壓,而當從載體基板鬆開時變 成彎曲。3A through 3C are schematic diagrams showing exemplary non-planar wafers based on slots, in accordance with embodiments described herein. For example, the schematic 300A can include a thin wafer 305 of thin grains or wafers and exaggerated slots 301, 303 having a stress relief fillet at the tip 307 of the slot 301. When the thin wafer 305 is deformed, both sides of the slot 301 may come into contact or close. The thin wafer 305 can be pre-pressurized on the carrier substrate during the process, and becomes variable when released from the carrier substrate. Bending.

於一實施例中,薄晶片305可包含具有若干(一個或以上)放射狀槽孔之圓形晶片,前述放射狀槽孔從圓形晶片之中心以扇形/楔形往向外之方向延伸(以直線路徑或以彎曲路徑、螺旋路徑、鋸齒路徑或其他可行路徑),而剩餘邊緣移除。放射狀槽孔可從薄晶片305之邊緣延伸並在到達薄晶片305中心之前(或距離薄晶片305中心一段距離)止於槽孔之尖端處(例如寬度約1微米(μm)之細微尖端),例如槽孔301之尖端307。於一實施例中,槽孔之尖端可設置於薄晶片內,以適應例如微型製程之解析度限制及/或晶片形變所引發在槽孔尖端處之應力強度因子(stress intensity factors)增強。槽孔尖端周圍例如槽孔301之尖端307的周圍的角落可加以圓形化,以減少當有關晶片被變形或彎曲時與尖銳角有關之應力集中並使圓形槽孔角落上之應力散開。In one embodiment, the thin wafer 305 can include a circular wafer having a plurality of (one or more) radial slots extending from the center of the circular wafer in a fan-shaped/wedge shape toward the outer direction (in terms of A straight path is either a curved path, a spiral path, a sawtooth path, or other feasible path, and the remaining edges are removed. The radial slots may extend from the edge of the thin wafer 305 and terminate at the tip end of the slot (e.g., a fine tip having a width of about 1 micrometer (μm)) before reaching the center of the thin wafer 305 (or a distance from the center of the thin wafer 305). For example, the tip 307 of the slot 301. In one embodiment, the tips of the slots can be placed in a thin wafer to accommodate, for example, resolution limitations of the micro-process and/or enhancement of stress intensity factors at the tip of the slot caused by wafer deformation. The corners around the tip end of the slot, such as the tip end 307 of the slot 301, can be rounded to reduce stress concentrations associated with sharp corners and to spread the stresses on the corners of the circular slot when the wafer is deformed or bent.

槽孔可藉由將晶片之一部分狹窄通道區(例如切孔、縱向開孔或狹窄開孔)例如薄晶片305之槽孔301移除(或切割、撕開)而形成,例如透過微型製程中之深活性離子蝕刻。上述槽孔可減少晶片之形變應力,例如切線同平面應力(tangential in-plane stress),並增加晶片之可容許變形角度。於一實施例中,上述槽孔可能會切斷晶片內橫跨槽孔之電路元件之間的直接通訊,因此槽孔周圍可能需要跨接器(jumpers)(透過接合墊至限制軟性結構(constraining flex)或另一限制晶片(constraining chip),將於以下敘述)或較長 之輸電軌道(power rail)及資料匯流排,以分配電源、接地及訊號線。The slot can be formed by removing (or cutting, tearing) a portion of the narrow channel region of the wafer (eg, a cut-out, a longitudinal opening, or a narrow opening), such as the slot 301 of the thin wafer 305, such as through a micro-process. Deep reactive ion etching. The slots reduce the deformation stress of the wafer, such as tangential in-plane stress, and increase the allowable deformation angle of the wafer. In one embodiment, the slot may cut direct communication between circuit components across the slot in the wafer, so jumpers may be required around the slot (through the bond pad to limit the soft structure (constraining) Flex) or another constraining chip, as described below) or longer Power rail and data bus to distribute power, ground, and signal lines.

第三B圖係顯示疊層型薄圓盤形晶片結構,其製造有槽孔及受應力膜,以折彎或彎曲成類球面片體,並在從製程期間所使用之晶圓載具鬆開後仍保持彎曲。固定結構可在橫跨晶片結構中之槽孔之下予以接合,以防止彎曲晶片放鬆回到其原本平面形狀。受應力膜可提供額外之彎曲力,以助於約束晶片使其保持在期望形變下。雖然具有一個或以上之槽孔的薄結構上之受應力薄膜所導致的彎曲效果可大為增加,但大幅之彎曲(例如彎曲30微米厚之視網膜晶片所造成之70-90微米的邊緣位移)可能係與二維限制有關。形變角度可例如以邊緣位移之微米數加以測量。因此,可能需要具有龐大應力(例如外部彎曲)之相對較厚膜以達到期望之大曲率。Figure 3B shows a laminated thin disc-shaped wafer structure made of a slotted and stressed film that is bent or bent into a spherical sheet and released from the wafer carrier used during the manufacturing process. It remains curved afterwards. The fixed structure can be joined across the slots in the wafer structure to prevent the curved wafer from relaxing back to its original planar shape. The stressed film provides additional bending force to help constrain the wafer to remain under the desired deformation. Although the bending effect caused by the stressed film on the thin structure having one or more slots can be greatly increased, the bending is large (for example, the edge displacement of 70-90 micrometers caused by bending a 30 micron thick retinal wafer) May be related to two-dimensional restrictions. The deformation angle can be measured, for example, by the number of micrometers of the edge displacement. Therefore, a relatively thick film with a large amount of stress (e.g., external bending) may be required to achieve the desired large curvature.

第三C圖係顯示用以彎曲平面晶片之示範性機制。當直徑”d”之平面圓盤(例如包含平面晶片)被彎曲成曲率半徑”R”309時,從半徑之中心延伸到圓盤直徑線之端點的角度311為2θ,其中2R*θ=d。圓盤之原本圓周係為S=π*d=2πR*θ;然而,若圓盤被變形成球面形片體,則經變形之圓周313應為S’=2πR*Sin(θ)。由於當θ>0時θ>Sin(θ),故圓盤將經歷對於彎曲之同平面(in-plane)切線壓應力(compressive stresses),乃因在半徑r小於或等於R之處有過量之圓周2πr*[θ-Sin(θ)]。槽孔以適當量之方式移除此過量部分,藉此當圓盤被變形成球面形狀時,槽孔之兩邊 會被放置在一起。此從平面晶片移除某些過量材料以成為彎曲非平面形狀之原則可應用於此處所述之某些實施例中。The third C diagram shows an exemplary mechanism for bending a planar wafer. When a planar disk of diameter "d" (for example comprising a planar wafer) is bent into a radius of curvature "R" 309, the angle 311 extending from the center of the radius to the end of the diameter line of the disk is 2θ, where 2R*θ= d. The original circumference of the disc is S = π * d = 2πR * θ; however, if the disc is deformed into a spherical sheet, the deformed circumference 313 should be S' = 2πR * Sin (θ). Since θ>Sin(θ) when θ>0, the disk will experience in-plane tangential stresses for bending, because there is an excess in the radius r less than or equal to R. The circumference is 2πr*[θ-Sin(θ)]. The slot removes the excess portion in an appropriate amount, whereby the two sides of the slot are formed when the disk is deformed into a spherical shape Will be placed together. This principle of removing some excess material from a planar wafer to become a curved non-planar shape can be applied to certain embodiments described herein.

第四A圖至第四B圖係顯示組裝有軟性結構的薄晶片之示範性實施例的概要示意圖。概要圖400A可包含固定結構401及薄晶片403。於一實施例中,固定結構401可為環狀圈形之軟性結構(例如從軟性結構”纜線”所形成)。軟性結構可包含聚合物(例如聚醯胺(Polyamide)),其可為透明或半透明、可變形且/或可模製。於某些實施例中,軟性結構可成形為整個塊體或根據所需要之期望形變成形為不同可行之形狀。薄晶片403可基於具有狹縫之薄晶圓/晶粒,以用於大型形變。於一實施例中,薄晶片403可包含具有四個狹縫(或槽孔)例如槽孔405之彈性材料,以增加晶片之彈性以用於大型形變。固定結構401可接合至彈性薄晶片403,以使晶片保持於彎曲狀態。形成在薄晶片上的槽孔之數量及/或圖案(例如2、12或其他可行數量的槽孔)可依據晶片中之期望形變加以改變。4A to 4B are schematic diagrams showing an exemplary embodiment of a thin wafer in which a flexible structure is assembled. The outline 400A can include a fixed structure 401 and a thin wafer 403. In one embodiment, the fixed structure 401 can be a ring-shaped soft structure (eg, formed from a flexible structure "cable"). The soft structure may comprise a polymer (e.g., polyamide) that may be transparent or translucent, deformable, and/or moldable. In some embodiments, the flexible structure can be formed into an entire block or shaped into a different shape as desired. The thin wafer 403 can be based on a thin wafer/die with slits for large deformation. In one embodiment, the thin wafer 403 may comprise an elastomeric material having four slits (or slots), such as slots 405, to increase the elasticity of the wafer for large deformation. The fixed structure 401 can be bonded to the elastic thin wafer 403 to maintain the wafer in a bent state. The number and/or pattern of slots formed in the thin wafer (e.g., 2, 12 or other feasible number of slots) may vary depending on the desired deformation in the wafer.

現請參照第四B圖,組件400B可包含彎曲薄晶片403,其透過例如接合墊407與固定結構401相接合。來自固定結構401(或軟性結構)之機械限制可使薄晶片403維持彎曲,而不會放鬆回到其原本平坦狀態。固定結構401可包含金屬線及具有適當厚度(例如約10微米)之金屬接合墊。薄晶片403可包含配對(於相應位置)之接合墊,其欲與固定結構401之對應金屬接合墊相接合。當上述金屬受 到壓力且於溫度升高之情況下(一般控制在150度C至450度C的範圍內)時可形成薄膜接合(例如金接合至金)。薄膜接合亦可用作為用於資料傳遞及電力分配之電性連結。Referring now to FIG. 4B, assembly 400B can include a curved thin wafer 403 that is joined to the fixed structure 401 by, for example, bond pads 407. The mechanical restriction from the fixed structure 401 (or soft structure) allows the thin wafer 403 to remain curved without relaxing back to its original flat state. The fixed structure 401 can comprise metal lines and metal bond pads of suitable thickness (eg, about 10 microns). The thin wafer 403 can include mating (at corresponding locations) bond pads that are intended to engage with corresponding metal bond pads of the fixed structure 401. When the above metal is affected Film bonding (e.g., gold bonding to gold) can be formed up to pressure and in the case of elevated temperatures (typically controlled in the range of 150 degrees C to 450 degrees C). Membrane bonding can also be used as an electrical connection for data transfer and power distribution.

第五A圖至第五F圖係顯示用於非平面彈性裝置之組裝(或接合)程序的示範性順序之方塊圖。例如,非平面彈性裝置可基於透過配對墊與彈性裝置接合之彎曲薄晶圓/晶粒加以製造或生產。於第五A圖之順序500A,於一實施例中,支架單元501可包含具有內凹形狀例如凹部503之透明支架,用以容納軟性結構或固定結構。凹部503可容納軟性結構材料(例如聚合物),其可加以模製或成形。Fifth to fifth F diagrams are block diagrams showing exemplary sequences of assembly (or bonding) procedures for non-planar elastic devices. For example, a non-planar elastic device can be manufactured or produced based on a curved thin wafer/die bonded through a mating pad and an elastic device. In the sequence 500A of FIG. 5A, in an embodiment, the bracket unit 501 can include a transparent bracket having a concave shape such as a recess 503 for receiving a soft structure or a fixed structure. The recess 503 can accommodate a soft structural material (e.g., a polymer) that can be molded or formed.

於第五B圖之順序500B,軟性結構507可在凹部503內以工具加工。於一實施例中,擠壓單元505及支架單元501可被放置在一起且同時施加壓力/熱,以將軟性結構507形成為彎曲形狀。擠壓單元505及支架單元501可成形為具有匹配表面,前述匹配表面具有共同或相容之曲率半徑。軟性結構507可夾設於具有球面表面之擠壓單元505(例如上方單元)與具有匹配球面凹部之支架單元501(例如下方單元)之間。於一實施例中,軟性結構507可包含聚合物型環,其由真空(在對應區之表面上具有真空孔且在支架單元501內具有真空通道)或靜電力(例如利用靜電吸附盤(electrostatic chuck))所保持住。於第五C圖之順序500C,擠壓單元505可加以移動以從支架單元501分離,並離開軟性結構507以使其於適當地方(例如凹部503內)保持變形(或成型)。於某些實施例中,與軟性結構接合 之薄晶片可基於軟性結構與薄晶片間之相互約束而加以變形,而無需用模具塑造軟性結構。In the sequence 500B of Figure 5B, the flexible structure 507 can be tooled within the recess 503. In one embodiment, the extrusion unit 505 and the bracket unit 501 can be placed together and simultaneously apply pressure/heat to form the flexible structure 507 into a curved shape. The extrusion unit 505 and the bracket unit 501 can be shaped to have mating surfaces that have a common or compatible radius of curvature. The flexible structure 507 can be sandwiched between a pressing unit 505 having a spherical surface (for example, an upper unit) and a bracket unit 501 (for example, a lower unit) having a matching spherical recess. In one embodiment, the flexible structure 507 can comprise a polymeric ring that is vacuumed (having a vacuum hole in the surface of the corresponding zone and having a vacuum channel in the stent unit 501) or an electrostatic force (eg, using an electrostatic adsorption disk (electrostatic) Chuck)) Keep it. In the sequence 500C of Figure 5C, the extrusion unit 505 can be moved to separate from the bracket unit 501 and exit the flexible structure 507 to maintain deformation (or shaping) in place (e.g., within the recess 503). In some embodiments, engaging the flexible structure The thin wafer can be deformed based on the mutual constraint between the soft structure and the thin wafer without the need to mold the soft structure with a mold.

現請參照第五D圖,於順序500D,在擠壓單元517與支架單元501對準之後,擠壓單元517與支架單元501可放置在一起,以用於薄晶片(或晶圓)509與軟性結構507之間的接合。例如,薄晶片509可在特定區域處例如接合區511與軟性結構507接合或結合。薄晶片509可包含金屬型焊墊。相應地,軟性結構507可包含配對焊墊。於一實施例中,擠壓單元505可與支架單元501對準(例如透過三維旋轉移動),以使薄晶片509之焊墊與軟性結構507之對應配對焊墊相接觸。擠壓單元505與支架單元501中之至少一者可為透明,以允許進行對準。第五B圖之擠壓單元505與擠壓單元517可為複數個擠壓單元中之一部分,前述複數個擠壓單元係在用於非平面裝置之一共同組裝裝置中且具有以不同曲率彎曲之表面。Referring now to FIG. 5D, in sequence 500D, after the pressing unit 517 is aligned with the bracket unit 501, the pressing unit 517 and the bracket unit 501 can be placed together for the thin wafer (or wafer) 509 and Bonding between the flexible structures 507. For example, the thin wafer 509 can be bonded or bonded to the flexible structure 507 at a particular area, such as the land 511. The thin wafer 509 can comprise a metal pad. Accordingly, the flexible structure 507 can include a mating pad. In one embodiment, the extrusion unit 505 can be aligned with the bracket unit 501 (eg, by three-dimensional rotational movement) to bring the pads of the thin wafer 509 into contact with corresponding mating pads of the flexible structure 507. At least one of the extrusion unit 505 and the bracket unit 501 can be transparent to allow for alignment. The pressing unit 505 and the pressing unit 517 of the fifth drawing B may be one of a plurality of pressing units which are used in a co-assembly device for a non-planar device and have bending with different curvatures. The surface.

於一實施例中,熱與壓力可加以施加以接合薄晶片509與軟性結構507,例如一同施加至焊錫金屬焊墊及對應之配對焊墊。薄晶片可例如透過真空或靜電力保持在擠壓單元505(例如頂部擠壓)上。在薄晶片509之焊墊與軟性結構507之配對焊墊對準之後,擠壓單元517可對著支架單元501予以擠壓。In one embodiment, heat and pressure may be applied to bond the thin wafer 509 to the flexible structure 507, such as to the solder metal pads and the corresponding mating pads. The thin wafer can be held on the extrusion unit 505 (e.g., top extrusion), for example, by vacuum or electrostatic force. After the pads of the thin wafer 509 are aligned with the mating pads of the flexible structure 507, the pressing unit 517 can be pressed against the holder unit 501.

於某些實施例中,軟性結構507可透過透明底部支架例如支架單元501加以製造。多層晶片可透過施加於擠壓單元與支架單元501之間的壓力及熱加以接合。支架單元 501可與不同形狀或類型之凹部結合,以依據不同晶片設計使軟性結構或彈性晶片例如軟性結構507變形。當接合完畢時,於第五E圖之順序500E,擠壓單元505可從支架單元501移開,用以鬆開以非平面形狀與軟性結構507接合之薄晶片509。接合墊在從接合壓力/熱冷卻下來時可能會硬化,以使分離之晶片/晶圓黏合(或接合)在一起成彎曲或非平面形狀。於一實施例中,於順序5E之後,與軟性結構507接合之薄晶片509可以阻障層及/或聚合物層加以鈍化(或塗佈)(例如用以免於受到腐蝕)。軟性結構507(例如分離之晶片相互限制以保持彎曲)與薄晶片509之間的空氣隙可以導熱介電材料予以回填,以增加散熱能力。In some embodiments, the flexible structure 507 can be fabricated through a transparent bottom bracket such as the bracket unit 501. The multilayer wafer can be joined by pressure and heat applied between the pressing unit and the holder unit 501. Bracket unit The 501 can be combined with recesses of different shapes or types to deform a flexible structure or an elastic wafer, such as the flexible structure 507, depending on the different wafer design. When the bonding is completed, in the sequence 500E of the fifth E diagram, the pressing unit 505 can be removed from the holder unit 501 to release the thin wafer 509 joined to the flexible structure 507 in a non-planar shape. The bond pads may harden when cooled from bonding pressure/heat to bond (or bond) the separated wafers/wafers into a curved or non-planar shape. In one embodiment, after the sequence 5E, the thin wafer 509 bonded to the flexible structure 507 can be passivated (or coated) by the barrier layer and/or the polymer layer (eg, to protect from corrosion). The air gap between the flexible structure 507 (e.g., the separated wafers are mutually restrained to remain curved) and the thin wafer 509 can be backfilled with a thermally conductive dielectric material to increase heat dissipation.

第五F圖係顯示薄晶片509與軟性結構507間之接合墊的誇大示意圖。例如,薄晶片509之焊墊513可與軟性結構507之配對焊墊515相接合(或焊接)。焊墊513及配對焊墊515可包含相同或不同之傳導材料(例如金)。非平面裝置之接合接觸,例如與配對焊墊515接合之焊墊513,可以硬鈍化薄層加以覆蓋或塗佈(例如汽相塗佈或真空塗佈),上述硬鈍化薄層可由氮化矽、鑽石碳(diamond carbon)或其他可行材料製成,以提供絕緣及防止暴露裝置之接合接觸。於一實施例中,接合接觸可在不同部分之彎曲晶片之間提供機械結合限制(mechanical joining constraints)及/或選擇性的電性連結。The fifth F diagram shows an exaggerated schematic view of the bond pads between the thin wafer 509 and the flexible structure 507. For example, the pad 513 of the thin wafer 509 can be bonded (or soldered) to the mating pad 515 of the flexible structure 507. Pad 513 and mating pad 515 may comprise the same or different conductive materials (eg, gold). The bonding contact of the non-planar device, for example, the bonding pad 513 bonded to the mating pad 515, may be covered or coated with a hard passivation layer (for example, vapor phase coating or vacuum coating), and the hard passivation thin layer may be tantalum nitride. Made of diamond carbon or other viable materials to provide insulation and prevent joint contact of exposed devices. In one embodiment, the bond contacts can provide mechanical joining constraints and/or selective electrical bonds between different portions of the curved wafer.

第六A圖至第六B圖係顯示受到相互限制之非平面晶片的示範性實施例之概要示意圖。例如,第六A圖之概要 圖600A可顯示二個薄晶圓/晶粒,其具有短距錯開之狹縫及配對接合焊墊,以用於彎曲晶片組件之相互限制。於一實施例中,第一薄晶片601及第二薄晶片607均可包含四個具有配對金屬接合焊墊之放射狀槽孔。薄晶片可予以組裝成槽孔以一角度對準。例如,在經組裝之彎曲薄晶片中槽孔605可以例如45度角相交於槽孔603。6A through 6B are schematic diagrams showing an exemplary embodiment of a non-planar wafer that is mutually constrained. For example, a summary of Figure 6A Figure 600A can show two thin wafers/dies with short staggered slits and mating bond pads for the mutual limitation of the bent wafer assembly. In one embodiment, the first thin wafer 601 and the second thin wafer 607 may each include four radial slots having mating metal bond pads. Thin wafers can be assembled into slots that are aligned at an angle. For example, the slots 605 may intersect the slots 603 at an angle of, for example, 45 degrees in the assembled curved thin wafer.

現請參照第六B圖,組件600B可包含第一薄晶片601及第二薄晶片607,其透過相互限制而彎曲。由於相互限制係在接合位置處(例如接合焊墊區域)施加於彼此,故經組裝之彎曲薄晶片,例如第一薄晶片601及第二薄晶片607,不會鬆開回到原本平坦或平面狀態。於一實施例中,接合焊墊可為成對且橫跨薄晶片之每一槽孔,以將橫跨槽孔之晶片部分黏合在一起。Referring now to FIG. 6B, the assembly 600B can include a first thin wafer 601 and a second thin wafer 607 that are bent through mutual restraints. Since the mutual restraints are applied to each other at the joint positions (for example, the bonding pad regions), the assembled curved thin wafers, such as the first thin wafer 601 and the second thin wafer 607, are not released back to the original flat or flat surface. status. In one embodiment, the bond pads can be in pairs and span each slot of the thin wafer to bond the portions of the wafer across the slot together.

第七A圖至第七B圖係顯示具有接合焊墊之組件的示範性上視圖及橫切面圖之概要示意圖。例如,第七A圖係顯示彎曲成類球面形之二個薄晶片堆疊之非平面三維封裝的上視圖,上述二個薄晶片堆疊例如第二薄晶片607在第一薄晶片601之上。在堆疊晶片之間的鄰近槽孔可以一角度對準(例如45度),例如第二薄晶片607之槽孔605與第一薄晶片601之槽孔603。接合焊墊可設置於槽孔之兩側上,例如橫跨槽孔603之焊墊701與焊墊703。7A to 7B are schematic diagrams showing an exemplary top view and a cross-sectional view of an assembly having a bonding pad. For example, Figure 7A shows a top view of a non-planar three-dimensional package of two thin wafer stacks bent into a spherical shape, such as a second thin wafer 607 over the first thin wafer 601. Adjacent slots between the stacked wafers may be angularly aligned (e.g., 45 degrees), such as slots 605 of the second thin wafer 607 and slots 603 of the first thin wafer 601. Bonding pads may be disposed on both sides of the slot, such as pads 701 and pads 703 that span the slots 603.

第七B圖係顯示具有接合焊墊區域之薄膜接合的橫切面示意圖(例如未以誇張化之比例繪製)。例如,第二薄晶片607及第一薄晶片601可透過焊墊之接合例如焊墊703 與配對焊墊705間的接合而保持彎曲。替代性地或選擇性地,薄晶片可透過黏著劑予以接合,以保持呈非平面形狀。Figure 7B shows a schematic cross-sectional view of a film bond having a bond pad area (e.g., not drawn to an exaggerated scale). For example, the second thin wafer 607 and the first thin wafer 601 can be bonded through a bonding pad such as a bonding pad 703. The joint with the mating pad 705 remains curved. Alternatively or selectively, the thin wafer may be bonded by an adhesive to maintain a non-planar shape.

於一實施例中,堆疊多晶片之非平面組件的相鄰晶片間之回填層,例如回填707,可促使晶片間之散熱。回填層可包含導熱介電材料,以控制操作中組裝結構(或非平面晶片)之溫度上升。例如,非平面組件內所內嵌之高速處理電路所產生之熱可允許通過接合焊墊及回填層兩者,以助於冷卻非平面組件。於一實施例中,回填層可減少或消除非平面組件中空氣隙之熱絕緣。替代性地,非平面組件可浸沒於液體中,例如矽油(silicon oil),以填滿空氣隙,用以提供冷卻效果。In one embodiment, stacking backfill layers between adjacent wafers of non-planar components of a multi-wafer, such as backfill 707, can promote heat dissipation between the wafers. The backfill layer can comprise a thermally conductive dielectric material to control the temperature rise of the assembled structure (or non-planar wafer) in operation. For example, the heat generated by the high speed processing circuitry embedded within the non-planar component can allow both the bond pad and the backfill layer to be bonded to help cool the non-planar component. In one embodiment, the backfill layer reduces or eliminates thermal insulation of the air gap in the non-planar component. Alternatively, the non-planar component can be immersed in a liquid, such as silicon oil, to fill the air gap to provide a cooling effect.

前述堆疊並不限於兩層或限於圓形。可形成具有錯開之槽孔的多晶片非平面三維堆疊。電力、訊號及資料可在多層間跳越以越過槽孔,用以在堆疊塊體與相鄰塊體之間分配電力及訊號。由於主動裝置將會受到彎曲應力,故在系統設計時可考慮且預先補償應力所引發之效果例如N型金屬氧化物半導體(MOS)電晶體上縱向及橫向方向上之拉應力(tensile stresses)所導致之跨導(trans-conductance)上升以及對於P型電晶體而言上升亦或下降。The foregoing stack is not limited to two layers or limited to a circle. A multi-wafer non-planar three-dimensional stack with staggered slots can be formed. Power, signals, and data can be skipped across multiple layers to pass through the slots to distribute power and signals between the stacked blocks and adjacent blocks. Since the active device will be subjected to bending stress, it is possible to consider and compensate for the effects caused by the stress in the system design, such as tensile stresses in the longitudinal and lateral directions on the N-type metal oxide semiconductor (MOS) transistor. This leads to an increase in trans-conductance and a rise or fall for P-type transistors.

第八A圖至第八C圖係顯示用以組裝此處所述之一實施例中的薄晶粒/晶圓或基板之彎曲堆疊的示範性順序之方塊圖。例如,於第八A圖之順序800A,二個薄晶片,第一薄晶片807及第二薄晶片809,可保持於組裝裝置中。於一實施例中,上述組裝裝置可包含擠壓單元803(例如上 方單元)、支架單元805(例如下方單元)以及控制單元801。擠壓單元803及/或支架單元805可以三維方式移動,包含平移及/或旋轉移動,例如由控制單元801所控制。8A through 8C are block diagrams showing exemplary sequences for assembling a thin die/wafer or substrate curved stack in one of the embodiments described herein. For example, in the sequence 800A of Figure 8A, two thin wafers, a first thin wafer 807 and a second thin wafer 809, can be held in the assembly apparatus. In an embodiment, the assembly device may include an extrusion unit 803 (eg, A square unit), a bracket unit 805 (for example, a lower unit), and a control unit 801. The extrusion unit 803 and/or the bracket unit 805 can be moved in three dimensions, including translational and/or rotational movements, such as controlled by the control unit 801.

於一實施例中,第一薄晶片807及第二薄晶片809可由擠壓單元803及支架單元805藉由真空、靜電亦或其他手段分別保持住。例如,擠壓單元803或支架單元805可包含具有環狀小孔或真空通道之開孔的真空吸附盤,以提供吸力,用以保持住薄晶片。擠壓單元803及支架單元805可與配對表面結合,用以使所保持住之薄晶片變形。於一實施例中,第一薄晶片807在由擠壓單元803所保持住時可在擠壓單元803之第一彎曲表面811上變形。第二薄晶片809在由支架單元805所保持住時可在支架單元805之第二彎曲表面813上變形。第一薄晶片807及/或第二薄晶片809可包含槽孔以增加晶片彈性,用以進行變形(或捲曲、彎曲)。第一彎曲表面811及第二彎曲表面813可具有共同曲率以彼此匹配。In one embodiment, the first thin wafer 807 and the second thin wafer 809 can be respectively held by the pressing unit 803 and the bracket unit 805 by vacuum, static electricity or other means. For example, the extrusion unit 803 or the holder unit 805 can include a vacuum suction disk having an annular aperture or an opening for a vacuum channel to provide suction to hold the thin wafer. The pressing unit 803 and the bracket unit 805 can be combined with the mating surface to deform the held thin wafer. In an embodiment, the first thin wafer 807 is deformable on the first curved surface 811 of the pressing unit 803 while being held by the pressing unit 803. The second thin wafer 809 is deformable on the second curved surface 813 of the bracket unit 805 when held by the bracket unit 805. The first thin wafer 807 and/or the second thin wafer 809 may include slots to increase wafer elasticity for deformation (or curling, bending). The first curved surface 811 and the second curved surface 813 may have a common curvature to match each other.

於第八B圖之順序800B,支架在對準之後可放置在一起。例如,支架單元805可為透明以允許透過第一薄晶片807及第二薄晶片809與擠壓單元803進行對準。於一實施例中,支架間之對準可基於第一薄晶片807與第二薄晶片809之間的匹配對應接合焊墊(例如基於遮罩)。In the sequence 800B of Figure 8B, the stents can be placed together after alignment. For example, the bracket unit 805 can be transparent to allow alignment of the first thin wafer 807 and the second thin wafer 809 with the extrusion unit 803. In one embodiment, the alignment between the supports can be based on a matching bond pad (eg, based on a mask) between the first thin wafer 807 and the second thin wafer 809.

擠壓單元803可在三旋轉維度(three rotational dimensions)中旋轉,用以對準所保持住之晶片。於一實施例中,擠壓單元803可限制成在一平移維度中移動,例如 朝向或遠離支架單元805,以使支架表面,例如第一彎曲表面811及第二彎曲表面813,得以彼此匹配。於某些實施例中,支架表面可與一共同曲率中心(或球中心)相匹配。The extrusion unit 803 is rotatable in three rotational dimensions for aligning the held wafer. In an embodiment, the extrusion unit 803 can be constrained to move in a translational dimension, such as The bracket unit 805 is oriented toward or away from the bracket unit 805 such that the bracket surface, for example, the first curved surface 811 and the second curved surface 813, are matched to each other. In some embodiments, the stent surface can be matched to a common center of curvature (or center of the ball).

當擠壓單元803及支架單元805被放置在一起時,熱及壓力可加以施加,以在薄金屬膜接合區域之特定區域處例如接合區819接合第一薄晶片807與第二薄晶片809。薄金屬膜接合區域可包含焊墊,其與薄晶片之間的配對焊墊相對準。於一實施例中,焊墊可利用一控制範圍之高溫融化在一起。例如,對於錫(tin)/鉛(lead)型焊墊而言可使用約100-180度C的熱。另則,對於以金(gold)合金所製造之焊墊而言可能需要約350-450度C的熱。When the pressing unit 803 and the holder unit 805 are placed together, heat and pressure can be applied to engage the first thin wafer 807 and the second thin wafer 809 at a specific region of the thin metal film bonding region, for example, the bonding region 819. The thin metal film junction region can include a pad that is aligned with the mating pad between the thin wafers. In one embodiment, the pads can be melted together using a controlled range of high temperatures. For example, heat of about 100-180 degrees C can be used for tin/lead pads. Alternatively, heat of about 350-450 degrees C may be required for pads made of gold alloy.

於第八C圖之順序800C,擠壓單元803可鬆開所保持住之第一晶片807並使其本身從支架單元805分離。包含與第二晶片809相接合之第一晶片807的非平面組件可透過晶片間所建立之接合所提供的相互限制而保持彎曲。In the sequence 800C of the eighth C diagram, the pressing unit 803 can release the held first wafer 807 and separate itself from the holder unit 805. The non-planar component comprising the first wafer 807 bonded to the second wafer 809 can remain curved by mutual restraint provided by the bonding established between the wafers.

於上述敘述中,本發明已參照其特定示範性實施例加以詳細敘述。本領域具通常知識者應得以領會,在不脫離本發明之較寬廣範圍下,可對本發明進行若干修改,上述較寬廣範圍係如下述申請專利範圍所提出者。本發明並不限於所揭露之特定形式、圖式、比例及詳細資訊。是故,本說明書及圖式係用以說明本發明,而非用以限制本發明。In the above description, the invention has been described in detail with reference to the specific exemplary embodiments thereof. It will be appreciated by those skilled in the art that the present invention may be modified in many ways without departing from the scope of the invention. The invention is not limited to the specific forms, figures, proportions and details disclosed. The description and drawings are intended to be illustrative of the invention and not to limit the invention.

100A‧‧‧組件100A‧‧‧ components

100B‧‧‧組件100B‧‧‧ components

101‧‧‧固定結構101‧‧‧Fixed structure

103‧‧‧彈性晶片103‧‧‧elastic wafer

105‧‧‧固定結構105‧‧‧Fixed structure

107‧‧‧彈性晶片107‧‧‧Flexible wafer

109‧‧‧彈性晶片109‧‧‧elastic wafer

111‧‧‧通訊路徑111‧‧‧Communication Path

113‧‧‧眼球113‧‧‧ eyeballs

115‧‧‧固定結構115‧‧‧Fixed structure

117‧‧‧彈性晶片117‧‧‧elastic wafer

119‧‧‧彈性晶片119‧‧‧elastic wafer

121‧‧‧視網膜121‧‧‧Retina

123‧‧‧固定結構123‧‧‧Fixed structure

200A‧‧‧結構200A‧‧‧ structure

200B‧‧‧非平面積體電路裝置200B‧‧‧Non-flat area body circuit device

203‧‧‧阻障層203‧‧‧Barrier layer

205‧‧‧元件層205‧‧‧ component layer

207‧‧‧受應力膜層207‧‧‧ stressed layer

209‧‧‧晶圓載具209‧‧‧ wafer carrier

210‧‧‧聚合物層210‧‧‧ polymer layer

211‧‧‧黏著劑211‧‧‧Adhesive

213‧‧‧彈性薄結構213‧‧‧Flexible thin structure

215‧‧‧受應力膜215‧‧‧stressed film

217‧‧‧受應力膜217‧‧‧stressed film

300A‧‧‧概要圖300A‧‧‧Overview

301、303‧‧‧槽孔301, 303‧‧‧ slots

305‧‧‧薄晶片305‧‧‧ Thin wafer

307‧‧‧尖端307‧‧‧ cutting-edge

309‧‧‧曲率半徑309‧‧‧ radius of curvature

311‧‧‧角度311‧‧‧ angle

313‧‧‧圓周313‧‧‧Circle

400A‧‧‧概要圖400A‧‧‧Overview

400B‧‧‧組件400B‧‧‧ components

401‧‧‧固定結構401‧‧‧Fixed structure

403‧‧‧薄晶片403‧‧‧ Thin wafer

405‧‧‧槽孔405‧‧‧Slots

407‧‧‧接合墊407‧‧‧Join pad

500A‧‧‧順序500A‧‧‧ Order

500B‧‧‧順序500B‧‧‧ Order

500C‧‧‧順序500C‧‧‧ Order

500D‧‧‧順序500D‧‧‧ Order

500E‧‧‧順序500E‧‧‧ Order

501‧‧‧支架單元501‧‧‧ bracket unit

503‧‧‧凹部503‧‧‧ recess

505‧‧‧擠壓單元505‧‧‧Extrusion unit

507‧‧‧軟性結構507‧‧‧Soft structure

509‧‧‧薄晶片509‧‧‧ Thin wafer

511‧‧‧接合區511‧‧‧ junction area

513‧‧‧焊墊513‧‧‧ solder pads

515‧‧‧配對焊墊515‧‧‧Matching pads

517‧‧‧擠壓單元517‧‧‧Extrusion unit

600A‧‧‧概要圖600A‧‧‧Overview

600B‧‧‧組件600B‧‧‧ components

601‧‧‧第一薄晶片601‧‧‧First thin wafer

603‧‧‧槽孔603‧‧‧Slots

605‧‧‧槽孔605‧‧‧ slots

607‧‧‧第二薄晶片607‧‧‧Second thin wafer

701‧‧‧焊墊701‧‧‧ solder pads

703‧‧‧焊墊703‧‧‧ solder pads

705‧‧‧配對焊墊705‧‧‧Matching pads

707‧‧‧回填707‧‧‧ Backfill

800A‧‧‧順序800A‧‧‧ Order

800B‧‧‧順序800B‧‧‧ Order

800C‧‧‧順序800C‧‧‧ Order

801‧‧‧控制單元801‧‧‧Control unit

803‧‧‧擠壓單元803‧‧‧Extrusion unit

805‧‧‧支架單元805‧‧‧ bracket unit

807‧‧‧第一薄晶片807‧‧‧First thin wafer

809‧‧‧第二薄晶片809‧‧‧Second thin wafer

811‧‧‧第一彎曲表面811‧‧‧ first curved surface

813‧‧‧第二彎曲表面813‧‧‧Second curved surface

819‧‧‧接合區819‧‧‧ junction area

本發明係藉由後附圖式中之實例加以說明,而非用以限制本發明。後附圖式中相似之元件符號係指類似之元件。The invention is illustrated by the examples in the following figures, and is not intended to limit the invention. Like reference numerals in the following drawings refer to like elements.

第一A圖至第一D圖係顯示用於彈性晶片之非平面組件之示範性實施例的概要示意圖。1A through 1D are schematic diagrams showing exemplary embodiments of non-planar components for an elastic wafer.

第二A圖係根據此處所述實施例顯示沈積有受應力薄膜之彈性結構的橫切面圖之方塊圖。Second A is a block diagram showing a cross-sectional view of an elastic structure deposited with a stressed film in accordance with embodiments described herein.

第二B圖係根據此處所述實施例顯示以波狀方式變形之非平面裝置的概要示意圖。Second B is a schematic diagram showing a non-planar device that is deformed in a wavy manner in accordance with the embodiments described herein.

第三A圖至第三C圖係根據此處所述之實施例顯示以槽孔為基礎之示範性非平面晶片的概要示意圖。3A through 3C are schematic diagrams showing exemplary non-planar wafers based on slots, in accordance with embodiments described herein.

第四A圖至第四B圖係顯示組裝有軟性結構的薄晶片之示範性實施例的概要示意圖。4A to 4B are schematic diagrams showing an exemplary embodiment of a thin wafer in which a flexible structure is assembled.

第五A圖至第五F圖係顯示用於非平面彈性裝置之組裝程序的示範性順序之方塊圖。Fifth to fifth F diagrams are block diagrams showing exemplary sequences of assembly procedures for non-planar elastic devices.

第六A圖至第六B圖係顯示受到相互限制之非平面晶片的示範性實施例之概要示意圖。6A through 6B are schematic diagrams showing an exemplary embodiment of a non-planar wafer that is mutually constrained.

第七A圖至第七B圖係顯示具有接合焊墊之組件的示範性上視圖及橫切面圖之概要示意圖。7A to 7B are schematic diagrams showing an exemplary top view and a cross-sectional view of an assembly having a bonding pad.

第八A圖至第八C圖係顯示用以組裝此處所述之一實施例中的薄晶粒/晶圓之彎曲堆疊的示範性順序之方塊圖。8A through 8C are block diagrams showing exemplary sequences for assembling a thin die/wafer curved stack in one of the embodiments described herein.

100B‧‧‧組件100B‧‧‧ components

105‧‧‧固定結構105‧‧‧Fixed structure

107、109‧‧‧彈性晶片107, 109‧‧‧Flexible wafer

111‧‧‧通訊路徑111‧‧‧Communication Path

Claims (10)

一種非平面積體電路裝置,包含:一彈性結構,彎曲成一期望形變,該彈性結構包含複數個接觸區域,其中該彈性結構包含內嵌於其中之電路,用以實施處理操作;以及至少一固定結構,透過該接觸區域接合至該彈性結構以提供保持限制,用以使該彈性結構得以保持彎曲。A non-flat area body circuit device comprising: an elastic structure bent into a desired deformation, the elastic structure comprising a plurality of contact regions, wherein the elastic structure comprises a circuit embedded therein for performing a processing operation; and at least one fixing A structure is joined to the resilient structure through the contact region to provide a retention constraint for maintaining the resilient structure to remain curved. 如請求項1所述之非平面積體電路裝置,其中該固定結構係根據該期望形變彎曲,其中該固定結構係與該彈性結構接合以提供相互保持限制,用以使得該固定結構得以保持彎曲,其中該彈性結構包含一個或以上之槽孔,用以在該彈性結構中形成狹窄開孔,該槽孔係減少橫跨該狹窄開孔處的該彈性結構之同平面應力,以使該彎曲得以依照該期望形變,其中該彈性結構包含一表面,該表面具有一中心,其中該槽孔係以從該表面之該中心向外延伸之方向排列,其中該彎曲之方向係以三維方式向內朝向該中心,其中該接觸區域包含接合墊,該接合墊包含導電材料,該固定結構係透過該接合墊與該彈性結構接合。The non-flat-area body circuit device of claim 1, wherein the fixed structure is bent according to the desired deformation, wherein the fixed structure is engaged with the elastic structure to provide mutual retention restrictions for maintaining the fixed structure to be bent. Where the resilient structure includes one or more slots for forming a narrow opening in the resilient structure, the slot reducing the in-plane stress of the resilient structure across the narrow opening to cause the bending Deformed in accordance with the desired, wherein the resilient structure includes a surface having a center, wherein the slot is aligned in a direction extending outwardly from the center of the surface, wherein the direction of the bend is inwardly three-dimensionally Facing the center, wherein the contact region includes a bond pad, the bond pad includes a conductive material, and the fixed structure is coupled to the elastic structure through the bond pad. 如請求項2所述之非平面積體電路裝置,其中該期望形變大體上符合一類球面形狀,其中該固定結構中之至少一者係透過該接觸區域中之至少二者接合至橫跨該槽 孔之其中一者處的該彈性結構,該接觸區域中之該至少二者係設置鄰近該槽孔之該其中一者,其中該固定結構中之該至少一者提供一部分的該保持限制,以使該槽孔之該其中一者的開孔免於被擴大,其中該接觸區域中之該至少二者係橫跨該槽孔之該其中一者的兩側設置,其中該固定結構中之該至少一者包含聚合物材料,該聚合物材料彎曲成符合該期望形變之非平面形狀,以用於該彈性結構,其中至少一部分之該彈性結構及該固定結構係透過該非平面積體電路裝置中之回填層予以分離,其中該回填層包含能在該彈性結構與該固定結構之間散熱的導熱材料。The non-flat-area body circuit device of claim 2, wherein the desired deformation substantially conforms to a type of spherical shape, wherein at least one of the fixed structures is bonded across the slot through at least two of the contact regions The resilient structure at one of the apertures, the at least two of the contact regions being disposed adjacent one of the slots, wherein the at least one of the securing structures provides a portion of the retention limit to Having the opening of one of the slots from being enlarged, wherein the at least two of the contact regions are disposed across a side of the one of the slots, wherein the fixed structure At least one of the polymer material is bent into a non-planar shape conforming to the desired deformation for use in the elastic structure, wherein at least a portion of the elastic structure and the fixed structure are transmitted through the non-planar body circuit device The backfill layer is separated, wherein the backfill layer comprises a thermally conductive material capable of dissipating heat between the resilient structure and the fixed structure. 如請求項2所述之非平面積體電路裝置,其中該接合墊係以至少一鈍化層予以鈍化,以使該導電材料與腐蝕隔絕,其中該非平面積體電路裝置可植入於人眼中,以使該人眼得以感知光線之景象,其中該期望形變使該非平面積體電路裝置之植入得以符合人類眼球之形狀,其中該固定結構能實施額外之處理操作,其中該接合墊使該彈性結構與該固定結構之間得以彼此進行通訊,用以在該處理操作與該額外之處理操作之間進行協調,其中該通訊包含透過該固定結構橫跨槽孔至該彈性結構之資訊中繼,其中該彈性結構及該固定結構大體上係為透明,以使光線得以穿過該非平面積體電路裝置,其中該彈性結構包含一像素單元陣列,其中該像素單元陣列中 之每一像素單元包含一感測器用以感測光線,一電極用以傳送刺激訊號至該電極之目標神經元細胞以用於感知,以及處理電路用以從該光線取得該刺激訊號以驅動該電極。The non-flat-area body circuit device of claim 2, wherein the bonding pad is passivated with at least one passivation layer to isolate the conductive material from corrosion, wherein the non-flat-area body circuit device can be implanted in a human eye, In order for the human eye to perceive a scene of light, wherein the desired deformation enables the implantation of the non-flat-area body circuit device to conform to the shape of a human eye, wherein the fixed structure can perform an additional processing operation, wherein the bonding pad enables the elasticity The structure and the fixed structure are in communication with each other for coordinating between the processing operation and the additional processing operation, wherein the communication includes an information relay through the fixed structure across the slot to the resilient structure, Wherein the elastic structure and the fixed structure are substantially transparent to allow light to pass through the non-flat area body circuit device, wherein the elastic structure comprises an array of pixel cells, wherein the pixel unit array Each of the pixel units includes a sensor for sensing light, an electrode for transmitting a stimulation signal to the target neuron cell of the electrode for sensing, and a processing circuit for obtaining the stimulation signal from the light to drive the pixel electrode. 如請求項1所述之非平面積體電路裝置,其中該非平面積體電路裝置具有一三維形狀,其中該期望形變符合一部分的該三維形狀,該非平面積體電路裝置更包含:至少一分離彈性結構,該分離彈性結構能進行額外之處理操作,其中該分離彈性結構係彎曲成符合該三維形狀,以使該彈性結構之表面與該分離彈性結構之分離表面得以在該三維形狀中彼此相對,用以使該彈性結構與該分離彈性結構得以橫跨該表面及該分離表面在該非平面積體電路裝置內彼此直接通訊,其中該直接通訊係以無線實施。The non-flat-area body circuit device of claim 1, wherein the non-flat-area body circuit device has a three-dimensional shape, wherein the desired deformation conforms to a portion of the three-dimensional shape, and the non-flat-area body circuit device further comprises: at least one separation elasticity a structure capable of performing an additional processing operation, wherein the separation elastic structure is curved to conform to the three-dimensional shape such that a surface of the elastic structure and a separation surface of the separation elastic structure are opposed to each other in the three-dimensional shape, The elastic structure and the separate elastic structure are allowed to communicate directly with each other across the surface and the separation surface in the non-flat area circuit device, wherein the direct communication is performed wirelessly. 一種三維積體電路裝置,該三維積體電路裝置具有一三維形狀表面,該三維積體電路裝置包含:複數個彈性晶片,該複數個彈性晶片中之每一彈性晶片係彎曲成符合該三維形狀表面;複數個接合墊,用以接合該彈性晶片,其中該複數個彈性晶片中之每一彈性晶片係透過二個或以上之該接合墊與該複數個彈性晶片中之至少一分離者接合,以提供相互保持限制,用以使經接合之該彈性晶片保持彎曲; 以及連接路徑,該連接路徑位於該複數個彈性晶片中之至少二者之間,以使該複數個彈性晶片中之該至少二者之間得以進行直接通訊,其中該接合墊及該連接路徑在該複數個彈性晶片之間提供連結配置,以使該三維積體電路裝置得以實施處理操作。A three-dimensional integrated circuit device having a three-dimensional shape surface, the three-dimensional integrated circuit device comprising: a plurality of elastic wafers, each of the plurality of elastic wafers being curved to conform to the three-dimensional shape a plurality of bonding pads for bonding the elastic wafer, wherein each of the plurality of elastic wafers is bonded to at least one of the plurality of elastic wafers through the two or more bonding pads. Providing mutual retention restrictions for keeping the bonded elastic wafer curved; And a connection path between at least two of the plurality of elastic wafers to enable direct communication between the at least two of the plurality of flexible wafers, wherein the bonding pads and the connection path are A connection arrangement is provided between the plurality of elastic wafers to enable the three-dimensional integrated circuit device to perform a processing operation. 如請求項6所述之三維積體電路裝置,更包含回填材料,其在該複數個彈性晶片之間且在該接合墊之外,該回填材料能導熱以消散來自該複數個彈性晶片之熱,其中該複數個彈性晶片中之該至少二者係設置成彼此相對,用以建立該連接路徑,其中該複數個彈性晶片中之至少一者包含一個或以上之槽孔,以在該複數個彈性晶片中之該至少一者中形成狹窄開孔,用以使該彎曲得以符合該三維形狀。The three-dimensional integrated circuit device of claim 6, further comprising a backfill material between the plurality of elastic wafers and outside the bonding pad, the backfill material is capable of conducting heat to dissipate heat from the plurality of elastic wafers The at least two of the plurality of elastic wafers are disposed opposite each other to establish the connection path, wherein at least one of the plurality of elastic wafers includes one or more slots for the plurality of A narrow opening is formed in the at least one of the elastic wafers to conform the curvature to the three-dimensional shape. 一種植入彈性裝置,包含:複數個光感測器,用以接收光線;複數個微電極;以及電路,耦合至該光感測器及該微電極,該電路驅動該微電極以刺激神經元細胞,用以使該神經元細胞得以感知該光感測器所捕捉到之該光線的景象,其中該植入彈性裝置係由彈性材料所製成,該彈性材料具有槽孔以形成開孔,其中該槽孔使該植入彈性裝置得以彎曲成符合人 類眼球形狀之該期望形變,用以使該微電極得以設置成緊鄰該神經元細胞以用於該刺激。An implantable elastic device comprising: a plurality of photosensors for receiving light; a plurality of microelectrodes; and a circuit coupled to the photosensor and the microelectrode, the circuit driving the microelectrode to stimulate neurons a cell for causing the neuron cell to perceive a view of the light captured by the light sensor, wherein the implantable elastic device is made of an elastic material having a slot to form an opening, Wherein the slot allows the implanting elastic device to be bent into conformity with a person The desired deformation of the eyeball-like shape is such that the microelectrode is placed in close proximity to the neuronal cell for the stimulation. 一種非平面積體電路裝置,包含:一彈性結構,彎曲成一期望形變,該彈性結構包含至少一層受應力膜,以提供彎曲應力,用以彎曲該彈性結構,其中該受應力膜係以指定圖案形成於該彈性結構中,以促使該期望形變。A non-flat-area body circuit device comprising: an elastic structure bent into a desired deformation, the elastic structure comprising at least one layer of stressed film to provide bending stress for bending the elastic structure, wherein the stressed film is in a specified pattern Formed in the elastic structure to promote the desired deformation. 如請求項9所述之非平面積體電路裝置,其中該受應力膜係沈積於該非平面積體電路裝置之至少一側上,其中該受應力膜具有龐大之殘餘薄膜應力,其中該非平面積體電路裝置係根據該受應力膜之該薄膜應力的分配透過該指定圖案以三維波浪形式成形。The non-flat-area body circuit device of claim 9, wherein the stressed film is deposited on at least one side of the non-flat-area body circuit device, wherein the stressed film has a large residual film stress, wherein the non-flat area The bulk circuit device is formed in a three-dimensional wave form according to the distribution of the film stress of the stressed film through the specified pattern.
TW101135413A 2011-11-18 2012-09-26 Non-planar chip assembly TWI508252B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/300,548 US9155881B2 (en) 2011-05-06 2011-11-18 Non-planar chip assembly

Publications (2)

Publication Number Publication Date
TW201322405A TW201322405A (en) 2013-06-01
TWI508252B true TWI508252B (en) 2015-11-11

Family

ID=49032488

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101135413A TWI508252B (en) 2011-11-18 2012-09-26 Non-planar chip assembly

Country Status (1)

Country Link
TW (1) TWI508252B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10204855B2 (en) 2014-07-11 2019-02-12 Intel Corporation Bendable and stretchable electronic devices and methods

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5650363A (en) * 1994-04-29 1997-07-22 Siemens Aktiengesellschaft Method for processing thin wafers and solar cells of crystalline silicon
US7127301B1 (en) * 2003-04-28 2006-10-24 Sandia Corporation Flexible retinal electrode array
US20100260494A1 (en) * 2009-02-23 2010-10-14 Gary Edwin Sutton Curvilinear sensor system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5650363A (en) * 1994-04-29 1997-07-22 Siemens Aktiengesellschaft Method for processing thin wafers and solar cells of crystalline silicon
US7127301B1 (en) * 2003-04-28 2006-10-24 Sandia Corporation Flexible retinal electrode array
US20100260494A1 (en) * 2009-02-23 2010-10-14 Gary Edwin Sutton Curvilinear sensor system

Also Published As

Publication number Publication date
TW201322405A (en) 2013-06-01

Similar Documents

Publication Publication Date Title
US9155881B2 (en) Non-planar chip assembly
AU2016200484B2 (en) Non-planar chip assembly
US9731130B2 (en) Flexible artificial retina device
TWI519846B (en) Assembling thin silicon chips on a contact lens
TWI508252B (en) Non-planar chip assembly
AU2018208714B2 (en) Non-planar chip assembly
TWI520237B (en) Methods and apparatuses for non-planar chip assembly