TWI507698B - Semiconductor device test apparatus and method thereof - Google Patents

Description

Semiconductor component testing device and testing method thereof

The invention relates to a semiconductor component testing device and a testing method thereof, in particular to a replacement or upgrade capable of transmitting and processing a large amount of image data at a high speed, and changing with the test requirements, and the hardware phase Highly capacitive semiconductor component test device and test method thereof.

The invention relates to a semiconductor component testing device and a testing method thereof, in particular to a replacement or upgrade capable of transmitting and processing a large amount of image data at a high speed, and changing with the test requirements, and the hardware phase Highly capacitive semiconductor component test device and test method thereof.

The Mobile Industry Processor Interface (MIPI) has replaced the traditional parallel data interface and has become a commonly used transmission protocol. It can standardize the components such as lens, display and RF interface inside the electronic device to reduce complexity and increase phase. For the purpose of capacitiveness, the mobile industry processor interface can transmit up to 1.6 GHz, so it can transmit a large amount of image data. Because of this, the mobile industry processor interface is widely used in smart phones and other mobile Internet devices. When using an automatic test equipment (ATE) to perform image test on a semiconductor component to be tested, it is usually determined by analyzing the correctness of the image data received by the test equipment to determine whether the function of the semiconductor component to be tested is normal or not. The quality of the semiconductor component to be tested. However, since the general logic test machine cannot transmit image data at high speed and cannot process image data with a large amount of data, it is often costly to purchase a hardware module if the image test is required. The functions that the module can provide are limited, and often the performance of the test is often not ideal, for example, the coverage of the test is insufficient.

Please refer to FIG. 1 , which is a schematic diagram of a semiconductor component testing device of the prior art. The device is one of the devices specially designed for image testing needs to be mounted on a testing machine, and has a mobile industry processor interface module 111. The action industry processor interface signal for decoding the semiconductor component to be tested. As shown in the figure, the semiconductor component testing device 1 includes a probe interface panel (PIB) 10 and four mobile industry processor interface modules 111. The semiconductor component testing device 1 is mainly used by the probe interface panel 10 The mobile industry processor interface signal of the semiconductor component is measured and then decoded by the mobile industry processor interface module 111 for subsequent processing. Although this method can process the image signal, since the device needs to be individually designed to be mounted on the test machine, and the probe interface panel 10 is expensive, the cost of the device is greatly increased. In addition, the mobile industry processor interface module 111 disposed on the probe interface panel 10 cannot be replaced or upgraded, and thus cannot meet different test methods and test requirements. Therefore, the hardware compatibility of the semiconductor component test device 1 is also Can not meet the current needs. Furthermore, the number of mobile industry processor interface modules 111 disposed on the probe interface panel 10 is fixed, and each of the mobile industry processor interface modules 111 can only support testing of two semiconductor components. Therefore, the semiconductor component testing device 1 can only support up to eight semiconductor components. As described above, the semiconductor device test apparatus 1 is not only costly, but the hardware cannot be replaced or upgraded according to the requirements of the semiconductor component to be tested, the compatibility is not good, and the number of simultaneous tests cannot be increased. Its performance is also greatly limited, and other test devices of the prior art have the same problem.

Therefore, how to propose a semiconductor component testing device, which can effectively improve the semiconductor component testing device of the prior art, such as poor hardware compatibility and limited image testing database, has become an urgent problem.

In view of the above-mentioned problems of the prior art, one of the objects of the present invention is to provide a semiconductor device testing device and a testing method thereof, which can solve the problem that the semiconductor component testing device of the prior art cannot transmit and process a large amount of image data at high speed, hardware. Poor compatibility and low test performance.

According to one of the objects of the present invention, a semiconductor component testing device is provided. The device can be connected to a semiconductor component testing interface, and the semiconductor component testing interface can capture at least one mobile industry processor interface signal of the semiconductor component to be tested. The device can include a test carrier and at least one mobile industry processor interface module. The test carrier can receive the mobile industry processor interface signals. The mobile industry processor interface module can be disposed on the test carrier and decode the mobile industry processor interface signals to generate decoded image data for subsequent image analysis.

According to one of the objects of the present invention, a semiconductor component testing method can be applied to a semiconductor component testing device for performing image signal testing on at least one semiconductor component to be tested. The semiconductor component testing method can include the following steps: using a semiconductor component The test interface captures the action industry processor interface signals of the semiconductor components to be tested; receives the mobile industry processor interface signals through the test carrier of the semiconductor component test device; and at least one mobile industry processor via the semiconductor component test device The interface module decodes the mobile industry processor interface signals to generate decoded image data for subsequent image analysis.

Preferably, the semiconductor component testing device further includes a buffer module, which can be disposed on the test carrier and accesses and operates the image data, and the buffer module can be connected to the image processing computer. The image processing computer can use the built-in image processing library (IP Library) to analyze and interpret the image data to generate an analysis result, and transmit the analysis result to the host computer to display the analysis result.

Preferably, each of the mobile industry processor interface modules further includes an image processing module, which can be implemented by using a Field Programmable Gate Array (FPGA), and the image processing module can perform the operations. The industrial processor interface signal is decoded, and the built-in image processing library is used to analyze and interpret the image data to generate an analysis result, and the analysis result is transmitted to the host computer to display the analysis result.

Preferably, the semiconductor component testing device further includes a plurality of test slots, and the plurality of test carriers are alternatively disposed in the test slots.

Preferably, the mobile industry processor interface module can decode the mobile industry processor interface signals of the plurality of semiconductor components to be tested, and can be connected to the plurality of image processing computers through the buffer module.

Preferably, each of the mobile industry processor interface modules is alternatively disposed on each test carrier.

Preferably, the semiconductor component testing device further includes a differential buffer module, and the image data can be converted into a differential signal and then transmitted to the image processing computer.

Preferably, the mobile industry processor interface module further includes a decoding module, and the decoding module can be a programmable gate array module and decode the mobile industry processor interface signals.

Preferably, the buffer module can be a programmable gate array module.

Preferably, the access and operation program can perform a logic gate operation on the vertical synchronization, horizontal synchronization and time pulse signals of the image data.

According to another aspect of the present invention, a semiconductor component testing method is further applicable to a semiconductor component testing apparatus for performing image signal testing on at least one semiconductor component to be tested. The semiconductor component testing method may include the following steps: using a semiconductor component The test interface captures the action industry processor interface signals of the semiconductor components to be tested; the test carrier of the semiconductor component test device is externally connected to the external mobile industry processor interface module; and the mobile industry processor interface module receives and decodes The action industry processor interface signals are used to generate decoded image data; the image data is accessed and operated by a buffer module of the semiconductor component test device; and the image data is analyzed and interpreted by an image processing computer. The analysis result is generated; and the analysis result is displayed via a host computer for analyzing the quality of the semiconductor components to be tested.

In view of the above, the semiconductor component testing apparatus and the testing method thereof according to the present invention may have one or more of the following advantages:

(1) In one embodiment of the present invention, an action industry processor interface module is used to decode an action industry processor interface signal of a semiconductor component to be tested, and an image processing computer is used to analyze and interpret the decoded image data.

(2) In one embodiment of the present invention, the semiconductor component testing device is provided with a plurality of test slots, so that a plurality of test carriers can be disposed, and each test carrier can be provided with more than two mobile industry processor interface modules. Therefore, it can be expanded according to requirements, so the semiconductor component test device can support multiple semiconductor components to be tested, which greatly improves the performance of the device.

(3) In an embodiment of the present invention, the action industry processor interface module disposed on the test carrier can be replaced, so that the action industry processor interface module can be replaced or upgraded according to different test methods and test requirements. It can handle a variety of different situations and therefore also improves the hardware compatibility of the test device.

(4) In an embodiment of the present invention, image data can be converted into a differential signal by a differential buffer module and then transmitted to an image processing computer to enhance signal integrity.

(5) In one embodiment of the present invention, the test carrier of the semiconductor component test device can select a suitable mobile industry processor interface module according to different test methods or test requirements, and can directly connect an external mobile industry processor. The interface module handles the mobile industry processor interface signal, so it has better flexibility in use.

(6) In one embodiment of the present invention, the action industry processor interface module of the semiconductor component test device may further include an image processing module, which can implement a plurality of hardware circuits by using a programmable gate array, and utilize The built-in image processing library analyzes and interprets the image data to realize parallel operation of multiple hardware circuits, thereby generating analysis results, which can greatly accelerate the speed of image processing analysis.

(7) In one embodiment of the present invention, since the image processing module can be directly integrated in the mobile industry processor interface module of the semiconductor component testing device, if only standard test items need to be executed, no external computer device is needed. Therefore, the cost required for testing can be greatly reduced.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the preferred embodiments of the semiconductor device test apparatus and the test method thereof according to the present invention will be described with reference to the accompanying drawings. For the sake of understanding, the same components in the following embodiments are denoted by the same reference numerals.

Please refer to FIG. 2, which is a block diagram of a semiconductor component testing device of the present invention. As shown in the figure, the semiconductor component testing device 2 can include a test carrier 21, a mobile industry processor interface module 211, and a buffer module 212.

The semiconductor component test interface 20 can capture the action industry processor interface signal 241 of the semiconductor component 24 to be tested to perform image signal testing. The test carrier 21 of the semiconductor component testing device 2 can be connected to the semiconductor component test interface 20, and can receive the Mobile Industry Processor Interface (MIPI) signal 241 of the semiconductor component 24 to be tested. The mobile industry processor interface module 211 of the carrier 21 decodes the mobile industry processor interface signal 241 to produce decoded image data 2111. The buffer module 212 disposed on the test carrier 21 can receive the image data 2111 and access and calculate the program 2121. In an embodiment, the access and operation program 2121 may perform a logic gate operation on signals such as vertical synchronization (V-Sync), horizontal synchronization (H-Sync), and clock (Clock) of the image data 2111.

After the access and operation program 2121 is completed, the semiconductor component testing device 2 can transmit the image data 2111 to the image processing computer 22, and use the built-in image processing library (IP Library) to analyze the image data 2111 and The interpretation is performed to generate an analysis result 221, and the image processing computer 22 can be a general test machine computer or other device capable of image processing. Finally, the analysis result 221 can be displayed by the host computer 23 to analyze the quality of the semiconductor component 24 to be tested.

It is worth mentioning that most of the semiconductor component testing devices of the prior art are not designed for image processing, so they cannot process a large amount of image data. If you want to improve the processing ability of image data, it will cost a lot of money to purchase equipment. . On the contrary, it can be seen from the above that in the present embodiment, the test carrier of the semiconductor component test device can buffer the image data, and the test carrier can be connected to the image processing computer for image data analysis and interpretation, thereby enabling high-speed transmission. The image data, and processing a large amount of image data, can greatly reduce the cost of the device, so this embodiment does effectively improve the shortcomings of the prior art.

Please refer to FIG. 3, which is a schematic view of a first embodiment of a semiconductor component testing device of the present invention. As shown in the figure, in the embodiment, the semiconductor component testing device 3 can further include a plurality of test sockets 35, and a plurality of test carriers 31 can be disposed in the slots 35 and can be detached at any time. The component testing device 3 can simultaneously set a plurality of test carriers 31. In addition, each test carrier 31 can be provided with more than two mobile industry processor interface modules, so that the user can increase according to the test requirements. The number of the carrier plates 31 is tested to achieve the purpose of simultaneous testing of a plurality of semiconductor components.

Further, in an embodiment of the invention, the mobile industry processor interface module (sub-board) provided on the test carrier of the semiconductor component testing device can be replaced. Therefore, the user can replace or upgrade the mobile industry processor interface module according to the test method or the test requirements, and can also design the required mobile industry processor interface module. Therefore, in the present embodiment, the hardware compatibility of the semiconductor element test device is also effectively improved, and the hardware cost is low, and the plurality of test combinations can be quickly changed, thereby increasing the flexibility in use.

Please refer to FIG. 4, which is a schematic view showing a second embodiment of the semiconductor component testing device of the present invention. First, the semiconductor component test interface 40 can capture a number of Mobile Industry Processor Interface (MIPI) signals of the semiconductor component 44 to be tested, and then transmit it to the test carrier 41 via the Hi-Fix cable 47. The MIPI sub-board 411 in the board 41 receives the MIPI signal and can decode the MIPI signal by using a first Field Programmable Gate Array (FPGA) module 4112 disposed therein to generate image data. The random access memory 4113 in the MIPI daughter board 411 can be used to temporarily store data. In this embodiment, the semiconductor component test interface 40 can be a pinhole measurement system including components such as a probe card.

The decoded image data can be transmitted to the second programmable gate array module 412 for access operation, which includes logic gate operations of vertical synchronization, horizontal synchronization, time and pulse, etc., and then the image data is buffered by differential buffering. The module 414 is converted into a differential signal and transmitted to the image processing computer 42 through the differential cable via the contact 413, and uses the built-in image processing library for image analysis and interpretation to obtain an analysis result. . The analysis results generated by the respective image processing computers 42 can be transmitted to the host computer 43 via the router 46 to analyze the quality of the plurality of semiconductor elements 44 to be tested.

Please refer to FIG. 5, which is a flow chart of a second embodiment of the semiconductor component testing apparatus of the present invention. This embodiment includes the following steps:

In step S51, the MIPI signals of the plurality of semiconductor components to be tested are extracted by the semiconductor component test interface, and then transmitted to the MIPI daughter board of the test carrier via the Hi-Fix cable.

In step S52, the MIPI signal is decoded by the first programmable gate array module disposed in the MIPI daughter board to generate image data.

In step S53, the access operation of the image data is performed through the second programmable gate array module of the test carrier.

In step S54, the image data is converted into a differential signal via the differential buffer module, and then transmitted to the image processing computer via the differential cable.

In step S55, the image data is analyzed and interpreted by the image processing computer to generate an analysis result.

In step S56, the analysis result is displayed by the host computer.

Please refer to FIG. 6, which is a schematic view of a third embodiment of the semiconductor component testing apparatus of the present invention. As shown in the figure, in the embodiment, the semiconductor component test interface 60 may further include a test socket (Socket), which may be electrically connected to the test carrier 61, and may be used to test the packaged semiconductor component 64 and the test socket. A plurality of probes are disposed to contact the semiconductor component 64 to be tested and the mobile industry processor interface signal is taken for testing, and the remaining operational steps of the embodiment are the same as those of the second embodiment, so no further description is provided herein. . The above is only an example, and the semiconductor component test interface 60 may also include other forms, and the invention is not limited thereto.

Please refer to FIG. 7, which is a schematic view of a fourth embodiment of the semiconductor component testing apparatus of the present invention. In this embodiment, the MIPI signal is processed by an external external MIPI decoding module. Similarly, the semiconductor component test interface 70 can capture a plurality of MIPI signals of the semiconductor component 74 to be tested, and the MIPI signal can be directly transmitted to an external MIPI decoding module to receive and decode the MIPI signal. . Then, the image data is transmitted to the test carrier 71, and after being accessed and operated by the programmable gate array module 712, the differential buffer module (not shown) is first converted into a differential signal. Then, it is transmitted to the image processing computer 72 via the contact 713, and the built-in image processing library is used for image analysis to obtain the analysis result. All analysis results can also be transmitted to the host computer 73 via the router 76 to analyze the quality of the semiconductor component 74 to be tested.

It is worth mentioning that the semiconductor component testing device of the prior art cannot replace or upgrade the MIPI module at any time according to the test requirements, and the number of the same measurement is also fixed, so the compatibility and performance are greatly limited. . In addition, test devices for MIPI signal testing requirements are expensive and therefore extremely costly. On the contrary, as can be seen from the above-exemplified embodiments, the test carrier of the semiconductor component test device can be used as a bridge interface, and different D-PHY decoding modules can be selected according to different test requirements, or a link is used. The external decoding module can decode the decoded image data to the image processing computer through the test carrier board. Therefore, the design enables the test device to have high signal format compatibility and save test cost.

In addition, if multiple simultaneous tests are required, it can be achieved by adding the number of test carriers, which greatly increases the performance. Furthermore, since the image signal can be converted into a differential signal through the differential buffer module and then transmitted to the image processing computer via the differential cable, the differential cable has a lower cost, thereby further reducing the cost of the test device.

Please refer to FIG. 8, which is a flow chart of a fourth embodiment of the semiconductor component testing apparatus of the present invention. This embodiment includes the following steps:

In step S81, the MIPI signals of the semiconductor components to be tested are extracted by the semiconductor component test interface, and then transmitted to an external external MIPI decoding module.

In step S82, the MIPI signal is decoded by the external MIPI decoding module to generate image data.

In step S83, the image data is accessed and operated through the programmable gate array module of the test carrier.

In step S84, the image data is converted into a differential signal via the differential buffer module, and then transmitted to the image processing computer via the differential cable.

In step S85, the image data is analyzed and interpreted by the image processing computer to generate an analysis result.

In step S86, the analysis result is displayed by the host computer.

Please refer to FIG. 9, which is a schematic view showing a fifth embodiment of the semiconductor component testing device of the present invention. Similarly, the semiconductor component test interface 90 can capture the action industry processor interface signals of the plurality of semiconductor components 94 to be tested, and then transmit them to the test carrier 91. The MIPI daughter board 911 in the test carrier 91 receives the MIPI signal. In this embodiment, the first programmable gate array module 9112 provided in the MIPI sub-board 911 can be an image processing module, which can not only decode the MIPI signal to generate image data, but also can be utilized therein. The image processing library analyzes and interprets the image to generate an analysis result. In this embodiment, the first programmable gate array module 9112 can analyze the average value of the pixels of the decoded image data by using the built-in image library to determine the average value of the pixels of the image data. Whether the upper limit and the lower limit of the preset are met to generate an analysis result, and the analysis result is displayed by the host computer 93. Of course, the image processing library can be selected according to actual needs, and the present invention is not limited thereto.

It is worth mentioning that the embodiment uses a programmable gate array to implement an image processing module in the MIPI daughter board, which can not only decode the MIPI signal to generate image data, but also utilize the preset image processing function. The library directly analyzes and interprets the image, so that the MIPI daughter board has the functions of decoding and image processing at the same time, so there is no need for an external image processing computer as in the foregoing embodiment. Since a plurality of hardware circuits can be realized by using a programmable gate array, a specific image processing library can be used to analyze and interpret the divided images, thereby realizing parallel operations of a plurality of hardware circuits, so that To speed up image processing, the above method can be implemented using a hardware language. In addition, if the semiconductor component test device only needs to perform standard test items, no external computer equipment is required, so the cost required for the test can be greatly reduced.

The foregoing embodiment uses an external image processing computer to analyze and interpret the image data, and the method can be implemented by using the C language. Although the C language belongs to a higher-order language, it has high flexibility, but it cannot A function of performing parallel operations on the divided images is achieved. Therefore, the speed of image processing can be further accelerated by the method of the embodiment.

Although the concept of the semiconductor component testing method of the present invention has been simultaneously described in the description of the semiconductor component testing apparatus of the present invention, for the sake of clarity, the flowchart will be further described below in detail.

Please refer to FIG. 10 , which is a flow chart of a semiconductor component testing method according to the present invention. The method can be applied to a semiconductor component testing device for performing image signal testing on at least one semiconductor component to be tested. The method comprises the following steps:

In step S101, the semiconductor device test interface is used to capture at least one mobile industry processor interface signal of the semiconductor component to be tested.

In step S102, the mobile industry processor interface signals are received through the test carrier of the semiconductor component test device.

In step S103, the mobile industry processor interface signals are decoded by the mobile industry processor interface module of the semiconductor component testing device to generate decoded image data.

In step S104, the image data is accessed and operated by the buffer module of the semiconductor component testing device.

In step S105, the image data is interpreted by an image processing computer to generate an analysis result.

In step S106, the analysis result is displayed by a host computer for analyzing the quality of the semiconductor components to be tested.

The detailed description and embodiments of the semiconductor element test method of the present invention have been described above in connection with the semiconductor element test apparatus of the present invention, and will not be repeatedly described herein for the sake of brevity.

In summary, an embodiment of the present invention discloses that a semiconductor component testing device can use a mobile industry processor interface module to decode an action industry processor interface signal of a semiconductor component to be tested, and then use an image processing computer to analyze and interpret the decoded image. Data, therefore, can not only deal with a large amount of data, but also reduce the cost of testing. In addition, an embodiment of the present invention discloses that a semiconductor component testing device can be provided with a plurality of test slots for multiple test carriers, and each test carrier can also be provided with more than two mobile industry processor interface modules, so that not only can the expansion be expanded. At the same time, it can support multiple semiconductor components to be tested at the same time, so the test performance of the device has been improved. Moreover, in an embodiment of the present invention, the mobile industry processor interface module disposed on the test carrier of the semiconductor component testing device is replaceable, and thus can be replaced or upgraded as needed, so that the semiconductor component testing device can cope with various situations. It also improves its hardware compatibility. One embodiment of the present invention discloses that the semiconductor component testing device can convert the decoded image data into a differential signal and then transmit the image data to the image processing computer, thereby reducing the bandwidth requirement of the I/O line and reducing the wire cost. In addition, in one embodiment of the present invention, the test carrier of the semiconductor component testing device can be selected according to requirements, and the mobile industry processor interface module to be set can be directly connected, or an external mobile industry processor interface module can be directly connected to enable the semiconductor. The component test device is extremely flexible in use. In an embodiment of the present invention, the action industry processor interface module of the semiconductor component testing device may further include an image processing module, which can implement a plurality of hardware circuits by using a programmable gate array, and utilizes built-in The image processing library analyzes and interprets the image data to realize parallel operation of a plurality of hardware circuits, thereby generating an analysis result, which can greatly speed up the image processing analysis, and if the semiconductor component test device only needs to execute the standard Test items eliminate the need for external computer equipment, thus significantly reducing the cost of testing.

It can be seen that the present invention has achieved the desired effect under the prior art, and is not familiar with the skill of the artist, and its progressiveness and practicability have been met with the patent application requirements.提出 Submit a patent application in accordance with the law, and ask your office to approve the application for this invention patent to encourage creation.

The above is intended to be illustrative only and not limiting. Any equivalent modifications or alterations to the spirit and scope of the invention are intended to be included in the scope of the appended claims.

2, 3. . . Semiconductor component tester

20, 40, 60, 70, 90. . . Semiconductor component test interface

21, 31, 41, 61, 71. . . Test carrier

22, 42, 62, 72. . . Image processing computer

221. . . Analysis result

211, 411, 611, 711, 911. . . Mobile Industry Processor Interface Module

23, 43, 63, 73, 93. . . Main computer

24, 44, 64, 74, 94. . . Semiconductor component to be tested

241. . . Mobile industry processor interface signal

2111. . . video material

212. . . Buffer module

2121. . . Access and computing program

35. . . Test slot

412, 4112, 612, 6112, 712, 9112. . . Programmable gate array module (MIPI daughter board)

4113, 6113, 9113. . . Random access memory

413, 613, 713. . . contact

414. . . Differential buffer module

46, 66, 76. . . router

47, 67. . . Hi-Fix cable

711. . . External Action Industry Processor Interface Module

S51~S56, S81~S86, S101~S106. . . Step flow

Figure 1 is a schematic diagram of a semiconductor component test apparatus of the prior art. Figure 2 is a block diagram of a semiconductor component testing device of the present invention. Figure 3 is a schematic view showing a first embodiment of the semiconductor component testing apparatus of the present invention. Figure 4 is a schematic view showing a second embodiment of the semiconductor component testing device of the present invention. Fig. 5 is a flow chart showing a second embodiment of the semiconductor component testing apparatus of the present invention. Figure 6 is a schematic view showing a third embodiment of the semiconductor component testing device of the present invention. Figure 7 is a schematic view showing a fourth embodiment of the semiconductor component testing device of the present invention. Figure 8 is a flow chart showing a fourth embodiment of the semiconductor component testing apparatus of the present invention. Figure 9 is a schematic view showing a fifth embodiment of the semiconductor component testing device of the present invention. Figure 10 is a flow chart showing the method of testing a semiconductor device of the present invention.

2. . . Semiconductor component tester

20. . . Semiconductor component test interface

twenty one. . . Test carrier

twenty two. . . Image processing computer

221. . . Analysis result

211. . . Mobile Industry Processor Interface Module

twenty three. . . Main computer

twenty four. . . Semiconductor component to be tested

241. . . Mobile industry processor interface signal

211. . . Mobile Industry Processor Interface Module

2111. . . video material

212. . . Buffer module

2121. . . Access and computing program

Claims (17)

A semiconductor component testing device is coupled to a semiconductor component testing interface, wherein the semiconductor component testing interface is configured to capture at least one mobile industry processor interface signal of the semiconductor component to be tested, the semiconductor component testing device comprising: a test carrier board, Receiving the mobile industry processor interface signals; at least one mobile industry processor interface module is disposed on the test carrier and decoding the mobile industry processor interface signals to generate decoded image data; A buffer module is disposed on the test carrier and performs an access and operation process on the image data, the buffer module is connected to an image processing computer. The image processing computer analyzes and interprets the image data by using a built-in image processing library (IP Library) to generate an analysis result, and transmits the analysis result to a host computer to display the analysis result; The mobile industry processor interface module decodes the plurality of mobile industry processor interface signals of the semiconductor component to be tested, and is connected to the plurality of image processing computers through the buffer module. According to the semiconductor component testing device of claim 1, wherein each of the mobile industry processor interface modules further includes an image processing module, which is a programmable gate array module, and the image processing module The mobile industry processor interface signals are decoded, and the built-in image processing library is used to analyze and interpret the image data to generate an analysis result, and the analysis result is transmitted to a host computer to display the analysis result. The semiconductor component testing device according to Item 2 or Item 1 of the patent application further includes a plurality of test slots for alternately setting a plurality of the test carriers. The semiconductor component testing device of claim 3, wherein each of the mobile industry processor interface modules is alternatively disposed on each of the test carriers. The semiconductor component testing device according to claim 1 further includes a differential buffer module that converts the image data into a differential signal and transmits the image to the image processing computer. The semiconductor component testing device according to claim 5, wherein the mobile industry processor interface module further comprises a decoding module, wherein the decoding module is a programmable gate array module, and the actions are The industrial processor interface signal is decoded. The semiconductor component testing device according to claim 6, wherein the buffer module is a programmable gate array module. The semiconductor component testing device according to claim 7, wherein the access and computing program performs a logic gate operation on the vertical synchronization, horizontal synchronization and time pulse signals of the image data. A semiconductor component testing method is applied to a semiconductor component testing device for performing image signal testing on at least one semiconductor component to be tested. The semiconductor component testing method includes the following steps: using a semiconductor component testing interface to extract the to-be-tested components An action industry processor interface signal of a semiconductor component; receiving, by the test component carrier of the semiconductor component test device, the mobile industry processor interface signals; and at least one mobile industry processor interface module of the semiconductor component test device The mobile industry processor interface signal is decoded to generate decoded image data; The buffer module of the semiconductor component testing device performs an access and operation process on the image data; and the image processing computer analyzes and interprets the image data according to the built-in image processing library (IP Library). And generating an analysis result; and displaying the analysis result by a host computer; using the mobile industry processor interface module to decode the plurality of mobile industry processor interface signals of the semiconductor component to be tested, and using the buffer module Connect to multiple image processing computers. The semiconductor component testing method according to claim 9 further includes the following steps: decoding, and reusing, the mobile industry processor interface signals by an image processing module of each of the mobile industry processor interface modules The built-in image processing library analyzes and interprets the image data to generate an analysis result; and displays the analysis result by a host computer. The semiconductor component testing method according to claim 9 or 10, further comprising the step of: arranging a plurality of the test carriers by using a plurality of test slots of the semiconductor component testing device. The semiconductor component testing method of claim 11, further comprising the step of: arranging each of the mobile industry processor interface modules alternatively on each of the test carriers. According to the semiconductor component testing method described in claim 9 of the patent application, the following steps are further included: The image data is converted into a differential signal by a differential buffer module of the semiconductor component testing device, and then transmitted to the image processing computer. According to the semiconductor component testing method of claim 13, wherein the mobile industry processor interface module further comprises a decoding module, the decoding module is a programmable gate array module, and the actions are The industrial processor interface signal is decoded. The semiconductor component testing method according to claim 14, wherein the buffer module is a programmable gate array module. According to the semiconductor component testing method of claim 15, the method further includes the following steps: performing a logic gate operation on the vertical synchronization, horizontal synchronization, and time pulse signal execution of the image data by using the buffer module. A semiconductor component testing method is applied to a semiconductor component testing device for performing image signal testing on at least one semiconductor component to be tested. The semiconductor component testing method includes the following steps: using a semiconductor component testing interface to extract the to-be-tested components The mobile industry processor interface signal of the semiconductor component; the test carrier of the semiconductor component test device is externally connected to an external mobile industry processor interface module; and the mobile industry processor interface module is used to receive and decode the mobile industry processing Device interface signal to generate decoded image data; Performing an access and operation process on the image data by a buffer module of the semiconductor component testing device; analyzing and interpreting the image data through an image processing computer to generate an analysis result; and displaying the analysis via a host computer result.