TWI499910B - 具有相黏移除引擎之系統快取記憶體 - Google Patents

具有相黏移除引擎之系統快取記憶體 Download PDF

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Publication number
TWI499910B
TWI499910B TW102135192A TW102135192A TWI499910B TW I499910 B TWI499910 B TW I499910B TW 102135192 A TW102135192 A TW 102135192A TW 102135192 A TW102135192 A TW 102135192A TW I499910 B TWI499910 B TW I499910B
Authority
TW
Taiwan
Prior art keywords
group
memory
cache
cache memory
request
Prior art date
Application number
TW102135192A
Other languages
English (en)
Chinese (zh)
Other versions
TW201426306A (zh
Inventor
Sukalpa Biswas
Shinye Shiu
James Wang
Robert Hu
Original Assignee
Apple Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Apple Inc filed Critical Apple Inc
Publication of TW201426306A publication Critical patent/TW201426306A/zh
Application granted granted Critical
Publication of TWI499910B publication Critical patent/TWI499910B/zh

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/126Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215Monitoring of peripheral devices
    • G06F1/3225Monitoring of peripheral devices of memory devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
TW102135192A 2012-09-28 2013-09-27 具有相黏移除引擎之系統快取記憶體 TWI499910B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/629,865 US8886886B2 (en) 2012-09-28 2012-09-28 System cache with sticky removal engine

Publications (2)

Publication Number Publication Date
TW201426306A TW201426306A (zh) 2014-07-01
TWI499910B true TWI499910B (zh) 2015-09-11

Family

ID=49326866

Family Applications (1)

Application Number Title Priority Date Filing Date
TW102135192A TWI499910B (zh) 2012-09-28 2013-09-27 具有相黏移除引擎之系統快取記憶體

Country Status (6)

Country Link
US (1) US8886886B2 (ja)
EP (1) EP2901287B1 (ja)
JP (1) JP5976225B2 (ja)
KR (1) KR101689094B1 (ja)
TW (1) TWI499910B (ja)
WO (1) WO2014052589A2 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9311251B2 (en) 2012-08-27 2016-04-12 Apple Inc. System cache with sticky allocation
KR20170094815A (ko) 2016-02-11 2017-08-22 삼성전자주식회사 비휘발성 메모리, 그것을 포함하는 컴퓨팅 시스템, 및 그것의 읽기 방법
US10180839B2 (en) 2016-03-04 2019-01-15 Silicon Laboratories Inc. Apparatus for information processing with loop cache and associated methods
US10572399B2 (en) 2016-07-13 2020-02-25 Qualcomm Incorporated Memory request arbitration
US11109258B2 (en) * 2019-05-31 2021-08-31 Apple Inc. Crowd sourced privacy preserving access point mapping

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070005906A1 (en) * 2005-06-29 2007-01-04 Kabushiki Kaisha Toshiba Information processing apparatus and cache memory control method
US20100180083A1 (en) * 2008-12-08 2010-07-15 Lee Ruby B Cache Memory Having Enhanced Performance and Security Features
TW201042452A (en) * 2009-05-27 2010-12-01 Via Tech Inc Mcache memory system and accessing method thereof and computer program product
TW201106158A (en) * 2009-03-03 2011-02-16 Qualcomm Inc Configurable cache and method to configure same

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JPS60178551A (ja) * 1984-02-25 1985-09-12 Fujitsu Ltd アドレス変換バツフア制御方式
US5142676A (en) 1988-12-28 1992-08-25 Gte Laboratories Incorporated Separate content addressable memories for storing locked segment addresses and locking processor identifications for controlling access to shared memory
JPH05303528A (ja) * 1992-04-27 1993-11-16 Oki Electric Ind Co Ltd ライトバック式ディスクキャッシュ装置
JPH06178551A (ja) * 1992-12-10 1994-06-24 Toshiba Corp 電力変換装置の過電圧保護装置
JPH11259362A (ja) * 1998-03-13 1999-09-24 Nec Corp キャッシュメモリ制御方法及び装置
US7356651B2 (en) 2004-01-30 2008-04-08 Piurata Technologies, Llc Data-aware cache state machine
GB2422926B (en) * 2005-02-04 2008-10-01 Advanced Risc Mach Ltd Data processing apparatus and method for controlling access to memory
US7640399B1 (en) 2006-05-10 2009-12-29 Advanced Micro Devices, Inc. Mostly exclusive shared cache management policies
GB0722707D0 (en) 2007-11-19 2007-12-27 St Microelectronics Res & Dev Cache memory
US20090193195A1 (en) 2008-01-25 2009-07-30 Cochran Robert A Cache that stores data items associated with sticky indicators

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070005906A1 (en) * 2005-06-29 2007-01-04 Kabushiki Kaisha Toshiba Information processing apparatus and cache memory control method
US20100180083A1 (en) * 2008-12-08 2010-07-15 Lee Ruby B Cache Memory Having Enhanced Performance and Security Features
TW201106158A (en) * 2009-03-03 2011-02-16 Qualcomm Inc Configurable cache and method to configure same
TW201042452A (en) * 2009-05-27 2010-12-01 Via Tech Inc Mcache memory system and accessing method thereof and computer program product

Also Published As

Publication number Publication date
KR101689094B1 (ko) 2016-12-22
TW201426306A (zh) 2014-07-01
KR20150038367A (ko) 2015-04-08
WO2014052589A3 (en) 2014-08-28
US20140095800A1 (en) 2014-04-03
EP2901287B1 (en) 2016-07-20
US8886886B2 (en) 2014-11-11
JP2015527684A (ja) 2015-09-17
JP5976225B2 (ja) 2016-08-23
EP2901287A2 (en) 2015-08-05
WO2014052589A2 (en) 2014-04-03

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