TWI497763B - Horizontal type light emitting diode device and the manufacturing method thereof - Google Patents

Horizontal type light emitting diode device and the manufacturing method thereof Download PDF

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TWI497763B
TWI497763B TW100119179A TW100119179A TWI497763B TW I497763 B TWI497763 B TW I497763B TW 100119179 A TW100119179 A TW 100119179A TW 100119179 A TW100119179 A TW 100119179A TW I497763 B TWI497763 B TW I497763B
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semiconductor layer
electrode
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emitting diode
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TW201248922A (en
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Chi Hsing Chen
Yi Ming Chen
Chia Liang Hsu
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Epistar Corp
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水平式發光二極體元件及其製造方法Horizontal light-emitting diode element and method of manufacturing same

本發明係關於一種發光二極體(Light Emitting Diode;LED)元件結構及其製造方法,特別是一種具有高反射性之布拉格反射層的水平發光二極體之結構及其製造方法。The present invention relates to a light emitting diode (LED) element structure and a method of fabricating the same, and more particularly to a structure of a horizontal light emitting diode having a highly reflective Bragg reflection layer and a method of fabricating the same.

傳統的發光二極體其活性層產生的光往下入射至砷化鎵基板時,由於砷化鎵能隙較小,入射光會被砷化鎵基板吸收,而降低發光效率。為了避免基板的吸光,傳統上有一些文獻揭露出提昇發光二極體亮度的技術,例如加入布拉格反射結構(Distributed Bragg Reflector;DBR)於砷化鎵基板上,藉以反射入射向砷化鎵基板的光,並減少砷化鎵基板吸收。然而此種DBR反射結構是利用四元磊晶成長材料堆疊而成,疊層間的折射率差異不大,只能有效地反射較接近垂直入射於砷化鎵基板的光,反射率約為80%,並且反射光的波長範圍很小,效果並不大。When the light generated by the active layer of the conventional light-emitting diode is incident on the gallium arsenide substrate, since the gallium arsenide energy gap is small, the incident light is absorbed by the gallium arsenide substrate, and the luminous efficiency is lowered. In order to avoid the light absorption of the substrate, there have been some literatures that have revealed techniques for improving the brightness of the LED, such as adding a Bragg Reflector (DBR) to the gallium arsenide substrate, thereby reflecting the incident on the gallium arsenide substrate. Light and reduce the absorption of gallium arsenide substrates. However, such a DBR reflective structure is formed by stacking quaternary epitaxial growth materials, and the refractive index difference between the laminates is not large, and can only effectively reflect light that is closer to the vertical incidence on the gallium arsenide substrate, and the reflectance is about 80%. And the wavelength range of the reflected light is small, and the effect is not large.

此外,電極形成在不同側,在封裝過程易造成電極與基板黏著不佳,導致電性不良,阻值增高。In addition, the electrodes are formed on different sides, which tends to cause poor adhesion between the electrodes and the substrate during the packaging process, resulting in poor electrical properties and increased resistance.

本發明之一實施例係提供一發光二極體元件結構,包括:一導電成長基板上表面具有一第一區域及一第二區域;一半導體磊晶疊層,位於導電成長基板的第一區域上,其中半導體磊晶疊層,包括:一反射層,位於第一區域上;一具有第一導電特性之第一半導體層,位於反射層上;一活性層,位於第一半導體層之上;以及一具有第二導電特性之第二半導體層,位於活性層之上;一第一電極位於第二半導體層上;以及一第二電極位於第二區域上,透過導電成長基板與半導體磊晶疊層電性連結,其中第一電極和第二電極位於導電成長基板的同一側。An embodiment of the present invention provides a light emitting diode device structure, comprising: a conductive growth substrate having a first region and a second region on an upper surface; and a semiconductor epitaxial laminate disposed on the first region of the conductive growth substrate The semiconductor epitaxial stack comprises: a reflective layer on the first region; a first semiconductor layer having a first conductive property on the reflective layer; and an active layer on the first semiconductor layer; And a second semiconductor layer having a second conductive property on the active layer; a first electrode on the second semiconductor layer; and a second electrode on the second region, the epitaxial stack of the conductive growth substrate and the semiconductor The layer is electrically connected, wherein the first electrode and the second electrode are located on the same side of the conductive growth substrate.

本發明提供一種電極位在同側之水平式發光二極體結構及其製造方法。參照第1A圖與第1B圖,係依照本發明第一實施例所繪示的一種第一電極和第二電極在同側之水平式發光二極體結構上視圖以及沿著V-V’虛線的側視剖面圖。發光二極體結構100包括一導電成長基板102,具有一上表面103,定義有一第一區域1A及一第二區域1B、一半導體磊晶疊層101位於第一區域1A上,其中所述之半導體磊晶疊層101包括依序堆疊於第一區域1A上的一反射層104、一n型半導體層(例:n-cladding層)106、一活性層(active layer)108、以及一p型半導體層(例:p-cladding層)110、一透明導電層112位於所述之p型半導體層110上,一第一電極114位於透明導電層112上、一疊層保留部116位於導電成長基板102之第二區域1B上,一第二電極118形成於導電成長基板102之第二區域1B上並包覆疊層保留部116。The invention provides a horizontal light-emitting diode structure with electrodes on the same side and a manufacturing method thereof. Referring to FIG. 1A and FIG. 1B , a top view of a horizontal LED structure on the same side of the first electrode and the second electrode and a dotted line along the V-V′ according to the first embodiment of the present invention are illustrated. Side view of the section. The LED structure 100 includes a conductive growth substrate 102 having an upper surface 103 defining a first region 1A and a second region 1B. A semiconductor epitaxial layer 101 is disposed on the first region 1A. The semiconductor epitaxial layer stack 101 includes a reflective layer 104 sequentially stacked on the first region 1A, an n-type semiconductor layer (eg, an n-cladding layer) 106, an active layer 108, and a p-type. A semiconductor layer (eg, a p-cladding layer) 110, a transparent conductive layer 112 is disposed on the p-type semiconductor layer 110, a first electrode 114 is disposed on the transparent conductive layer 112, and a stacked retention portion 116 is located on the conductive growth substrate. On the second region 1B of the 102, a second electrode 118 is formed on the second region 1B of the conductive growth substrate 102 and covers the laminate retention portion 116.

第1C圖係為依本發明第一實施例之半導體磊晶疊層結構示意圖。本發明所揭露的水平式發光二極體結構製程方式,先提供一導電成長基板102,在本發明第一實施例中,導電成長基板102具有導電性,用以成長或承載一半導體磊晶疊層101於其上。構成所述導電成長基板101的材料包含但不限於鍺(Ge)、砷化鎵(GaAs)、磷化銦(InP)、磷化鎵(GaP)、碳化矽(SiC)、矽(Si)、氮化鎵(GaN)之一種或其組合。所述之導電成長基板具有一上表面103並定義有第一區域1A及第二區域1B。Fig. 1C is a schematic view showing the structure of a semiconductor epitaxial laminate according to the first embodiment of the present invention. In the horizontal LED structure process disclosed in the present invention, a conductive growth substrate 102 is first provided. In the first embodiment of the present invention, the conductive growth substrate 102 has conductivity for growing or carrying a semiconductor epitaxial stack. Layer 101 is thereon. Materials constituting the conductive growth substrate 101 include, but are not limited to, germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), gallium phosphide (GaP), tantalum carbide (SiC), germanium (Si), One or a combination of gallium nitride (GaN). The conductive growth substrate has an upper surface 103 and defines a first region 1A and a second region 1B.

接著於導電成長基板上表面103上形成一反射層104,此反射層104為一種布拉格反射層,係由複數個容易氧化的半導體層與不容易氧化半導體層交互堆疊所組成。例如砷化鋁(AlAs)/砷化鋁鎵(AlGaAs)的交互堆疊、砷化鋁(AlAs)/砷化鎵(GaAs)的交互堆疊、砷化鋁(AlAs)/磷化鋁鎵銦(AlGaInP)的交互堆疊、或砷化鋁(AlAs)/磷化銦鎵(InGaP)的交互堆疊所組成,其中砷化鋁為容易氧化的半導體層,其它和砷化鋁匹配的則為不容易氧化的半導體層。Then, a reflective layer 104 is formed on the upper surface 103 of the conductive growth substrate. The reflective layer 104 is a Bragg reflection layer composed of a plurality of easily oxidized semiconductor layers and a stack of electrodes which are not easily oxidized. For example, alternating stacking of aluminum arsenide (AlAs) / aluminum gallium arsenide (AlGaAs), alternating stacking of aluminum arsenide (AlAs) / gallium arsenide (GaAs), aluminum arsenide (AlAs) / aluminum gallium phosphide (AlGaInP) Interactive stacking, or alternating stacking of aluminum arsenide (AlAs)/indium gallium phosphide (InGaP), in which aluminum arsenide is a semiconductor layer that is easily oxidized, and others that are matched with aluminum arsenide are not easily oxidized. Semiconductor layer.

接著於反射層104之上,形成一n型半導體層106,n型半導體層106的材料包括但不限於磷化鋁鎵銦、砷化鎵、或磷化銦鎵。磷化鋁鎵銦其組成為(Alx Ga1-x )0.5 In0.5 P,其中之0.5僅為例示,例如(Alx Ga1-x )y Iny P,其中x及y值僅需0<x<1,y<1即可。Next, over the reflective layer 104, an n-type semiconductor layer 106 is formed. The material of the n-type semiconductor layer 106 includes, but is not limited to, aluminum gallium indium phosphide, gallium arsenide, or indium gallium phosphide. The composition of aluminum gallium indium phosphide is (Al x Ga 1-x ) 0.5 In 0.5 P, of which 0.5 is only an example, such as (Al x Ga 1-x ) y In y P, where x and y values only need 0 <x<1, y<1 can be.

形成一活性層108於n型半導體層106之上,活性層的材料包括但不限於磷化鋁鎵銦,其組成為(Alx Ga1-x )0.5 In0.5 P,其中之0.5僅為例示。以發光二極體為例,可以藉由改變活性層108裡的其中一層或多層的物理及化學組成,調整發出的光波長。常用的材料為磷化鋁鎵銦系列、磷化鋁銦系列、氮化鋁鎵銦(AlGaInN)系列、氧化鋅(ZnO)系列。可為單異質結構(single heterostructure,SH),雙異質結構(double heterostructure,DH),雙側雙異質結(double-side double heterostructure,DDH),多層量子井結構(multi-quantum well,MWQ)。以多層量子井結構為例,其具有多個阻障層及量子井層交替堆疊,其中阻障層係為(Aly Ga1-y )0.5 In0.5 P,0.5≦y≦0.8;量子井層係為In0.5 Ga0.5 P。An active layer 108 is formed on the n-type semiconductor layer 106. The material of the active layer includes, but is not limited to, aluminum gallium indium phosphide, and the composition thereof is (Al x Ga 1-x ) 0.5 In 0.5 P, wherein 0.5 is merely an illustration. . Taking the light-emitting diode as an example, the wavelength of the emitted light can be adjusted by changing the physical and chemical composition of one or more layers in the active layer 108. Commonly used materials are aluminum gallium phosphide indium series, aluminum indium phosphide series, aluminum gallium indium nitride (AlGaInN) series, and zinc oxide (ZnO) series. It can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MWQ). Taking a multi-layer quantum well structure as an example, it has multiple barrier layers and quantum well layers stacked alternately, wherein the barrier layer is (Al y Ga 1-y ) 0.5 In 0.5 P, 0.5≦y≦0.8; quantum well layer It is In 0.5 Ga 0.5 P.

一p型半導體層110形成於所述活性層108之上,例如為p型磷化鎵(GaP),其材料包括但不限於磷化鋁鎵銦(lnGaAlP),其組成為(Alx Ga1-x )0.5 In0.5 P,其中之0.5僅為例示,(Alx Ga1-x )y Iny P,其中x及y值僅需0<x<1,y<1即可。其中n型半導體層106厚度約為3μm、p型半導體層110厚度約為10μm,活性層1108的厚度約為0.3~1.5μm。A p-type semiconductor layer 110 is formed over the active layer 108, such as p-type gallium phosphide (GaP), and the material thereof includes, but is not limited to, aluminum gallium indium phosphide (lnGaAlP), and its composition is (Al x Ga 1 -x ) 0.5 In 0.5 P, where 0.5 is only an illustration, (Al x Ga 1-x ) y In y P, where x and y values need only 0 < x < 1, y < 1. The n-type semiconductor layer 106 has a thickness of about 3 μm, the p-type semiconductor layer 110 has a thickness of about 10 μm, and the active layer 1108 has a thickness of about 0.3 to 1.5 μm.

利用電子束蒸鍍或濺鍍形成一透明導電層112覆蓋p型半導體層110,其中透明導電層112的材質可以為金屬氧化物,例如銦錫氧化物(ITO),鎘錫氧化物(CTO)、銻氧化錫、氧化銦鋅(IZO)、氧化鋅鋁(AZO)、氧化鎵鋅(GZO)、氧化鋅(ZnO)及鋅錫氧化物中的任一種;其厚度約為0.005μm~0.6μm。A transparent conductive layer 112 is formed by electron beam evaporation or sputtering to cover the p-type semiconductor layer 110. The transparent conductive layer 112 may be made of a metal oxide such as indium tin oxide (ITO) or cadmium tin oxide (CTO). Any of tin antimony oxide, indium zinc oxide (IZO), zinc aluminum oxide (AZO), gallium zinc oxide (GZO), zinc oxide (ZnO), and zinc tin oxide; the thickness is about 0.005 μm to 0.6 μm. .

參照第1D圖,於第二區域1B上的半導體磊晶疊層進行圖案化蝕刻,形成一露出部120及一疊層保留部116,露出部120為蝕刻半導體磊晶疊層後曝露出導電成長基板102所形成,其中疊層保留部116為蝕刻半導體磊晶疊層時所保留之部分半導體磊晶疊層所形成。疊層保留部116其組成可以包含和半導體磊晶疊層101為完全相同的組成材料,例如同時具有反射層104、n型半導體層106、活性層108、p型半導體層110或透明導電層112;也可以僅具有反射層104;或具有半導體磊晶疊層101的其中數層,例如具有反射層104及n型半導體層106之兩層磊晶結構;反射層104、n型半導體層106及活性層108之三層磊晶結構;反射層104、n型半導體層106、活性層108及p型半導體層110之四層磊晶結構。Referring to FIG. 1D, the semiconductor epitaxial stack on the second region 1B is patterned and etched to form an exposed portion 120 and a stacked remaining portion 116. The exposed portion 120 is exposed to conductive epitaxial growth after etching the semiconductor epitaxial layer. The substrate 102 is formed, wherein the laminate retention portion 116 is formed by a portion of the semiconductor epitaxial stack retained when etching the semiconductor epitaxial stack. The stack retention portion 116 may comprise a composition material that is identical to the semiconductor epitaxial layer stack 101, for example, having a reflective layer 104, an n-type semiconductor layer 106, an active layer 108, a p-type semiconductor layer 110, or a transparent conductive layer 112. Or a reflective layer 104; or a plurality of layers having a semiconductor epitaxial layer 101, such as two layers of epitaxial structures having a reflective layer 104 and an n-type semiconductor layer 106; a reflective layer 104, an n-type semiconductor layer 106, and The three-layer epitaxial structure of the active layer 108; the four-layer epitaxial structure of the reflective layer 104, the n-type semiconductor layer 106, the active layer 108, and the p-type semiconductor layer 110.

請參閱第2A圖,第一電極114形成於透明導電層112上,第二電極118形成於第二區域1B上,完全包覆疊層保留部116並覆蓋部分的露出部120。第二電極118和露出部120直接接觸,藉由和導電成長基板102的直接接觸,透過導電基板102和半導體磊晶疊層101電性連結;完成此發光二極體結構100。第二電極118也可以部分覆蓋疊層保留部116並部分覆蓋露出部120,如第2B圖及第2C圖所示。疊層保留部116之功能為增強第二電極118和導電成長基板102的黏著力,避免第二電極118因黏著性不佳而剝離。Referring to FIG. 2A, the first electrode 114 is formed on the transparent conductive layer 112, and the second electrode 118 is formed on the second region 1B to completely cover the laminate retaining portion 116 and cover a portion of the exposed portion 120. The second electrode 118 and the exposed portion 120 are in direct contact with each other, and are electrically connected to the conductive epitaxial layer 101 through the direct contact with the conductive growth substrate 102. The LED structure 100 is completed. The second electrode 118 may also partially cover the laminate retaining portion 116 and partially cover the exposed portion 120 as shown in FIGS. 2B and 2C. The function of the layer-retaining portion 116 is to enhance the adhesion of the second electrode 118 and the conductive growth substrate 102, and to prevent the second electrode 118 from being peeled off due to poor adhesion.

第3圖係為本發明第二實施例之水平式發光二極體結構1001之側視示意圖。半導體磊晶疊層1011的結構及其製程步驟和第一實施例的半導體磊晶疊層101相同,其不同處在於第二區域11B上的半導體磊晶疊層1011於圖案化蝕刻後,形成一露出部1201及一疊層保留部1161,其中露出部1201為蝕刻半導體磊晶疊層1011後,曝露出反射層1041所形成。疊層保留部1161為蝕刻半導體磊晶疊層1011時所保留之部分半導體磊晶疊層1011所形成。疊層保留部1161其組成可以僅具有n型半導體層1061;或具有其中數層之半導體磊晶疊層1011,例如具有n型半導體層1061及活性層1081之二層磊晶結構;n型半導體層1061、活性層1081及p型半導體層1101之三層磊晶結構;n型半導體層1061、活性層1081、p型半導體層1101及透明導電層1121之四層結構。3 is a side elevational view of a horizontal light emitting diode structure 1001 according to a second embodiment of the present invention. The structure of the semiconductor epitaxial layer stack 1011 and the process steps thereof are the same as those of the semiconductor epitaxial layer stack 101 of the first embodiment, except that the semiconductor epitaxial layer stack 1011 on the second region 11B is patterned and etched to form a The exposed portion 1201 and the stacked portion 1161 are formed by exposing the reflective layer 1041 after the exposed portion 1201 is etched. The laminate retention portion 1161 is formed by a portion of the semiconductor epitaxial laminate 1011 retained when the semiconductor epitaxial laminate 1011 is etched. The laminate retention portion 1161 may have a composition having only the n-type semiconductor layer 1061; or a semiconductor epitaxial laminate 1011 having a plurality of layers thereof, for example, a two-layer epitaxial structure having an n-type semiconductor layer 1061 and an active layer 1081; an n-type semiconductor The layer 1061, the active layer 1081, and the p-type semiconductor layer 1101 have a three-layer epitaxial structure; the n-type semiconductor layer 1061, the active layer 1081, the p-type semiconductor layer 1101, and the transparent conductive layer 1121 have a four-layer structure.

最後,第一電極1141形成於透明導電層1121上,第二電極1181形成於第二區域11B上,完全包覆疊層保留部1161並覆蓋部分的露出部1201。第二電極1181和露出部1201直接接觸,藉由反射層1041及導電成長基板1021和半導體磊晶疊層1011電性連結;完成此發光二極體結構1001。第二電極1181也可以部分覆蓋疊層保留部1161並部分覆蓋露出部1201。所述疊層保留部1161之功能為增強第二第二電極1181和導電成長基板1021的黏著力,避免第二電極1181因黏著性不佳而剝離。Finally, the first electrode 1141 is formed on the transparent conductive layer 1121, and the second electrode 1181 is formed on the second region 11B to completely cover the laminated remaining portion 1161 and cover the exposed portion 1201 of the portion. The second electrode 1181 and the exposed portion 1201 are in direct contact with each other, and the reflective layer 1041 and the conductive growth substrate 1021 are electrically connected to the semiconductor epitaxial laminate 1011. The LED structure 1001 is completed. The second electrode 1181 may also partially cover the laminate retaining portion 1161 and partially cover the exposed portion 1201. The function of the laminate retention portion 1161 is to enhance the adhesion between the second second electrode 1181 and the conductive growth substrate 1021, and to prevent the second electrode 1181 from being peeled off due to poor adhesion.

第4圖係為本發明第三實施例之水平式發光二極體結構1002之側視示意圖。半導體磊晶疊層1012的結構及其製程步驟和第一實施例和第二實施例的半導體磊晶疊層101、1011相同,其不同處在於第二區域111B上的半導體磊晶疊層1012於圖案化蝕刻後,形成一露出部1202及一疊層保留部1162,其中露出部1202為蝕刻半導體磊晶疊層1012後曝露出n型半導體層1062所形成,疊層保留部1162為蝕刻半導體磊晶疊層1012時所保留之部分半導體磊晶疊層1012所形成。疊層保留部1162其組成可以僅為n型半導體層1062;或具有其中數層之半導體磊晶疊層1012,例如n型半導體層1062及活性層1082之二層磊晶結構;n型半導體層1062、活性層1082及p型半導體層1102之三層磊晶結構;n型半導體層1062、活性層1082、p型半導體層1102及透明導電層1122之四層結構。Figure 4 is a side elevational view of a horizontal light emitting diode structure 1002 in accordance with a third embodiment of the present invention. The structure of the semiconductor epitaxial layer stack 1012 and its processing steps are the same as those of the first and second embodiments of the semiconductor epitaxial layer stacks 101, 1011, except that the semiconductor epitaxial layer stack 1012 on the second region 111B is After the patterned etching, an exposed portion 1202 and a stacked remaining portion 1162 are formed. The exposed portion 1202 is formed by etching the semiconductor epitaxial layer 1012 and exposing the n-type semiconductor layer 1062. The stacked remaining portion 1162 is an etched semiconductor strip. A portion of the semiconductor epitaxial stack 1012 retained by the crystalline stack 1012 is formed. The layer retention portion 1162 may be composed of only the n-type semiconductor layer 1062; or a semiconductor epitaxial layer 1012 having a plurality of layers, for example, a two-layer epitaxial structure of the n-type semiconductor layer 1062 and the active layer 1082; an n-type semiconductor layer The optical layer 1082, the three-layer epitaxial structure of the p-type semiconductor layer 1102, and the four-layer structure of the n-type semiconductor layer 1062, the active layer 1082, the p-type semiconductor layer 1102, and the transparent conductive layer 1122.

最後,第一電極1142形成於透明導電層1122上,第二電極1182形成於第二區域111B上,完全包覆疊層保留部1162並覆蓋部分的露出部1202。第二電極1182和覆蓋之部分露出部1202直接接觸,藉由n型半導體層1062、反射層1042、及導電成長基板1022和半導體磊晶疊層1012電性連結;完成此發光二極體結構1002。第二電極1182也可以部分覆蓋疊層保留部1162並部分覆蓋露出部1202。疊層保留部1162之功能為增強第二電極1182和導電成長基板1022的黏著力,避免第二電極1182因黏著性不佳而剝離。Finally, the first electrode 1142 is formed on the transparent conductive layer 1122, and the second electrode 1182 is formed on the second region 111B, completely covering the laminate retaining portion 1162 and covering a portion of the exposed portion 1202. The second electrode 1182 is in direct contact with the partially exposed portion 1202, and is electrically connected by the n-type semiconductor layer 1062, the reflective layer 1042, and the conductive growth substrate 1022 and the semiconductor epitaxial laminate 1012. The light emitting diode structure 1002 is completed. . The second electrode 1182 may also partially cover the laminate retention portion 1162 and partially cover the exposed portion 1202. The function of the lamination retention portion 1162 is to enhance the adhesion of the second electrode 1182 and the conductive growth substrate 1022, and to prevent the second electrode 1182 from being peeled off due to poor adhesion.

如第5A圖所示,上述第一實施例中反射層104可為布拉格反射層,由數對第三半導體層104c與第四半導體層104b交互堆疊所組成。圖中以三對第三半導體層104c與第四半導體層104b交互堆疊來做說明,此對數無任何限制。第三半導體層104c可為砷化鋁(AlAs)。第四半導體層104b可為砷化鋁鎵、砷化鎵、磷化鋁鎵銦、或磷化銦鎵所組成。如第5B圖所示,由於第三半導體層104c的特性較第四半導體層104b易於氧化,故在製程階段將水氣通入此發光二極體,在高溫約300℃~800℃下,第三半導體層104c會由外向內開始氧化,形成氧化鋁(Alm On )層104a,其中m及n為整數。中間部分仍為未氧化的第三半導體層104c。第三半導體層104c的氧化速率隨著溫度越高越快,也隨著鋁含量越高越快。經過氧化的製程,於本實施例中,氧化鋁的折射係數為1.6,而第四半導體層104b,如低鋁含量之砷化鋁鎵層或磷化鋁鎵銦層,其折射係數大於3,二者折射係數差異很大,因而所形成之反射層104可使波長範圍580-630奈米之間的反射率幾乎達到接近100%,可以有效的反射活性層108所發出的光。雖然在本實施例中,反射層104是位於導電成長基板102與n型半導體層106之間,但並非用以限制本發明。本實施例的布拉格反射層也可以放置於n型半導體層106內,以達到本發明所欲達成之效果。As shown in FIG. 5A, the reflective layer 104 in the first embodiment described above may be a Bragg reflection layer composed of a plurality of pairs of third semiconductor layers 104c and fourth semiconductor layers 104b alternately stacked. In the figure, three pairs of the third semiconductor layer 104c and the fourth semiconductor layer 104b are alternately stacked for explanation, and the logarithm is not limited. The third semiconductor layer 104c may be aluminum arsenide (AlAs). The fourth semiconductor layer 104b may be composed of aluminum gallium arsenide, gallium arsenide, aluminum gallium phosphide, or indium gallium phosphide. As shown in FIG. 5B, since the characteristics of the third semiconductor layer 104c are more oxidized than the fourth semiconductor layer 104b, water vapor is introduced into the light-emitting diode during the process, and the temperature is about 300 ° C to 800 ° C. The three semiconductor layers 104c start to oxidize from the outside to the inside to form an aluminum oxide (Al m O n ) layer 104a, where m and n are integers. The intermediate portion is still the unoxidized third semiconductor layer 104c. The oxidation rate of the third semiconductor layer 104c is faster as the temperature is higher, and is also faster as the aluminum content is higher. In the oxidation process, in the present embodiment, the refractive index of alumina is 1.6, and the fourth semiconductor layer 104b, such as a low aluminum content aluminum arsenide layer or an aluminum gallium phosphide layer, has a refractive index greater than 3, The refractive index of the two is very different, so that the reflective layer 104 formed can make the reflectance between the wavelength range of 580-630 nm almost 100%, and can effectively reflect the light emitted by the active layer 108. Although in the present embodiment, the reflective layer 104 is located between the conductive growth substrate 102 and the n-type semiconductor layer 106, it is not intended to limit the present invention. The Bragg reflection layer of this embodiment can also be placed in the n-type semiconductor layer 106 to achieve the desired effect of the present invention.

請參照第6A與6B圖,其所繪示為本發明第四實施例發光二極體結構200之的上視圖以及沿著W-W’虛線的剖面圖。本實施例之水平式發光二極體結構200包括一導電成長基板202具有一上表面203定義有第一區域2A及一第二區域2B、一半導體磊晶疊層201位於導電成長基板202之第一區域2A上,包括依序堆疊於導電成長基板202之反射層204、n型半導體層206、活性層(active layer)208、及p型半導體層210。一透明導電層212位於p型半導體層210上。一第一電極214形成於透明導電層212上,一疊層保留部216形成於導電成長基板202之第二區域2B上,第二電極218形成於導電成長基板202上並覆蓋疊層保留部216。反射層204可為布拉格反射層,包括第三半導體層204c與第四半導體層204b交互堆疊。本實施例係以三對第三半導體層204c與第四半導體層204b所形成之反射層204來做說明。為了縮短氧化的時間,本實施例由發光二極體結構200的上表面蝕刻至導電成長基板202,形成複數個孔洞240,使得反射層204可藉由孔洞240增加第三半導體層204c氧化的面積。因此經由蝕刻孔洞的影響,第三半導體層204c除了會在四周圍由外而內開始氧化,在複數孔洞204會由內而外開始氧化,形成氧化鋁(Alx Oy )層204a。最後,第一電極224形成在透明導電層212上,以及第二電極218形成在導電成長基板202並包覆疊層保留部216上完成此發光二極體結構200。本實施例中發光二極體結構內具有複數個孔洞240,雖然犧牲部分的活性層面積,但增加高反射率反射層的面積,以達成更高的反射率。而由於以含有氧化鋁層所形成之布拉格反射層可以提升可見光波長580-630奈米的反射率,故可增加發光二極體的發光效率。此外,本實施例中的孔洞240也可由發光二極體結構200的上表面蝕刻,但未蝕刻至導電成長基板202,只露出部分的反射層204側壁(圖未示)。第一實施例至第三實施例的半導體磊晶疊層101、1011、1012也可形成複數個孔洞,使得反射層104、1041、1042除了四周圍進行氧化外,可藉由孔洞同時進行氧化。Please refer to FIGS. 6A and 6B, which are a top view of the LED structure 200 and a cross-sectional view taken along the line W-W' of the fourth embodiment of the present invention. The horizontal light emitting diode structure 200 of the present embodiment includes a conductive growth substrate 202 having an upper surface 203 defining a first region 2A and a second region 2B, and a semiconductor epitaxial layer 201 being disposed on the conductive growth substrate 202. A region 2A includes a reflective layer 204, an n-type semiconductor layer 206, an active layer 208, and a p-type semiconductor layer 210 which are sequentially stacked on the conductive growth substrate 202. A transparent conductive layer 212 is on the p-type semiconductor layer 210. A first electrode 214 is formed on the transparent conductive layer 212, a laminated retention portion 216 is formed on the second region 2B of the conductive growth substrate 202, and a second electrode 218 is formed on the conductive growth substrate 202 and covers the laminate retention portion 216. . The reflective layer 204 may be a Bragg reflective layer including a third semiconductor layer 204c and a fourth semiconductor layer 204b alternately stacked. This embodiment is described by the reflection layer 204 formed by the three pairs of the third semiconductor layer 204c and the fourth semiconductor layer 204b. In order to shorten the oxidation time, the upper surface of the light emitting diode structure 200 is etched to the conductive growth substrate 202 to form a plurality of holes 240, so that the reflective layer 204 can increase the area of oxidation of the third semiconductor layer 204c by the holes 240. . Therefore, by the influence of the etching holes, the third semiconductor layer 204c starts to oxidize from the outside in four directions, and the plurality of holes 204 start to oxidize from the inside to the outside to form an aluminum oxide (Al x O y ) layer 204a. Finally, the first electrode 224 is formed on the transparent conductive layer 212, and the second electrode 218 is formed on the conductive growth substrate 202 and covers the laminate retention portion 216 to complete the LED structure 200. In this embodiment, the light-emitting diode structure has a plurality of holes 240 therein. Although the active layer area of the portion is sacrificed, the area of the high-reflectivity reflective layer is increased to achieve a higher reflectance. Since the Bragg reflection layer formed of the aluminum oxide layer can increase the reflectance of the visible light wavelength of 580-630 nm, the luminous efficiency of the light-emitting diode can be increased. In addition, the holes 240 in this embodiment may also be etched from the upper surface of the LED structure 200, but are not etched to the conductive growth substrate 202, and only a portion of the sidewalls of the reflective layer 204 (not shown) are exposed. The semiconductor epitaxial stacks 101, 1011, and 1012 of the first to third embodiments may also form a plurality of holes such that the reflective layers 104, 1041, and 1042 may be simultaneously oxidized by the holes in addition to the oxidation around the periphery.

請參照第7A圖,本發明的第五實施例所揭示之水平式發光二極體結構300包括一導電成長基板302具有一上表面303定義有有一第一區域3A及一第二區域3B,一半導體磊晶疊層301位於導電成長基板302之第一區域3A上,其中半導體磊晶疊層301包括依序堆疊於導電成長基板302之上的反射層304、n型半導體層306、活性層(active layer)308、p型半導體層310。一透明導電層312位於p型半導體層310上。一第一電極314形成於透明導電層312上,一凹部326形成於導電成長基板302之第二區域3B上,第二電極318形成於導電成長基板302上並覆蓋凹部326。半導體磊晶疊層301之組成及其製造步驟如實施例一及實施例四所述。當完成半導體磊晶疊層301的製作後,蝕刻在第二區域3B上的半導體磊晶疊層301至曝露出導電成長基板302。接著圖案化蝕刻曝露出的導電成長基板第二區域3B,形成一凹部326,接著形成第二電極318於第二區域B上,並覆蓋凹部326及覆蓋部分的露出部320。第二電極318直接和導電成長基板302接觸,透過導電導電成長基板302和半導體磊晶疊層301電性連結。第二電極318也可以部分覆蓋凹部326並部分覆蓋露出部320,如第7B圖所示。凹部326之功能為增強第二電極318和導電成長基板302的黏著力,避免第二電極318因黏著性不佳而剝離。Referring to FIG. 7A, a horizontal light emitting diode structure 300 according to a fifth embodiment of the present invention includes a conductive growth substrate 302 having an upper surface 303 defined with a first region 3A and a second region 3B. The semiconductor epitaxial layer stack 301 is disposed on the first region 3A of the conductive growth substrate 302. The semiconductor epitaxial layer stack 301 includes a reflective layer 304, an n-type semiconductor layer 306, and an active layer stacked on the conductive growth substrate 302. Active layer) 308, p-type semiconductor layer 310. A transparent conductive layer 312 is located on the p-type semiconductor layer 310. A first electrode 314 is formed on the transparent conductive layer 312, a recess 326 is formed on the second region 3B of the conductive growth substrate 302, and a second electrode 318 is formed on the conductive growth substrate 302 and covers the recess 326. The composition of the semiconductor epitaxial layer stack 301 and the manufacturing steps thereof are as described in the first embodiment and the fourth embodiment. After the fabrication of the semiconductor epitaxial layer stack 301 is completed, the semiconductor epitaxial layer stack 301 on the second region 3B is etched to expose the conductive growth substrate 302. The conductive grown substrate second region 3B is then patterned and etched to form a recess 326, and then a second electrode 318 is formed on the second region B and covers the recess 326 and the exposed portion 320 of the cover portion. The second electrode 318 is in direct contact with the conductive growth substrate 302, and is electrically connected to the conductive epitaxial growth substrate 302 and the semiconductor epitaxial laminate 301. The second electrode 318 may also partially cover the recess 326 and partially cover the exposed portion 320 as shown in FIG. 7B. The function of the recess 326 is to enhance the adhesion of the second electrode 318 and the conductive growth substrate 302, and to prevent the second electrode 318 from being peeled off due to poor adhesion.

請參照第8圖,本發明的第六實施例所揭示之水平式發光二極體結構400包括:一導電成長基板402具有一上表面403定義有一第一區域4A及一第二區域4B、一半導體磊晶疊層401形成於第一區域4A上,其中半導體磊晶疊層401包括依序堆疊於導電成長基板402上的反射層404、n型半導體層406、活性層(active layer)408、p型半導體層410。一透明導電層412位於p型半導體層410上,一第一電極414形成於透明導電層412上,一凹部426形成於導電成長基板402之第二區域4B上,第二電極418形成於導電成長基板402上並覆蓋凹部426。半導體磊晶疊層401之組成及其製造步驟如第一實施例至第五實施例所述。當完成半導體磊晶疊層401的製作後,蝕刻在第二區域4B上的半導體磊晶疊層401至曝露出導電成長基板402。接著圖案化蝕刻曝露出的導電成長基板第二區域4B,形成一凹部426,接著形成第二電極418於第二區域B上,並覆蓋凹部426及覆蓋部分的露出部420,n型電極418直接和導電成長基板402接觸,透過導電成長基板402和半導體磊晶疊層401電性連結。第二電極418也可以部分覆蓋凹部426並部分覆蓋露出部420。凹部426之功能為增強第二電極418和導電成長基板402的黏著力,避免第二電極418因黏著性不佳而剝離。Referring to FIG. 8, a horizontal LED structure 400 according to a sixth embodiment of the present invention includes a conductive growth substrate 402 having an upper surface 403 defining a first region 4A and a second region 4B. The semiconductor epitaxial layer stack 401 is formed on the first region 4A, wherein the semiconductor epitaxial layer stack 401 includes a reflective layer 404, an n-type semiconductor layer 406, an active layer 408, which are sequentially stacked on the conductive growth substrate 402, P-type semiconductor layer 410. A transparent conductive layer 412 is disposed on the p-type semiconductor layer 410, a first electrode 414 is formed on the transparent conductive layer 412, a recess 426 is formed on the second region 4B of the conductive growth substrate 402, and the second electrode 418 is formed on the conductive growth. The substrate 402 is covered and covers the recess 426. The composition of the semiconductor epitaxial layer stack 401 and the manufacturing steps thereof are as described in the first to fifth embodiments. After the fabrication of the semiconductor epitaxial layer stack 401 is completed, the semiconductor epitaxial layer stack 401 on the second region 4B is etched to expose the conductive growth substrate 402. Then, the exposed second region 4B of the conductive growth substrate is patterned and etched to form a recess 426, and then the second electrode 418 is formed on the second region B, and covers the recess 426 and the exposed portion 420 of the cover portion, and the n-type electrode 418 is directly The conductive growth substrate 402 is in contact with the conductive growth substrate 402 and electrically connected to the semiconductor epitaxial laminate 401. The second electrode 418 may also partially cover the recess 426 and partially cover the exposed portion 420. The function of the recess 426 is to enhance the adhesion of the second electrode 418 and the conductive growth substrate 402, and to prevent the second electrode 418 from being peeled off due to poor adhesion.

本實施例之反射層404具有第三半導體層404c與第四半導體層404c交互堆疊。為了要縮短氧化的時間,由發光二極體結構400的上表面蝕刻至導電成長基板402,形成複數個孔洞440,使得反射層404可藉由孔洞440以內而外進行氧化形成氧化鋁(Alx Oy )層404a。第一電極424形成在透明導電層412上,以及第二電極418形成在導電成長基板402並包覆凹部426上,完成此發光二極體結構400。本實施例中發光二極體結構內具有複數個孔洞440,雖然犧牲部分的活性層面積,但增加高反射率反射層的面積。實施例中的孔洞440也可由發光二極體結構400的上表面蝕刻,但不蝕刻至導電成長基板402,只需露出反射層404,藉由氧化的作用,形成氧化鋁(Alx Oy )層。The reflective layer 404 of the present embodiment has a third semiconductor layer 404c and a fourth semiconductor layer 404c alternately stacked. In order to shorten the oxidation time, the upper surface of the light emitting diode structure 400 is etched to the conductive growth substrate 402 to form a plurality of holes 440, so that the reflective layer 404 can be oxidized by the holes 440 to form aluminum oxide (Al x). O y ) layer 404a. The first electrode 424 is formed on the transparent conductive layer 412, and the second electrode 418 is formed on the conductive growth substrate 402 and covers the recess 426 to complete the LED structure 400. In the present embodiment, the light-emitting diode structure has a plurality of holes 440 therein, and the area of the high-reflectivity reflective layer is increased although the active layer area of the portion is sacrificed. The holes 440 in the embodiment may also be etched from the upper surface of the LED structure 400, but not etched to the conductive growth substrate 402, and only the reflective layer 404 is exposed to form aluminum oxide (Al x O y ) by oxidation. Floor.

應注意的是,以上各實施例並未依照實際製品之比例繪製。本發明所列舉之各實施例僅用以說明本發明,並非用以限制本發明之範圍。任何人對本發明所作之任何顯而易知之修飾或變更皆不脫離本發明之精神與範圍。It should be noted that the above embodiments are not drawn to the scale of the actual article. The examples of the invention are intended to be illustrative only and not to limit the scope of the invention. Any changes or modifications of the present invention to those skilled in the art will be made without departing from the spirit and scope of the invention.

100、200、300、400‧‧‧水平式發光二極體結構100, 200, 300, 400‧‧‧ horizontal LED structure

101、201、301、401‧‧‧半導體磊晶疊層101, 201, 301, 401‧‧‧ semiconductor epitaxial stack

102、202、302、402‧‧‧導電成長基板102, 202, 302, 402‧‧‧ conductive growth substrate

104、204、304、404‧‧‧反射層104, 204, 304, 404‧‧ ‧ reflection layer

106、206、306、406‧‧‧n型半導體層106, 206, 306, 406‧‧‧n type semiconductor layer

108、208、308、408‧‧‧活性層108, 208, 308, 408‧‧‧ active layer

110、210、310、410‧‧‧p型半導體層110, 210, 310, 410‧‧‧p type semiconductor layer

112、212、312、412‧‧‧透明導電層112, 212, 312, 412‧‧ ‧ transparent conductive layer

114、214、314、414‧‧‧第一電極114, 214, 314, 414‧‧‧ first electrode

116、216、316、416‧‧‧疊晶保留部116, 216, 316, 416‧‧‧ laminated crystal retention

118、218、318、418‧‧‧第二電極118, 218, 318, 418‧‧‧ second electrode

1A、2A、3A、4A‧‧‧第一區域1A, 2A, 3A, 4A‧‧‧ first area

1B、2B、3B、4B‧‧‧第二區域1B, 2B, 3B, 4B‧‧‧ second area

240‧‧‧孔洞240‧‧‧ holes

326、426‧‧‧凹部326, 426‧‧ ‧ recess

104a‧‧‧氧化鋁層104a‧‧‧ Alumina layer

104b‧‧‧第四半導體層104b‧‧‧fourth semiconductor layer

104c‧‧‧第三半導體層104c‧‧‧ third semiconductor layer

第1A圖為本發明發光二極體元件之第一實施例上視圖;第1B圖為本發明發光二極體元件之第一實施例側視剖面示意圖;第1C圖為本發明發光二極體元件之第一實施例半導體磊晶疊層側視剖面示意圖;第1D圖為本發明發光二極體元件之第一實施例具疊層保留部側視剖面示意圖;第2A~第2C圖係分別為本發明發光二極體元件之第一實施例之不同形狀第二電極側視剖面示意圖;第3圖為本發明發光二極體元件之第二實施例側視剖面示意圖;第4圖為本發明發光二極體元件之第三實施例側視剖面示意圖;第5A圖係為本發明發光二極體元件具有第三半導體層與第四半導體層交互堆疊組成之側視剖面示意圖;第5B圖係為本發明發光二極體元件經濕氧製程後之剖面示意圖;第6A圖係為本發明第四實施例發光二極體結構之的上視圖;第6B圖係本發明第四實施例發光二極體結構沿著 W-W’虛線的剖面圖。1A is a top view of a first embodiment of a light-emitting diode element of the present invention; FIG. 1B is a side cross-sectional view showing a first embodiment of the light-emitting diode element of the present invention; and FIG. 1C is a light-emitting diode of the present invention; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1D is a side cross-sectional view of a first embodiment of a light-emitting diode device according to the present invention with a laminated retention portion; FIGS. 2A-2C are respectively 2 is a side cross-sectional view of a second electrode of a different shape of a first embodiment of the present invention; FIG. 3 is a side cross-sectional view showing a second embodiment of the light emitting diode device of the present invention; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 5A is a side cross-sectional view showing a third embodiment of a light emitting diode device having a third semiconductor layer and a fourth semiconductor layer alternately stacked; FIG. The present invention is a cross-sectional view of the light-emitting diode component of the present invention after the wet oxygen process; FIG. 6A is a top view of the light-emitting diode structure of the fourth embodiment of the present invention; and FIG. 6B is a light-emitting diode of the fourth embodiment of the present invention. Dipolar structure The A cross-sectional view of the W-W' dotted line.

第7A圖係為本發明第五實施例發光二極體結構之的側視圖;第7B圖係為本發明第五實施例發光二極體結構第二電極部分覆蓋凹部並部分覆蓋露出部之的側視圖;第8圖係為本發明第六實施例發光二極體結構之具有可氧化的高鋁含量半導體層與不容易氧化半導體層堆疊組成之側視剖面示意圖。7A is a side view showing a structure of a light emitting diode according to a fifth embodiment of the present invention; and FIG. 7B is a view showing a second electrode portion of the light emitting diode structure covering the concave portion and partially covering the exposed portion according to the fifth embodiment of the present invention; Fig. 8 is a side cross-sectional view showing the composition of an oxidizable high aluminum content semiconductor layer and a non-oxidizable semiconductor layer stack of the light emitting diode structure of the sixth embodiment of the present invention.

200‧‧‧水平式發光二極體結構200‧‧‧Horizontal LED structure

201‧‧‧半導體磊晶疊層201‧‧‧Semiconductor epitaxial stack

202‧‧‧導電成長基板202‧‧‧ Conductive growth substrate

204‧‧‧反射層204‧‧‧reflective layer

206‧‧‧n型半導體層206‧‧‧n type semiconductor layer

208‧‧‧活性層208‧‧‧active layer

210‧‧‧p型半導體層210‧‧‧p-type semiconductor layer

212‧‧‧透明導電層212‧‧‧Transparent conductive layer

214‧‧‧第一電極214‧‧‧First electrode

216‧‧‧疊晶保留部216‧‧‧Crystal Retention Department

218‧‧‧第二電極218‧‧‧second electrode

2A‧‧‧第一區域2A‧‧‧First area

2B‧‧‧第二區域2B‧‧‧Second area

240‧‧‧孔洞240‧‧‧ holes

204a‧‧‧氧化鋁層204a‧‧‧Alumina layer

204b‧‧‧第四半導體層204b‧‧‧fourth semiconductor layer

204c‧‧‧第三半導體層204c‧‧‧ third semiconductor layer

Claims (10)

一種發光二極體元件,包括:一基板上表面具有一第一區域及一第二區域;一疊層,位於該基板的該第一區域上且不位於該第二區域上,其中該疊層,包括:一反射層,位於該第一區域上;一具有第一導電特性之第一半導體層,位於該反射層上;一活性層,位於該第一半導體層之上;以及一具有第二導電特性之第二半導體層,位於該活性層之上;一第一電極位於該第二半導體層上;以及一第二電極位於該第二區域上,與該疊層電性連結,其中該第一電極和第二電極位於該基板的同一側,且該疊層不位於該第二電極與該基板之間。 An LED component includes: a substrate having a first region and a second region; a laminate disposed on the first region of the substrate and not located on the second region, wherein the laminate The method includes: a reflective layer on the first region; a first semiconductor layer having a first conductive property on the reflective layer; an active layer on the first semiconductor layer; and a second a second semiconductor layer having a conductive property on the active layer; a first electrode on the second semiconductor layer; and a second electrode on the second region electrically connected to the stack, wherein the first An electrode and a second electrode are located on the same side of the substrate, and the stack is not located between the second electrode and the substrate. 如申請專利範圍第1項之發光二極體元件,其中該基板包含一導電基板。 The luminescent diode component of claim 1, wherein the substrate comprises a conductive substrate. 如申請專利範圍第1項之發光二極體元件,更進一步包括一凹部位於該第二區域與該第二電極之間,該凹部係移除一部份之該基板所形成。 The light-emitting diode element of claim 1, further comprising a recess between the second region and the second electrode, the recess being formed by removing a portion of the substrate. 如申請專利範圍第1項之發光二極體元件,其中該反射層為由複數個第三半導體層與第四半導體層交互堆疊所形成。 The light-emitting diode element of claim 1, wherein the reflective layer is formed by alternately stacking a plurality of third semiconductor layers and a fourth semiconductor layer. 如申請專利範圍第4項所述之發光二極體元件,其中該第三半導體層較該第四半導體層易於被氧化。 The light-emitting diode element of claim 4, wherein the third semiconductor layer is more susceptible to oxidation than the fourth semiconductor layer. 如申請專利範圍第1項所述之發光二極體元件,其中該反射層不位於該第二區域上。 The luminescent diode component of claim 1, wherein the reflective layer is not located on the second region. 如申請專利範圍第1項所述之發光二極體元件,其中該疊層更包括複數個孔洞,曝露出該基板或部分該反射層。 The luminescent diode component of claim 1, wherein the laminate further comprises a plurality of holes exposing the substrate or a portion of the reflective layer. 如申請專利範圍第1項所述之發光二極體元件,更包括一氧化鋁層鄰接該第二區域及該第三半導體層。 The light-emitting diode element according to claim 1, further comprising an aluminum oxide layer adjacent to the second region and the third semiconductor layer. 如申請專利範圍第1項所述之發光二極體元件,更包括一氧化鋁層圍繞該第三半導體層。 The light-emitting diode element according to claim 1, further comprising an aluminum oxide layer surrounding the third semiconductor layer. 如申請專利範圍第7項所述之發光二極體元件,更包括一氧化鋁層圍繞該些孔洞。 The light-emitting diode component of claim 7, further comprising an aluminum oxide layer surrounding the holes.
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