TWI493333B - Computer device and power saving method therefor - Google Patents

Description

Computer device and power saving method thereof

The present invention relates to a computer device, and more particularly to a power saving method for a computer device.

With the advancement of technology, computer device products are becoming more and more popular, such as mobile phones, notebooks (Note Book), personal digital assistants (PDAs) and other products are widely used in the light and thin and functional advantages. Welcome. However, the problem of power consumption is very important if the use time of the computer device product is not affected and the use time is extended.

In order to be portable and usable, the provision of battery power is very important. The user can turn off the computer device or enter the power saving mode when the computer device is not needed, and the computer device will turn off the power or reduce the power consumption to avoid the battery power consumption. At this time, in addition to the embedded controller in the computer device or the need to perform power supply when some systems need to be shut down, all other components are powered off to achieve power saving effect.

However, the firmware code of the embedded controller is mostly stored in the basic input/output system (BIOS) unit of the computer device. Therefore, there is an embedded controller The basic input and output unit of the firmware code and the power supply of the embedded controller are usually connected at the time of design. In this way, the embedded controller can read the firmware code from the basic input and output unit to perform the task when the computer device is powered on. Also, since the power of the basic input/output unit is connected to the embedded controller, even after the embedded controller reads the firmware code, the basic input/output unit continues to consume power, so it is reduced. Standby time of the computer device without external power supply.

In view of this, the present invention provides a computer device and a power saving method thereof, which can stop supplying power to a storage unit that stores a firmware code after the embedded controller reads the firmware code, thereby achieving power saving. effect.

The invention provides a computer device comprising a storage unit, an embedded controller, and a switch unit. The storage unit stores the firmware code. The embedded controller is coupled to the storage unit and receives the first power source. The input end of the switch unit receives the second power source, the output end of the switch unit is coupled to the power supply end of the storage unit, and the control end of the switch unit is coupled to the embedded controller. When the embedded controller receives the first power source, the embedded controller generates a control signal during the code reading to control the switch unit to direct the second power source from its input terminal to its output terminal, thereby enabling the embedded controller to The storage unit reads the firmware code and stops outputting the second voltage to the storage unit after the code reading period.

The invention provides a power saving method for a computer device, and the computer device comprises Switch unit and storage unit. This power saving method includes the following steps. First, when receiving the first power source, a control signal is generated during code reading to control the switch unit to direct the second power source to the storage unit. Next, the firmware code is read from the storage unit. Then, after the program code reading period, the generation of the control signal is stopped to control the switching unit to stop outputting the second power source to the storage unit.

Based on the above, in the computer device and the power saving method thereof provided by the present invention, the switch unit is controlled by the embedded controller to enable the switch unit to turn on or off the power supply to the storage unit. Allows the computer device to provide power to the storage unit only while the embedded controller is reading the firmware code. Thereby, the power consumption can be effectively reduced, the power saving effect can be achieved, and the standby time of the battery can be increased and the service life of the battery can be prolonged.

The above described features and advantages of the invention will be apparent from the following description.

100‧‧‧ computer equipment

110‧‧‧ storage unit

130‧‧‧ embedded controller

150‧‧‧Switch unit

170‧‧‧Power supply

C1~C3‧‧‧ capacitor

T1‧‧‧P type transistor

T2, T3‧‧‧N type transistor

T1~t3‧‧‧Time

TP‧‧‧ code reading period

N1, N2‧‧‧ nodes

AC-IN‧‧‧DC power supply

DC-IN‧‧‧AC power supply

EV1‧‧‧first power supply

EV2‧‧‧second power supply

EV3‧‧‧ power supply

CS‧‧‧Control signal

S310~S350‧‧‧ steps of the power saving method according to an embodiment of the present invention

1 is a schematic diagram of a computer device in accordance with an embodiment of the present invention.

2 is a circuit diagram illustrating a switching unit in accordance with an embodiment of the present invention.

FIG. 3 is a flow chart illustrating a power saving method of a computer device according to an embodiment of the invention.

4 is a timing chart showing the operation of a computer device according to an embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION Reference will now be made in detail to the exemplary embodiments embodiments In addition, wherever possible, the elements and/

1 is a schematic diagram of a computer device 100 in accordance with an embodiment of the present invention. In this embodiment, the computer device 100 may be a computer device such as a notebook computer, a desktop computer, a server computer, or the like, or may be other types of personal mobile devices. The present invention is not limited thereto. Referring to FIG. 1 , the computer device 100 includes a storage unit 110 , an embedded controller (EC) 130 , and a switch unit 150 . The storage unit 110 is, for example, a read only memory (ROM), a single time memory (OTPMemory), or a flash memory (Flash Memory), etc., which is stored for loading. The firmware code of the embedded controller 130. In the embodiment of the present invention, the storage unit 110 is a basic input/output system unit that stores the most basic code for loading the computer system, that is, a Basic Input Output System (BIOS), and stores the embedded system. The firmware code required by the controller 130 when executed.

The embedded controller 130 is coupled to the storage unit 110 and receives the first power source EV1. In the embodiment of the present invention, the embedded controller 130 can be coupled to the storage unit 110 through a serial peripheral interface bus (SPI Bus) to read the firmware code. Generally, the embedded controller 130 is used to control the power of the computer device 100, and to control peripheral devices and functions such as a cooling fan, a keyboard, and a battery charging and discharging mechanism. even if When the computer device 100 is turned off, the embedded controller 130 still performs specific tasks in the computer device, such as a charge and discharge mechanism of the battery, a power-on mechanism, and the like. The switching unit 150 can be implemented by using a logic circuit, a switch or a multiplexer, and the input terminal receives the second power source EV2. In addition, the output end of the switch unit 150 is coupled to the power supply end of the storage unit 110 , and the control end of the switch unit 150 is coupled to the embedded controller 130 .

In this embodiment, the computer device further includes a power supply 170. Generally, the power supply 170 of the computer device 100 receives an external alternating current power source (AC-IN) provided by an alternating current transformer, or a direct current power source (DC-IN) provided by an internal battery thereof, and passes through an alternating current to direct current converter ( AC/DC converter) or DC/DC converter to generate the voltage required for each component in a computer device. As shown in FIG. 1, the power supply 170 can provide a first power source EV1 to the embedded controller 130 and a second power source EV2 to the switch unit 150.

When the embedded controller 130 receives the first power source EV1, the embedded controller needs to read the firmware code from the storage unit 110 in the computer device to perform the task to be executed. Thus, embedded controller 130 utilizes control signal CS to control switching unit 150 during code reading, and switch unit 150 directs second power supply EV2 from its input to its output. In detail, the embedded controller 130 outputs a voltage level (for example, logic 0) to the switch unit 150 to control the switch unit 150 to guide the second voltage source EV2 received at the input end to the output end. The storage unit 110 coupled to the output end of the switch unit 150 is capable of receiving the second voltage source EV2. It is worth mentioning that although this embodiment enumerates the above voltage levels The mode is applied, but it is not intended to limit the invention, and those skilled in the art can also set the voltage level to logic 1.

After the storage unit 110 receives the power supply of the second power source EV2, the embedded controller 130 can read the firmware code from the storage unit 110. And after the program code reading period, the switching unit 150 stops outputting the second voltage EV2 to the storage unit. That is, after the embedded controller 130 reads the firmware code, the embedded controller 130 changes the control signal CS and outputs it to the switch unit 150 to control the switch unit 150 to stop the second power supply EV2. Directed to the storage unit 110. For example, when the embedded controller 130 wants to read the firmware code, the voltage level (eg, logic 0) can be output to the switch unit 150, so that the storage unit 110 receives the second power source EV2. When the embedded controller 130 reads the firmware code, another voltage level (eg, logic 1) may be output to the switch unit 150, so that the storage unit 110 stops receiving the second power EV2. It should be noted that those skilled in the art can change the detailed structure of the switch unit 150 according to the implementation mode of the voltage level to achieve the purpose of manipulating the switch unit 150, which is not limited by the present invention.

For example, when the AC adapter is plugged into the computer device 100, the embedded controller 130 can receive the first power source EV1 provided by the power supply 170. At this time, since the embedded controller 130 has not read the firmware code, the voltage level of the general purpose input/output (GPIO) of the embedded controller 130 is preset to be the Lord. A general purpose output (GPO) coupled to the switch unit 150 outputs a preset voltage level, that is, a control signal CS, thereby controlling the switch unit 150 to supply power. The second power source EV2 provided by the device 170 is output to the storage unit 110.

Then, the embedded controller 130 can read the firmware code from the storage unit 110 to start its related operations, so that the embedded controller 130 can further control some components in the computer device 100, or according to the firmware program. Code execution related procedures. After the embedded controller 130 reads the firmware code, the voltage level output from the output pin can be controlled, and the power supply is stopped by the control signal outputted by the output pin to save power. purpose.

2 is a circuit diagram illustrating a switching unit 150 in accordance with an embodiment of the present invention. Referring to FIG. 2, the switch unit 150 includes a first switch T1, a second switch T2, and a third switch T3. In this embodiment, the first switch T1 is a P-type transistor, and the third switch T3 and the second switch T2 are P-type transistors. In addition, the switch unit further includes capacitors C1~C3 and resistors R1~R3. These capacitors are C1~C3 in order to maintain the signal of each point and the voltage of the power supply. The resistors R1~R3 are used to provide the voltage drop required at both ends. The arrangement of circuit elements such as transistors, capacitors, and resistors herein is merely illustrative, and those skilled in the art can change them according to actual needs, and are not limited to the above description.

In this embodiment, the first end of the first switch T1 serves as an input end of the switch unit 150 to receive the second power source EV2, and the second end of the first switch T1 serves as an output end of the switch unit 150. The first end of the capacitor C1 is coupled to the first end of the first switch T1, and the second end of the capacitor C1 is coupled to the ground voltage GND. The first end of the capacitor C2 is coupled to the second end of the first switch T1, and the second end of the capacitor C1 is coupled to the ground voltage GND. The first end of the capacitor C3 is coupled to the control end of the first switch T1, and the second end of the capacitor C3 is coupled Ground voltage GND, capacitors C1~C3 are used to stabilize the voltage in the circuit and increase the stability of the circuit. Thereby, the first switch T1 can determine whether to conduct through the signal received by the control terminal, thereby guiding the power of the node N1 to the node N2.

The second end of the second switch T2 is coupled to the control terminal of the first switch 150 and receives the second power source EV2. The second end of the second switch T2 is coupled to the ground voltage GND, and the control end of the second switch T2 receives the second power source EV2. . In this embodiment, the resistor R1 is coupled between the control end of the first switch T1 and the first end of the second switch T2, the first end of which is coupled to the control end of the first switch T1, and the second end of the resistor R1. The first end of the second switch T2 is coupled. The first end of the resistor R2 receives the second voltage source EV2, and the second end of the resistor R2 is coupled to the first end of the second switch T2. The first end of the resistor R3 receives the second voltage source EV2, and the second end of the resistor R3 is coupled to the control end of the second switch T2.

The first end of the third switch T3 is coupled to the control end of the second switch T2, the second end of the third switch T3 is coupled to the ground voltage GND, and the control end of the third switch T3 is used as the control end of the switch unit 150 to receive the control signal. CS. In this embodiment, when the control terminal of the third switch T3 receives the control signal CS, it is assumed that the control signal CS is at a low voltage level (for example, logic 0), and the third switch T3 is turned off. The first end and the second end of the third switch T3. At this time, the second switch T2 is turned on because of the second voltage source received by the control terminal thereof, and the first end and the second end of the second switch T2 are turned on, and the signal of the control end of the first switch T1 is caused by the second switch. The conduction of T becomes a low voltage level (for example, logic 0). Therefore, the first switch T1 is turned on to turn on the first end and the second end, that is, the current can flow from the node N1 to the node N2, so that the node N2 can have the power source EV3 due to the second power source EV2 to supply power to the storage unit 110. .

When the control signal CS is converted from a low voltage level (eg, logic 0) to a high voltage level (eg, logic 1), the third switch T3 is turned on to turn on the first end and the second end of the third switch T3. . At this time, the second switch T2 is turned off due to the second voltage source EV2 that the control terminal cannot receive, and the first end and the second end of the second switch T2 are turned off, and the signal of the control end of the first switch T1 is caused by the first The second switch T is turned off to become a high voltage level (for example, logic 1). Accordingly, the first switch T1 is turned off to cut off the current between the first end and the second end, so that the node N2 does not have the power source EV3 due to the second power source EV2 to stop supplying power to the storage unit 110.

In view of the above, the embodiment of the present invention provides a power saving method for a computer device using another point of view, which is applicable to the computer device 100 of FIG. FIG. 3 is a flow chart illustrating a power saving method of the computer device 100 according to an embodiment of the invention. FIG. 4 is a timing chart showing the operation of the computer device 100 according to an embodiment of the invention. Referring to FIG. 1 , FIG. 3 and FIG. 4 simultaneously, in step S310, when the embedded controller 130 receives the first power source EV1 at time t1, the embedded controller 130 uses the control signal CS to control the switch unit at time t2. The second power source EV2 is guided to the storage unit 110. In some embodiments, in detail, the switch unit 150 receives the control signal CS and enables the third switch T3 to be turned off. When the third switch T3 is turned off, the second switch T2 is turned on. When the second switch T2 is turned on, the first switch T1 is turned on to guide the second power source EV2 to the storage unit 110. As indicated by the arrow Q, the power source EV3 is generated by guiding the second power source EV2 to the output terminal of the switching unit 150 due to the conduction of the first switch.

Then, since the storage unit 110 has received the second power source EV2, the embedded controller 130 can read the firmware code from the storage unit 110 in step S330. As shown in FIG. 4, in the present embodiment, the embedded controller 130 reads the firmware code during the code reading period TP. Thereby, the embedded controller 130 can start performing related operations.

Then, in step S350, after the code reading period TP, the embedded controller 130 controls the switching unit 150 with the control signal CS at time t3, so that after the time t3, the switching unit 150 stops outputting the second power source EV2 to The storage unit 110. In some embodiments, in detail, the switch unit 150 receives the control signal CS and enables the third switch T3 to be turned on. When the third switch T3 is turned on, the second switch T2 is turned off. When the second switch T2 is turned off, the first switch T1 is turned off to stop guiding the second power source EV2 to the storage unit 110.

In summary, the computer device of the present invention and the power saving method thereof control the switch unit by the embedded controller, and can stop power supply to the storage unit after the embedded controller reads the firmware code, thereby achieving power saving. effect. In this way, when the embedded controller does not need to read the firmware code in the storage unit, the power supply provided to the storage unit can be turned off, so that the storage unit does not continue to consume power. Therefore, the computer device and the power saving method provided by the embodiments of the present invention can effectively reduce the continuous loss of the battery power, increase the time of using the battery, and effectively reduce the power consumption of the non-use storage unit, thereby improving Battery efficiency, extending the standby time of the computer device when there is no external power supply.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of protection of the present invention It is subject to the definition of the scope of the patent application attached.

100‧‧‧ computer equipment

110‧‧‧ storage unit

130‧‧‧ embedded controller

150‧‧‧Switch unit

170‧‧‧Power supply

AC-IN‧‧‧DC power supply

DC-IN‧‧‧AC power supply

EV1‧‧‧first power supply

EV2‧‧‧second power supply

EV3‧‧‧ power supply

CS‧‧‧Control signal

Claims (9)

A computer device comprising: a storage unit storing a firmware code, wherein the storage unit is a basic input/output system unit; an embedded controller coupled to the storage unit and receiving a first power source; and a switch a unit, the input end of which receives a second power source, the output end of the switch unit is coupled to the power supply end of the storage unit, and the control end of the switch unit is coupled to the embedded controller, wherein, when the embedded controller Receiving the first power source, the embedded controller utilizes a control signal during a code reading to control the switch unit to direct the second power source from its input terminal to its output terminal, so that the received The embedded controller of the second power source reads the firmware code from the storage unit, and stops the first time after the code reading is completed and the embedded controller reads the firmware code. The two voltages are output to the storage unit. The computer device of claim 1, wherein the switch unit comprises: a first switch having a first end serving as the input end of the switch unit to receive the second power source, and a second switch The second end of the second switch is coupled to the control end of the first switch and receives the second power source, and the second end of the second switch is grounded. a control end of the second switch receives the second power source; and a third switch having a first end, a second end, and a control end, the third switch The first end is coupled to the control end of the second switch, the second end of the third switch is grounded, and the control end of the third switch serves as a control end of the switch unit to receive the control signal, wherein the third switch The control terminal turns off the first end and the second end of the third switch when receiving the control signal, the first end and the second end of the second switch are turned on, and the first end and the second end of the first switch Turn on. The computer device of claim 2, wherein the first switch is a P-type transistor, and the second switch and the third switch are N-type transistors. The computer device of claim 1, wherein the computer device further comprises a power supply unit that supplies the first power source to the embedded controller and the second power source to the switch unit. The computer device of claim 1, wherein the embedded controller is coupled to the storage unit via a serial peripheral interface bus. A power saving method for a computer device, wherein the computer device includes a switch unit and a storage unit, the power saving method includes: when receiving a first power source, using a control signal to control the switch during reading of a code code The unit directs a second power source to the storage unit, wherein the storage unit is a basic input/output system unit; reading a firmware code from the storage unit that has received the second power source; and passing the code After the reading period and after the embedded controller reads the firmware code, the control signal is changed to control the switch unit to stop outputting the second power source to the storage unit. The power saving method of claim 6, wherein the switch unit comprises a first switch, a second switch, and a third switch, the first end of the first switch being the input end of the switch unit Receiving the second power source, the second end of the first switch is used as an output end of the switch unit, and controlling the switch unit to guide the second power source to the storage unit comprises the following steps: the switch unit receives the control a signal enabling the third switch to be turned off; when the third switch is turned off, the second switch is turned on; and when the second switch is turned on, the first switch is turned on to guide the second power source to the storage unit . The power saving method of claim 7, wherein the switching unit stops outputting the second power source to the storage unit, comprising the steps of: receiving, by the switch unit, the control signal, enabling the third switch to be turned on; When the third switch is turned on, the second switch is turned off; and when the second switch is turned off, the first switch is turned off to stop guiding the second power source to the storage unit. The power saving method of claim 6, wherein the first power source is supplied to the embedded controller by a power supply unit and the second power source is supplied to the switch unit.