TWI484491B - Optical controlled read only memory and manufacturing method thereof - Google Patents

Optical controlled read only memory and manufacturing method thereof Download PDF

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TWI484491B
TWI484491B TW097131896A TW97131896A TWI484491B TW I484491 B TWI484491 B TW I484491B TW 097131896 A TW097131896 A TW 097131896A TW 97131896 A TW97131896 A TW 97131896A TW I484491 B TWI484491 B TW I484491B
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light
memory
shielding structure
controlled
photosensitive elements
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TW201009840A (en
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Yi Tyng Wu
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United Microelectronics Corp
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光控唯讀記憶體及其製作方法Light control read only memory and manufacturing method thereof

本發明係關於一種唯讀記憶體,特別是一種照光後會產生特定程式編碼的光控唯讀記憶體。The present invention relates to a read-only memory, and more particularly to a light-controlled read-only memory that produces a specific program code after illumination.

唯讀記憶體(Read Only Memory,ROM)是一種半導體記憶體,通常應用在不需經常變更資料的電子或電腦系統中,且資料並不會因為電源關閉而消失。例如個人電腦的基礎輸出輸入系統(Basic Input Output System,BIOS)或是其他各種微電腦系統、可攜式電子產品、家電、玩具中的軔體(Firmware)。Read Only Memory (ROM) is a type of semiconductor memory that is commonly used in electronic or computer systems that do not require frequent data changes, and the data does not disappear because the power is turned off. For example, the Basic Input Output System (BIOS) of a personal computer or a variety of other microcomputer systems, portable electronic products, home appliances, toys in the body (Firmware).

目前已知商用化的唯讀記憶體(ROM)大致可概分為:1).可編程唯讀記憶體(Programmable ROM,PROM),其內部有行列式的鎔絲(fuse),可依使用者(廠商)的需要利用電流將其燒斷,以寫入所需的資料及程式,一經燒錄便無法再更改;2).可抹除可編程唯讀記憶體(Erasable Programmable Read only Memory,EPROM),其可利用高電壓將資料編程寫入,抹除時將線路曝光於紫外線下,則資料可被清空,並且可重複使用。通常在封裝外殼上會預留一個石英透明窗以方便曝光;3).一次編程唯讀記憶體(One Time Programmable Read Only Memory, OTPROM),其寫入原理同可抹除可編程唯讀記憶體(EPROM),但是為了節省成本,編程寫入之後就不再抹除,因此不設置透明窗;以及4).電子式可抹除可編程唯讀記憶體(Electrically Erasable Programmable Read Only Memory,EEPROM),其運作原理類似可抹除可編程唯讀記憶體(EPROM),但是抹除的方式是使用高電場來完成,因此不需要透明窗。Currently known commercial read-only memory (ROM) can be roughly divided into: 1) programmable programmable memory (PROM), which has a determinant fuse inside, can be used The manufacturer (manufacturer) needs to use current to blow it to write the required data and programs. Once burned, it cannot be changed. 2) Erasable Programmable Read Only Memory (Erasable Programmable Read Only Memory) EPROM), which can program data by high voltage, and expose the line to ultraviolet light during erasing, the data can be emptied and can be reused. A quartz transparent window is usually reserved on the package housing for easy exposure; 3) One Time Programmable Read Only Memory (One Time Programmable Read Only Memory, OTPROM), its writing principle is the same as erasable programmable read-only memory (EPROM), but in order to save cost, it is not erased after programming and writing, so no transparent window is set; and 4). Electronically erasable In addition to Programmable Erasable Programmable Read Only Memory (EEPROM), the operation principle is similar to that of Programmable Read Only Memory (EPROM), but the erase method is done using a high electric field, so it is not required. Transparent window.

此外,各唯讀記憶體依寫入、抹除、編程等操作方式的不同,其結構與製程也都不盡相同,例如請參考美國專利號第5,959,877號所揭示之唯讀記憶體。如第1圖所示,第1圖係為一習知唯讀記憶體(ROM)的結構示意圖,該唯讀記憶體係形成於一基底1上,且在基底1上設有複數個n型摻雜區2-1、2-2、2-3、2-4、2-5、2-6、複數個絕緣薄膜(insulating film)3-1、3-2、3-3、3-4、3-5以及複數個分別設於該等絕緣薄膜上之多晶矽薄膜(polysilicon film)4-1、4-2、4-3、4-4、4-5;其中,藉由該等多晶矽薄膜、設於多晶矽薄膜下方之該等絕緣薄膜以及設於該等薄膜兩側之該等n型摻雜區係在基底1上定義出複數個n-channel MOS電晶體(以下簡稱NMOS電晶體),且各該多晶矽薄膜係為各該NMOS電晶體之閘極並分別電連接相對應之字元線(word line),而該等n型摻雜區即為該NMOS電晶體之源極/汲極。該唯讀記憶體另包含一第一金屬導線層(first metal wiring layer)5-1、5-2、5-3、5-4、5-5、5-6以及一第二金屬導線層(second metal wiring layer)6-1、6-2、6-3、6-4、6-5、6-6,其中部分之第一金屬導線層以及第二金屬導線層間設有複數個介層插塞(via plug)10-1、10-2、10-5、10-6,且第一金屬導電層5-1、5-2、5-3、5-4、5-5、5-6與各n型摻雜區2-1、2-2、2-3、2-4、2-5、2-6間亦藉由複數個介層插塞電連接。In addition, the structure and process of each read-only memory are different depending on the operation modes such as writing, erasing, and programming. For example, please refer to the read-only memory disclosed in U.S. Patent No. 5,959,877. As shown in FIG. 1, FIG. 1 is a schematic diagram showing the structure of a conventional read-only memory (ROM) formed on a substrate 1 and having a plurality of n-type dopings on the substrate 1. Miscellaneous zones 2-1, 2-2, 2-3, 2-4, 2-5, 2-6, a plurality of insulating films 3-1, 3-2, 3-3, 3-4, 3-5 and a plurality of polysilicon films 4-1, 4-2, 4-3, 4-4, 4-5 respectively disposed on the insulating films; wherein, by the polysilicon films, The insulating film disposed under the polysilicon film and the n-type doping regions disposed on both sides of the film define a plurality of n-channel MOS transistors (hereinafter referred to as NMOS transistors) on the substrate 1 and Each of the polycrystalline germanium films is a gate of each of the NMOS transistors and electrically connected to a corresponding word line, and the n-type doped regions are the source/drain of the NMOS transistor. The read-only memory further includes a first metal wire layer (first Metal wiring layer) 5-1, 5-2, 5-3, 5-4, 5-5, 5-6 and a second metal wiring layer 6-1, 6-2, 6- 3, 6-4, 6-5, 6-6, wherein a portion of the first metal wire layer and the second metal wire layer are provided with a plurality of via plugs 10-1, 10-2, 10- 5, 10-6, and the first metal conductive layers 5-1, 5-2, 5-3, 5-4, 5-5, 5-6 and the respective n-type doped regions 2-1, 2-2 2-3, 2-4, 2-5, and 2-6 are also electrically connected by a plurality of via plugs.

第二金屬層6-2、6-3、6-4、6-5係為該唯讀記憶體之位元線(bit line)BL0 、BL1 、BL2 、BL3 ,且該等位元線與字元線的交界處即為儲存資料的記憶胞(memory cell),其中位元線BL0 及BL3 係藉由介層插塞10-2、10-5與下方之n型摻雜區2-2、2-5電連接。同時,在製作該唯讀記憶體時,各該記憶胞內第二金屬導電層與第一金屬導電層間的介層插塞的設置與否,便決定該等記憶胞所儲存的訊息資料為「0」或「1」,進而構成該唯讀記憶體的程式編碼。因此,在判讀(read)該唯讀記憶體所儲存的資料時,來自字元線的電壓會經由電連接之閘極開啟將該等NMOS電晶體,同時該等位元線將施予一預充電位(precharge potential)。由於介層插塞10-2、10-5電連接第二金屬層6-2、6-5、第一金屬層5-2、5-5以及n型摻雜區2-2、2-5,使得位元線BL0 及BL3 的電位將低於該預充電位,例如一接地電位(ground potential),因此,維持在預充電位的位元線BL1 、BL2 將可 判讀該記憶胞所儲存之資料為「0」,反之,低於預充電位之位元線BL0 、BL3 所判讀之資料為「1」。The second metal layers 6-2, 6-3, 6-4, 6-5 are bit lines BL 0 , BL 1 , BL 2 , BL 3 of the read-only memory, and the same The boundary between the line and the word line is the memory cell for storing data, wherein the bit lines BL 0 and BL 3 are doped by the interposer 10-2, 10-5 and the underlying n-type doping. Zones 2-2, 2-5 are electrically connected. At the same time, in the production of the read-only memory, the setting of the interposer between the second metal conductive layer and the first metal conductive layer in the memory cell determines whether the information stored in the memory cells is "0" or "1", which in turn constitutes the program code of the read-only memory. Therefore, when reading the data stored in the read-only memory, the voltage from the word line will turn on the NMOS transistors via the gate of the electrical connection, and the bit line will be given a pre- Precharge potential. Since the via plugs 10-2, 10-5 are electrically connected to the second metal layers 6-2, 6-5, the first metal layers 5-2, 5-5, and the n-type doped regions 2-2, 2-5 So that the potentials of the bit lines BL 0 and BL 3 will be lower than the precharge bit, such as a ground potential, so that the bit lines BL 1 , BL 2 maintained at the precharge bits will be able to interpret the memory. The data stored by the cell is "0". Conversely, the data read by the bit lines BL 0 and BL 3 below the precharge bit is "1".

由此可知,現行的唯讀記憶體不但結構特殊、製程複雜,大多係於晶圓製程階段便需決定儲存於其中的程式編碼,或只能藉由特定操作步驟來燒錄所需的資料或重新寫入軔體與資料,以決定其內之程式編碼,而且其儲存的程式編碼一次僅能具有單一固定的程式編碼且不能具有變化性。It can be seen that the current read-only memory is not only unique in structure, but also complicated in process. Most of the processes in the wafer process stage need to determine the code of the program stored in it, or can only be burned by a specific operation step or The body and data are rewritten to determine the program code within it, and the stored program code can only have a single fixed program code at a time and cannot be variability.

本發明之一主要目的係在提供一種可同時受光或電控制的光控唯讀記憶體及該光控唯讀記憶體之製作方法。One of the main objects of the present invention is to provide a light-controlled read-only memory that can be simultaneously controlled by light or electricity and a method of fabricating the light-controlled read-only memory.

為達上述目的,本發明係提供一種可同時受光或電控制的光控唯讀記憶體。該光控唯讀記憶體包含一基底,複數個感光元件(optical sensor)設於該基底,以及至少一遮光結構設置於該等感光元件上方,且該遮光結構以一預定佈局選擇性遮蔽部分之該等感光元件。To achieve the above object, the present invention provides a light-controlled read-only memory that can be simultaneously controlled by light or electricity. The light-controlled read-only memory includes a substrate, a plurality of optical sensors are disposed on the substrate, and at least one light-shielding structure is disposed above the photosensitive elements, and the light-shielding structure selectively shields portions in a predetermined layout These photosensitive elements.

本發明的光控唯讀記憶體係藉由該些半透光、不透光等之遮光結構,以一預定之佈局的設置來遮蔽部分之該等感光元件,進而可形成一預定之程式編碼。例如外來光源 可直接到達感光元件而引發對應之電子訊號者,使該記憶胞所被判讀之程式編碼係定義為「1」,而被該等遮光結構所阻擋無法直接到達感光元件的該記憶胞則會被判讀其所代表之程式編碼係定義為「0」。而且,本發明之光控唯讀記憶體係具有兩種以上的程式編碼,並可於不同的光照環境下輸出不同功能的程式編碼。The light-controlled read-only memory system of the present invention shields a portion of the photosensitive elements by a predetermined arrangement of light-shielding structures such as semi-transmissive, opaque, etc., thereby forming a predetermined program code. Such as a foreign light source The program code system that can directly reach the photosensitive element and trigger the corresponding electronic signal is defined as "1", and the memory cell that is blocked by the light-shielding structure and cannot directly reach the photosensitive element is The program code system represented by the interpretation is defined as "0". Moreover, the light-controlled read-only memory system of the present invention has two or more kinds of program codes, and can output program codes of different functions in different illumination environments.

請參考第2圖,第2圖係例示本發明之一較佳實施例所繪示之光控唯讀記憶體10,其包含有一週邊電路區12以及一記憶體陣列區14。週邊電路區12包含一字元線解碼器(word line decoder)16電連接於記憶體陣列區14之複數條字元線,以及一位元線解碼器(bit line decoder)18電連接於記憶體陣列區14之複數條位元線,其中字元線解碼器16及位元線解碼器18係分別與一對應之電壓產生器(圖未示)電連接,用來提供操作光控唯讀記憶體10所需之電位。Referring to FIG. 2, FIG. 2 illustrates a light-controlled read-only memory 10 according to a preferred embodiment of the present invention, which includes a peripheral circuit region 12 and a memory array region 14. The peripheral circuit area 12 includes a word line decoder 16 electrically connected to the plurality of word lines of the memory array area 14, and a bit line decoder 18 electrically connected to the memory. a plurality of bit lines of the array area 14, wherein the word line decoder 16 and the bit line decoder 18 are respectively electrically connected to a corresponding voltage generator (not shown) for providing operation of the optically controlled read only memory. The potential required for body 10.

如第2圖所示,記憶體陣列區14又設有複數條位元線及交織的複數條字元線,如本較佳實施例所示之位元線BL1 、BL2 、BL3 、BL4 ,字元線WL1 、WL2 、WL3 、WL4 、WL5 ,以及陣列設置於該等字元線及該等位元線間的複數個記憶胞20、22,每一字元線係與記憶體陣列區14內之一預定記憶胞電連接,同時各該記憶胞亦分別電連接一對 應之位元線,且本發明各該記憶胞內均設有一感光元件以及一主動元件23,例如一MOS電晶體或一放大器(active amplifier)。其中,部分之感光元件上方設有遮光結構(於第2圖中係以陰影表示,例如記憶胞20),與未設有遮光結構的記憶胞22做為對照,分別用以定義為本發明光控唯讀記憶體之程式編碼中的「0」或「1」,因此在光控唯讀記憶體10之記憶體陣列區14的該等記憶胞,可用於儲存一預定的程式編碼。As shown in FIG. 2, the memory array region 14 is further provided with a plurality of bit lines and interleaved plurality of word lines, such as the bit lines BL 1 , BL 2 , BL 3 shown in the preferred embodiment. BL 4 , word lines WL 1 , WL 2 , WL 3 , WL 4 , WL 5 , and a plurality of memory cells 20, 22 arrayed between the word lines and the bit lines, each character The wire system is electrically connected to a predetermined memory cell in the memory array region 14, and each of the memory cells is electrically connected to a corresponding bit line, and each of the memory cells of the present invention is provided with a photosensitive element and an active component. 23, such as a MOS transistor or an active amplifier. Wherein, some of the photosensitive elements are provided with a light-shielding structure (shown in shaded in FIG. 2, such as memory cell 20), which is used as a reference for the light of the present invention as a comparison with the memory cells 22 not provided with the light-shielding structure. The memory of the program code of the read-only memory is "0" or "1", so that the memory cells in the memory array area 14 of the light-controlled read-only memory 10 can be used to store a predetermined program code.

請參考第3圖及第4圖,第3圖及第4圖為第2圖之光控唯讀記憶體10之記憶體陣列區14的示意圖,為簡化說明,圖中省略位元線、字元線及主動元件。第3圖僅簡單繪示該等記憶胞佈局的上視圖,第4圖則為第3圖沿AA’切線之剖面示意圖。本發明光控唯讀記憶體10之該等記憶胞係可呈條狀排列、矩陣排列和三角形排列等各式陣列排列,以下將以第二行之記憶胞24、26、28、30、32為例來說明。Please refer to FIG. 3 and FIG. 4, FIG. 3 and FIG. 4 are schematic diagrams of the memory array region 14 of the photo-controlled read-only memory 10 of FIG. 2, for simplification of description, the bit line and word are omitted in the figure. Meta-line and active components. Figure 3 is a simplified view of the top view of the memory cell layout, and Figure 4 is a cross-sectional view of the third figure taken along the line AA'. The memory cell lines of the light-controlled read-only memory 10 of the present invention may be arranged in various arrays such as a stripe arrangement, a matrix arrangement, and a triangular arrangement, and the memory cells 24, 26, 28, 30, 32 of the second row will be hereinafter. As an example to illustrate.

請一併參考第3圖及第4圖。記憶胞24、26、28、30、32係設於一基底34上,如半導體基底,且各記憶胞係對應至一感光元件36a、36b、36c、36d、36e,該等感光元件在基底上亦呈陣列排列,其中,感光元件36可以是電荷耦合裝置(charge coupled device,CCD)或互補式金氧半導體 影像感測器(CMOS image sensor,CIS)等感光二極體(photodiode)之群組。記憶胞24、26、28、30、32另形成有複數層可透光之金屬層間介電層(inter-metal dielectrics,IMD)等之介電層38、40、42覆蓋基底34以及各感光元件36之上。而且本發明更可整合自對準金屬矽化(salicide)製程、多重金屬內連線(multilevel interconnection)製程、彩色濾光片製程、黑色矩陣(black matrix)製程等,而在各記憶胞24、26、28、30、32中形成所需之遮光結構。Please refer to Figure 3 and Figure 4 together. The memory cells 24, 26, 28, 30, 32 are disposed on a substrate 34, such as a semiconductor substrate, and each memory cell corresponds to a photosensitive element 36a, 36b, 36c, 36d, 36e, and the photosensitive elements are on the substrate. Also arranged in an array, wherein the photosensitive element 36 can be a charge coupled device (CCD) or a complementary MOS semiconductor. A group of photodiodes such as a CMOS image sensor (CIS). The memory cells 24, 26, 28, 30, 32 are further formed with a plurality of dielectric layers 38, 40, 42 of inter-metal dielectrics (IMD), etc., covering the substrate 34 and the photosensitive elements. Above 36. Moreover, the present invention can integrate a self-aligned metal salicide process, a multi-level interconnection process, a color filter process, a black matrix process, etc., in each memory cell 24, 26 The desired light-shielding structure is formed in 28, 30, and 32.

比較第3圖及第4圖中記憶胞24、26、28、30、32的結構,其中,記憶胞24僅包含一感光元件36a,且感光元件36a上方並未設置任何的遮光結構,來自記憶胞24外的光源可穿過介電層38、40、42直接到達感光元件36a,並引發對應的電子訊號,而可視為存在或記錄有一位元資料,例如程式編碼中的「1」。相對地,記憶胞26、28、30、32的感光元件36b、36c、36d、36e上方則分別設有對應之遮光結構,例如記憶胞26內的金屬矽化物44、記憶胞28內設於感光元件36c上方之第一圖案化金屬層46以及第二圖案化金屬層48。因此,當外來光源射向記憶胞26、28時,便可受到金屬矽化物44、第一圖案化金屬層46、第二圖案化金屬層48等不透光層的阻擋,而無法直接到達感光元件36b、36c,故此二者可視為存在或記錄有另一位元資料,例如程式編碼中的「0」。Comparing the structures of the memory cells 24, 26, 28, 30, 32 in FIGS. 3 and 4, wherein the memory cell 24 includes only one photosensitive element 36a, and no light-shielding structure is disposed above the photosensitive element 36a, from the memory. The light source outside the cell 24 can pass through the dielectric layer 38, 40, 42 directly to the photosensitive element 36a, and trigger a corresponding electronic signal, which can be regarded as the presence or recording of a bit of metadata, such as "1" in the program code. In contrast, the photosensitive elements 36b, 36c, 36d, and 36e of the memory cells 26, 28, 30, and 32 are respectively provided with corresponding light shielding structures, for example, the metal halide 44 in the memory cell 26 and the memory cell 28 are disposed in the photosensitive layer. A first patterned metal layer 46 and a second patterned metal layer 48 over element 36c. Therefore, when the external light source is directed to the memory cells 26 and 28, it can be blocked by the opaque layer such as the metal halide 44, the first patterned metal layer 46, and the second patterned metal layer 48, and cannot directly reach the photosensitive layer. Elements 36b, 36c, so both can be considered to exist or have another bit of data, such as "0" in the program code.

至於記憶胞30,則是在介電層42上設置有一第一彩色濾光層50當作半透光層,而記憶胞32則在第一彩色濾光層50上再行設置一第二彩色濾光層52,構成不透光層。因此,當外來光源為白光或紅光時,此外來光可被選擇性地穿過紅色的第一彩色濾光層50,而直接到達記憶胞30的感光元件36d,可視為存在或記錄有一位元資料,例如程式編碼中的「1」;但對記憶胞32來說,由於其具有不同濾光範圍的彩色濾光層,亦即設於第一彩色濾光層50上之綠色的第二彩色濾光層52係阻絕綠光以外的光源進入第一彩色濾光層50中,而第一彩色濾光層50又阻絕紅光以外的光源進入介電層42內,因此不會引發感光元件36e的因光子入射而造成的電子訊號,而可視為存在或記錄有另一位元資料,例如程式編碼中的「0」。As for the memory cell 30, a first color filter layer 50 is disposed on the dielectric layer 42 as a semi-transmissive layer, and the memory cell 32 is further provided with a second color on the first color filter layer 50. The filter layer 52 constitutes an opaque layer. Therefore, when the external light source is white light or red light, the light can be selectively passed through the red first color filter layer 50 and directly reach the photosensitive element 36d of the memory cell 30, and can be regarded as having or recorded a bit. Metadata, such as "1" in the program code; but for the memory cell 32, due to its color filter layer having different filter ranges, that is, the second color of the green color on the first color filter layer 50 The color filter layer 52 blocks the light source other than the green light from entering the first color filter layer 50, and the first color filter layer 50 blocks the light source other than the red light from entering the dielectric layer 42, so that the photosensitive element is not caused. The electronic signal of 36e due to the incidence of photons can be regarded as the presence or recording of another bit of data, such as "0" in the program code.

因此,藉由該些半透光、不透光等遮光結構以一預定之佈局的設置來選擇性遮蔽部分之該等感光元件,本發明即可寫入一預定之程式編碼。例如外來光源可直接到達感光元件而引發對應之電子訊號者,使記憶胞所被判讀之程式編碼係定義為「1」,而被該等遮光結構所阻擋無法直接到達感光元件的該記憶胞則會被判讀其所代表之程式編碼係定義為「0」。反之,本發明亦可將外來光源能直接到達感光元件引發對應之電子訊號者,使該記憶胞所被判讀之程式碼係定義為「0」,而被該等遮光結構所阻擋無法直接 到達感光元件的該記憶胞則會被判讀其所代表之程式碼係定義為「1」,端視不同操作而定。由此便可決定該光控唯讀記憶體所儲存之程式編碼,且該程式編碼係受「電」與「光」的控制。Therefore, by selectively shielding a portion of the photosensitive elements in a predetermined arrangement by the light-shielding structures such as semi-transparent and opaque, the present invention can write a predetermined program code. For example, the external light source can directly reach the photosensitive element to trigger the corresponding electronic signal, so that the program code of the memory cell is defined as "1", and the memory cell that is blocked by the light shielding structure and cannot directly reach the photosensitive element is It will be interpreted as the program code system it represents as "0". On the contrary, the present invention can also directly connect the external light source to the photosensitive element to trigger the corresponding electronic signal, so that the coded code of the memory cell is defined as "0", and can not be directly blocked by the light shielding structure. The memory cell that reaches the photosensitive element is interpreted as the code system it represents as "1", depending on the operation. From this, the program code stored in the optical control read-only memory can be determined, and the code of the program is controlled by "electricity" and "light".

請參考第5圖,第5圖係例示本發明之其他較佳實施例之光控唯讀記憶體10。同樣地,為簡化說明,圖中省略位元線、字元線及主動元件,且相同元件採用相同之標號。記憶胞24僅包含一感光元件(未顯示),且感光元件上方並未設置任何的遮光結構,因此外來光源可穿過介電層(未顯示)直接到達感光元件,並引發對應的電子訊號,而可視為存在或記錄有一位元資料,例如程式編碼中的「1」。記憶胞26的感光元件上係則設有一不透光之遮光結構,例如金屬矽化物、金屬插塞、圖案化金屬層、黑色矩陣或兩種以上不同濾光範圍之彩色濾光片,因此當外來光源射向記憶胞26時,便會受到此不透光層的阻擋,而無法直接到達記憶胞26內之感光元件,故可視為存在或記錄有另一位元資料,例如程式編碼中的「0」。而記憶胞54、56的感光元件上的感光元件上則分別設有一半透光之遮光結構,紅色的彩色濾光片與綠色的彩色濾光片,因此在特定波長的外來光源才能引發相對應的電子訊號。例如記憶胞54受白光或紅光照射時,或記憶胞56受白光或綠光照射時,可視為存在或記錄有一位元資料,例如程式編碼中的「1」;反之, 對其他波長的外來光源,記憶胞54或記憶胞56內之感光元件皆無法感光,故可視為存在或記錄有另一位元資料,例如程式編碼中的「0」。Please refer to FIG. 5, which illustrates a light-controlled read-only memory 10 of other preferred embodiments of the present invention. Similarly, in order to simplify the description, bit lines, word lines, and active elements are omitted in the drawings, and the same elements are denoted by the same reference numerals. The memory cell 24 only includes a photosensitive element (not shown), and no light-shielding structure is disposed above the photosensitive element, so that the external light source can directly reach the photosensitive element through the dielectric layer (not shown) and generate corresponding electronic signals. It can be regarded as the existence or recording of a meta-data, such as "1" in the program code. The photosensitive element of the memory cell 26 is provided with an opaque light-shielding structure, such as a metal telluride, a metal plug, a patterned metal layer, a black matrix or two or more color filters of different filter ranges, so When the external light source is directed to the memory cell 26, it is blocked by the opaque layer and cannot directly reach the photosensitive element in the memory cell 26, so it can be regarded as having or recorded another bit data, such as in the program code. "0". The photosensitive elements on the photosensitive elements of the memory cells 54, 56 are respectively provided with a half-transparent light-shielding structure, a red color filter and a green color filter, so that an external light source at a specific wavelength can cause a corresponding light source. Electronic signal. For example, when the memory cell 54 is illuminated by white light or red light, or when the memory cell 56 is illuminated by white light or green light, it may be considered that one meta data exists, such as "1" in the program code; For other wavelengths of the external light source, the photosensitive element in the memory cell 54 or the memory cell 56 cannot be sensitive, so it can be regarded as having or recording another bit data, such as "0" in the program code.

所以,本較佳實施例之光控唯讀記憶體10在不同顏色的光照環境下,會選擇性組合而輸出不同的程式編碼,例如使用白光照射時,記憶胞24、記憶胞54與記憶胞56內之感光元件均可感光作用,而記憶胞26內之感光元件則無法感光,即構成一第一程式編碼;當使用紅光照射時,記憶胞24與記憶胞54內之感光元件均可感光作用,而記憶胞26與記憶胞56內之感光元件皆無法感光,便組合構成一第二程式編碼;當使用綠光照射時,記憶胞24與記憶胞56內之感光元件均可感光作用,而記憶胞26與記憶胞54內之感光元件皆無法感光,則組合構成一第三特定程式編碼。而且第一程式編碼、第二程式編碼、第三程式編碼係分別對應不同功能的程式編碼。Therefore, the light-controlled read-only memory 10 of the preferred embodiment selectively combines and outputs different program codes in different color illumination environments, for example, when using white light, the memory cell 24, the memory cell 54 and the memory cell The photosensitive element in 56 can be photosensitive, and the photosensitive element in the memory cell 26 cannot be photosensitive, which constitutes a first program code; when using red light, the memory cell 24 and the photosensitive element in the memory cell 54 can be Photosensitive, while the memory cells 26 and the photosensitive elements in the memory cells 56 are not sensitive, they combine to form a second code; when using green light, both the memory cells 24 and the photosensitive elements in the memory cells 56 can be photosensitive. However, the memory cells 26 and the photosensitive elements in the memory cells 54 are not sensitive to light, and the combination constitutes a third specific program code. Moreover, the first program code, the second program code, and the third program code respectively correspond to program codes of different functions.

請參考第6圖,第6圖係例示本發明之又一較佳實施例之光控唯讀記憶體10。同樣地,為簡化說明,圖中省略位元線、字元線及主動元件,且相同元件採用相同之標號。本較佳實施例更可將本發明之感光記憶胞當作控制不同程式編碼的選取開關元件。如第6圖所示,光控唯讀記憶體10包含一主程式編碼CODE A與複數個副程式編碼CODE B、CODE C、CODE D、CODE E,以及複數個記憶胞24、26、54、58分別耦合於主、副程式編碼之間。記憶胞24僅包含一感光元件(未顯示),且感光元件上方並未設置任何的遮光結構,因此外來光源可穿過介電層(未顯示)直接到達感光元件,並引發對應的電子訊號,而可視為選取副程式編碼CODE B。記憶胞26的感光元件上係則設有一不透光之遮光結構,例如金屬矽化物、金屬插塞、圖案化金屬層、黑色矩陣或兩種以上不同顏色之彩色濾光片,因此,當外來光源射向記憶胞26時,便會受到不透光層的阻擋,而無法直接到達記憶胞26內之感光元件,故可視為不選取副程式編碼CODE C。記憶胞54、58的感光元件上則分別設有紅色的彩色濾光片與藍色的彩色濾光片等之遮光結構,因此記憶胞54受白光或紅光照射時,或記憶胞58受白光或藍光照射時,可視為分別選取副程式編碼CODE D與CODE E;反之,對其他波長的外來光源,記憶胞54或記憶胞58內之感光元件皆無法感光,故可視為不選取副程式編碼D、E。因此在不同的光照環境下,便可組合不同的主程式編碼與副程式編碼而輸出不同的程式編碼。此外,本發明更可將主程式編碼或副程式編碼中部份或全部的記憶胞,採前述二實施例之具有透光與不透光之遮光結構之記憶胞的結構設計,使得主程式編碼或複數個副程式編碼本身,在不同的光照環境下就可以呈現出不同的程式編碼,然後再搭配本實施例之記憶胞24、26、54、58來選取 不同副程式編碼並組合主程式編碼輸出,以達到多段式光控程式編碼。Please refer to FIG. 6. FIG. 6 illustrates a light-controlled read-only memory 10 according to still another preferred embodiment of the present invention. Similarly, in order to simplify the description, bit lines, word lines, and active elements are omitted in the drawings, and the same elements are denoted by the same reference numerals. In the preferred embodiment, the photosensitive memory cell of the present invention can be regarded as a selected switching element for controlling different program codes. As shown in FIG. 6, the light-controlled read-only memory 10 includes a main program code CODE A and a plurality of sub-program codes CODE. B, CODE C, CODE D, CODE E, and a plurality of memory cells 24, 26, 54, 58 are coupled between the primary and secondary program codes, respectively. The memory cell 24 only includes a photosensitive element (not shown), and no light-shielding structure is disposed above the photosensitive element, so that the external light source can directly reach the photosensitive element through the dielectric layer (not shown) and generate corresponding electronic signals. It can be regarded as selecting the subcode encoding CODE B. The photosensitive element of the memory cell 26 is provided with an opaque light-shielding structure, such as a metal telluride, a metal plug, a patterned metal layer, a black matrix or two or more color filters of different colors, so that when When the light source is directed to the memory cell 26, it is blocked by the opaque layer and cannot directly reach the photosensitive element in the memory cell 26. Therefore, it can be regarded as not selecting the subcode CODE C. The photosensitive elements of the memory cells 54, 58 are respectively provided with a light-blocking structure such as a red color filter and a blue color filter, so that the memory cell 54 is exposed to white light or red light, or the memory cell 58 is white light. Or when the blue light is irradiated, it can be regarded as selecting the subprogram code CODE D and CODE E respectively; on the contrary, for the external light source of other wavelengths, the photosensitive element in the memory cell 54 or the memory cell 58 cannot be sensitive, so it can be regarded as not selecting the subprogram code. D, E. Therefore, in different lighting environments, different main program codes and sub-program codes can be combined to output different program codes. In addition, the present invention can further encode some or all of the memory cells of the main program code or the sub-program code, and adopt the structural design of the memory cells having the light-transmitting and opaque light-shielding structures of the foregoing two embodiments, so that the main program code Or a plurality of sub-program codes themselves, which can display different program codes under different illumination environments, and then select the memory cells 24, 26, 54, 58 of the embodiment to select Different subprograms encode and combine the main program code output to achieve multi-segment light control program coding.

綜合上述說明,本發明之光控唯讀記憶體可有效整合於現行互補式金氧半導體影像感測器(CIS)等之感光二極體的半導體製程,亦即晶圓廠可先大量生產具有感光二極體陣列的半導體晶圓,再藉由變更金屬矽化物、介層插塞(via plug)、金屬層、黑色矩陣等之不透光層或彩色濾光片等之半透光層的光罩佈局設計,以對應於一預定之程式編碼,便可構成本發明之光控唯讀記憶體,或僅製備一般的互補式金氧半導體影像感測器(CIS),大幅節省成本並有效減化唯讀記憶體的製程。而且本發明之光控唯讀記憶體更可具有兩種以上的程式編碼,並於不同的光照環境下,輸出不同功能的程式編碼,徹底改變習知唯讀記憶體一次僅能儲存單一固定的程式編碼且不具有變化性的特性。Based on the above description, the light-controlled read-only memory of the present invention can be effectively integrated into the semiconductor process of the photoreceptor diode of the current complementary CMOS image sensor (CIS), that is, the fab can be mass-produced first. The semiconductor wafer of the photodiode array is further modified by a semi-transmissive layer such as a metal halide, a via plug, a metal layer, a black matrix, or the like, or a color filter. The reticle layout design can constitute the light-controlled read-only memory of the present invention corresponding to a predetermined program code, or can only prepare a general complementary CMOS image sensor (CIS), which is cost-effective and effective. Reduce the process of read-only memory. Moreover, the light-controlled read-only memory of the present invention can have more than two kinds of program codes, and output different function code codes in different illumination environments, and completely change the conventional read-only memory to store only a single fixed one at a time. Program-encoded and non-changing features.

以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

1、34‧‧‧基底1, 34‧‧‧ base

2-1、2-2、2-3、2-4、2-5、2-6‧‧‧n型摻雜區2-1, 2-2, 2-3, 2-4, 2-5, 2-6‧‧‧n doped regions

3-1、3-2、3-3、3-4、3-5‧‧‧絕緣薄膜3-1, 3-2, 3-3, 3-4, 3-5‧‧‧ insulating film

4-1、4-2、4-3、4-4、4-5‧‧‧多晶矽薄膜4-1, 4-2, 4-3, 4-4, 4-5‧‧‧ polysilicon film

5-1、5-2、5-3、5-4、5-5、5-6、46‧‧‧第一金屬導線層5-1, 5-2, 5-3, 5-4, 5-5, 5-6, 46‧‧‧ first metal wire layer

6-1、6-2、6-3、6-4、6-5、6-6、48‧‧‧第二金屬導線層6-1, 6-2, 6-3, 6-4, 6-5, 6-6, 48‧‧‧ second metal wire layer

10-1、10-2、10-5、10-6‧‧‧介層插塞10-1, 10-2, 10-5, 10-6‧‧‧ interlayer plug

BL0 、BL1 、BL2 、BL3 、BL4 ‧‧‧位元線BL 0 , BL 1 , BL 2 , BL 3 , BL 4 ‧‧‧ bit lines

WL1 、WL2 、WL3 、WL4 、WL5 ‧‧‧字元線WL 1 , WL 2 , WL 3 , WL 4 , WL 5 ‧‧ ‧ character lines

10‧‧‧光控唯讀記憶體10‧‧‧Light-controlled read-only memory

12‧‧‧週邊電路區12‧‧‧ peripheral circuit area

14‧‧‧記憶體陣列區14‧‧‧Memory array area

16‧‧‧字元線解碼器16‧‧‧ character line decoder

18‧‧‧位元線解碼器18‧‧‧ bit line decoder

23‧‧‧主動元件23‧‧‧Active components

20、22、24、26、28、30、32、54、56、58‧‧‧記憶胞20, 22, 24, 26, 28, 30, 32, 54, 56, 58‧‧‧ memory cells

36、36a、36b、36c、36d、36e‧‧‧感光元件36, 36a, 36b, 36c, 36d, 36e‧‧‧ photosensitive elements

38、40、42‧‧‧介電層38, 40, 42‧‧‧ dielectric layer

44‧‧‧金屬矽化物44‧‧‧Metal Telluride

50‧‧‧第一彩色濾光層50‧‧‧First color filter layer

52‧‧‧第二彩色濾光層52‧‧‧Second color filter layer

CODE A‧‧‧主程式編碼CODE A‧‧‧ main program code

CODE B、CODE C、CODE D、CODE E‧‧‧副程式編碼CODE B, CODE C, CODE D, CODE E‧‧‧ subprogram code

第1圖為一習知唯讀記憶體(ROM)的結構示意圖。Figure 1 is a schematic diagram showing the structure of a conventional read only memory (ROM).

第2圖為本發明之一較佳實施例之光控唯讀記憶體的示意 圖。2 is a schematic view of a light-controlled read-only memory according to a preferred embodiment of the present invention Figure.

第3圖為光控唯讀記憶體之記憶體陣列區的上視圖。Figure 3 is a top view of the memory array area of the light-controlled read-only memory.

第4圖為第3圖沿AA’切線之剖面示意圖。Fig. 4 is a schematic cross-sectional view taken along line AA' of Fig. 3.

第5圖為本發明之其他較佳實施例之光控唯讀記憶體的示意圖。Figure 5 is a schematic diagram of a light-controlled read-only memory of other preferred embodiments of the present invention.

第6圖為本發明之又一較佳實施例之光控唯讀記憶體的示意圖。Figure 6 is a schematic diagram of a light-controlled read-only memory according to still another preferred embodiment of the present invention.

10‧‧‧光控唯讀記憶體10‧‧‧Light-controlled read-only memory

12‧‧‧週邊電路區12‧‧‧ peripheral circuit area

14‧‧‧記憶體陣列區14‧‧‧Memory array area

16‧‧‧字元線解碼器16‧‧‧ character line decoder

18‧‧‧位元線解碼器18‧‧‧ bit line decoder

23‧‧‧主動元件23‧‧‧Active components

20、22‧‧‧記憶胞20, 22‧‧‧ memory cells

36、36a、36b、36c、36d、36e‧‧‧感光元件36, 36a, 36b, 36c, 36d, 36e‧‧‧ photosensitive elements

BL1 、BL2 、BL3 、BL4 ‧‧‧位元線BL 1 , BL 2 , BL 3 , BL 4 ‧‧‧ bit lines

WL1 、WL2 、WL3 、WL4 、WL5 ‧‧‧字元線WL 1 , WL 2 , WL 3 , WL 4 , WL 5 ‧‧ ‧ character lines

Claims (20)

一種光控唯讀記憶體(optical controlled ROM),其包含:一基底;複數個均具有一感光元件(optical sensor)之記憶胞(memory cell)位於該基底上;以及至少一遮光結構設置於部分該等感光元件正上方,且該遮光結構係用以遮蔽光源進入部分該感光元件,以一預定佈局選擇性遮蔽部分之該等感光元件,其中該記憶胞包含一預定的程式編碼,且該預定的程式編碼的狀態係由該等感光元件被遮蔽與否而控制。 An optically controlled read-only memory (optical controlled ROM) comprising: a substrate; a plurality of memory cells each having an optical sensor are disposed on the substrate; and at least one light shielding structure is disposed on the portion The light-receiving elements are disposed directly above, and the light-shielding structure is configured to shield the light source from entering the photosensitive element, and selectively masking the photosensitive elements in a predetermined layout, wherein the memory cell includes a predetermined program code, and the predetermined The state of the program code is controlled by whether or not the photosensitive elements are shielded. 如請求項1所述之光控唯讀記憶體,其中各該感光元件係選自電荷耦合裝置(CCD)或互補式金氧半導體影像感測器(CIS)等感光二極體(photodiode)之群組。 The photo-controlled read-only memory according to claim 1, wherein each of the photosensitive elements is selected from a photodiode such as a charge coupled device (CCD) or a complementary MOS image sensor (CIS). Group. 如請求項1所述之光控唯讀記憶體,其中該預定佈局係對應於一程式編碼。 The light-controlled read-only memory of claim 1, wherein the predetermined layout corresponds to a program code. 如請求項3所述之光控唯讀記憶體,其中被該遮光結構遮蔽部分之該等感光元件以及未被該遮光結構遮蔽之該等感光元件係構成該程式編碼。 The photo-controlled read-only memory of claim 3, wherein the photosensitive elements that are shielded by the light-shielding structure and the photosensitive elements that are not shielded by the light-shielding structure constitute the program code. 如請求項1所述之光控唯讀記憶體,其中該遮光結構係為一不透光層,且該遮光結構係選自金屬矽化層、金屬插塞、金屬層或堆疊至少二種不同濾光範圍之彩色濾光層之群組。 The light-controlled read-only memory according to claim 1, wherein the light-shielding structure is an opaque layer, and the light-shielding structure is selected from the group consisting of a metal germanium layer, a metal plug, a metal layer or a stack of at least two different filters. A group of color filter layers of the light range. 如請求項1所述之光控唯讀記憶體,其中該遮光結構係為一半透光層。 The light-controlled read-only memory of claim 1, wherein the light-shielding structure is a half-transmissive layer. 如請求項6所述之光控唯讀記憶體,其中該遮光結構包含一彩色濾光層。 The photo-controlled read-only memory of claim 6, wherein the light-shielding structure comprises a color filter layer. 如請求項1所述之光控唯讀記憶體,其中該光控唯讀記憶體另包含複數條字元線、複數條位元線以及複數個主動元件,且各該主動元件係分別電連接各該感光元件至一組相對應之該字元線以及該位元線。 The light-controlled read-only memory of claim 1, wherein the light-controlled read-only memory further comprises a plurality of word lines, a plurality of bit lines, and a plurality of active elements, and each of the active elements is electrically connected Each of the photosensitive elements is coupled to a corresponding set of word lines and the bit lines. 如請求項8所述之光控唯讀記憶體,其中該主動元件係包含MOS電晶體或放大器(active amplifier)。 The photo-controlled read-only memory of claim 8, wherein the active component comprises an MOS transistor or an active amplifier. 一種光控唯讀記憶體之製作方法,其包含:提供一基底;於該基底上形成複數個感光元件;以及以一預定佈局選擇性於部分之該等感光元件正上方的表面 分別形成一第一遮光結構,其中該第一遮光結構係用以遮蔽光源進入部分該感光元件,其中該光控唯讀記憶體的狀態係由該等感光元件被遮蔽與否而控制。 A method for fabricating a light-controlled read-only memory, comprising: providing a substrate; forming a plurality of photosensitive elements on the substrate; and selectively selecting a portion of the surface directly above the photosensitive elements in a predetermined layout Forming a first light-shielding structure, wherein the first light-shielding structure is used to shield the light source from entering the photosensitive element, wherein the state of the light-controlled read-only memory is controlled by whether the photosensitive elements are shielded or not. 如請求項10所述之製作方法,其中該預定佈局係對應於一程式編碼。 The method of claim 10, wherein the predetermined layout corresponds to a program code. 如請求項10所述之製作方法,其中該第一遮光結構包含金屬矽化物層。 The method of claim 10, wherein the first light shielding structure comprises a metal halide layer. 如請求項10所述之製作方法,另包含該基底上形成一介電層並覆蓋該等感光元件與該等第一遮光結構。 The method of claim 10, further comprising forming a dielectric layer on the substrate and covering the photosensitive elements and the first light shielding structures. 如請求項13所述之製作方法,另包含該介電層上形成至少一第二遮光結構並選擇性遮蔽表面未形成有該第一遮光結構之該等感光元件。 The method of claim 13, further comprising forming the at least one second light-shielding structure on the dielectric layer and selectively shielding the photosensitive elements on the surface from which the first light-shielding structure is not formed. 如請求項14所述之製作方法,其中形成該第二遮光結構的方法包含多重金屬內連線(multilevel interconnection)製程或彩色濾光片製程。 The method of fabricating the method of claim 14, wherein the method of forming the second light-shielding structure comprises a multi-level interconnection process or a color filter process. 如請求項14所述之製作方法,其中該第二遮光結構包含堆疊至少二種不同濾光範圍之彩色濾光層。 The method of claim 14, wherein the second light shielding structure comprises a color filter layer stacking at least two different filter ranges. 一種光控唯讀記憶體之製作方法,其包含:提供一基底;於該基底上形成複數個感光元件;該基底上形成一介電層並覆蓋該等感光元件;以及於該介電層表面形成至少一遮光結構,且該遮光結構係以一預定佈局選擇性遮蔽部分位於正下方之該等感光元件,以遮蔽光源進入部分該感光元件,其中該光控唯讀記憶體的狀態係由該等感光元件被遮蔽與否而控制。 A method for fabricating a light-controlled read-only memory, comprising: providing a substrate; forming a plurality of photosensitive elements on the substrate; forming a dielectric layer on the substrate and covering the photosensitive elements; and surface of the dielectric layer Forming at least one light-shielding structure, and the light-shielding structure selectively shields the photosensitive elements directly under the portion in a predetermined layout to shield the light source from entering the photosensitive element, wherein the state of the light-controlled read-only memory is The photosensitive element is controlled by being shielded or not. 如請求項17所述之製作方法,其中該預定佈局係對應於一程式編碼。 The method of claim 17, wherein the predetermined layout corresponds to a program code. 如請求項17所述之製作方法,其中形成該遮光結構的方法包含多重金屬內連線(multilevel interconnection)製程或彩色濾光片製程。 The method of fabricating the method of claim 17, wherein the method of forming the light-shielding structure comprises a multi-level interconnection process or a color filter process. 如請求項17所述之製作方法,其中該遮光結構包含堆疊至少二種不同濾光範圍之彩色濾光層。 The method of claim 17, wherein the light shielding structure comprises a color filter layer stacking at least two different filter ranges.
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