TWI478436B - - Google Patents

Info

Publication number
TWI478436B
TWI478436B TW100133192A TW100133192A TWI478436B TW I478436 B TWI478436 B TW I478436B TW 100133192 A TW100133192 A TW 100133192A TW 100133192 A TW100133192 A TW 100133192A TW I478436 B TWI478436 B TW I478436B
Authority
TW
Taiwan
Application number
TW100133192A
Other languages
Chinese (zh)
Other versions
TW201312849A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to TW100133192A priority Critical patent/TW201312849A/en
Publication of TW201312849A publication Critical patent/TW201312849A/en
Application granted granted Critical
Publication of TWI478436B publication Critical patent/TWI478436B/zh

Links

TW100133192A 2011-09-15 2011-09-15 Manufacturing process of laminated type balun TW201312849A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW100133192A TW201312849A (en) 2011-09-15 2011-09-15 Manufacturing process of laminated type balun

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW100133192A TW201312849A (en) 2011-09-15 2011-09-15 Manufacturing process of laminated type balun

Publications (2)

Publication Number Publication Date
TW201312849A TW201312849A (en) 2013-03-16
TWI478436B true TWI478436B (en) 2015-03-21

Family

ID=48482670

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100133192A TW201312849A (en) 2011-09-15 2011-09-15 Manufacturing process of laminated type balun

Country Status (1)

Country Link
TW (1) TW201312849A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW512654B (en) * 2000-12-07 2002-12-01 Ind Tech Res Inst Highly integrated multi-layer circuit module having multi-layer ceramic substrates and embedded passive devices
TW200849707A (en) * 2007-02-16 2008-12-16 Quantenna Communications Inc Efficient balun
US20090014837A1 (en) * 2007-07-13 2009-01-15 Petari Incorporation Semiconductor device and method of manufacturing the same
US20100079189A1 (en) * 2008-09-30 2010-04-01 National Taiwan University Miniaturized dual-balanced mixer circuit based on a double spiral layout architecture

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW512654B (en) * 2000-12-07 2002-12-01 Ind Tech Res Inst Highly integrated multi-layer circuit module having multi-layer ceramic substrates and embedded passive devices
TW200849707A (en) * 2007-02-16 2008-12-16 Quantenna Communications Inc Efficient balun
US20090014837A1 (en) * 2007-07-13 2009-01-15 Petari Incorporation Semiconductor device and method of manufacturing the same
US20100079189A1 (en) * 2008-09-30 2010-04-01 National Taiwan University Miniaturized dual-balanced mixer circuit based on a double spiral layout architecture

Also Published As

Publication number Publication date
TW201312849A (en) 2013-03-16

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