TWI478221B - Semiconductor device manufacturing method and bonding device - Google Patents

Description

Semiconductor device manufacturing method and bonding device

The present invention relates to a method of fabricating a semiconductor device and a bonding device.

A semiconductor device in which a wafer such as a controller wafer or a memory wafer is placed on a substrate on which a wiring layer is formed is known. In such a semiconductor device, an electrode pad provided on a substrate is connected to an electrode pad provided on a wafer by metal wires (hereinafter also referred to as bonding), whereby the substrate and the wafer are electrically connected to each other.

In such a semiconductor device, as the communication speed is increased, it is desirable to suppress the cost and reduce the noise. Further, there is a case where gold plating is formed on the surface of the electrode pad formed on the substrate. Therefore, it is desirable to suppress the amount of gold used in order to suppress the cost. Further, in the case where the amount of gold used is suppressed so that the gold plating of the pad portion is thinned, the connection strength between the metal wire and the pad can be ensured, and the bonding can be smoothly performed continuously.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device which can suppress the cost and reduce noise while ensuring the connection strength between the metal wires and the pads, and can be smoothly and continuously bonded.

According to an aspect of the present invention, there is provided a method of fabricating a semiconductor device, which is characterized in that a capillary of a gold wire is supplied from a tip end, and a closed state of the switchable wire and a clamped state of the wire are released. , The substrate-side electrode pad formed on the first surface of the substrate and the wafer-side electrode pad formed on the wafer mounted on the first surface of the substrate are connected by wires. The manufacturing method of the semiconductor device includes the steps of: forming nickel plating by electroless plating on the substrate-side electrode pad; forming palladium plating by electroless plating on nickel plating; and forming the outermost layer on the palladium plating layer by Electroless plating forms gold plating; the capillary is brought close to the wafer, one end of the wire is connected to the wafer side electrode pad; in the open state of the clamper, the capillary is moved above the wafer; and the capillary is directed toward the substrate side electrode pad Move in 1 direction. The movement of the capillary in the first direction is performed to a position directly above the one engagement position. The capillary is moved in the second direction opposite to the first direction, and is close to the substrate-side electrode pad, and the wire is once bonded to the substrate-side electrode pad. The wires are secondarily joined at a position that is moved further in the first direction than the primary bonding position. Moving the capillary over the substrate switches the clamp to a closed state, moving the capillary further above the substrate.

Hereinafter, a semiconductor device and a method of manufacturing the same according to embodiments of the present invention will be described in detail with reference to the accompanying drawings. Further, the present invention is not limited to the embodiment.

(First embodiment)

Fig. 1 is a view showing a schematic configuration of a bonding apparatus according to a first embodiment. The bonding device 50 includes a control unit 1 , a memory unit 2 , a capillary tube 3 , and a clamper 4 . Fig. 2 is a view showing an example of a semiconductor device manufactured using the bonding apparatus shown in Fig. 1.

First, a schematic configuration of the semiconductor device 60 manufactured using the bonding device 50 will be described. The semiconductor device 60 includes a substrate 5 and a controller (wafer) 7) Memory chip (wafer) 9. The substrate 5 is, for example, a wiring layer provided inside or on the surface of the insulating resin substrate, and also serves as a component mounting substrate and a terminal forming substrate. As such a substrate 5, a printed wiring board using a glass-epoxy resin or a glass-BT resin (bismaleimide. triazine resin) or the like can be used. A plurality of electrode pads (substrate side electrode pads 6) are formed on the first surface 5a of the substrate 5.

Fig. 3 is an enlarged plan view showing an enlarged portion of a substrate-side electrode pad portion of a substrate. Figure 4 is an arrow cross-sectional view taken along line A-A of Figure 3. As shown in FIGS. 3 and 4, a wiring pattern 13 as a wiring layer is formed inside the substrate 5. The wiring pattern 13 is formed, for example, of copper, formed by electrolytic plating, and formed using a rolled copper foil. Further, the wiring pattern 13 may be formed by a multilayer structure using electrolytic plating, electroless plating, or rolled copper foil.

The surface of the wiring pattern 13 is covered with a protective film 14 such as a solder resist. A part of the protective film 14 is opened by etching to expose a part of the wiring pattern 13. The exposed wiring pattern 13 portion functions as the substrate-side electrode pad 6.

On the surface of the exposed portion of the wiring pattern 13, first, nickel plating (Ni) is performed by electroless plating to form the first layer 31. Next, palladium plating (Pd) is performed on the surface of the nickel plating by electroless plating to form the second layer 32. Then, gold plating (Au) is performed on the surface of the palladium plating by electroless plating to form the third layer 33. Therefore, gold plating is performed on the outermost layer (third layer) of the substrate-side electrode pad 6 by electroless plating.

The controller 7 selects a memory chip 9 for writing or reading data from a plurality of memory chips 9. The controller 7 controls the selected memory crystal The writing of the data of the slice 9 or the reading of the data stored in the selected memory chip 9 is performed. The controller 7 is mounted on the first surface 5a of the substrate 5. A plurality of electrode pads (wafer-side electrode pads 8) are formed on the upper surface of the controller 7.

The memory chip 9 is a memory element such as a NAND flash memory. The memory chip 9 is provided with a plurality of blocks, and is laminated and mounted on the first surface 5a of the substrate 5. The memory chips 9 are stacked one on another in a plane on the plane. On the upper surface of the memory chip 9, an electrode pad (wafer-side electrode pad 10) is formed in a portion where the memory wafer 9 is stacked in a staggered manner.

The substrate-side electrode pad 6 and the wafer-side electrode pads 8 and 10 are connected by a wire 11, whereby the wiring pattern 13 formed on the substrate 5 and the controller 7 and the memory chip 9 are electrically connected to each other. The wires 11 are provided in such a manner as to be joined by the bonding device 50 to connect the electrode pads 6, 8, 10, but the details thereof will be described later. The resin mold portion 12 is made of synthetic resin, and covers the first surface 5a side of the substrate 5, and seals the controller 7, the memory chip 9, and the wires 11 mounted on the first surface 5a.

Next, a schematic configuration of the joining device 50 will be described. The bonding device 50 includes a control unit 1, a memory unit 2, a capillary tube 3, and a clamper 4. The control unit 1 operates the capillary 3 and the clamp 4 based on the program stored in the memory unit 2, and is connected between the electrode pads 6, 8, and 10 in the semiconductor device 60 by the wires 11.

The capillary 3 has a through hole 3a at its center portion, and a gold wire 11 is inserted into the through hole 3a. The wire 11 is supplied from the front end of the capillary 3 through the through hole 3a. The front end of the capillary 3 has a shape in which the wire 11 can be pressed and connected to the electrode pads 6, 8, 10.

The clamper 4 is provided on the root side of the capillary 3, and can switch between the closed state of the wire 11 inserted into the through hole 3a of the capillary 3 and the open state of the loosened wire 11. The capillary 3 and the clamper 4 are three-dimensionally movable by a driving device (not shown), and a specific operation is performed by the control of the control unit 1.

Next, the order in which the wires 11 are bonded to the electrode pads 6, 8, 10 by the bonding device 50 will be described. Figure 5 is a flow chart for explaining the joining sequence. 6 to 17 are cross-sectional views showing a portion where the wire 11 is joined, and showing a step of joining. In FIGS. 6 to 17, the axis perpendicular to the first surface 5a of the substrate 5 is referred to as a Y-axis, and the direction away from the first surface 5a of the substrate 5 is described as a positive direction. Moreover, the axis orthogonal to the Y-axis and parallel to the direction from the wafer-side electrode pad 8 toward the substrate-side electrode pad 6 is taken as the X-axis, and the direction from the wafer-side electrode pad 8 toward the substrate-side electrode pad 6 is made to be the positive direction. Description. The following procedure is performed by the control unit 1 by operating the capillary 3 or the clamper 4 in accordance with the control program stored in the memory unit 2.

First, the leading end of the wire 11 is joined to the wafer side electrode pad 8 of the controller 7 (step S1). Further, the electrode pad to be bonded may be the wafer side electrode 10 of the memory chip 9. As shown in Fig. 6, a spherical body 20 is formed at the front end of the wire 11 projecting from the front end of the capillary 3. The ball 20 is formed by melting a wire 11 protruding from the tip end of the capillary 3 by a spark generated by applying a voltage between a torch (not shown) and the wire 11. In step S1, as shown in FIG. 7, the capillary 3 that has moved toward the upper side of the wafer-side electrode pad 8 is lowered in the negative direction of the Y-axis, that is, the wafer-side electrode pad 8, and is pressed against the wafer-side electrode by squeezing the ball 20. The pad 8 is joined. In the bonding of the wires 11, a load and an ultrasonic wave are applied to the wires 11 by the capillary 3.

Next, as shown in FIG. 8, the clamper 4 is opened, and the capillary 3 is moved upward in the positive direction along the Y-axis (step S2). In general, when the capillary 3 is moved upward, the movement in the other direction is also performed so that the wire 11 has a ring shape, but the description thereof is omitted here.

Next, the capillary 3 is moved in the direction along the positive direction (first direction) of the X-axis, that is, in the direction of the substrate-side electrode pad 6 (step S3). In addition, the step of bonding the lead wires 11 to the front end of the capillary 3 by the substrate side electrode pad 6 is performed twice, and will be described in detail below. In the following description, the first bonding is referred to as primary bonding, and the second bonding is referred to as secondary bonding. Further, the position at which the bonding is performed once is illustrated as the primary bonding point 21, and the position at which the secondary bonding is performed is illustrated as the secondary bonding point 22. In step S3, the capillary 3 is moved to a position directly above the joint point 21. In other words, it moves further along the positive side of the X-axis than the position of the capillary 3 in the X-axis direction when the bonding is performed once.

Next, as shown in FIG. 10, the capillary 3 is moved in the negative direction along the X-axis (the second direction opposite to the first direction), and is lowered toward the primary bonding point 21, and the wire 11 is once bonded to the primary bonding point. 21 (step S4). Here, the movement of the capillary 3 of step S4 will depict the trajectory indicated by the arrow P1. Further, in one engagement of the wires 11, a load and an ultrasonic wave are applied to the wires 11 by the capillary 3.

Next, as shown in FIG. 11, the capillary 3 is moved upward in the positive direction along the Y-axis (step S5). Then, as shown in Fig. 12, the capillary 3 is moved right above the secondary joint 22 (step S6). As shown in FIG. 13, the capillary 3 is lowered toward the secondary joint 22, and the wire 11 is secondarily joined to the secondary joint. 22 (step S7). Further, in the secondary bonding of the wires 11, the load and the ultrasonic waves are applied to the wires 11 by the capillary 3.

Next, as shown in FIG. 14, the capillary 3 is moved upward in the positive direction along the Y-axis (step S8). Here, in steps S3 to S8, the clamper 4 is maintained in the open state. However, as shown in FIG. 15, the clamper 4 is switched to the closed state, and the wire 11 is held by the clamper 4 (step S9). Then, in a state where the wire 11 is held by the clamper 4, the capillary 3 is moved upward in the positive direction along the Y-axis (step S10), thereby breaking the tail portion of the wire 11. According to the above sequence, the electrode pads 6, 8 are electrically joined by the wires 11.

Further, after the tail portion of the wire 11 is pulled, a lamp 11 (not shown) is used to cause a spark 11 to protrude from the front end of the capillary 3, and a ball 20 is formed again at the front end of the wire 11 (see also Fig. 17). Returning from this state to the step of step S1, the joining of the plurality of electrode pads can be continuously performed.

Fig. 18 is a view showing the bonding strength between the wire 11 and the substrate-side electrode pad 6. In Fig. 18, the vertical axis shows the joint strength, and the horizontal axis shows the amount by which the capillary 3 moves more than once the joint point 21 in step S3, that is, exceeds the amount of movement. Further, the case where the amount of movement exceeds the same distance as the diameter (wire diameter) of the wire 11 is displayed as 100%. Further, the positive direction (first direction) along the X-axis is +, and the negative direction (second direction) along the X-axis is -. That is, in Fig. 18, the relationship between the excess movement amount of the capillary 3 and the bonding strength of the wire 11 is shown.

As shown in Fig. 18, the amount of excess movement of the capillary 3 temporarily passing through the primary joint 21 before the primary bonding is performed is provided, whereby the bonding strength of the wire 11 can be improved. Moreover, as shown in FIG. 18, when the excess movement amount is set to about 75%, it is connected. The combined strength reaches a peak.

Fig. 19 is a view showing the bonding strength between the wire 11 and the substrate-side electrode pad 6. In Fig. 19, the joint strength is shown vertically, and the distance between the primary joint 21 and the secondary joint 22 is shown on the horizontal axis. Further, the distance between the primary bonding point 21 and the secondary bonding point 22 is displayed as 100% of the same distance as the wire diameter. Further, the positive direction (first direction) along the X-axis is +, and the negative direction (second direction) along the X-axis is -. That is, the relationship between the distance between the primary bonding point 21 and the secondary bonding point 22 and the bonding strength of the wire 11 is shown in FIG.

As shown in FIG. 19, even if the secondary bonding 22 which is closer to the negative side of the X-axis than the primary bonding point 21 is subjected to the secondary bonding, the bonding strength does not decrease, and the ratio of the excess movement amount can be maintained. One joint further increases the joint strength.

As described above, the substrate-side electrode pad 6 is subjected to nickel plating, palladium plating, or gold plating by electroless plating, and as in the case of performing electrolytic plating, the electrolytic plating line may not be provided on the substrate 5. The electrolytic plating line is a wiring for causing plating on the electrode pad 6 to extend from the electrode pad 6 or the wiring pattern 13 to the end portion of the substrate 5 or its vicinity. Since the electrolytic plating line remains on the semiconductor device 60 as a product, it becomes a reflection source of the signal to be transmitted and received, and is likely to cause reflection of noise. On the other hand, in the present embodiment, nickel plating, palladium plating, or gold plating is performed by electroless plating, and the electrolytic plating line is not provided. Therefore, reflection noise can be suppressed, and communication quality can be improved.

Further, the electrolytic plating line is removed by electroless plating, so that it is easy to ensure that a power supply region is provided between the wiring patterns 13 (a line for supplying power to the controller 7 or the memory chip 9 or grounding the controller 7 or the memory chip 9) Electrical connection Space). By setting the power supply area, the power supply impedance of the substrate 5 is reduced, and the power switch noise can be reduced. Further, the electrolytic plating line provided in the case where the wiring pattern 13 is formed by electrolytic plating can be removed by the etching step before the protective film 14 is formed. Therefore, even if electrolytic plating is used in the formation of the wiring pattern 13, it is difficult to become a reflection noise. the reason.

Further, the gold plating provided on the outermost layer of the substrate-side electrode pad 6 is formed by electroless plating. Here, when gold plating is formed by electroless plating, it is performed by replacing nickel and gold of the first layer 31. This nickel has a limit with the replacement of gold, and it is impossible to form the third layer 33 by gold plating to a sufficient thickness. If the thickness of the gold plating which becomes the outermost layer is insufficient, the bonding strength with the wire 11 by joining is apt to become low. However, in the present embodiment, by providing the primary bonding of the wires 11 exceeding the amount of movement, the bonding strength of the wires 11 is improved. Therefore, it is easy to obtain sufficient joint strength even in the case where the thickness of the gold plating which becomes the outermost layer is insufficient. Further, if the gold plating is formed to be thin, the amount of gold used can be suppressed, and the cost can be suppressed.

Further, after the second bonding is performed on the basis of one bonding, the tail portion of the wire 11 is removed, so that the tail portion can be stably removed. That is, the amount of protrusion (mass) of the wire 11 required to form the spherical body 20 can be stabilized on the capillary 3 side. Further, the tail portion which retains the sufficient joint area can be removed on the side of the substrate-side electrode pad 6. Since the amount of protrusion of the wire 11 is stabilized, the formation of the ball 20 is also stabilized, so that the bonding can be smoothly performed continuously. Further, as shown in Fig. 19, the joint strength of the wires 11 by the secondary bonding is also not affected at all.

In the present embodiment, an example in which both the controller 7 and the memory chip 9 are provided on the first surface 5a of the substrate 5 will be described, but the invention is not limited thereto. example For example, the controller 7 may be disposed on the memory chip 9, and the memory chip 9 may be disposed on the controller 7. That is, the installation position of the controller 7 or the memory chip 9 in the semiconductor device 60 is not limited, and the present embodiment can be applied as long as the wafer-side electrode pads 8 and 10 are connected to the substrate-side electrode pad 6 by the wires 11. form.

Further, the connection target to be connected to the substrate-side electrode pad 6 by the wire 11 is not limited to the electrode pad of the controller 7 or the memory chip 9, and may be an electrode pad of another wafer provided in the semiconductor device 60. Further, the number of blocks of the memory chip 9 is not limited to two, and may be one or three or more.

Other effects or modifications can be easily derived by those skilled in the relevant art. Therefore, the broader aspects of the invention are not limited to the specific details and representative embodiments described above. Accordingly, various modifications may be made without departing from the spirit and scope of the inventions of the inventions.

1‧‧‧Control Department

2‧‧‧Memory Department

3‧‧‧ Capillary

3a‧‧‧through hole

4‧‧‧ clamp

5‧‧‧Substrate

5a‧‧‧ first side

6‧‧‧Substrate side electrode pad

7‧‧‧ Controller (wafer)

8‧‧‧ wafer side electrode pad

9‧‧‧ memory chip

10‧‧‧ wafer side electrode pad

11‧‧‧Wire

12‧‧‧Resin Model Department

13‧‧‧Wiring pattern

14‧‧‧Protective film

20‧‧‧ sphere

21‧‧‧One joint

22‧‧‧Second joint

31‧‧‧1st floor

32‧‧‧2nd floor

33‧‧‧3rd floor

50‧‧‧Joining device

60‧‧‧Semiconductor device

Fig. 1 is a view showing a schematic configuration of a bonding apparatus according to a first embodiment.

Fig. 2 is a view showing an example of a semiconductor device manufactured using the bonding apparatus shown in Fig. 1.

Fig. 3 is an enlarged plan view showing an enlarged portion of a substrate-side electrode pad portion of a substrate.

Figure 4 is an arrow cross-sectional view taken along line A-A of Figure 3.

Figure 5 is a flow chart for explaining the joining sequence.

Figure 6 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Figure 7 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Fig. 8 is a cross-sectional view showing a portion where the wires are joined, and is a view showing a step of bonding.

Figure 9 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Figure 10 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Figure 11 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Figure 12 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Figure 13 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Figure 14 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Fig. 15 is a cross-sectional view showing a portion where the wires are joined, and is a view showing a step of bonding.

Figure 16 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Figure 17 is a cross-sectional view of a portion where the wires are joined, and is a view showing a step of bonding.

Fig. 18 is a view showing the bonding strength between the wire and the substrate-side electrode pad.

Fig. 19 is a view showing the bonding strength between the wire and the substrate-side electrode pad.

Claims (6)

A method of manufacturing a semiconductor device, which is formed by a capillary connected to a gold wire from a tip end, and a clamp capable of switching between a closed state of the wire and an open state of the wire; a substrate-side electrode pad on the first surface of the substrate, and a wafer-side electrode pad formed on the wafer mounted on the first surface of the substrate, and nickel plating is formed on the substrate-side electrode pad by electroless plating Palladium plating is formed by electroless plating on the nickel plating, and gold plating is formed on the outermost layer of the palladium plating by electroless plating, and the capillary is brought close to the wafer, and one end of the wire is connected to The wafer-side electrode pad moves the capillary toward the upper side of the wafer in an open state of the clamper, and moves the capillary toward the first direction of the substrate-side electrode pad to bring the capillary closer to the substrate-side electrode pad. And bonding the lead wire to the substrate-side electrode pad once, and moving the capillary tube to the first side at a position more than the primary bonding position The position of the above-described second bonding wire to the substrate-side electrode pad, so that the capillary is moved upward toward the substrate, the clamp is switched to the closed state, the capillary tube so that it more to the upward movement of the substrate; The movement of the capillary in the first direction is performed to a position directly above the primary bonding position, and the primary bonding system moves the capillary toward the second direction opposite to the first direction and approaches the substrate side The electrode pad is used. A method of manufacturing a semiconductor device, which is formed on a substrate by a capillary connected to a lead from a tip end, and a clamp capable of switching between a closed state of the wire and an open state of the wire, and connecting the wire to the substrate a substrate-side electrode pad on the first surface and a wafer-side electrode pad formed on the wafer mounted on the first surface of the substrate, and gold plating is formed on the outermost layer of the electrode pad on the substrate side by electroless plating The capillary is brought close to the wafer, and one end of the wire is connected to the wafer-side electrode pad, and in the open state of the clamp, the capillary is moved upwardly over the wafer, and the capillary is directed toward the substrate-side electrode pad. Moving in the first direction, the capillary is brought close to the substrate-side electrode pad, and the lead wire is once bonded to the substrate-side electrode pad; and the movement of the capillary in the first direction is performed directly above the primary bonding position. a position in which the capillary is moved in a second direction opposite to the first direction, Adjacent to the substrate side electrode pad Row. The method of manufacturing a semiconductor device according to claim 2, wherein after the one-time bonding, the capillary is moved upward over the substrate-side electrode pad, and the capillary is moved to move in the first direction at a position more than the primary bonding. The position double joins the above wires. The method of manufacturing a semiconductor device according to claim 3, wherein after the second bonding, the capillary is moved over the substrate, the clamp is switched to a closed state, and the capillary is moved upward of the substrate. The method of manufacturing a semiconductor device according to any one of claims 2 to 4, wherein nickel plating is formed on the substrate-side electrode pad by electroless plating, and palladium plating is formed by electroless plating on the nickel plating. The gold plating is formed on the palladium plating. A bonding apparatus for connecting a substrate-side electrode pad formed on a first surface of a substrate with a gold wire and a wafer-side electrode pad formed on a wafer mounted on a first surface of the substrate, comprising: a tong And a control unit that switches the closed state of the wire and the open state of the wire; and a control unit that brings the capillary that is supplied with the wire from the front end to the wafer, and connects one end of the wire to the wafer side electrode a pad, wherein the capillary moves to the upper side of the wafer in an open state of the clamper, and the capillary faces the first side of the substrate-side electrode pad Moving, the capillary is brought close to the substrate-side electrode pad, and the lead wire is once bonded to the substrate-side electrode pad, and the capillary is moved upward over the substrate-side electrode pad to move the capillary to be more than the one-time bonding position. The lead wire is secondarily joined to the position moving in the first direction, the capillary is moved upward of the substrate, the clamp is switched to a closed state, and the capillary is moved upward of the substrate; The movement in the first direction is performed to a position directly above the primary bonding position, and the primary bonding system is performed while moving the capillary in a second direction opposite to the first direction and approaching the substrate-side electrode pad.