TWI462286B - A epitaxial substrate for electronic components and a method for manufacturing the same - Google Patents

Description

Epitaxial substrate for electronic component and method of manufacturing the same

The present invention relates to an epitaxial substrate for an electronic component and a method of manufacturing the same, and more particularly to an epitaxial substrate for an electronic component for HEMT and a method of manufacturing the same.

In recent years, high electron mobility transistors (HEMTs) have been widely used as high-speed field effect transistors (FETs) in order to increase the speed of IC devices and the like. In the field effect type transistor, as shown in the schematic diagram of FIG. 1, a channel layer 22 and an electron supply layer 23 are laminated on a substrate 21, and a source electrode 24 is disposed on the surface of the electron supply layer 23. A drain electrode 25 and a gate electrode 26 are formed. When the device is in operation, the electrons migrate in the order of the source 24, the electron supply layer 23, the channel layer 22, the electron supply layer 23, and the drain 25, and the lateral direction is the current conduction direction, and the lateral electron transfer is applied to The voltage of the gate 26 is controlled. In the HEMT, electrons generated at the junction interface of the electron supply layer 23 and the channel layer 22 having different band gaps can migrate at a high speed as compared with a general semiconductor.

As described above, the lateral electron transfer, that is, the current, is controlled by the gate voltage, however, even if the gate voltage is turned off, the current generally does not become zero. Such a current flowing when the gate voltage is turned off is called a leakage current, and if the leakage current is increased, the power consumption is increased, and as a result, heat generation and the like are caused. The leakage current is generally divided into a lateral leakage current and a longitudinal leakage current, and the lateral leakage current refers to a leakage current flowing between two electrodes (for example, between the source 24 and the drain 25) disposed on the side surface of the electron supply layer 23; The leakage current refers to a leakage current that flows between the electrodes on the side surface of the electron supply layer 23 and the side surface of the substrate 21, respectively.

Patent Document 1 discloses a technique in which a HEMT including a buffer layer, a carbon concentration transition layer, a channel layer, and an electron supply layer on a substrate is formed such that a carbon concentration increases from a channel layer toward a buffer layer, whereby Reduce the lateral leakage current generated in the buffer layer and the carbon concentration migration layer, and increase the lateral withstand voltage.

Further, Patent Document 2 discloses a technique of suppressing a semiconductor in a semiconductor element including a superlattice buffer layer, a channel layer, and an electron supply layer on a substrate so that the superlattice buffer layer contains carbon. The lateral leakage current of the component and the lateral withstand voltage.

Further, Patent Document 3 discloses a technique of forming a first group III nitride underlayer formed on a single crystal substrate and a second group III nitride underlayer formed on the first group III nitride underlayer. The interface contains an acceptor impurity, and the interface is in the thickness direction of the second group III nitride underlayer, and the concentration of the acceptor impurity is reduced, thereby suppressing the lateral leakage current of the semiconductor element.

However, when the HEMT is operated at a high frequency, in addition to reducing the leakage current, it is also necessary to reduce the loss when the high frequency signal is applied. Such a loss occurs when a charge is present on the substrate or the epitaxial film thereon because the depletion layer cannot be efficiently expanded, causing the interaction of the electrodes disposed on the surface of the substrate with capacitive or inductive properties.

Further, Patent Document 4 discloses a technique of increasing the specific resistance of a Si single crystal substrate to prevent impurities from being mixed, thereby reducing carriers to suppress loss of semiconductor electronic components in a high frequency region.

However, in the invention described in Patent Document 1, when the group III nitride layer is grown on the substrate, since the GaN-based low-temperature buffer layer is used, pits are generated due to the reaction with Ga in the case where Si is used as the substrate. The perforation defect is a problem, and there is a problem that the longitudinal withstand voltage is deteriorated. Further, in the invention disclosed in Patent Document 2, although the leakage current in the superlattice buffer layer can be suppressed, the leakage current at the interface between the channel layer and the superlattice buffer layer is not sufficiently suppressed, resulting in resistance to longitudinal and lateral directions. The reason for the pressure to deteriorate. Further, Patent Documents 3 and 4 do not consider the longitudinal withstand voltage, and the withstand voltage of the buffer layer is not investigated at all. Therefore, when used in a semiconductor substrate such as a Si substrate, longitudinal withstand voltage cannot be ensured.

Patent Document 1: Japanese Laid-Open Patent Publication No. 2007-251144

Patent Document 2: Japanese Laid-Open Patent Publication No. 2005-85852

Patent Document 3: Japanese Laid-Open Patent Publication No. 2003-282598

Patent Document 4: Japanese Patent Publication No. 2008-522447

An object of the present invention is to provide an epitaxial substrate for an electronic component which can achieve both a reduction in lateral leakage current and a lateral withstand voltage characteristic and which can improve longitudinal withstand voltage, and a method for producing the same.

In order to achieve the above object, the constitution of the present invention is as follows.

(1) An epitaxial substrate for an electronic component comprising: a Si single crystal substrate; a buffer layer as an insulating layer formed on the Si single crystal substrate; and a group III nitride epitaxially grown on the buffer layer a main laminate formed by a layer and having a lateral direction as a current conduction direction, wherein the buffer layer has at least an initial growth layer connected to the Si single crystal substrate, and a superlattice multilayer on the initial growth layer a superlattice laminate composed of a structure; the initial growth layer is composed of an AlN material, and the superlattice layer system is alternately layered by B _a1 Al _b1 Ga _c1 In _d1 N(0≦a ₁ ≦1,0≦b ₁ ≦1,0≦c ₁ ≦1,0≦d ₁ ≦1, a ₁ +b ₁ +c ₁ +d ₁ =1) the first layer of the material, and the band gap is different from the first layer B _a2 Al _b2 Ga _c2 In _d2 N(0≦a ₂ ≦1,0≦b ₂ ≦1,0≦c ₂ ≦1,0≦d ₂ ≦1, a ₂ +b ₂ +c ₂ +d ₂ =1) The second layer composed of the material; at least one of the superlattice laminate or the portion of the main laminate on the buffer layer side has a C concentration of 1 × 10 ¹⁸ /cm ³ or more.

(2) The epitaxial substrate for an electronic component according to the above aspect, wherein at least one of the superlattice laminate and the buffer layer side portion of the main laminate has a C concentration of 1 × 10 ¹⁸ /cm ³ the above.

(3) The epitaxial substrate for an electronic component according to the above item 1, wherein the first layer is made of an AlN material, and the second layer is made of Al _b2 Ga _c2 N (a ₂ =0, 0 ≦ b ₂ ≦ 0.5, 0.5 ≦ c ₂ <1, d ₂ =0) material composition.

(4) The epitaxial substrate for an electronic component according to the above 1, 2, or 3, wherein the Si single crystal substrate has a specific resistance of 1000 Ω ‧ cm or more, and the III group from the initial growth layer to a depth of 0.1 μm The total concentration of the atoms is 1 × 10 ¹⁶ /cm ³ or less, and the total concentration of the group III atoms at a depth of 0.3 μm from the initial growth layer is 1 × 10 ¹⁵ /cm ³ or less.

(5) A method for producing an epitaxial substrate for an electronic component, comprising sequentially forming a buffer layer as an insulating layer on a Si single crystal substrate, and epitaxially growing a plurality of group III nitride layers on the buffer layer The main laminate body has a lateral direction as a current conduction direction, and the buffer layer has at least an initial growth layer connected to the Si single crystal substrate and a superlattice multilayer structure on the initial growth layer. a superlattice laminate; the initial growth layer is composed of an AlN material, and the superlattice laminated system is alternately layered by B _a1 Al _b1 Ga _c1 In _d1 N(0≦a ₁ ≦1,0≦b ₁ ≦1 , 0≦c ₁ ≦1,0≦d ₁ ≦1, a ₁ +b ₁ +c ₁ +d ₁ =1) the first layer composed of the material, and the B _a2 different from the first layer by the band gap Al _b2 Ga _c2 In _d2 N(0≦a ₂ ≦1,0≦b ₂ ≦1,0≦c ₂ ≦1,0≦d ₂ ≦1, a ₂ +b ₂ +c ₂ +d ₂ =1) The second layer formed of the material is formed; and at least one of the superlattice laminate or the portion of the main laminate on the buffer layer side has a C concentration of 1 × 10 ¹⁸ /cm ³ or more.

(6) The method for producing an epitaxial substrate for an electronic component according to the item 5, wherein at least one of the superlattice laminate and the buffer layer side portion of the main laminate has a C concentration of 1 × 10 ¹⁸ /cm ³ or more.

(7) The method for producing an epitaxial substrate for an electronic component according to the fifth or sixth aspect, wherein the Si single crystal substrate is formed to have a specific resistance of 1000 Ω ‧ cm or more, and from the initial growth layer to a depth of 0.1 μm The total concentration of the group III atoms is 1 × 10 ¹⁶ /cm ³ or less, and the total concentration of the group III atoms at a depth of 0.3 μm from the initial growth layer is 1 × 10 ¹⁵ /cm ³ or less.

An epitaxial substrate for an electronic component according to the present invention includes: a buffer layer and a predetermined main laminate; the buffer layer includes an initial growth layer made of an AlN material and a predetermined superlattice laminate; and a superlattice laminate, Or at least one of the buffer layer side portions of the main laminate has a C concentration of 1 × 10 ¹⁸ /cm ³ or more, whereby not only the lateral leakage current reduction and the lateral withstand voltage characteristics but also the longitudinal resistance can be improved. Pressure.

Moreover, the epitaxial substrate for an electronic component which can be obtained by the present invention has a buffer layer and a predetermined main laminate, the buffer layer comprising an initial growth layer composed of an AlN material and a predetermined superlattice laminate; At least one of the lattice layer body or the buffer layer side portion of the main laminate has a C concentration of 1 × 10 ¹⁸ /cm ³ or more, whereby not only the lateral leakage current reduction but also the lateral withstand voltage characteristics can be satisfactorily balanced. It can also increase the longitudinal withstand voltage.

Further, in the epitaxial substrate for an electronic component of the present invention, the Si single crystal substrate has a specific resistance of 1000 Ω ‧ or more, and the total concentration of the group III atoms from the initial growth layer to a depth of 0.1 μm is set at 1 × 10 ¹⁶ / In the case of cm ³ or less, the total concentration of the group III atoms at the depth of 0.3 μm from the initial growth layer is 1 × 10 ¹⁵ /cm ³ or less, and in addition to the above effects, the high frequency operation can be reduced. loss.

Further, in the present invention, when the Si single crystal substrate is formed to have a specific resistance of 1000 Ω ‧ cm or more, the total concentration of the group III atoms from the initial growth layer to the depth of 0.1 μm is set to be 1 × 10 ¹⁶ /cm ³ or less. Further, the total concentration of the group III atoms at a depth of 0.3 μm from the initial growth layer is 1 × 10 ¹⁵ /cm ³ or less, and the electronic component can be reduced in addition to the above effects. Crystal substrate.

Next, an embodiment of the epitaxial substrate for an electronic component of the present invention will be described with reference to the drawings. 2 is a schematic view showing a cross-sectional structure of an epitaxial substrate for an electronic component of the present invention. Moreover, for convenience of description, the thickness direction of FIG. 2 is more exaggerated.

As shown in FIG. 2, the epitaxial substrate 1 for an electronic component of the present invention is an epitaxial substrate for an electronic component having a lateral direction as a current conduction direction, and the Si single crystal substrate 2 is formed on the Si single crystal substrate 2. The buffer layer 3 of the insulating layer and the main layer body 4 formed by epitaxially growing the group III nitride layer of the plurality of layers on the buffer layer 3 are characterized in that the buffer layer 3 has at least an initial connection with the Si single crystal substrate 2 The growth layer 5 and the superlattice laminate 6 composed of a superlattice multilayer structure on the initial growth layer 5: the initial growth layer 5 is composed of an AlN material, and the superlattice laminate 6 is an interactive laminate by B _A1 Al _b1 Ga _c1 In _d1 N(0≦a ₁ ≦1,0≦b ₁ ≦1,0≦c ₁ ≦1,0≦d ₁ ≦1, a ₁ +b ₁ +c ₁ +d ₁ =1 The first layer 6a is composed of B _a2 Al _b2 Ga _c2 In _d2 N (0≦a ₂ ≦1,0≦b ₂ ≦1,0≦c ₂ ≦ different from the first layer 6a) 1,0≦d ₂ ≦1, a ₂ +b ₂ +c ₂ +d ₂ =1) The second layer 6b composed of the material; the superlattice laminate 6 or the buffer layer 3 side of the main laminate 4 the portion 4 'of at least one, C is a concentration of 1 × 10 ¹⁸ / cm ³ or more, since Components described above, not only a good balance between reducing the lateral leakage current and breakdown voltage characteristic of a lateral, longitudinal also enhance the breakdown voltage.

The plane orientation of the Si single crystal substrate 2 is not particularly limited, and any of the (111), (100), and (110) planes may be used, but in order to make the (0001) plane of the group III nitride have good surface flatness. For growth, it is preferred to use the (111) face. Also, a p-type or an n-type conduction type is acceptable. As for the conductivity of the Si single crystal substrate 2, a high specific resistance substrate having a high insulating property of 10000 Ω ‧ cm or more can be suitably applied depending on the application to a low specific resistance substrate as low as 0.001 Ω ‧ cm. In the method for producing the Si single crystal substrate 2, Si, SiC, or the like may be epitaxially grown on the surface of the substrate by various methods such as a CZ method or an FZ method. Further, a film formed of an oxide film, a nitride film, or a carbonized film may be formed on the surface of the substrate.

In particular, when an epitaxial substrate for an electronic component having excellent high-frequency characteristics is produced, a substrate having a specific resistance of 1000 Ω‧cm or more is preferably used. Such a substrate is preferably produced by an FZ method which is easy to achieve high purity of Si crystal.

Further, by forming the initial growth layer 5 with an AlN material, the reaction with the Si single crystal substrate 2 can be suppressed, and the longitudinal withstand voltage can be improved. When the initial growth layer 5 is formed of a group III nitride material containing Ga or In, it is suppressed that Ga and In react with Si of the substrate to cause defects, and perforation defects are caused in the epitaxial film to lower the longitudinal withstand voltage. The situation. However, the AlN material referred to herein may also contain less than 1% of trace impurities (whether intentional or unintentional), for example, may contain the above Ga, In or Si, H, O, C, B, Mg. , As, P and other impurities.

In particular, when an epitaxial substrate for an electronic component having excellent high-frequency characteristics is produced, it is preferable that the Si single crystal substrate has a specific resistance of 1000 Ω·cm or more, and a group III atom having a depth of 0.1 μm from the initial growth layer. The total concentration is 1 × 10 ¹⁶ /cm ³ or less, and the total concentration of the group III atoms at a depth of 0.3 μm from the initial growth layer is 1 × 10 ¹⁵ /cm ³ or less. By using a substrate with a high specific resistance, the depletion layer can be effectively expanded, and the loss of the electronic component during high frequency operation caused by the combination of the carrier formed on the surface of the substrate and the capacitive or inductive charge of the charge existing on the substrate can be suppressed. . In particular, the specific resistance of the Si single crystal substrate is preferably 5,000 Ω ‧ cm or more, and the loss at the time of high frequency operation tends to be saturated. Further, since the group III atom functions as a p-type impurity in the Si single crystal substrate, it is possible to suppress the capacitance or electric power of the electrode formed on the surface of the substrate and the p-type impurity so as to have the above-described concentration range. The loss of electronic components caused by the combination of sensibility and high frequency operation. Further, the impurity concentration was measured using SIMS analysis. In this case, the impurity concentration distribution in the depth direction was measured while etching from the inner surface side (substrate side). At this time, the impurity concentration of Al is preferably smaller than the impurity concentration of Ga. The reason is that the activation energy of Al is smaller than that of Ga, and it is easier to generate a p-type carrier.

As shown in the figure, in order to produce an epitaxial substrate for an electronic component having excellent high-frequency characteristics, in order to prevent impurities from being mixed into the Si single crystal substrate during epitaxial growth, it is important to:

(1) lowering the film formation temperature, and (2) suppressing the island-like growth of the initial growth layer AlN to promote two-dimensional growth. In order to achieve the second point described above, it is preferable to suppress excessive nitridation on the surface of the Si polycrystalline substrate to make the nitride film thickness less than 1 nm or not to be nitrided. The reason is based on the following assumptions: if the surface of the Si single crystal substrate is excessively nitrided, the diffusion rate of the raw material on the outermost surface of the substrate becomes faster, and AlN is grown as an island. As a result, the exposed portion of the substrate during initial growth causes a group III material such as Al or Ga. The spread.

When the C concentration of the superlattice laminate 6 is set to 1 × 10 ¹⁸ /cm ³ or more, the longitudinal withstand voltage can be increased, and the C concentration of the portion 4' of the main laminate 4 on the buffer layer 5 side is set to 1 × 10 ¹⁸ /cm ³ or more, which can increase the lateral withstand voltage and suppress the lateral leakage current. Further, in order to prevent pits from being generated by excessively increasing impurities, it is preferable to make the C concentration of the liquid or the like less than 1 × 10 ²⁰ /cm ³ . As for the other impurity qualities, although it is not particularly limited, it is preferable to suppress the mixing of the donor impurities (Si, O, Ge) having a shallow impurity level, but if it is contained, the carbon of the above-mentioned donor grade can be compensated. , can tolerate some degree of mixing. Further, the impurity concentration was analyzed by SIMS, and the impurity concentration distribution in the depth direction was measured by etching from the side of the surface.

Here, "the lateral direction is the current conduction direction", as shown in FIG. 1, means that the current flows from the source 24 to the drain 25, mainly in the width direction of the laminated body, and sandwiches the semiconductor with, for example, a pair of electrodes. In the configuration, the current flows mainly in the longitudinal direction (ie, the thickness direction of the laminated body), and has different meanings.

Here, the term "interlayer laminated superlattice laminate" means that the first layer 6a and the second layer 6b are periodically laminated. It is also possible to include a layer other than the first layer 6a and the second layer 6b (for example, a composition migration layer).

The C concentration of the portion 4' on the buffer layer 3 side of the main laminate 4 is preferably higher than the C concentration of the superlattice laminate 6. In the portion 4', due to the influence of the difference in lattice constant between the buffer layer 3 and the main laminate 4, it is seen that the difference is curved in the lateral direction or obliquely, forming a path through which leakage current easily flows. Therefore, the portion 4' is more likely to have a leakage current flowing through the buffer layer 3. In order to suppress the leakage current, it is preferable to set the concentration to C as described above. In addition, if the thickness of the portion 4' on the side of the buffer layer 3 of the main laminate 4 is less than 0.1 μm, the portion having a small C concentration may have a sharp difference in bending, and therefore, it is set to be 0.1 μm or more. The thickness is preferred. The upper limit of the thickness of the portion 4' is not particularly specified from the viewpoint of improvement in withstand voltage and reduction in leakage current, and can be appropriately set from the viewpoint of suppressing bending and cracking of the substrate. In this case, only the composition of the group III element of the portion 4' is changed, or the C concentration or the composition of the group III element of the portion of the channel layer 4a opposite to the buffer layer from the portion 4' is changed. The way of rapid change can also take the form of continuous change.

The first layer 6a constituting the superlattice laminate 6 is preferably made of an AlN material, and the second layer 6b is preferably made of Al _b2 Ga _c2 N (a ₂ =0, 0 < b ₂ ≦ 0.5, 0.5 ≦ c ₂ <1, d ₂ =0) material composition. Since the band gap difference between the first layer 6a and the second layer 6b increases the longitudinal withstand voltage, it is preferable to increase the composition difference as much as possible and take a larger band gap as much as possible. When a mixed crystal is produced from a group III nitride semiconductor material, since the difference in band gap is the largest among AlN (6.2 eV) and GaN (3.5 eV), it is preferable to form a superlattice structure using an AlGaN material. When the lower limit of the composition difference is less than 0.5, since the stress relaxation due to the difference in lattice constant between the Si single crystal and the group III nitride is insufficient, cracks are formed, so that the composition difference is preferably 0.5 or more. Further, in terms of the upper limit of the composition difference, although a large composition difference is preferable, since the withstand voltage of the AlGaN layer itself progresses to increase the withstand voltage, it is preferable that the second layer having a small band gap contains at least Al. In a way, the composition difference of Al is less than 1. The reason is that C can be taken in efficiently when at least Al is contained. If the logarithm of the superlattice is at least 40 pairs or more, it is preferable because the pressure inconsistency can be reduced.

With respect to the thickness of each layer, the thickness of the first layer 6a having a large band gap is preferably greater than or equal to the thickness of the channel current, and is not less than the film thickness at which cracks are generated. For example, in the case of using AlN, it is preferably set to 2 to 10 nm. The thickness of the second layer 6b is appropriately set from the viewpoint of suppressing cracks and controlling bending. However, in order to effectively exhibit the strain buffering effect of the superlattice laminate structure to suppress the occurrence of cracks, it is preferable that the band gap is small. The thickness of the layer is thicker than the layer with a larger band gap and is set below 40 nm. Further, it is not always necessary to laminate the layers in the superlattice layer with the same film thickness and the same composition.

The epitaxial substrate 1 for electronic components is preferably used for HEMT. The main laminate 4 of the epitaxial substrate 1 shown in FIG. 2 may have B _a3 Al _b3 Ga _c3 In _d3 N(0≦a ₃ ≦1, 0≦b ₃ ≦1, 0≦c ₃ ≦1, 0通道d ₃ ≦1, a ₃ +b ₃ +c ₃ +d ₃ =1) the channel layer 4a formed, and the B _a4 Al _b4 Ga _c4 In _d4 N (0≦a ₄₎ with a band gap larger than the channel layer 4a ≦1,0≦b ₄ ≦1,0≦c ₄ ≦1,0≦d ₄ ≦1, a ₄ +b ₄ +c ₄ +d ₄ =1) The electron supply layer 4b composed of the material. In this case, both layers can be composed of a single or a complex number. In particular, in order to avoid scattering of the alloy and lower the specific resistance of the current conducting portion, at least the portion of the channel layer 4a to be connected to the electron supply layer 4b is preferably a GaN material.

The portion of the channel layer 4a on the opposite side to the buffer layer preferably has a low C concentration, and is preferably set to 4 × 10 ¹⁶ /cm ³ or less. The reason is that since this portion corresponds to the current conducting portion of the electronic component, it is preferable that impurities are not contained which may impede conductivity or cause current collapse. Further, in order to suppress leakage current caused by residual carriers from the n-type impurities, it is preferable that 1 × 10 ¹⁵ /cm ³ or more is present.

Next, an embodiment of a method of manufacturing an epitaxial substrate for an electronic component according to the present invention will be described with reference to the drawings.

As shown in FIG. 2, on the Si single crystal substrate 2, a buffer layer 3 as an insulating layer, and a main layer body 4 of a HEMT structure in which a plurality of layers of a group III nitride layer are epitaxially grown on the buffer layer 3 are sequentially formed, A method for manufacturing an epitaxial substrate 1 for an electronic component having a lateral direction as a current conduction direction, characterized in that the buffer layer 3 has an initial growth layer 5 connected to the Si single crystal substrate 2 and a supercrystal on the initial growth layer 5 a superlattice laminate 6 composed of a multi-layer structure; the initial growth layer 5 is composed of an AlN material, and the superlattice laminate 6 is an alternating layer of B _a1 Al _b1 Ga _c1 In _d1 N (0≦a ₁ ≦ 1,0≦b ₁ ≦1,0≦c ₁ ≦1,0≦d ₁ ≦1, a ₁ +b ₁ +c ₁ +d ₁ =1) The first layer 6a is formed, and the band gap is different B _a2 Al _b2 Ga _c2 In _d2 N in the first layer 6a (0≦a ₂ ≦1,0≦b ₂ ≦1,0≦c ₂ ≦1,0≦d ₂ ≦1, a ₂ +b ₂ + c ₂ +d ₂ =1) the second layer 6b composed of the material; at least one of the superlattice laminate 6 or the portion 4' of the buffer layer 3 side of the main laminate 4 is formed to have a C concentration of 1 × 10 ¹⁸ / cm ³ or more, since the above-described configuration, it can be manufactured with good longitudinal balance Lateral breakdown voltage characteristics and breakdown voltage characteristics, and can reduce the lateral leakage current of the electronic component by epitaxial substrate.

When growing by the CVD method, C added to the portion 4' of the superlattice laminate 6 and the buffer layer 3 side of the main laminate 4 can be added by several methods as described below.

The first method: a raw material gas containing C is separately added in the growth of the group III nitride. For example, methane, ethane, ethylene, acetylene, benzene, cyclopentane, and the like.

The second method: a methyl group, an ethyl group or the like in the organic metal is mixed into the epitaxial growth layer by growing the growth conditions of the group III nitride. The growth temperature, the growth pressure, the growth rate, the ammonia flow rate during growth, the hydrogen flow rate, the nitrogen flow rate, and the like are appropriately set to suppress the decomposition of the organic metal, whereby the C concentration added to the epitaxial growth layer can be adjusted.

Further, in the present application, the C concentration of the superlattice laminate 6 is measured by the SIMS after removing the thickness of the superlattice laminate 6. The C concentration of the portion 4' on the buffer layer 3 side of the main laminate 4 is measured by SIMS after removing the thickness of 1/2 of the above portion 4'.

1 and 2 show examples of representative embodiments, and the present invention is not limited to these embodiments. For example, an intermediate layer that does not adversely affect the effects of the present invention may be interposed between the layers, or other superlattice layers may be inserted, or a gradient may be added to the composition. Further, a nitride film, a carbonized film, an Al layer, or the like may be formed on the surface of the Si single crystal.

(Experimental Example 1)

600 μm thick (111) face 4 吋 Si single crystal substrate with specific resistance of 1×10 ^-1 Ω··cm, 1×10 Ω·cm, 2×10 ³ Ω··cm, and 1×10 ⁴ Ω·cm Upper growth layer (AlN material: thickness: 100 nm) and superlattice laminate (AlN: film thickness: 4 nm and Al _0.15 Ga _0.85 N: film thickness: 25 nm, total of 85 layers) to form a buffer layer in the superlattice The epitaxial growth channel layer (GaN material: 1.5 μm thick) and the electron supply layer (Al _0.25 Ga _0.75 material: thickness: 20 nm) were formed on the laminate to form a main laminate of the HEMT structure, and samples 1 to 4 were obtained. The C concentration of the superlattice laminate is changed, and any of the C concentrations of the buffer layer side portion of the main laminate is in the range of 1.5 to 2.0 × 10 ¹⁸ /cm ³ . Further, the portion of the channel layer on the electron supply layer side has a C concentration in the range of 0.8 to 3.5 × 10 ¹⁶ /cm ³ . The growth temperatures and pressures of the respective layers are shown in Table 1. The C concentration is adjusted by adjusting P ₁ in the table, and the C concentration is increased by decreasing the film forming pressure. The MOCVD method was used as a growth method, and TMA (trimethylaluminum) and TMG (trimethylgallium) were used as the group III raw materials, ammonia was used as the group V raw material, and hydrogen and nitrogen were used as the carrier gas. The film formation temperature herein refers to the temperature of the substrate itself measured by using a radiation thermometer during growth. Furthermore, the C concentration of the SIMS measurement, the system begins by etching the epitaxial layer side to the measuring apparatus manufactured by Cameca, using Cs ^- as an ion source, the ion energy to 8keV.

(Experimental Example 2)

An initial growth layer was formed of a GaN material (thickness: 20 nm) grown at 700 ° C, and the growth temperature and pressure of each layer were carried out under the conditions shown in Table 2, except that the same method as that of the sample 2 of Experimental Example 1 was carried out. To make sample 5.

3(a), 3(b), and 3(c) show the measurement results of the lateral withstand voltage, the lateral leakage current, and the longitudinal withstand voltage of the sample 2 and the sample 5. The measurement was carried out in the following manner.

Longitudinal: an ohmic electrode having a Ti/Al laminated structure composed of 80 μm Φ is formed on the surface of the substrate, and the outer surface of the ohmic electrode is etched to a thickness of 50 nm, and then the inner surface of the substrate is grounded to a metal plate, and the voltage is measured to flow between the electrodes. value.

Lateral direction: an ohmic electrode having a Ti/Al laminated structure composed of 200 μm □ (four corners) was disposed so as to be separated by a distance of 10 μm from each side, and after etching the thickness of the ohmic electrode at a thickness of 150 nm, the voltage was measured and passed through the two electrodes. Current value between. In this case, in order to suppress the discharge in the air, the electrodes are insulated by insulating oil. Further, in order to eliminate the influence of the leakage current on the inner surface of the substrate, an insulating plate is disposed under the substrate.

In the experimental example, the longitudinal withstand voltage is defined as a voltage value obtained by converting the longitudinal current value into the above-mentioned electrode area to a value of 10 ^-4 A/cm ² per unit area; the lateral withstand voltage is defined as: The current value is converted into a voltage value when the value of each side of the above electrode reaches 10 ^-4 A/cm; the lateral leakage current is defined as a current value at a lateral direction of 100V.

The C concentration of the superlattice laminate 6 was measured by using SIMS to remove the 1/2 thickness of the superlattice laminate 6. The C concentration of the portion 4' on the buffer layer 3 side of the main laminate 4 was measured by SIMS and the thickness of the portion 4' was removed by 1/2.

As a result of changing the C concentration of the superlattice laminate, it was confirmed that the lateral withstand voltage and the lateral leakage current were hardly changed. On the other hand, the longitudinal withstand voltage of the sample 2 exceeded the C concentration of the superlattice laminate by more than 1×. After 10 ¹⁸ /cm ³ , it is particularly eager to rise. Moreover, this phenomenon was confirmed after referring to the sample 5, and it was an inherent phenomenon when the initial growth layer was used as AlN. Further, with respect to the samples 1, 3, and 4, the same results as those of the sample 2 were obtained.

According to the above Experimental Examples 1 and 2, at least one of the C concentration of the superlattice laminate or the C concentration of the buffer layer side portion of the main laminate is 1 × 10 ¹⁸ /cm ³ or more. Effectively strengthen the longitudinal withstand voltage.

(Experimental Example 3)

The growth pressure of the superlattice laminate was set to 10 kPa, and the C concentration of the portion on the buffer layer side of the main laminate was changed, and the growth temperature and pressure of each layer were carried out under the conditions shown in Table 3, except that Samples 6 to 9 were prepared in the same manner as Samples 1 to 4 of Experimental Example 1. The C concentration is adjusted by adjusting P ₂ in the table, and the C concentration is increased by decreasing the film forming pressure. Any of the C concentrations of the superlattice laminates is in the range of 1.5 to 2.5 × 10 ¹⁸ /cm ³ .

4(a), 4(b), and 4(c) show the measurement results of the lateral withstand voltage, the lateral leakage current, and the longitudinal withstand voltage of the sample 6. As a result of changing the C concentration of the main laminate, it was confirmed that the lateral withstand voltage and the lateral leakage current hardly changed. On the other hand, the longitudinal withstand voltage of the sample 6 was such that the C concentration of the buffer layer side portion of the main laminate exceeded When 1 × 10 ¹⁸ /cm ³ , it is particularly sharply rising. Further, in the same manner as in Experimental Example 1, the samples 7 to 9 having different specific resistances to the Si single crystal substrate used were not significantly different from the results shown in FIGS. 4(a) to 4(c).

In the first to third examples, it was confirmed that the C-concentration on the buffer layer side of the superlattice laminate and the channel layer was set to a predetermined value or more in order to increase the longitudinal withstand voltage, whereby the longitudinal withstand voltage can be increased. In the following Experimental Example 4, the buffer layer C concentration was determined to be better than the predetermined values confirmed in Experimental Examples 1 to 3, and the improvement of the high-frequency characteristics was attempted.

(Experimental Example 4)

On the (111)-face ⁴吋 Si single crystal substrate having a specific resistance of 6 × 10 ³ Ω·cm and a thickness of 6 × 10 ³ Ω·cm, the initial growth layer (AlN material: 100 nm thick) and supercrystal were formed while suppressing the formation of the initial nitride layer. A laminate layer (AlN: film thickness: 4 nm and Al _0.15 Ga _0.85 N: film thickness: 25 nm, total of 85 layers) was grown to form a buffer layer, and the growth pressure and growth temperature conditions of Table 4 were observed on the superlattice laminate. A crystal growth channel layer (GaN material: 1.5 μm thick) and an electron supply layer (Al _0.25 Ga _0.75 N material: 20 nm thick) were formed to form a main laminate of a HEMT structure to obtain a sample 10. The C concentration of the superlattice laminate was 2.0 × 10 ¹⁸ /cm ³ , and the C concentration of the 0.2 μm thick portion on the buffer layer side of the main laminate was 3.0 × 10 ¹⁸ /cm ³ . Further, the C concentration of the portion of the electron supply layer of the channel layer was 1 × 10 ¹⁶ /cm ³ .

When the impurities in the Si single crystal substrate are observed by SIMS, as shown in Fig. 5 (a), impurities of the group III elements other than Al and Ga cannot be confirmed, and both Al and Ga are present at 1 × 10 ¹⁶ /cm ³ or less. A region of 1 × 10 ¹⁵ /cm ³ or more is a region within 0.2 μm from the interface between the Si single crystal and the initial growth layer. The interface between the Si single crystal substrate and the initial growth layer was confirmed by TEM, and the presence of a SiNx film having a thickness of 1 nm or more was not observed. Further, it has been confirmed that the Al concentration is lower than the Ga concentration in a region within 0.2 μm from the interface between the Si single crystal substrate and the initial growth layer. Further, the SIMS measurement of Al and Ga was carried out by etching from the side of the Si single crystal, and was carried out by a measuring device manufactured by Cameca using O ₂ ⁺ as an ion source at an ion energy of 3 keV.

In addition, as a result of performing CV measurement on the substrate using a mercury probe (manufactured by MSI Electronic Co., Ltd.) and an impedance analyzer (HP4284A), as shown in FIG. 5(b), it was confirmed that the film thickness of the depletion layer was expanded to about 8 μm. The frequency and amplitude of the AC component at the time of CV measurement were 100 kHz and 10 mV, respectively. Further, for the sake of convenience, the position of the interface between the Si single crystal and the initial growth layer was shifted to the substrate side by 0.05 μm at a position where the Si concentration was 1/5 or less in the SIMS measurement. The reason for this is to avoid etching roughening in the measurement of SIMS, and as a result, the Si single crystal and the epitaxial growth layer are mixed and exposed to cause an increase in the appearance of the group III element.

Further, the resistivity of the ⁴吋 Si single crystal substrate used was set to 2 × 10 ³ Ω ‧ cm, 8 × 10 ³ Ω ‧ cm, 12 × 10 ³ Ω ‧ cm, and the same as the sample The same test was also carried out on the samples 11, 12, and 13 prepared by the method of 10. In the same manner as described above, the impurities in the Si single crystal substrate were observed by SIMS, and the group III elements other than Al and Ga were not confirmed, and both Al and Ga were 1 × 10 ¹⁶ /cm ³ or less. The region of 1 × 10 ¹⁵ /cm ³ or more is a region of 0.2 μm or less from the interface between the Si single crystal and the initial growth layer. The interface between the Si single crystal substrate and the initial growth layer was confirmed by TEM, and the presence of a SiNx film having a thickness of 1 nm or more was not confirmed. Further, in the region of 0.2 μm or less from the interface between the Si single crystal substrate and the initial growth layer, it was confirmed that the Al concentration was lower than the Ga concentration on average. Further, it was confirmed that the film thickness of the depletion layer was expanded to about 6 μm, 8 μm, and 8 μm, respectively.

(Experimental Example 5)

On a (111)-face ⁴吋 Si single crystal substrate having a specific resistance of 5 × 10 ³ Ω·cm and a thickness of 5 × 10 ³ Ω·cm, only 10% of ammonia gas is contained with respect to hydrogen as a carrier gas before the initial growth layer starts to grow. The gas was flowed at 1050 ° C for 5 minutes to form an initial nitride layer, and the sample 14 was prepared in the same manner as the sample 2 except for the sample.

As a result of observing the impurities in the Si single crystal substrate by SIMS, as shown in Fig. 6(a), although Al and Ga are both 1 × 10 ¹⁶ /cm ³ or less, Al or Ga is present at 1 × 10 ¹⁵ /cm ^{3 .} The above area is 1 μm or more. As a result of confirming the interface between the Si single crystal substrate and the initial growth layer by TEM, it was confirmed that the SiNx film was present at about 1.5 nm. Further, it was confirmed that the Al concentration was higher than the Ga concentration. In addition, as a result of CV measurement using a mercury probe on the substrate, as shown in FIG. 6(b), it was confirmed that the thickness of the depletion layer was expanded to only about 2 μm.

(Experimental Example 6)

The sample 15 was prepared in the same manner as the sample 10 except that the growth temperature of the initial growth layer to the channel layer was raised under the conditions shown in Table 5.

As a result of observing the impurities in the Si single crystal substrate by SIMS, as shown in Fig. 7(a), the concentration of Ga is 1 × 10 ¹⁶ /cm ³ or more, and the region of 1 × 10 ¹⁵ /cm ³ or more exists. Below 0.3 μm. The interface between the Si single crystal substrate and the initial growth layer was confirmed by TEM, and the presence of a SiNx film having a thickness of 1 nm or more was not confirmed. Further, it was also confirmed that the Al concentration was lower than the Ga concentration. Furthermore, as shown in FIG. 7(b), the CV measurement using the mercury probe on the substrate was carried out, and it was confirmed that the thickness of the depletion layer was expanded to only about 2 μm.

Comparing Samples 1 to 13 with Samples 14 and 15, it was confirmed that Al and Ga were prevented from being mixed into the Si single crystal, and it was associated with the effective expansion of the exhausted layer. The ability to efficiently expand the depletion layer has the same meaning as to reduce the carrier in the epitaxial layer and in the Si single crystal substrate, that is, the electrode capable of suppressing formation on the surface of the substrate, and the capacitive or inductive property of the p-type impurity described above. The combination of the electronic components caused by the loss of high frequency operation. In particular, after the comparison of the sample 2 and the sample 14, the thinning of the nitride film can be derived, and after the comparison of the sample 2 and the sample 15, the film formation temperature of the epitaxial layer can be deduced, which can bring about the above. effect.

Furthermore, in all the epitaxial substrates prepared in the experimental examples, the results of evaluating the electrical characteristics of the channel layer portion by the Hall effect measurement method confirmed that the sheet resistance value was below 450 Ω/□ (four corners), and the mobility was Good characteristics above 1550cm ² /Vs.

[Industrial availability]

An epitaxial substrate for an electronic component according to the present invention, comprising: a buffer layer (having an initial growth layer made of an AlN material and a predetermined superlattice laminate) and a predetermined main laminate, the superlattice laminate, or At least one of the portions on the buffer layer side of the main laminate has a C concentration of 1 × 10 ¹⁸ /cm ³ or more, whereby the lateral leakage current and the lateral withstand voltage characteristics can be satisfactorily balanced, and the longitudinal withstand voltage can be improved. Further, in addition to the above characteristics, the specific resistance of the Si single crystal substrate is set to 1000 Ω ‧ cm or more, and the total concentration of the group III atoms on the initial growth layer side of the Si single crystal substrate is set to 1 × 10 ¹⁶ / In the case of cm ³ or less, the total concentration of the group III atoms at the depth of 0.3 μm is set to 1 × 10 ¹⁵ /cm ³ or less, whereby the loss at the time of application of the high-frequency signal can be reduced.

Further, according to the present invention, it is possible to manufacture an epitaxial substrate for an electronic component comprising a buffer layer (having an initial growth layer composed of an AlN material and a predetermined superlattice laminate) and a predetermined main laminate, and the superlattice At least one of the portion of the layered body or the buffer layer side of the main layered body has a C concentration of 1 × 10 ¹⁸ /cm ³ or more, whereby the lateral leakage current and the lateral withstand voltage characteristics can be satisfactorily balanced and improved. Longitudinal withstand voltage, further, in addition to the above characteristics, the loss at the time of application of a high frequency signal can be reduced.

1. . . Epitaxial substrate for electronic components

2. . . Si single crystal substrate

3. . . The buffer layer

4. . . Main laminate

4a. . . Channel layer

4b. . . Electronic supply layer

5. . . Initial growth layer

6. . . Superlattice laminate

6a. . . Tier 1

6b. . . Level 2

Figure 1 is a schematic cross-sectional view showing a general field effect transistor.

2 is a schematic cross-sectional view showing an epitaxial substrate for an electronic component of the present invention.

(a), (b), and (c) of FIG. 3 are graphs showing measurement results of lateral withstand voltage, lateral leakage current, and longitudinal withstand voltage, respectively.

(a), (b), and (c) of FIG. 4 are graphs showing measurement results of lateral withstand voltage, lateral leakage current, and longitudinal withstand voltage, respectively.

(a) and (b) of Fig. 5 are graphs showing the results of SIMS and the results of CV measurement, respectively.

(a) and (b) of Fig. 6 are graphs showing the results of SIMS and the results of CV measurement, respectively.

(a) and (b) of FIG. 7 are graphs showing the results of SIMS and the results of CV measurement, respectively.

1. . . Epitaxial substrate for electronic components

2. . . Si single crystal substrate

3. . . The buffer layer

4. . . Main laminate

4a. . . Channel layer

4b. . . Electronic supply layer

5. . . Initial growth layer

6. . . Superlattice laminate

6a. . . Tier 1

6b. . . Level 2

Claims (5)

An epitaxial substrate for an electronic component, comprising: a Si single crystal substrate; a buffer layer as an insulating layer formed on the Si single crystal substrate; and a group III nitride layer formed by epitaxially growing a plurality of layers on the buffer layer The main laminate body has a lateral direction as a current conduction direction, and the buffer layer has at least an initial growth layer connected to the Si single crystal substrate and a superlattice multilayer structure on the initial growth layer. a superlattice laminate; the initial growth layer is composed of an AlN material, and the superlattice laminated system is alternately layered by B _a1 Al _b1 Ga _c1 In _d1 N(0≦a ₁ ≦1,0≦b ₁ ≦1 , 0≦c ₁ ≦1,0≦d ₁ ≦1, a ₁ +b ₁ +c ₁ +d ₁ =1) the first layer composed of the material, and the B _a2 different from the first layer by the band gap Al _b2 Ga _c2 In _d2 N(0≦a ₂ ≦1,0≦b ₂ ≦1,0≦c ₂ ≦1,0≦d ₂ ≦1, a ₂ +b ₂ +c ₂ +d ₂ =1) The second layer composed of the material is formed; and the portion of the superlattice laminate and the buffer layer side of the main laminate has a C concentration of 1 × 10 ¹⁸ /cm ³ or more. The epitaxial substrate for an electronic component according to claim 1, wherein the first layer is composed of an AlN material, and the second layer is composed of Al _b2 Ga _c2 N (a ₂ =0, 0 ≦ b ₂ ≦ 0.5, 0.5 ≦c ₂ <1, d ₂ =0) material composition. The epitaxial substrate for an electronic component according to claim 1 or 2, wherein the specific resistance of the Si single crystal substrate is 1000 Ω. The total concentration of the group III atoms from the initial growth layer to the depth of 0.1 μm is 1×10 ¹⁶ /cm ³ or less, and the total of the group III atoms at a depth of 0.3 μm from the initial growth layer. The concentration is 1 × 10 ¹⁵ /cm ³ or less. A method for manufacturing an epitaxial substrate for an electronic component, comprising: sequentially forming a buffer layer as an insulating layer on a Si single crystal substrate; and forming a main layer of a group III nitride layer of a plurality of layers epitaxially grown on the buffer layer And a lateral direction as a current conduction direction, wherein the buffer layer has at least an initial growth layer connected to the Si single crystal substrate, and a super-lattice multilayer structure on the initial growth layer a lattice laminate; the initial growth layer is composed of an AlN material, and the superlattice layer system is alternately layered by B _a1 Al _b1 Ga _c1 In _d1 N(0≦a ₁ ≦1,0≦b ₁ ≦1,0 ≦c ₁ ≦1,0≦d ₁ ≦1, a ₁ +b ₁ +c ₁ +d ₁ =1) the first layer composed of the material, and the B _a2 Al _b2 different from the first layer by the band gap Ga _c2 In _d2 N(0≦a ₂ ≦1,0≦b ₂ ≦1,0≦c ₂ ≦1,0≦d ₂ ≦1, a ₂ +b ₂ +c ₂ +d ₂ =1) The second layer of the structure is formed; at least one of the superlattice laminate and the portion of the main laminate on the buffer layer side has a C concentration of 1 × 10 ¹⁸ /cm ³ or more. The method for manufacturing an epitaxial substrate for an electronic component according to claim 4, wherein the Si single crystal substrate is formed to have a specific resistance of 1000 Ω. The total concentration of the group III atoms from the initial growth layer to the depth of 0.1 μm is 1×10 ¹⁶ /cm ³ or less, and the total of the group III atoms at a depth of 0.3 μm from the initial growth layer. The concentration is 1 × 10 ¹⁵ /cm ³ or less.